Substrate processing method, substrate processing apparatus, and substrate processing system

Abstract

The present disclosure provides a substrate processing method, a substrate processing apparatus, and a substrate processing system. The substrate processing method is for processing a substrate including a first region and a second region having different compositions from each other. The substrate processing method includes: (a) preferentially forming a first deposition layer on the first region by a substrate processing apparatus; (b) after (a), forming a second deposition layer on the second region, the second deposition layer containing fluorine, and the second deposition layer being different from the first deposition layer; and (c) after (b), removing at least a portion of the second region and the second deposition layer. Steps (a) to (c) are repeated in order without satisfying a stop condition.

Description

Technical Field

[0001] This disclosure relates to a substrate processing method, substrate processing apparatus, and substrate processing system for selectively protecting a first region of a substrate while etching a second region of the substrate. Background Technology

[0002] Traditionally, the manufacture of electronic devices involves selective substrate etching. While protecting a first region of the substrate, a second region is selectively etched. In some processes, the second region, formed of silicon oxide, is selectively etched relative to the first region, formed of silicon nitride. These processes utilize fluorocarbon compounds deposited on both the first and second regions of the substrate. The fluorocarbon compound deposited on the first region serves to protect it, and the fluorocarbon compound deposited on the second region is used to etch the second region. Summary of the Invention

[0003] In an exemplary implementation of this disclosure, a substrate processing method is provided for processing a substrate including a first region and a second region having compositions different from each other. The substrate processing method includes: (a) preferentially forming a first deposition layer on the first region using a substrate processing apparatus; (b) after (a), forming a second deposition layer on the second region, the second deposition layer containing fluorine and being different from the first deposition layer; and (c) after (b), removing the second deposition layer and at least a portion of the second region, wherein steps (a) to (c) are repeated sequentially if a stopping condition is not met.

[0004] In an exemplary implementation of this disclosure, a substrate processing apparatus is provided for processing a substrate including a first region and a second region having different compositions from each other. The substrate processing apparatus includes a processing circuit configured to: (a) preferentially form a first deposition layer on the first region; (b) after (a), form a second deposition layer on the second region, the second deposition layer containing fluorine and being different from the first deposition layer; and (c) after (b), remove at least a portion of the second region and the second deposition layer, wherein the processing circuit is further configured to sequentially repeat (a) to (c) if a stopping condition is not met.

[0005] In an exemplary implementation of this disclosure, a substrate processing system is provided, comprising: a substrate processing apparatus for processing a substrate, the substrate including a first region and a second region having different compositions from each other; and a processing circuit configured to: (a) control the substrate processing apparatus to preferentially form a first deposition layer on the first region; (b) after (a), control the substrate processing apparatus to form a second deposition layer on the second region, the second deposition layer comprising fluorine and being different from the first deposition layer; and (c) after (b), control the substrate processing apparatus to remove at least a portion of the second region and the second deposition layer, wherein the processing circuit is further configured to sequentially repeat (a) to (c) if a stop condition is not met. Attached Figure Description

[0006] Figure 1A A substrate having a first region and a second region having a groove depth between them is shown.

[0007] Figure 1B Showing the with Figure 1A The diagram shows a comparison of the deposition amount in the first region of the substrate and the depth of the grooves etched according to the comparison process.

[0008] Figure 1C Showing the with Figure 1A The diagram shows a comparison of the deposition amount in the first region of the substrate and the depth of the groove etched according to the process of this disclosure.

[0009] Figure 2 Example conditions for DC superposition (DCS) near the upper electrode are shown.

[0010] Figure 3A This is a flowchart of an etching method according to an exemplary embodiment.

[0011] Figure 3B Yes, it can be included in Figure 3A A flowchart of step STx in an exemplary embodiment of the etching method shown.

[0012] Figure 3C Yes, it can be included in Figure 3A A flowchart of step STc in an exemplary embodiment of the etching method shown.

[0013] Figure 4 Shown in Figure 3A and 3C The timing diagram of step STc in the process of forming a deposition layer on the substrate W.

[0014] Figure 5A Shown in Figure 3A The exemplary substrate provided at step STa in the process.

[0015] Figure 5B Shown in Figure 3A In step STb, the first deposited layer DP is formed in the first region of the substrate.

[0016] Figure 5C Shown in Figure 3A In step STy, a silicon-containing deposition layer DPS is formed on the first deposition layer DP.

[0017] Figure 5D Shown in Figure 3A In step STz1, a second deposition layer DPC is selectively formed on the silicon-containing deposition layer DPS.

[0018] Figure 5E Shown in Figure 3A The substrate obtained after applying ions at step STz2 in the process.

[0019] Figure 5F Shown in Figure 3C In step STcx, the first sedimentary layer DP is selectively formed in the first region.

[0020] Figure 5G The substrate is shown after repeating steps STcx, STc1, and STc2 until the stopping condition is met.

[0021] Figure 5H The removal of the deposited layer by ashing is shown after the etching of the second region R2 is completed.

[0022] Figure 6A Shown in Figure 3A The exemplary substrate provided at step STa in the process.

[0023] Figure 6B Shown in Figure 3B In step STx1, a deposited layer DPC is formed on the substrate.

[0024] Figure 6C Shown in Figure 3B The substrate obtained after applying ions at step STx2 in the process.

[0025] Figure 6D Shown in Figure 3C In step STcx, the first sedimentary layer DP is preferentially formed in the first region.

[0026] Figure 7 An exemplary substrate processing apparatus according to the present disclosure is shown.

[0027] Figure 8 An exemplary processing circuit for performing computer-based operations according to the present disclosure is shown. Detailed Implementation

[0028] Exemplary embodiments will now be described in detail with reference to the accompanying drawings. In the drawings, similar or corresponding components are indicated by the same reference numerals. Unless otherwise indicated, embodiments are illustrated by way of example rather than limitation in the drawings, which are not to scale.

[0029] Throughout this specification, references to "an embodiment" or "an embodiment" mean that a particular feature, structure, characteristic, operation, or function described in connection with an embodiment is included in at least one embodiment of the disclosed subject matter. Therefore, any phrase appearing in the specification, "in one embodiment" or "in an embodiment," does not necessarily refer to the same embodiment. Furthermore, in one or more embodiments, a particular feature, structure, characteristic, operation, or function may be combined in any suitable manner. Moreover, embodiments of the disclosed subject matter are intended to cover modifications and variations of the described embodiments.

[0030] It must be noted that, unless the context explicitly specifies otherwise, the singular forms “a,” “an,” and “the,” as used in the specification and appended claims, include plural referents. That is, unless explicitly specified otherwise, the words “a” and “an,” as used herein, carry the meaning of “one or more.” Additionally, it should be understood that terms such as “left,” “right,” “top,” “bottom,” “front,” “rear,” “side,” “height,” “length,” “width,” “upper,” “lower,” “inner,” “outer,” “internal,” and “external,” as used herein, describe reference points only and do not necessarily limit embodiments of the disclosed subject matter to any particular orientation or configuration. Furthermore, terms such as “first,” “second,” and “third,” etc., identify only one of the various parts, components, reference points, operations, and / or functions described herein, and similarly do not necessarily limit embodiments of the disclosed subject matter to any particular configuration or orientation.

[0031] Throughout this disclosure, the term "recess" is used as a type of etching feature, and the two terms (recess and etching feature) are used interchangeably herein. Furthermore, the term "recess" is not limiting and can refer to holes, slots, grooves, concave voids, or other types of engraved patterns in the substrate material being etched.

[0032] Figure 1A An exemplary substrate is shown having a first region and a second region with a groove depth between them. Specifically, the substrate SW includes a first region R1 and a second region R2. In an exemplary implementation, the first region R1 is formed of silicon nitride, and the second region R2 is formed of silicon oxide.

[0033] A deposited layer DP is formed on a first region R1, and a groove RC is formed between the first region R1 and a second region R2. The groove depth d of the groove RC is shown. In an exemplary implementation, a mixture of CO gas and Ar gas is used as the process gas to form the deposited layer DP on the substrate SW. In other implementations, a mixture of CH3F gas and Ar gas can be used to form the deposited layer DP on the substrate SW.

[0034] Figure 1B A graph showing the groove depth d (nm) etched according to a comparison process, compared to the deposition amount in the first region R1 of the substrate SW. (See figure) Figure 1B As shown, when etching the substrate SW according to the comparison process, the groove depth d (nm) is compared with the deposition amount in the first region R1.

[0035] In the comparison process, the depth A of the groove RC is etched. In an exemplary implementation, the depth A of the groove RC is etched to 20-40 nm. Then, the deposited layer DP is repeatedly formed on the substrate SW, alternately with feeding inert gas ions to the substrate SW. In an exemplary implementation, the deposited layer DP formed on the substrate SW contains fluorine.

[0036] The groove RC is then etched to depth B, which in an exemplary implementation is 50-80 nm. To etch the groove RC to depth B, the following steps are performed: (i) forming a first deposition layer (5 nm or greater) on a first region R1; then (ii) alternately forming a second deposition layer containing fluorine on the substrate SW by generating plasma from an inert gas and feeding the plasma to the substrate SW. Steps (i) and (ii) may be repeated once or more until the process is complete. The steps for selectively processing and etching the groove RC are performed at 120-180°C, but the process is not limited to this range. In one example, the steps are performed at 150°C.

[0037] Figure 1C Showing the with Figure 1A The graph shows a comparison of the deposition amount in the first region R1 of the substrate SW and a groove depth d etched according to the exemplary process of this disclosure. In the exemplary process according to this disclosure, such as... Figure 1C As shown, when etching the substrate SW according to the example, the groove depth d (nm) is compared with the amount of deposition in the first region R1.

[0038] In an exemplary process, first, the depth C of the groove RC is etched. In an exemplary implementation, the depth C of the groove RC is etched to 10 - 20 nm, but it is not limited thereto. Then, alternately with feeding inert gas ions to the substrate SW, a deposition layer DP is repeatedly formed on the substrate SW. In an exemplary implementation, the deposition layer DP formed on the substrate SW contains fluorine.

[0039] Then, the groove RC is etched to a depth D, which is 80 - 100 nm in an exemplary implementation. To etch the groove RC to the depth D, the following steps are performed: (a) A first deposition layer is formed on the first region R1. The first deposition layer is formed thinner than the first deposition layer formed at (i) in the comparative process. Then, (b) a second deposition layer containing fluorine is formed on the substrate SW, and then (c) plasma is generated from the inert gas and fed to the substrate SW. Steps (a), (b), and (c) are repeated in this order. The steps for selectively processing and etching the groove RC are performed at 150 - 200 °C, but the processing is not limited to this range. In one example, the steps are performed at 170 °C.

[0040] Figure 2 Examples of conditions for direct current superposition (DCS) near an upper electrode such as the upper electrode 3 described later are shown. Figure 7 Examples of conditions for direct current superposition (DCS) near an upper electrode such as the upper electrode 3 shown later are shown.

[0041] As Figure 2 shown, both the voltage V1 and RF are supplied to the Si (silicon) electrode, and the voltage V2 is applied to the Si. In an exemplary implementation, the conditions for DCS are provided as follows:

[0042] Gas: Inert gas (e.g., Ar) + H2 (optional);

[0043] Power: Inner V1 = -800 V, and outer V2 = -200 V (e.g., V1 < V2 < 0 (V)); and

[0044] Pressure: 10 to 100 mTorr (e.g., 20 mTorr).

[0045] Further discussion will be provided later regarding Figure 5C and step STy. Figure 2 of.

[0046] Figure 3A is a flowchart of an etching method according to an exemplary embodiment. Figure 3A The etching method shown (hereinafter referred to as method MT) starts from step STa. In step STa, the substrate SW is placed on a substrate support in a substrate processing device. The substrate support is accommodated in a chamber in the substrate processing device. The substrate processing device is shown in Figure 7 In.

[0047] Figure 7 An exemplary substrate processing apparatus according to the present disclosure is shown.

[0048] In particular, Figure 7 A substrate processing apparatus 200 is shown, for example, a capacitively coupled plasma (CCP) system. Although a CCP system is shown as an example, any other etching apparatus, such as an inductively coupled plasma (ICP) apparatus, can also be used. The substrate processing apparatus 200 includes a reaction chamber 1, which is generally cylindrical in shape and formed, for example, of aluminum. The reaction chamber 1 is connected to a ground potential. A film with plasma resistance is formed on the inner wall surface of the reaction chamber 1, and can be a film formed by anodizing or a ceramic film such as a film formed of yttrium oxide. When RF power is supplied to at least one of the upper electrode 3 and the base 4 (which serves as a lower electrode for generating plasma in the reaction chamber 1), plasma 2 is formed between the upper electrode 3 and the base 4, wherein the substrate W to be processed is present between the upper electrode 3 and the base 4. As will be discussed in more detail below, plasma 2 is formed close to the substrate W, and the substrate W is held on the upper surface of an electrostatic chuck 5. The base 4 has a generally disk-shaped shape and is conductive.

[0049] Gas source 8 includes multiple gas sources controlled by a series of flow rate controllers. Gas source 8 supplies gas to reaction chamber 1 via one or more gas lines.

[0050] The substrate processing apparatus 200 also includes a first RF power supply 6, which generates RF energy in the range of 27MHz to 100MHz, where 60MHz is an exemplary frequency. The first RF power supply 6 is connected to the upper electrode 3 by a matching circuit that matches the output impedance of the first RF power supply 6 with the impedance of the upper electrode 3.

[0051] The etching plasma process 200 also includes a second RF power supply 7, which generates RF energy for biasing purposes to attract ions to the substrate W. The second RF power supply 7 operates at a lower frequency than the first RF power supply 6, typically in the range of 300 kHz to 13.56 MHz. In an alternative embodiment, multiple RF power supplies 6 and 7 may be coupled to the same electrode (lower electrode 4).

[0052] The upper electrode 3 has a second power source as a variable direct current (DC) power source 10. The variable DC power source 10 can also be used as a DC bias for the RF energy applied to the upper electrode from the first RF power source 6. The variability of the DC power source 10 enables operational control of the ion energy, allowing the etching rate to be controlled according to the process in progress.

[0053] The RF energy generated by RF power supply 7 can be pulsed. Etching primarily occurs when bias power is supplied to the base / lower electrode. Deposition primarily occurs when no bias power is supplied to the base / lower electrode. Pulsed bias allows for the separation of the etching and deposition stages. Etching occurs after the formation of the protective film, protecting the sidewalls of the groove from side etch. Furthermore, changing the pulse duty cycle (bias on time / (bias on time + bias off time)) can control the etching / deposition balance. A longer bias off time results in a thicker protective film, leading to greater protection. A longer bias on time increases the etching rate.

[0054] In an embodiment, the substrate processing apparatus 200 may have features such as Figure 8 The dedicated control circuit, including the processing circuit shown, executes the control program stored in the memory and controls each component of the substrate processing equipment 200 based on the process data stored in the storage device.

[0055] The substrate processing apparatus 200 includes an exhaust device 9 connected to the internal atmosphere of the reaction chamber 1. The exhaust device 9 includes a pressure controller such as an automatic pressure control valve and a vacuum pump (e.g., a turbomolecular pump) to controllably depressurize the reaction chamber 1 and exhaust the gas from the reaction chamber 1.

[0056] In the substrate processing apparatus 200, the upper electrode 3 receives RF power to generate plasma. In some embodiments, the base 4 may receive RF power. The method according to this disclosure is also applicable to substrate processing apparatuses different from CCP plasma processing apparatuses. More specifically, the method can be implemented using any plasma processing apparatus (such as an inductively coupled plasma processing apparatus or a plasma processing apparatus that uses surface waves such as microwaves to generate plasma).

[0057] Return to Figure 3A The discussion clarifies that the substrate W includes a first region R1 and a second region R2. In an exemplary implementation, the first region R1 is formed of a material different from that of the second region R2. The material of the first region R1 is oxygen-free and may contain silicon nitride. The material of the second region R2 contains silicon and oxygen and may contain silicon oxide. The material of the second region R2 may include a low dielectric constant material containing silicon, carbon, oxygen, and hydrogen.

[0058] Figure 5A It is necessary to use Figure 3A A partially enlarged cross-sectional view of an exemplary substrate W processed by the etching method shown. Figure 5A The substrate W shown includes a first region R1 and a second region R2. The substrate W may also include a lower layer region UR. Figure 5AThe first region R1 of the substrate W shown includes region R11 and region R12. Region R11 is formed of silicon nitride and defines a groove. Region R11 is on the underlying region UR. Region R12 extends on either side of region R11. Region R12 is formed of silicon nitride or silicon carbide. Figure 5A The second region R2 of the substrate W shown is formed of silicon oxide and is contained within a groove defined by region R11. In other words, the second region R2 is surrounded by the first region R1. When processed using method MT... Figure 5A When the substrate W is shown, the second region R2 is etched in a self-aligned manner.

[0059] The steps following step STa in method MT will now be described with respect to substrate W.

[0060] In some embodiments, step STx may follow step STa. In other embodiments, step STx is not performed, and processing proceeds to step STb. In step STx, the first region R1 is etched until a predetermined aspect ratio or higher is achieved. More on this later... Figure 3B and 6A Let's move on to step STx for further discussion in step 6D.

[0061] In step STb, as Figure 5B As shown, the sedimentary layer DP preferentially forms in the first region R1.

[0062] Figure 5B Shown in Figure 3A Step STb involves the formation of a first deposited layer DP in a first region of the substrate. The first deposited layer DP contains carbon. In an exemplary implementation, the first deposited layer DP is formed using plasma generated from a process gas containing carbon and free of fluorine.

[0063] In step STb, plasma is generated from the process gas in the chamber of the substrate processing apparatus 200.

[0064] In an exemplary implementation, the processing gas used in step STb may include a first gas and a second gas. The processing gas may also include an inert gas such as argon or helium.

[0065] The first gas contains carbon and does not contain fluorine. Examples of first gases include CO, COS, C2H2, C2H4, CH4, C2H6, and H2.

[0066] The first gas may not contain hydrogen. The first gas may contain, for example, carbon monoxide gas (CO gas) or carbonyl sulfide gas (COS gas) as a carbon-containing, fluorine-free gas.

[0067] The second gas may contain carbon, fluorine, or hydrogen. Examples of such second gases include hydrofluorocarbon gases, fluorocarbon gases, and hydrocarbon gases. Hydrofluorocarbon gases may include, for example, CHF3, CH3F, or CH2F2 gases. Fluorocarbon gases may include, for example, C4F6 gas. A second gas containing both carbon and hydrogen may include, for example, CH4 gas.

[0068] The first gas may have a higher flow rate than the second gas. The ratio of the flow rate of the second gas to the flow rate of the first gas is 0.2 or less. The first gas may contain a carbon-containing, fluorine-free gas with a flow rate of 30 to 200 sccm (inclusive). The first gas may contain a carbon-containing, fluorine-free gas with a flow rate of 90 to 130 sccm (inclusive). The process gas may contain an inert gas with a flow rate of 0 to 1000 sccm (inclusive). The process gas may contain an inert gas with a flow rate of 350 sccm or less.

[0069] The flow rates of each gas contained in the processing gas can be determined based on the volume of the internal space of chamber 1 or other factors. In step STb, the chemical species (carbon chemical species) contained in the plasma are fed to the substrate. Figure 5B As shown, the fed chemical form preferentially forms a carbon-containing deposition layer DP on the first region R1.

[0070] In step STb, a thin protective film is formed on the sidewalls defining the groove using the processing gas, in addition to the deposition layer DP preferentially formed on the first region R1. This protects the sidewalls from the effects of the plasma.

[0071] The processing gas used in step STb can be a mixture containing CO gas and hydrogen gas (H2 gas). This processing gas enables the preferential formation of a deposited layer DP on the first region R1. The deposited layer DP serves as a protective film with high resistance to etching in step STc. The ratio of the H2 gas flow rate to the total flow rate of CO and H2 gas contained in the processing gas can be 1 / 19 to 2 / 17 (inclusive). When using a processing gas with this ratio, the deposited layer DP formed on the first region R1 has a more vertical side surface.

[0072] In step STb, the ions fed to the substrate W can have energies ranging from 0 to 70 eV (inclusive). In this case, the deposited layer DP is unlikely to reduce the opening of the groove.

[0073] In one embodiment, the substrate processing apparatus used in step STb can be a capacitively coupled plasma processing apparatus. When using a capacitively coupled plasma processing apparatus, radio frequency (RF) power for generating plasma can be provided to the upper electrode. In this case, plasma can be formed in a region away from the substrate W. The RF power can have a frequency of 60 MHz or higher. In another embodiment, the substrate processing apparatus used in step STb can be an inductively coupled plasma processing apparatus.

[0074] In step STb, a deposited layer DP is preferentially formed on the first region R1. Therefore, step STb can be performed at least when the groove defined by the first region R1 and the second region R2 of the substrate W has an aspect ratio of 4 or lower.

[0075] In step STb of method MT, carbon chemical forms generated from the process gas are selectively deposited on a first region R1. Carbon chemical forms generated from the process gas are unlikely to deposit on an oxygen-containing second region R2. Using method MT, the second region R2 is etched while the deposited layer DP is selectively retained on the first region R1. Therefore, method MT makes it possible to selectively protect the first region R1 relative to the second region R2 while etching the second region R2. Using method MT, the deposited layer DP is preferentially formed on the first region R1. This reduces clogging of the openings of the groove defined by the first region R1 and the second region R2.

[0076] The carbon chemical form generated from CO gas in step STb is ionic. CH4 or CH3F gas readily generates free radicals such as CH2 or CHF. These free radicals are highly reactive and readily deposit isotropically on the surface of substrate W. In contrast, the ionic chemical form is deposited anisotropically on substrate W. In other words, the ionic chemical form adheres more to the upper surface of the first region R1 than to the wall surface defining the groove. Carbon monoxide is more likely to be released from the surface of substrate W. To adsorb carbon monoxide onto the surface of substrate W, oxygen is removed from the surface by ion bombardment of the substrate W. In addition, carbon monoxide, with its simple structure, is difficult to crosslink. To deposit carbon monoxide on the surface of substrate W, dangling bonds are formed on the surface of substrate W. The carbon chemical form generated from CO gas in step STb is ionic. This chemical form can therefore remove oxygen from the upper surface of the first region R1, form dangling bonds on the upper surface, and selectively deposit on the first region R1.

[0077] In some embodiments, step STy may follow step STb. In other embodiments, step STy is not performed, and processing proceeds to step STz1. In step STy, as... Figure 5CAs shown, a silicon-containing deposition layer DPS is formed on the first deposition layer DP and the second region R2.

[0078] In some embodiments, it can be achieved through, as shown in Figure 2 As shown, a silicon-containing deposition layer DPS is formed at step Sty using direct current superposition (DCS) near the upper electrode. The upper electrode is sputtered using ions from an inert gas generated by applying DC to the Si-containing upper electrode while supplying an inert gas (e.g., Ar) into the chamber. Si and secondary electrons are generated. The substrate surface is exposed to the resulting Si and secondary electrons, thereby forming the silicon-containing deposition layer DPS.

[0079] In some other embodiments, the silicon-containing deposited layer DPS can be formed at step Sty using plasma-enhanced chemical vapor deposition (PECVD). The silicon-containing deposited layer DPS is formed on the first deposited layer DP by providing radio frequency (RF) power to generate plasma while supplying silicon-containing gas (e.g., SiCl4) into the chamber.

[0080] In step STz1, as follows Figure 5D As shown, a second fluorine-containing deposition layer DPC is formed on a substrate W. In an exemplary implementation, with step Sty performed, the second deposition layer DPC is formed on silicon-containing deposition layers DPS in the first region R1 and the second region R2. In other implementations, without step Sty performed, the second deposition layer DPC is formed on the deposition layer DP in region R1 and the silicon oxide film in the second region R2. In an exemplary implementation, the second deposition layer DPC contains fluorine.

[0081] The second deposited layer DPC can be formed in the chamber of the substrate processing apparatus 200 using plasma generated from a fluorocarbon compound gas. Examples of fluorocarbon compound gases include, but are not limited to, CF4, C4F6, and C4F8 gases. The processing gas may also contain inert gases such as argon or helium.

[0082] In step STz2, as Figure 5E As shown, plasma is generated from an inert gas in a chamber, and a portion of the second region R2 is removed using inert gas ions fed to the substrate W. Specifically, ions from the inert gas are fed to the substrate W, thereby bombarding the second deposited layer DPC on the second region R2 to activate the second deposited layer DPC. The active form from the second deposited layer DPC reacts with the second region R2 to remove a portion of the second region R2.

[0083] The silicon-containing deposited layer DPS and the second deposited layer DPC on the first region R1 are also removed. The first deposited layer DP on the first region R1 is also partially removed. In the exemplary implementation, the inert gas is Ar gas, but it can be any gas other than Ar gas. Step STz2 continues until the deposited layer DP on the first region R1 is completely consumed.

[0084] After step STz2, the process proceeds to step STc. In step STc, the second region R2 is selectively etched relative to the first region R1. Specifically, the second region R2 is selectively etched using inert gas ions fed to the substrate W. In one embodiment, the second region R2 is etched using chemical forms contained in a plasma generated from an etching gas. In this case, the plasma is generated from the etching gas in a chamber of the substrate processing apparatus. The etching gas is selected in accordance with the material of the second region R2. The etching gas may contain, for example, fluorocarbon gas. The etching gas may also contain inert gases such as argon and oxygen-containing gases such as oxygen.

[0085] The substrate processing equipment used in step STb can be used as the etching equipment used in step STc. In this case, steps STb and STc are performed without removing the substrate W from the chamber of the substrate processing equipment. In some embodiments, the substrate processing equipment used in step STb may be different from the substrate processing equipment used in step STc. In this case, the substrate W is transferred from the substrate processing equipment used in step STb to the substrate processing equipment used in step STc only by vacuum between steps STb and STc.

[0086] Regarding Figure 3C Further discussion is provided regarding step STc.

[0087] Finally, method MT proceeds to step STJ, where it is determined whether the stop condition is met. In the exemplary implementation, the processing circuitry performs this determination. More on this later... Figure 8 A detailed discussion of the processing circuitry is provided.

[0088] If the stopping condition is not met at step STJ, the process returns to step STc to repeat step STc. If the stopping condition is met, method MT completes.

[0089] In an exemplary implementation of step STJ, a stop condition is met when the processing count in step STc reaches a count threshold. The count threshold can be a predetermined number or can be set based on user input or other parameters. If the stop condition is not met in step STJ, processing then returns to STc to repeat step STc. Specifically, as... Figures 5F to 5G As shown and about Figure 3C The process involves repeating step STc to etch the second region R2.

[0090] The discussion will now return to step STx, where STx is... Figure 3B The details are shown below. Step STx is performed after the substrate W is provided at step STa. This substrate W is in... Figure 6A As shown in the figure, it is related to Figure 5A The substrate W shown corresponds to the substrate shown in the figure.

[0091] The processing of step STx begins in step STx1, where, as follows: Figure 6B As shown, a fluorine-containing deposition layer DPC is formed on the substrate W. This fluorine-containing deposition layer DPC can be the same as that used in step STz1 and... Figure 5D The material used for the deposited DPC layer shown is the same. In an exemplary implementation, a fluorinated deposited DPC layer is formed in a first region R1 and a second region R2. The fluorinated deposited DPC layer can be formed using plasma generated from a fluorocarbon gas in the chamber of a substrate processing apparatus. Examples of fluorocarbon gases include, but are not limited to, CF4, C4F6, and C4F8 gases. The processing gas may also contain an inert gas such as argon or helium.

[0092] When step STx1 is performed in the substrate processing apparatus 200, a processing gas is supplied from the gas source 8 into the reaction chamber 1. Furthermore, in step STx1, high-frequency power is supplied from the second RF power supply 7 to the base 4. Additionally, in step STx1, the pressure of the space within the reaction chamber 1 is set to a preset pressure. By way of example, the pressure of the space within the reaction chamber 1 is set to a range of 5 mTorr (0.6667 Pa) to 80 mTorr (10.67 Pa), but other pressures may also be set. Furthermore, in step STx1, the distance between the upper electrode 3 and the upper surface of the base 4 is set to a range of 20 mm to 90 mm. Therefore, a plasma of the processing gas is generated within the reaction chamber 1, and the substrate W mounted on the base 4 is exposed to this plasma. Furthermore, in step STx1, a voltage from the power supply 10 may also be applied to the upper electrode. The voltage applied from the power supply 10 to the upper electrode 3 may be -150V or less. That is, the voltage applied from the power supply 10 to the upper electrode 3 may be a negative voltage with an absolute value of 150V or greater. During step STx1, the operation of each component of the substrate processing apparatus 200 can be referenced. Figure 8 The processing circuit discussed is used for control.

[0093] At the start of step STx1, the active forms of atoms and / or molecules generated from the fluorocarbon compound (e.g., the active forms of fluorine) collide with the first region R1 and the second region R2 of the substrate W. Therefore, a fluorine-containing deposited layer DPC is formed on the first region R1 and the second region R2. As the processing time of step STx1 increases, the film thickness of the deposited layer DPC increases.

[0094] Following step STx1, step STx2 is performed. In step STx2, the second region R2 is removed by feeding inert gas ions to the substrate W. This... Figure 6C As shown in the figure. In an exemplary implementation, ions of an inert gas bombard the deposited DPC layer on the second region R2 to activate the deposited DPC layer in the second region R2. The active form from the deposited DPC layer reacts with the second region R2 to remove the second region R2. In some implementations, the deposited DPC layer on the first region R1 can be partially or completely removed. The inert gas is, for example, Ar gas, but can also be a gas other than Ar gas.

[0095] The processing time for step STx2 and the processing time for step STx1 can be appropriately set. In an example embodiment, the processing time for step STx1 can be set to a ratio ranging from 30% to 70% of the total processing time for steps STx1 and STx2. However, other ratios can be used.

[0096] In step STx2, as in step STx1, high-frequency power is applied from the RF power supply 7 to the base 4. Furthermore, in step STx2, as in step STx1, the pressure within the reaction chamber 1 is set. Furthermore, in step STx2, as in step STx1, the distance between the upper electrode 3 and the upper surface of the base 4 is set. Therefore, plasma is generated within the reaction chamber 1, and the substrate W mounted on the base 4 is exposed to this plasma. Furthermore, in step STx2, as in step STx1, a voltage from the power supply 10 can be applied to the upper electrode 3.

[0097] In step STx2, the active form (e.g., ions of rare gas atoms) collides with the deposited layer DP. As a result, such as Figure 6C As depicted, the second region R2 is etched using fluorocarbon compound radicals in the deposited layer DP. Furthermore, the film thickness of the deposited layer DP is reduced via step STx2. Additionally, in step STx2, as... Figure 6C As depicted, the film thickness of the deposited DPC layer on the first region R1 is also reduced.

[0098] After step STx2, step STx3 is performed. In step STx3, it is determined whether the first region R1 relative to the second region R2 has reached the predetermined aspect ratio. In an exemplary implementation, Figure 8 The processing circuit shown performs this judgment.

[0099] If, at step STx3, it is determined that the predetermined aspect ratio has not been reached, then the process returns to step STx1 to repeat steps STx1 and STx2. If, it is determined that the predetermined aspect ratio has been reached, then step STx is completed, and method MT proceeds to step STb.

[0100] Figure 6D This shows the state of substrate W after step STb is completed following step STx. For example... Figure 6D As shown, a first depositional layer DP is preferentially formed on a first region R1 that has reached a predetermined aspect ratio or higher relative to the second region R2.

[0101] The selectivity of the first region R1 during step STx is higher than that of the first region R1 without step STx. In particular, the selectivity of the first region R1 during step STx is higher due to the predetermined aspect ratio between the resulting first region R1 and the second region R2. In other words, when step STx is performed, less first deposition layer DP is formed on the second region R2 compared to the first region R1.

[0102] The discussion will now return to step STc, which is shown in detail in Figure 3c. Step STc is performed after step STz2. Additionally, if it is determined at step STJ that the stopping condition is not met, step STc can be repeated. This substrate W is in Figure 5E As shown in the image.

[0103] The processing of step STc begins in step STcx, where, as in step STcx, ... Figure 5F As shown, a first sedimentary layer DP is preferentially formed on the first region R1. The first sedimentary layer DP in this step can be related to steps STb and... Figure 5B The described deposition layer DP is made of the same material. However, the first deposition layer DP deposited in step STcx may have the same material as the layer deposited in step STcx. Figure 5B The thickness of the deposited layer DP shown in step STb is different from that of the deposited layer DP in step STb. Additionally, the treatment in step STcx can be performed using different pressure conditions and / or treatment durations than those used in step STb.

[0104] After completing step STcx, step STcy can be performed. Step STcy is an optional step in which a silicon-containing deposition layer DPS is preferentially formed on the first deposition layer DP formed in step STcx. However, in some implementations, step STcy is skipped, and the silicon-containing deposition layer DPS is not formed on the first deposition layer DP.

[0105] Next, the process proceeds to step STc1, where, as follows: Figure 5G As shown, a second fluorine-containing deposition layer DPC is formed on the substrate W. The fluorine-containing deposition layer DPC is formed in both the first region R1 and the second region R2. In the implementation where a silicon-containing deposition layer DPS is formed on the first deposition layer DP in step STcy, the fluorine-containing deposition layer DPC is formed on the silicon-containing deposition layer DPS. In the implementation where step STcy is skipped and the silicon-containing deposition layer DPS is not formed, the fluorine-containing deposition layer DPC is formed on the first deposition layer DP in the first region R1.

[0106] Next, the process proceeds to step STc2, in which the second region R2 is etched using inert gas ions being fed to the substrate W. Specifically, the second region R2 is selectively etched relative to the first region R1 using inert gas ions fed to the substrate W.

[0107] After completing step STc2, step STc is completed, and method MT proceeds to step STJ. As previously discussed, at step STJ, it may be determined that the stopping condition is not met. If not, step STc is repeated, resulting in further etching of region R2.

[0108] Figure 5H The image shows a substrate W after the deposited layer DP has been removed by ashing. In some implementations, the deposited layer DP can be removed from the first region R1 by ashing after etching of the second region R2 is complete. This step can optionally be performed after step STJ. In one embodiment, the deposited layer DP is removed by etching using chemical forms contained in a plasma generated from an ashing gas. In this case, plasma is generated from an ashing gas in the chamber of an ashing apparatus. The ashing gas may contain an oxygen-containing gas such as oxygen. The ashing gas may be a mixture containing N2 gas and H2 gas.

[0109] Figure 4 Showing the use of in Figure 3A and 3C The timing diagram for forming the deposited layer on the substrate W in step STc is shown. Figure 4 As shown, during steps STcx, STc1, and STc2, the supply of various gases and the RF bias are turned on and off. The supply of Ar gas is maintained throughout all steps STc.

[0110] In step STcx, during the formation of the first deposition layer DP in the first region R1, the CO gas supply is on. Then, before and during steps STc1 and STc2, the CO gas supply is turned off. Then, when step STc is repeated, the CO gas supply is turned on again before and during step STcx.

[0111] During step STcx, the supply of CxFy gas is off. Then, during the duration of step STc1, the supply of CxFy gas is turned on, and then before and during the duration of step STc2, the supply of CxFy gas is turned off. In any repetition of step STc, the supply of CxFy gas remains off during step STcx.

[0112] During the duration of each step in steps STcx, STc1, and STc2, an RF (HF) of 100 MHz at a frequency of 100 to 1000 W is applied. The RF is reduced between each step and reapplied at the beginning and during the duration of each step.

[0113] An RF bias of 0 to 300 W at 40 MHz is applied for the duration of each step in steps STcx and STc1. The RF bias is decreased between each step. An RF bias of 100 to 600 W at 40 MHz is applied for the duration of step STc2, and this RF bias is decreased after the end of step STc2 and before any repetition of step STc begins.

[0114] Figure 8 This is a block diagram of the processing circuitry used to perform the computer-based operations described herein. Figure 8 A processing circuit 300 is illustrated that can be used to control any computer-based and cloud-based control processing. Descriptions or blocks in the flowchart are to be understood as representing modules, code segments, or portions comprising one or more executable instructions for implementing a specific logical function or step in a process. Alternative implementations are included within the scope of exemplary embodiments of this invention, as those skilled in the art will understand, wherein functions may be performed in an order different from the order shown or discussed (including substantially simultaneously or in reverse order) depending on the functionality involved. The various elements, features, and processes described herein may be used independently of each other or may be combined in various ways. All possible combinations and sub-combinations are intended to fall within the scope of this disclosure.

[0115] exist Figure 8In this embodiment, the processing circuit 300 includes a CPU 301 that performs one or more of the control processes described above / below. Processing data and instructions can be stored in memory 302. These processes and instructions can also be stored on a storage medium disk 304, such as a hard disk drive (HDD) or portable storage medium, or can be stored remotely. Furthermore, the claimed advancements are not limited to the form of a computer-readable medium storing instructions for the inventive processes. For example, instructions can be stored in a CD, DVD, flash memory, RAM, ROM, PROM, EPROM, EEPROM, hard disk, or any other information processing device (such as a server or computer) that communicates with the processing circuit 300. Processing can also be stored in network-based storage, cloud-based storage, or other remotely accessible storage and can be executed by the processing circuit 300.

[0116] Furthermore, the claimed progress may be provided as a utility, a background daemon, or a component of an operating system, or a combination thereof, and may be executed in conjunction with the CPU 301 and operating systems such as Microsoft Windows, UNIX, Solaris, LINUX, Apple MAC-OS, and other systems known to those skilled in the art.

[0117] The hardware components for implementing the processing circuit 300 can be implemented by various circuit elements. Furthermore, the functions of the above embodiments can be implemented by a circuit including one or more processing circuits. The processing circuit includes a specifically programmed processor, such as... Figure 8 The processor (CPU) 301 shown. The processing circuitry also includes devices such as application-specific integrated circuits (ASICs) and conventional circuit components arranged to perform the described functions.

[0118] exist Figure 8 In this embodiment, the processing circuit 300 includes a CPU 301 that performs the aforementioned processing. The processing circuit 300 can be a general-purpose computer or a specific special-purpose machine. In one embodiment, the processing circuit 300 becomes a specific special-purpose machine when the processor 301 is programmed to perform in-situ ESC replacement by controlling voltage and a robotic arm to replace the ESC without exposing the reaction chamber 1 to the external atmosphere. The processing circuit 300 can be located within the substrate processing apparatus 200 or can communicate locally with the substrate processing apparatus 200. In some embodiments, the processing circuit 300 can be remote relative to the substrate processing apparatus 200, providing processing instructions to the substrate processing apparatus 200 via a network 550.

[0119] Alternatively or additionally, as those skilled in the art will recognize, the CPU 301 may be implemented on an FPGA, ASIC, PLD, or using discrete logic circuitry. Furthermore, the CPU 301 may be implemented as multiple processors cooperating in parallel to perform the processing of the above-described invention.

[0120] Figure 8 The processing circuitry 300 also includes a network controller 306 for interfacing with the network 550, such as an Intel Ethernet PRO network interface card from Intel Corporation. As will be understood, the network 550 can be a public network such as the Internet, a private network such as a LAN or WAN network, or any combination thereof, and may also include PSTN or ISDN subnetworks. The network 550 can also be wired, such as an Ethernet network, or wireless, such as a cellular network including EDGE, 3G, and 4G wireless cellular systems. The wireless network can also be Wi-Fi, Bluetooth, or any other known form of wireless communication.

[0121] The processing circuitry 300 also includes a display controller 308 for interfacing with a display 309 (such as a monitor), such as a graphics card or graphics adapter. A general-purpose I / O interface 312 interfaces with a keyboard and / or mouse 314 and a touchscreen panel 316, which may be located on or separate from the display 309. The general-purpose I / O interface also connects to various peripheral devices 318, including printers and scanners.

[0122] The general-purpose storage controller 324 connects the storage medium disk 304 to the communication bus 326, which may be an ISA, EISA, VESA, or PCI bus used to interconnect all components of the processing circuitry 300. For brevity, a description of the general features and functionality of the display 309, keyboard and / or mouse 314, display controller 308, storage controller 324, network controller 306, and general-purpose I / O interface 312 is omitted here, as these features are known.

[0123] The exemplary circuit elements described in the context of this disclosure may be replaced with other elements and constructed differently from the examples provided herein. Furthermore, circuits configured to perform the features described herein may be implemented in multiple circuit units (e.g., chips), or the aforementioned features may be combined in circuitry on a single chipset.

[0124] The functions and features described herein can also be performed by the various distributed components of the system. For example, one or more processors can perform these system functions, with processors distributed across multiple components communicating in a network. In addition to various human-machine interfaces and communication devices (e.g., display monitors, smartphones, tablets, personal digital assistants (PDAs)), the distributed components may also include one or more client and server machines capable of sharing processing. The network can be a private network such as a LAN or WAN, or a public network such as the Internet. Input to the system can be received via direct user input and can be received remotely in real time or as batch processing. Additionally, some implementations can be performed on modules or hardware different from those described. Therefore, other implementations are within the scope of what can be claimed.

[0125] The contents of US 2015 / 0243522, US 2018 / 0151333 and JP 2021-029988 are incorporated herein by reference in their entirety.

[0126] Embodiments of the disclosed subject matter have now been described. It will be clear to those skilled in the art that the foregoing is merely illustrative and not restrictive, and is presented by way of example only. Therefore, while specific configurations have been discussed herein, other configurations may also be employed. Various modifications and other embodiments (e.g., combinations, rearrangements, etc.) can be implemented using this disclosure and are within the scope of what is possible for those skilled in the art, and are considered to fall within the scope of the disclosed subject matter and any of its equivalents. Features of the disclosed embodiments can be combined, rearranged, omitted, etc., within the scope of the invention to produce additional embodiments. Furthermore, certain features may sometimes be used to provide an advantage without corresponding use of other features. Therefore, the applicant intends to cover all such substitutions, modifications, equivalents, and variations within the spirit and scope of the disclosed subject matter.

[0127] Cross-reference to related applications

[0128] This application relates to U.S. Provisional Application 63 / 180,274, filed on April 27, 2021, the entire contents of which are incorporated herein by reference.

Claims

1. A substrate processing method for processing a substrate including a first region and a second region having different compositions from each other, the substrate processing method comprising: (a) forming a first deposition layer preferentially on the first region by a substrate processing apparatus; (b) after (a), forming a second deposition layer on the second region, the second deposition layer containing fluorine, and the second deposition layer being different from the first deposition layer; and (c) after (b), removing at least a part of the second region and the second deposition layer, wherein steps (a) to (c) are repeated in order without satisfying a stop condition, the proceeding of step (a) is started in response to a groove defined by the first region and the second region of the substrate reaching an aspect ratio of 1 or more, a processing gas used in step (a) is a mixture containing CO gas and hydrogen gas, wherein a ratio of a flow rate of hydrogen gas to a total flow rate of CO gas and hydrogen gas contained in the processing gas is 1 / 19 to 2 / 17.

2. The substrate processing method according to claim 1, further comprising: determining whether or not the stop condition is satisfied by a processing circuit of the substrate processing apparatus; and repeating steps (a) to (c) in order in a case where the processing circuit determines that the stop condition is not satisfied.

3. The substrate processing method according to claim 1, further comprising: applying a direct current voltage (DC voltage) to an upper electrode after step (a) and before step (b). the DC voltage is applied using a capacitively coupled plasma (CCP) processing apparatus.

5. The substrate processing method according to claim 1, wherein 4. The substrate processing method according to claim 3, wherein the first region contains SiN or Si, and the second region contains SiO2. steps (a) or (b) are performed by plasma enhanced chemical vapor deposition (PECVD). step (c) is performed using plasma generated from an inert gas.

6. The substrate processing method of claim 1, wherein, a fluorocarbon compound gas is supplied during step (b).

7. The substrate processing method according to claim 1, wherein the first deposition layer formed in step (a) in a first cycle of the substrate processing method has a thickness greater than a thickness of another first deposition layer formed in subsequently performed step (a) in another cycle of the substrate processing method.

8. The substrate processing method of claim 1, wherein, for each cycle of the substrate processing method, a duration of any one of steps (a), (b), and (c) is adjusted.

9. The substrate processing method of claim 1, wherein, the first deposition layer formed in step (a) in an N+1th cycle has a thickness greater than a thickness of another first deposition layer formed in step (a) in an Nth cycle, where N is a natural number.

10. The substrate processing method according to claim 1, wherein a duration of step (a) in the N+1th cycle is longer than a duration of step (a) in the Nth cycle.

11. The substrate processing method of claim 10, wherein, a bias power in the N+1th cycle is greater than another bias power in the Nth cycle.

12. The substrate processing method of claim 10, wherein, steps (a), (b), and (c) are performed in the same chamber.

13. The substrate processing method of claim 1, wherein, an inductively coupled plasma (ICP) processing apparatus is used.

14. The substrate processing method of claim 1, wherein, ​ 15. The substrate processing method of claim 1, wherein, ​ 16. A substrate processing method for processing a substrate including a first region and a second region having different compositions from each other, the substrate processing method comprising: (a) preferentially forming a first deposition layer on the first region by a substrate processing apparatus; (b) after (a), forming a second deposition layer on the second region, the second deposition layer containing fluorine, and the second deposition layer being different from the first deposition layer; and (c) after (b), removing at least a part of the second region and the second deposition layer, wherein (a) to (c) are repeated in this order without satisfying a stop condition, wherein (b) and (c) are performed in a chamber different from a chamber used for performing (a), a processing gas used in (a) is a mixture containing CO gas and hydrogen gas, wherein a ratio of a flow rate of hydrogen gas to a total flow rate of CO gas and hydrogen gas contained in the processing gas is 1 / 19 to 2 / 17.

17. A substrate processing apparatus for processing a substrate including a first region and a second region having different compositions from each other, the substrate processing apparatus comprising a processing circuitry, the processing circuitry is configured to: (a) control preferential formation of a first deposition layer on the first region; (b) after (a), control formation of a second deposition layer on the second region, the second deposition layer containing fluorine, and the second deposition layer being different from the first deposition layer; and (c) after (b), control removal of at least a part of the second region and the second deposition layer, wherein the processing circuitry is further configured to repeat (a) to (c) in this order without satisfying a stop condition, the processing circuitry is further configured to start performance of (a) in response to a groove defined by the first region and the second region of the substrate reaching an aspect ratio of 1 or more, a processing gas used in (a) is a mixture containing CO gas and hydrogen gas, wherein a ratio of a flow rate of hydrogen gas to a total flow rate of CO gas and hydrogen gas contained in the processing gas is 1 / 19 to 2 / 17.

18. A substrate processing apparatus for processing a substrate including a first region and a second region having different compositions from each other, the substrate processing apparatus comprising a processing circuitry, the processing circuitry is configured to: (a) control preferential formation of a first deposition layer on the first region; (b) after (a), control formation of a second deposition layer on the second region, the second deposition layer containing fluorine, and the second deposition layer being different from the first deposition layer; and (c) after (b), control removal of at least a part of the second region and the second deposition layer, wherein the processing circuitry is further configured to repeat (a) to (c) in this order without satisfying a stop condition, the processing circuitry is further configured to perform (b) and (c) in a chamber different from a chamber used for performing (a), ​ The processing gas used in step (a) is a mixture containing CO gas and hydrogen gas, wherein the ratio of the flow rate of hydrogen gas to the total flow rate of CO gas and hydrogen gas contained in the processing gas is 1 / 19 to 2 / 17.

19. A substrate processing system comprising: a substrate processing apparatus for processing a substrate, the substrate including a first region and a second region having different compositions from each other; and a processing circuitry configured to: (a) control the substrate processing apparatus to preferentially form a first deposition layer on the first region; (b) after (a), control the substrate processing apparatus to form a second deposition layer on the second region, the second deposition layer containing fluorine, and the second deposition layer being different from the first deposition layer; and (c) after (b), control the substrate processing apparatus to remove at least a portion of the second region and the second deposition layer, wherein the processing circuitry is further configured to sequentially repeat (a) to (c) without satisfying a stop condition, the processing circuitry is further configured to start the progress of step (a) in response to a groove defined by the first region and the second region of the substrate reaching an aspect ratio of 1 or higher, the processing gas used in step (a) is a mixture containing CO gas and hydrogen gas, wherein the ratio of the flow rate of hydrogen gas to the total flow rate of CO gas and hydrogen gas contained in the processing gas is 1 / 19 to 2 / 17.

20. A substrate processing system comprising: a substrate processing apparatus for processing a substrate, the substrate including a first region and a second region having different compositions from each other; and a processing circuitry configured to: (a) control the substrate processing apparatus to preferentially form a first deposition layer on the first region; (b) after (a), control the substrate processing apparatus to form a second deposition layer on the second region, the second deposition layer containing fluorine, and the second deposition layer being different from the first deposition layer; and (c) after (b), control the substrate processing apparatus to remove at least a portion of the second region and the second deposition layer, wherein the processing circuitry is further configured to sequentially repeat (a) to (c) without satisfying a stop condition, the processing circuitry is further configured to perform steps (b) and (c) in a chamber different from a chamber used to perform step (a), the processing gas used in step (a) is a mixture containing CO gas and hydrogen gas, wherein the ratio of the flow rate of hydrogen gas to the total flow rate of CO gas and hydrogen gas contained in the processing gas is 1 / 19 to 2 / 17.

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