Five-wire intelligent switch tester

Abstract

The present invention discloses a five-wire intelligent turnout tester, comprising a five-wire indication logic check module. The five-wire indication logic check module is connected to a five-wire AC switch and applies forward and reverse DC detection voltage signals to the switch. The detection results are obtained to determine whether the indication contacts and coils of the five-wire AC switch are faulty. The present invention provides a five-wire intelligent turnout tester, which uses the five-wire indication logic check module to detect the five-wire AC switch and determine whether the indication contacts and coils of the five-wire switch are faulty.

Description

Technical Field

[0001] The present invention relates to the technical field of railway detection equipment, in particular to a five-wire intelligent turnout tester. Background Art

[0002] A switch machine is an important signal infrastructure equipment used to reliably switch the position of the switch, change the direction of the switch opening, lock the switch point rail, and reflect the position of the switch. It can well ensure driving safety, improve transportation efficiency, and improve the labor intensity of drivers.

[0003] The functions of the switch machine mainly include the following four aspects:

[0004] (1) Change the position of the turnout, switching it to the fixed position or reverse position as needed;

[0005] (2) After the switch is turned to the required position and is tightly attached, it is locked to prevent external force from switching the switch;

[0006] (3) Accurately reflect the actual position of the turnout, and give the corresponding indication after the turnout point rail is closely attached to the stock rail;

[0007] (4) When the turnout is squeezed or is in the "four-open" position (the point rails on both sides are not tightly attached) for some reason, an alarm and indication shall be given in time.

[0008] It can be seen that switch machines are crucial to railway safety. In the following scenarios, switch machines need to be tested to verify whether they are intact.

[0009] Typical application scenarios for indoor distribution panels:

[0010] 1) For new lines, when indoor construction is not yet completed and not ready for use, test the outdoor turnouts separately.

[0011] 2) For the reconstruction of existing lines, when indoor conditions are not available but outdoor cables are newly laid, outdoor turnouts can be tested in advance separately.

[0012] Typical applications in special scenarios:

[0013] 1) The control cables for the new line switch machines have not yet been laid and are used for outdoor turnout testing and calibration.

[0014] 2) For existing line reconstruction projects, cables should be reused and outdoor switches should be tested in advance.

[0015] 3) Turnout failure emergency repair test.

[0016] 4) Used for turnout fault diagnosis and analysis.

[0017] Therefore, the defect of the existing technology is that there is a lack of a five-wire intelligent turnout tester that uses a five-wire indication logic inspection module to detect the five-wire AC switch machine and determine whether there are faults in the indication contacts and coils of the five-wire switch machine. Summary of the Invention

[0018] In view of at least one defect of the prior art, the purpose of the present invention is to provide a five-wire intelligent turnout tester, which uses a five-wire indication logic check module to detect the five-wire AC switch machine and determine whether there is a fault in the indication contacts and coils of the five-wire switch machine.

[0019] In order to achieve the above-mentioned purpose, the present invention adopts the following technical solution: a five-wire intelligent turnout tester, including a five-wire indication logic check module, which is connected to a five-wire AC switch machine, applies forward and reverse DC detection voltage signals to it, and obtains its detection results to determine whether there are faults in the indication contacts and coils of the five-wire AC switch machine.

[0020] The five-wire logic check module's positioning circuit logic method is as follows: perform a dual-circuit DC bidirectional check, loop X2-X1, loop X4-X1;

[0021] Condition 1: Forward check, X2 and X4 are positive, X1 is negative, when the action is in place and the diode polarity is correct, both X2→X1 and X4→X1 circuits are connected;

[0022] Condition 2: Reverse check, switch the five-wire logic to check the positive and negative poles of the module, X2 and X4 are negative, X1 is positive, the X1→X4 loop is connected, and the X1→X2 loop is blocked due to the reverse cutoff of the diode;

[0023] When both condition one and condition two are checked to be consistent, the five-line indication logic check module outputs "position indication".

[0024] When the results of condition 1 and condition 2 are opposite, it means that the diode polarity is connected incorrectly. The five-line logic check module outputs the "diode polarity error" prompt;

[0025] When the results of condition 1 and condition 2 check show that all four circuits are connected, it means that the outdoor diode indicates the circuit is short-circuited, and the five-wire logic check module outputs the prompt "Indicates circuit short-circuit error";

[0026] When two or more circuits are blocked in the results of condition one and condition two, it indicates that the circuit is open, and the five-wire logic check module outputs the prompt "Open circuit error".

[0027] The five-wire logic check module indicates that the inverted position of the circuit has external loops of X1-X3 and X1-X5, and the logic principle is the same as above.

[0028] The five-wire indication logic check module is provided with a microprocessor, and the microprocessor is connected to a five-wire positioning logic detection circuit and a five-wire inversion logic detection circuit;

[0029] The five-wire positioning logic detection circuit includes a five-wire positioning reversing logic interlock circuit, an interlock relay K2, a relay K1, an X2 sampling circuit, and an X4 sampling circuit;

[0030] The five-wire positioning reversing logic interlock circuit includes a NOT gate U21, a NOT gate U22 and an analog switch U2. The microprocessor is provided with a five-wire positioning control terminal GPIO12. The five-wire positioning control terminal GPIO12 is connected to the input of the NOT gate U21, the output of the NOT gate U21 is connected to the IN1 terminal of the analog switch U2, the NO1 terminal of the analog switch U2 is connected to the A5V DC power supply, the COM1 terminal of the analog switch U2 is connected to the X2 sampling circuit and the X4 sampling circuit; the NC1 terminal of the analog switch U2 is grounded; the output of the NOT gate U21 is also connected to the input of the NOT gate U22, and the NOT gate U2 The output terminal of 2 is connected to the IN2 terminal of the analog switch U2, the NO2 terminal of the analog switch U2 is connected to the A5V DC power supply, the NC2 terminal of the analog switch U2 is grounded, and the COM2 terminal of the analog switch U2 is connected to the 9 terminal of the interlock relay K2; the COM2 terminal of the analog switch U2 is also grounded through the bidirectional voltage regulator D14, and the 11 terminal of the interlock relay K2 is left floating; the 13 terminal of the interlock relay K2 is connected to the display contact X1 of the five-wire AC switch machine; the 16 terminal of the interlock relay K2 is connected to the control terminal GPIO7 of the microprocessor; the 1 terminal of the interlock relay K2 is connected to the D5V DC power supply;

[0031] Terminal 16 of relay K1 is connected to the control terminal GPIO8 of the microprocessor, terminal 1 of relay K1 is connected to the D5V DC power supply, the indication contact X2 of the five-wire AC switch is connected to terminal 13 of relay K1, terminal 11 of relay K1 is left floating, terminal 9 of relay K1 is grounded via a bidirectional voltage regulator D12, terminal 9 of relay K1 is connected to one end of resistor R3 of the X2 sampling circuit, the other end of resistor R3 is connected to the first end of the adjustable resistor R1, the adjustable end of the adjustable resistor R1 is connected to the first end and serves as the output terminal AD2 of the X2 sampling circuit and is connected to the sampling terminal MCU ADC0 of the microprocessor; the tail end of the adjustable resistor R1 is connected to the COM1 end of the analog switch U2;

[0032] The indicating contact X4 of the five-wire AC switch is connected to the 4th terminal of the relay K1, the 6th terminal of the relay K1 is suspended, the 8th terminal of the relay K1 is grounded via the bidirectional voltage regulator D18, the 8th terminal of the relay K1 is connected to one end of the resistor R4 of the X4 sampling circuit, the other end of the resistor R4 is connected to the first end of the adjustable resistor R2, the adjustable end of the adjustable resistor R2 is connected to the first end and serves as the output terminal AD4 of the X4 sampling circuit, which is connected to the sampling terminal MCU ADC1 of the microprocessor; the tail end of the adjustable resistor R2 is connected to the COM1 terminal of the analog switch U2;

[0033] The five-wire inversion logic detection circuit includes a five-wire inversion commutation logic interlock circuit, an interlock relay K4, a relay K3, an X3 sampling circuit, and an X5 sampling circuit;

[0034] The five-wire inversion switching logic interlock circuit includes a NOT gate U12, a NOT gate U11 and an analog switch U1. The microprocessor is provided with a five-wire inversion control terminal GPIO3. The five-wire inversion control terminal GPIO3 is connected to the input terminal of the NOT gate U12, the output terminal of the NOT gate U12 is connected to the IN1 terminal of the analog switch U1, the NO1 terminal of the analog switch U1 is connected to the A5V DC power supply, the COM1 terminal of the analog switch U1 is connected to the X3 sampling circuit and the X5 sampling circuit; the NC1 terminal of the analog switch U1 is grounded; the output terminal of the NOT gate U12 is also connected to the input terminal of the NOT gate U11, and the NOT gate U11 is connected to the COM1 terminal of the analog switch U1. The output end is connected to the IN2 end of the analog switch U1, the NO2 end of the analog switch U1 is connected to the A5V DC power supply, the NC2 end of the analog switch U1 is grounded, and the COM2 end of the analog switch U1 is connected to the 9 end of the interlock relay K4; the COM2 end of the analog switch U1 is also grounded through the bidirectional voltage regulator D15, and the 11 end of the interlock relay K4 is left floating; the 13 end of the interlock relay K4 is connected to the display contact X1 of the five-wire AC switch machine; the 16 end of the interlock relay K4 is connected to the control terminal GPIO6 of the microprocessor; the 1 end of the interlock relay K4 is connected to the D5V DC power supply;

[0035] Terminal 16 of relay K3 is connected to the control terminal GPIO5 of the microprocessor, terminal 1 of relay K3 is connected to the D5V DC power supply, the indication contact X5 of the five-wire AC switch is connected to terminal 13 of relay K3, terminal 11 of relay K3 is left floating, terminal 9 of relay K3 is grounded via a bidirectional voltage regulator D17, terminal 9 of relay K3 is connected to one end of resistor R7 of the X5 sampling circuit, the other end of resistor R7 is connected to the first end of the adjustable resistor R5, the adjustable end of the adjustable resistor R5 is connected to the first end and serves as the output terminal AD5 of the X5 sampling circuit and is connected to the sampling terminal MCU ADC6 of the microprocessor; the tail end of the adjustable resistor R5 is connected to the COM1 end of the analog switch U1;

[0036] The indicating contact X3 of the five-wire AC switch is connected to the 4th terminal of the relay K3, the 6th terminal of the relay K3 is suspended, the 8th terminal of the relay K3 is grounded via the bidirectional voltage regulator D16, the 8th terminal of the relay K3 is connected to one end of the resistor R8 of the X3 sampling circuit, the other end of the resistor R8 is connected to the first end of the adjustable resistor R6, the adjustable end of the adjustable resistor R6 is connected to its first end and serves as the output end AD3 of the X3 sampling circuit and is connected to the sampling end MCU ADC2 of the microprocessor; the tail end of the adjustable resistor R6 is connected to the COM1 end of the analog switch U1.

[0037] Terminal 1 of interlock relay K2 is connected to terminal 4 of interlock relay K4, and terminal 6 of interlock relay K4 is connected to a D5V DC power supply; terminal 8 of interlock relay K4 is left floating; terminal 1 of interlock relay K4 is connected to terminal 4 of interlock relay K1, and terminal 6 of interlock relay K1 is connected to a D5V DC power supply; terminal 8 of interlock relay K1 is left floating;

[0038] The output end AD2 of the X2 sampling circuit is connected to the sampling end MCU ADC0 of the microprocessor via a first proportional amplification circuit; the output end AD4 of the X4 sampling circuit is connected to the sampling end MCU ADC1 of the microprocessor via a second proportional amplification circuit; the output end AD3 of the X3 sampling circuit is connected to the sampling end MCU ADC2 of the microprocessor via a third proportional amplification circuit; the output end AD5 of the X5 sampling circuit is connected to the sampling end MCU ADC6 of the microprocessor via a fourth proportional amplification circuit.

[0039] Significant effect: The present invention provides a five-wire intelligent turnout tester, which uses a five-wire representation logic inspection module to detect the five-wire AC switch machine and determine whether there are faults in the representation contacts and coils of the five-wire switch machine. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 This is the control circuit diagram of a five-wire AC switch machine;

[0041] Figure 2 This is the control circuit diagram of the eight-wire AC switch machine;

[0042] Figure 3 It is a module structure diagram of the present invention;

[0043] Figure 4 is a detailed circuit module structure diagram of the present invention;

[0044] Figure 5 This is a schematic diagram of the positioning equivalent detection circuit of a five-wire AC switch machine;

[0045] Figure 6 This is the logic detection circuit diagram of the five-wire AC switch machine;

[0046] Figure 7 This is the logic detection circuit diagram of the eight-wire AC switch machine;

[0047] Figure 8 is a circuit diagram of a first proportional amplification circuit;

[0048] Figure 9 is a circuit diagram of a second proportional amplification circuit;

[0049] Figure 10 is a circuit diagram of a third proportional amplification circuit;

[0050] Figure 11 is a circuit diagram of a fourth proportional amplification circuit;

[0051] Figure 12 is a circuit diagram of a fifth proportional amplification circuit;

[0052] Figure 13 is a circuit diagram of a sixth proportional amplification circuit;

[0053] Figure 14 This is the circuit diagram of the main circuit A phase current detection circuit;

[0054] Figure 15 This is the circuit diagram of the main circuit B phase current detection circuit;

[0055] Figure 16 This is the circuit diagram of the main circuit C phase current detection circuit;

[0056] Figure 17 This is the circuit diagram of the power module;

[0057] Figure 18 is a circuit diagram of a microprocessor;

[0058] Figure 19 This is the circuit diagram of the motor commutation circuit. DETAILED DESCRIPTION

[0059] The following is combined with Figures 1-19 The intelligent turnout tester is further described in detail.

[0060] Figure 1 This is the control circuit diagram of a five-wire AC switch machine; among them, X1, X2, and X5 are the reverse position positioning start lines, and X1, X4, and X3 are the positioning reverse position start lines; Figure 2 This is the control circuit diagram for an eight-wire AC switch. Eight-wire turnouts are a solution for separating the indication and actuation circuits introduced in recent years by the Beijing Subway to address arcing damage to 2DQJ contacts. This separates the actuation circuit and indication circuit, preventing them from interfering with each other. This mitigates the impact of high current arcing on the 2DQJ contacts during the circuit switching and starting process caused by asynchronous power input due to the start-up time difference between the 1DQJ and 2DQJ. The indication circuit principle is similar to that of a traditional four-wire DC turnout circuit. Positioning indicates that X8→X6 forms the path, while reversing indicates that X7→X8 forms the path. X8 is the shared return line. These are both mature technologies, and their working principles will not be further explained.

[0061] like Figure 2 As shown, after the eight-wire turnout indication circuit separates the action and indication, the corresponding circuit is simpler. For the tester, the original five external output wires are only used for the fixed and reverse action drive applications, and three more wires are added as indication circuit inspection lines.

[0062] Position indication circuit logic: Check that X8→X6 forms only a one-way loop (all other loops are blocked), and the logic check module outputs a position indication. Reverse position indication circuit logic: Check that X7→X8 forms only a one-way loop (all other loops are blocked), and the logic check module outputs a reverse position indication.

[0063] like Figures 1-19 As shown, an intelligent turnout tester includes a five-wire indication logic check module, which is connected to a five-wire AC switch machine, applies forward and reverse DC detection voltage signals to it, and obtains its detection results to determine whether there are faults in the indication contacts and coils of the five-wire AC switch machine.

[0064] The present invention changes the power supply used in the display circuit to direct current, and realizes the purpose of display contact and coil inspection by cleverly designing the display logic inspection module.

[0065] Five-wire turnout indication circuit: Based on circuit analysis, to ensure that the AC turnout switch indication circuit can fully check the switch coil, contacts and diodes, ensure the turnout position is correctly indicated, and automatically determine the correct connection of the diode polarity, a polarity error prompt is added to the reverse position indication circuit. A diode polarity error indicator light is also added. The modified indication equivalent circuit is as follows: Figure 3 shown.

[0066] The five-wire logic check module's positioning circuit logic method is as follows: perform a dual-circuit DC bidirectional check, loop X2-X1, loop X4-X1;

[0067] Condition 1: Forward check, X2 and X4 are positive, X1 is negative, when the action is in place and the diode polarity is correct, both X2→X1 and X4→X1 circuits are connected;

[0068] Condition 2: Reverse check, switch the five-wire logic to check the positive and negative poles of the module, X2 and X4 are negative, X1 is positive, the X1→X4 loop is connected, and the X1→X2 loop is blocked due to the reverse cutoff of the diode;

[0069] When both condition one and condition two checks are met, the five-wire indication logic check module outputs “position indication”, indicating that there is no fault, otherwise there is a fault.

[0070] When the results of condition 1 and condition 2 are opposite, it means that the diode polarity is connected incorrectly. The five-line logic check module outputs the "diode polarity error" prompt;

[0071] When the results of condition 1 and condition 2 check show that all four circuits are connected, it means that the outdoor diode indicates the circuit is short-circuited, and the five-wire logic check module outputs the prompt "Indicates circuit short-circuit error";

[0072] If two or more circuits are blocked in Conditions 1 and 2, it indicates an open circuit. The five-wire logic check module outputs "Open circuit error." This effectively detects short circuits, open circuits, and polarity errors in outdoor switch circuits.

[0073] The five-wire logic check module's reverse position indication circuit has external loops for X1-X3 and X1-X5. The logic principle is the same as above. In a forward check, X1→X3 and X1→X5 are both connected. In a reverse check, X5→X1 is connected and X3→X1 is blocked. The output is "reverse position indication," indicating no fault. Otherwise, a fault is present.

[0074] The five-wire indication logic check module is provided with a microprocessor, and the microprocessor is connected to a five-wire positioning logic detection circuit and a five-wire inversion logic detection circuit;

[0075] like Figure 6 As shown, the five-wire positioning logic detection circuit includes a five-wire positioning reversing logic interlock circuit, an interlock relay K2, a relay K1, an X2 sampling circuit, and an X4 sampling circuit;

[0076] The five-wire positioning reversing logic interlock circuit includes a NOT gate U21, a NOT gate U22 and an analog switch U2. The microprocessor is provided with a five-wire positioning control terminal GPIO12. The five-wire positioning control terminal GPIO12 is connected to the input of the NOT gate U21, the output of the NOT gate U21 is connected to the IN1 terminal of the analog switch U2, the NO1 terminal of the analog switch U2 is connected to the A5V DC power supply, the COM1 terminal of the analog switch U2 is connected to the X2 sampling circuit and the X4 sampling circuit; the NC1 terminal of the analog switch U2 is grounded; the output of the NOT gate U21 is also connected to the input of the NOT gate U22, and the NOT gate U2 The output terminal of 2 is connected to the IN2 terminal of the analog switch U2, the NO2 terminal of the analog switch U2 is connected to the A5V DC power supply, the NC2 terminal of the analog switch U2 is grounded, and the COM2 terminal of the analog switch U2 is connected to the 9 terminal of the interlock relay K2; the COM2 terminal of the analog switch U2 is also grounded through the bidirectional voltage regulator D14, and the 11 terminal of the interlock relay K2 is left floating; the 13 terminal of the interlock relay K2 is connected to the display contact X1 of the five-wire AC switch machine; the 16 terminal of the interlock relay K2 is connected to the control terminal GPIO7 of the microprocessor; the 1 terminal of the interlock relay K2 is connected to the D5V DC power supply;

[0077] Terminal 16 of relay K1 is connected to the control terminal GPIO8 of the microprocessor, terminal 1 of relay K1 is connected to the D5V DC power supply, the indication contact X2 of the five-wire AC switch is connected to terminal 13 of relay K1, terminal 11 of relay K1 is left floating, terminal 9 of relay K1 is grounded via a bidirectional voltage regulator D12, terminal 9 of relay K1 is connected to one end of resistor R3 of the X2 sampling circuit, the other end of resistor R3 is connected to the first end of the adjustable resistor R1, the adjustable end of the adjustable resistor R1 is connected to the first end and serves as the output terminal AD2 of the X2 sampling circuit and is connected to the sampling terminal MCU ADC0 of the microprocessor; the tail end of the adjustable resistor R1 is connected to the COM1 end of the analog switch U2;

[0078] The indicating contact X4 of the five-wire AC switch is connected to the 4th terminal of the relay K1, the 6th terminal of the relay K1 is suspended, the 8th terminal of the relay K1 is grounded via the bidirectional voltage regulator D18, the 8th terminal of the relay K1 is connected to one end of the resistor R4 of the X4 sampling circuit, the other end of the resistor R4 is connected to the first end of the adjustable resistor R2, the adjustable end of the adjustable resistor R2 is connected to the first end and serves as the output terminal AD4 of the X4 sampling circuit, which is connected to the sampling terminal MCU ADC1 of the microprocessor; the tail end of the adjustable resistor R2 is connected to the COM1 terminal of the analog switch U2;

[0079] The five-wire positioning control terminal GPIO12 of the microprocessor sends high and low level signals. Through the control of NOT gate U21 and NOT gate U22, when the COM2 terminal of the analog switch U2 is connected to the 5V power supply, the COM1 terminal of the analog switch U2 is grounded, and the current flows from X1 to X4 and X1 to X2; when the COM1 terminal of the analog switch U2 is connected to the 5V power supply, the COM2 terminal of the analog switch U2 is grounded, and the current flows from X4 to X1 and X2 to X1.

[0080] When the current flows from X1 to X4, X1 to X2; the 5V power supply passes through the COM2 terminal of the analog switch U2 → the 9 terminal of the interlock relay K2 → the 13 terminal of the interlock relay K2 → the contact X1;

[0081] Display contact X1 → display contact X4 → terminal 4 of relay K1 → terminal 8 of relay K1 → resistor R4 → adjustable resistor R2 → terminal COM1 of analog switch U2 → ground; display contact X1 → display contact X2 → terminal 13 of relay K1 → terminal 9 of relay K1 → resistor R3 → adjustable resistor R1 → terminal COM1 of analog switch U2 → ground;

[0082] The control terminal GPIO7 controls the on / off of the coil of the interlock relay K2; the control terminal GPIO8 controls the on / off of the coil of the relay K1. A relay coil is connected between terminals 16 and 1 of relay K1. Terminals 13 and 9 form a first normally open switch, and terminals 13 and 11 form a first normally closed switch. When terminal 13 is connected to terminal 11, terminal 13 of relay K1 is left floating. Terminals 4 and 8 form a second normally open switch, and terminals 4 and 6 form a second normally closed switch. The control terminal GPIO7 controls their operation through the coil. The remaining relay structures are the same and will not be repeated here. For analog switch U2, when COM2 is connected to NC2, COM2 is grounded. When COM2 is connected to NO2, COM2 is connected to a 5V power supply. When COM1 is connected to NC1, COM1 is grounded. When COM1 is connected to NO1, COM1 is connected to a 5V power supply. It is controlled by NOT gates U21 and U11. The remaining analog switches have the same structure.

[0083] On the contrary, when the current flows from X4 to X1, X2 to X1; the 5V power supply passes through the COM1 terminal of the analog switch U2 → the adjustable resistor R2 → the resistor R4 → the 8th terminal of the relay K1 → the 4th terminal of the relay K1 → the indicating contact X4 → the indicating contact X1; the 5V power supply passes through the COM1 terminal of the analog switch U2 → the adjustable resistor R1 → the resistor R3 → the 9th terminal of the relay K1 → the 13th terminal of the relay K1 → the indicating contact X2 → the indicating contact X1;

[0084] It represents contact X1 → terminal 13 of interlock relay K2 → terminal 9 of interlock relay K2 → terminal COM2 of analog switch U2 → ground.

[0085] The five-wire inversion logic detection circuit includes a five-wire inversion commutation logic interlock circuit, an interlock relay K4, a relay K3, an X3 sampling circuit, and an X5 sampling circuit;

[0086] The five-wire inversion switching logic interlock circuit includes a NOT gate U12, a NOT gate U11 and an analog switch U1. The microprocessor is provided with a five-wire inversion control terminal GPIO3. The five-wire inversion control terminal GPIO3 is connected to the input terminal of the NOT gate U12, the output terminal of the NOT gate U12 is connected to the IN1 terminal of the analog switch U1, the NO1 terminal of the analog switch U1 is connected to the A5V DC power supply, the COM1 terminal of the analog switch U1 is connected to the X3 sampling circuit and the X5 sampling circuit; the NC1 terminal of the analog switch U1 is grounded; the output terminal of the NOT gate U12 is also connected to the input terminal of the NOT gate U11, and the NOT gate U11 is connected to the COM1 terminal of the analog switch U1. The output end is connected to the IN2 end of the analog switch U1, the NO2 end of the analog switch U1 is connected to the A5V DC power supply, the NC2 end of the analog switch U1 is grounded, and the COM2 end of the analog switch U1 is connected to the 9 end of the interlock relay K4; the COM2 end of the analog switch U1 is also grounded through the bidirectional voltage regulator D15, and the 11 end of the interlock relay K4 is left floating; the 13 end of the interlock relay K4 is connected to the display contact X1 of the five-wire AC switch machine; the 16 end of the interlock relay K4 is connected to the control terminal GPIO6 of the microprocessor; the 1 end of the interlock relay K4 is connected to the D5V DC power supply;

[0087] Terminal 16 of relay K3 is connected to the control terminal GPIO5 of the microprocessor, terminal 1 of relay K3 is connected to the D5V DC power supply, the indication contact X5 of the five-wire AC switch is connected to terminal 13 of relay K3, terminal 11 of relay K3 is left floating, terminal 9 of relay K3 is grounded via a bidirectional voltage regulator D17, terminal 9 of relay K3 is connected to one end of resistor R7 of the X5 sampling circuit, the other end of resistor R7 is connected to the first end of the adjustable resistor R5, the adjustable end of the adjustable resistor R5 is connected to the first end and serves as the output terminal AD5 of the X5 sampling circuit and is connected to the sampling terminal MCU ADC6 of the microprocessor; the tail end of the adjustable resistor R5 is connected to the COM1 end of the analog switch U1;

[0088] The indicating contact X3 of the five-wire AC switch is connected to the 4th terminal of the relay K3, the 6th terminal of the relay K3 is suspended, the 8th terminal of the relay K3 is grounded via the bidirectional voltage regulator D16, the 8th terminal of the relay K3 is connected to one end of the resistor R8 of the X3 sampling circuit, the other end of the resistor R8 is connected to the first end of the adjustable resistor R6, the adjustable end of the adjustable resistor R6 is connected to its first end and serves as the output end AD3 of the X3 sampling circuit and is connected to the sampling end MCU ADC2 of the microprocessor; the tail end of the adjustable resistor R6 is connected to the COM1 end of the analog switch U1.

[0089] The five-wire inversion control terminal GPIO3 of the microprocessor sends high and low level signals. Through the control of NOT gate U12 and NOT gate U11, when the COM2 terminal of the analog switch U1 is connected to the 5V power supply, the COM1 terminal of the analog switch U1 is grounded, and the current flows from X1 to X5 and X1 to X3; when the COM1 terminal of the analog switch U1 is connected to the 5V power supply, the COM2 terminal of the analog switch U1 is grounded, and the current flows from X5 to X1 and X3 to X1.

[0090] When the current flows from X1 to X5, X1 to X3; the 5V power supply passes through the COM2 terminal of the analog switch U1 → the 9 terminal of the interlock relay K4 → the 13 terminal of the interlock relay K4 → the contact X1;

[0091] Display contact X1 → display contact X3 → terminal 4 of relay K3 → terminal 8 of relay K3 → resistor R8 → adjustable resistor R6 → terminal COM1 of analog switch U1 → ground; display contact X1 → display contact X5 → terminal 13 of relay K3 → terminal 9 of relay K3 → resistor R7 → adjustable resistor R5 → terminal COM1 of analog switch U1 → ground;

[0092] The control terminal GPIO6 controls the on / off of the coil of the interlock relay K4; the control terminal GPIO5 controls the on / off of the coil of the relay K3.

[0093] On the contrary, when the current flows from X5 to X1 and from X3 to X1, the 5V power supply flows through the COM1 terminal of the analog switch U1, the adjustable resistor R6, the resistor R8, the terminal 8 of the relay K3, the terminal 4 of the relay K3, the indicating contact X3, and the indicating contact X1. The 5V power supply flows through the COM1 terminal of the analog switch U1, the adjustable resistor R5, the resistor R7, the terminal 9 of the relay K3, the terminal 13 of the relay K3, the indicating contact X5, and the indicating contact X1.

[0094] It represents contact X1 → terminal 13 of interlock relay K4 → terminal 9 of interlock relay K4 → terminal COM2 of analog switch U1 → ground.

[0095] Terminal 1 of interlock relay K2 is connected to terminal 4 of interlock relay K4, and terminal 6 of interlock relay K4 is connected to a D5V DC power supply; terminal 8 of interlock relay K4 is left floating; terminal 1 of interlock relay K4 is connected to terminal 4 of interlock relay K1, and terminal 6 of interlock relay K1 is connected to a D5V DC power supply; terminal 8 of interlock relay K1 is left floating;

[0096] The coil of the interlock relay K2 is connected to the DC power supply via the normally closed switch of the interlock relay K4. The coil of the interlock relay K4 is connected to the DC power supply via the normally closed switch of the interlock relay K2. When the coil of the interlock relay K2 is energized, the coil of the interlock relay K4 is cut off. When the coil of the interlock relay K4 is energized, the coil of the interlock relay K2 is cut off, thus realizing interlock control. Figures 8-11 As shown, the output AD2 of the X2 sampling circuit is connected to the microprocessor's sampling terminal MCU ADC0 via a first proportional amplifier circuit; the output AD4 of the X4 sampling circuit is connected to the microprocessor's sampling terminal MCU ADC1 via a second proportional amplifier circuit; the output AD3 of the X3 sampling circuit is connected to the microprocessor's sampling terminal MCU ADC2 via a third proportional amplifier circuit; and the output AD5 of the X5 sampling circuit is connected to the microprocessor's sampling terminal MCU ADC6 via a fourth proportional amplifier circuit. The aforementioned proportional amplifier circuits amplify the collected signals via operational amplifier circuits U71 and U72, and transmit them to the microprocessor. The microprocessor then determines whether there are faults in the contacts and coils of the five-wire AC switch after acquiring the signals from the sampling circuits.

[0097] Figure 4 and Figure 6 There is only one five-wire AC switch machine in the figure, which are the equivalent diagrams of the five-wire AC switch machine when in position representation and the equivalent diagrams of the five-wire AC switch machine when in reverse position representation.

[0098] The truth table of the five-wire detection circuit is as follows: Table 1: Five-wire positioning logic table

[0099]

[0100] Table 2: The five-wire system represents the inversion logic table, which prevents power short circuit when X1, X2, X3, X4, and X5 are reversed from the hardware perspective.

[0101]

[0102] Table 3: Preventing short circuit by simultaneous forward and reverse connection from hardware.

[0103]

[0104] Table 4: When the motor is rotating forward or reverse, the hardware prevents the motor from short-circuiting; all relays are disabled and in the disconnected state.

[0105]

[0106] It also includes an eight-wire logic check module, which is connected to an eight-wire AC switch machine, applies forward and reverse DC detection voltage signals to it, and obtains its detection results to determine whether the eight-wire switch machine has a fault.

[0107] The logical method of the eight-wire indication logic check module is as follows: Position indication circuit logic: check that the loop X8→X6 only constitutes a one-way loop, the loop X8→X7 is blocked, and the eight-wire indication logic check module outputs a positioning indication indication; reverse position indication circuit logic: check that the loop X7→X8 only constitutes a one-way loop, the loop X6→X8 is blocked, and the eight-wire indication logic check module outputs a reverse position indication indication.

[0108] The eight-wire logic check module is provided with a microprocessor, and the microprocessor is connected to an eight-wire logic detection circuit;

[0109] The eight-line logic detection circuit includes an eight-line commutation logic interlock circuit, relay K5, relay K6, relay K7, X6 sampling circuit and X7 sampling circuit;

[0110] The eight-line commutation logic interlock circuit includes a NOT gate U61, a NOT gate U62, and an analog switch U6. The microprocessor is provided with an eight-line commutation control terminal GPIO11. The eight-line commutation control terminal GPIO11 is connected to the input terminal of the NOT gate U61, the output terminal of the NOT gate U61 is connected to the IN1 terminal of the analog switch U6, the NO1 terminal of the analog switch U6 is connected to a 5V DC power supply, and the NC1 terminal of the analog switch U6 is grounded.

[0111] Terminal 16 of relay K5 is connected to the control terminal GPIO10 of the microprocessor, terminal 1 of relay K5 is connected to the D5V DC power supply, terminal 13 of relay K5 is connected to the indication contact X8 of the eight-wire AC switch; terminal 11 of relay K5 is left floating; terminal 9 of relay K5 is connected to the COM1 terminal of analog switch U6; the COM1 terminal of analog switch U6 is grounded via the bidirectional voltage regulator D19;

[0112] The output end of the NOT gate U61 is also connected to the input end of the NOT gate U62, the output end of the NOT gate U62 is connected to the IN2 end of the analog switch U6, the NO2 end of the analog switch U6 is connected to the A5V DC power supply, the COM2 end of the analog switch U6 is connected to the X7 sampling circuit; the NC2 end of the analog switch U6 is grounded;

[0113] Terminal 16 of relay K6 is connected to the control terminal GPIO9 of the microprocessor, terminal 1 of relay K6 is connected to the D5V DC power supply, and terminal 13 of relay K6 is connected to the display contact X7 of the eight-wire AC switch; terminal 11 of relay K6 is left floating; terminal 9 of relay K6 is connected to one end of resistor R73 of the X7 sampling circuit, and terminal 9 of relay K6 is also grounded via a bidirectional voltage regulator D13. The other end of resistor R73 is connected to the first end of an adjustable resistor R72, and the adjustable end of the adjustable resistor R72 is connected to its first end as the output terminal AD7 of the X7 sampling circuit, and the output terminal AD7 is connected to the sampling terminal MCU ADC14 of the microprocessor; the tail end of the adjustable resistor R72 is connected to the COM2 terminal of the analog switch U6;

[0114] Terminal 16 of relay K7 is connected to the control terminal GPIO4 of the microprocessor, terminal 1 of relay K7 is connected to the D5V DC power supply, and terminal 13 of relay K7 is connected to the indication contact X6 of the eight-wire AC switch; terminal 11 of relay K7 is left floating; terminal 9 of relay K7 is connected to one end of the resistor R66 of the X6 sampling circuit, and terminal 9 of relay K7 is also grounded via the bidirectional voltage regulator D24. The other end of resistor R66 is connected to the first end of the adjustable resistor R64, and the adjustable end of the adjustable resistor R64 is connected to its first end as the output terminal AD6 of the X6 sampling circuit, and the output terminal AD6 is connected to the sampling terminal MCU ADC13 of the microprocessor; the tail end of the adjustable resistor R64 is grounded.

[0115] The eight-wire reversing control terminal GPIO11 of the microprocessor sends high and low level signals. Through the control of NOT gates U61 and U62, when the COM1 terminal of the analog switch U6 is connected to the 5V power supply, the COM2 terminal of the analog switch U6 is grounded, and the current flows from X8 to X6 and X8 to X7 (blocked); when the COM2 terminal of the analog switch U6 is connected to the 5V power supply, the COM1 terminal of the analog switch U6 is grounded, and the current flows from X7 to X8 and X6 to X8 (the ground voltage is zero);

[0116] When the current flows from X8 to X6, X8 to X7; the 5V power supply passes through the COM1 terminal of the analog switch U6 → the 9 terminal of the relay K5 → the 13 terminal of the relay K5 → the contact X8;

[0117] Display contact X8 → display contact X6 → terminal 13 of relay K7 → terminal 9 of relay K7 → resistor R66 → adjustable resistor R64 → ground; display contact X8 → display contact X7 → terminal 13 of relay K6 → terminal 9 of relay K6 → resistor R73 → adjustable resistor R72 → terminal COM2 of analog switch U6 → ground;

[0118] Control terminal GPIO10 controls the on / off switching of relay K5's coil; control terminal GPIO4 controls the on / off switching of relay K7's coil. Control terminal GPIO9 controls the on / off switching of relay K6's coil. A relay coil is connected between terminals 16 and 1 of relay K5. Terminals 13 and 9 form a first normally open switch, while terminals 13 and 11 form a first normally closed switch. When terminal 13 is connected to terminal 11, terminal 13 of relay K1 is left floating; terminals 4 and 8 form a second normally open switch, while terminals 4 and 6 form a second normally closed switch. The remaining relay structures are identical and will not be described in detail. For analog switch U6, when COM2 is connected to NC2, COM2 is grounded. When COM2 is connected to NO2, COM2 is connected to a 5V power supply. When COM1 is connected to NC1, COM1 is grounded. When COM1 is connected to NO1, COM1 is connected to a 5V power supply. It is controlled by NOT gates U61 and U62.

[0119] On the contrary, when the current flows from X7 to X8, X6 to X8; the 5V power supply flows through the COM2 terminal of the analog switch U6 → the adjustable resistor R72 → the resistor R73 → the 9th terminal of the relay K6 → the 13th terminal of the relay K6 → the display contact X7 → the display contact X8; the ground (voltage is 0) → the adjustable resistor R64 → the resistor R66 → the 9th terminal of the relay K7 → the 13th terminal of the relay K7 → the display contact X6 → the display contact X8;

[0120] Display contact X8 → terminal 13 of relay K5 → terminal 9 of relay K5 → terminal COM1 of analog switch U6 → ground. The display circuit of the eight-wire AC point switch is tested through the above current path.

[0121] The output AD6 of the X6 sampling circuit is connected to the microprocessor's sampling terminal MCU ADC13 via a fifth proportional amplifier circuit. The output AD7 of the X7 sampling circuit is connected to the microprocessor's sampling terminal MCU ADC14 via a sixth proportional amplifier circuit. The fifth and sixth proportional amplifier circuits amplify the voltage signals from the sampling circuits and transmit them to the microprocessor, which determines whether the eight-wire AC switch's indication circuit is faulty. If neither the position indication nor the reverse indication is present, the switch is faulty.

[0122] Table 5: Eight-wire circuit logic table

[0123]

[0124] The microprocessor is connected to a motor commutation circuit; the motor commutation circuit is provided with a motor commutation logic interlock circuit, the microprocessor is provided with a motor control terminal GPIO0 and a motor control terminal GPIO1, the motor control terminal GPIO0 is connected to a D3.3V DC power supply via a pull-up resistor R60, and the motor control terminal GPIO1 is connected to a D3.3V DC power supply via a pull-up resistor R61, the motor commutation logic interlock circuit is provided with an XOR gate U20, an AND gate U25 and an AND gate U26, the motor control terminal GPIO0 and the motor control terminal GPIO1 are respectively connected to two input terminals of the XOR gate U20, the output terminal of the XOR gate U20 is connected to the input terminal A2 of the AND gate U25 and the input terminal B1 of the AND gate U26, the motor control terminal GPIO0 is also connected to the input terminal B2 of the AND gate U25; the motor control terminal GPIO1 is also connected to the input terminal A1 of the AND gate U26; the output terminal of the AND gate U25 is connected to one end of the resistor R59, and the other end of the resistor R59 serves as the first output terminal DR of the motor commutation logic interlock circuit. CCW is connected to the forward control circuit of the switch machine; the output end of the AND gate U26 is connected to one end of the resistor R58, and the other end of the resistor R58 serves as the second output end DR CW of the motor commutation logic interlock circuit and is connected to the reverse control circuit of the switch machine.

[0125] Through the control of XOR gate U20, AND gate U25 and AND gate U26, when the motor control terminal GPIO0 outputs a signal, the switch forward control circuit works; when the motor control terminal GPIO1 outputs a signal, the switch reverse control circuit works; when both the motor control terminal GPIO0 and the motor control terminal GPIO1 output signals, both the switch forward control circuit and the switch reverse control circuit do not work, thereby preventing short circuit during motor reversal from a hardware perspective. Both the switch forward control circuit and the switch reverse control circuit are existing mature technologies and will not be described in detail.

[0126] The motor commutation logic interlock circuit is connected to a detection inhibit logic control circuit. This circuit comprises an OR gate U38 and a buffer driver U14. The two inputs of OR gate U38 are connected to the outputs of AND gates U25 and U26, respectively. The output of OR gate U38 is connected to enable terminals 1OE# and 2OE# of buffer driver U14. The five-wire inversion control terminals GPIO3, GPIO5, GPIO6, GPIO7, and GPIO8 are connected to the input of NOT gate U12, terminal 16 of relay K3, terminal 16 of interlock relay K4, terminal 16 of interlock relay K2, and terminal 16 of relay K1, respectively, via corresponding switches of buffer driver U14. The microprocessor's control terminals GPIO10, GPIO9, and GPIO4 are connected to terminals 16 of relay K5, terminal 16 of relay K6, and terminal 16 of relay K7, respectively, via corresponding switches of buffer driver U14.

[0127] Through the above circuit configuration, OR gate U38 receives signals from the outputs of AND gates U25 and U26. When either the forward or reverse control circuit of the switch machine is operating, the output of OR gate U38 sends a signal to enable terminals 1OE# and 2OE# of buffer driver U14, turning off all switches in buffer driver U14 and stopping relays K3, interlock relay K4, interlock relay K2, relay K1, relay K5, relay K6, and relay K7. This prevents damage to the detection circuit by connecting the indicating contacts during forward or reverse rotation of the switch machine.

[0128] like Figure 14-16As shown, the switch's three-phase AC power supply is equipped with current detection circuits for phases A, B, and C. These detect the three-phase currents and send them to a microprocessor. If one phase is disconnected, the microprocessor stops the forward and reverse control circuits and issues an alarm. L3 is a transformer that detects the current in phase A. The acquired current signal is rectified by a bridge circuit, filtered by a capacitor, and then transmitted to an operational amplifier for amplification. The amplified signal is then transmitted to the microprocessor. The same principle applies to phases B and C. When the switch's motor is operating, its three-phase currents should be essentially the same. The microprocessor is connected to a touchscreen display that controls the tester and displays alarm and fault detection information.

[0129] Finally, it should be noted that the above examples are only specific implementation examples of the present invention. Of course, those skilled in the art can make changes and modifications to the present invention. If these modifications and variations fall within the scope of the claims of the present invention and their equivalent technologies, they should be considered to be within the scope of protection of the present invention.

Claims

1. A five-wire intelligent turnout tester, characterized in that: The module comprises a five-wire indication logic check module, which is connected to a five-wire AC switch machine, applies a forward and reverse DC detection voltage signal to the switch machine, obtains the detection result and determines whether the indication contact and coil of the five-wire AC switch machine are faulty; The five-wire indication logic check module is provided with a microprocessor, and the microprocessor is connected to a five-wire positioning logic detection circuit and a five-wire inversion logic detection circuit; The five-wire positioning logic detection circuit includes a five-wire positioning reversing logic interlock circuit, an interlock relay K2, a relay K1, an X2 sampling circuit, and an X4 sampling circuit; The five-wire positioning reversing logic interlock circuit includes a NOT gate U21, a NOT gate U22 and an analog switch U2. The microprocessor is provided with a five-wire positioning control terminal GPIO12. The five-wire positioning control terminal GPIO12 is connected to the input of the NOT gate U21, the output of the NOT gate U21 is connected to the IN1 terminal of the analog switch U2, the NO1 terminal of the analog switch U2 is connected to the A5V DC power supply, the COM1 terminal of the analog switch U2 is connected to the X2 sampling circuit and the X4 sampling circuit; the NC1 terminal of the analog switch U2 is grounded; the output of the NOT gate U21 is also connected to the input of the NOT gate U22, and the NOT gate U2 The output terminal of 2 is connected to the IN2 terminal of the analog switch U2, the NO2 terminal of the analog switch U2 is connected to the A5V DC power supply, the NC2 terminal of the analog switch U2 is grounded, and the COM2 terminal of the analog switch U2 is connected to the 9 terminal of the interlock relay K2; the COM2 terminal of the analog switch U2 is also grounded through the bidirectional voltage regulator D14, and the 11 terminal of the interlock relay K2 is left floating; the 13 terminal of the interlock relay K2 is connected to the indication contact X1 of the five-wire AC switch machine; the 16 terminal of the interlock relay K2 is connected to the control terminal GPIO7 of the microprocessor; the 1 terminal of the interlock relay K2 is connected to the D5V DC power supply; Terminal 16 of relay K1 is connected to the control terminal GPIO8 of the microprocessor, terminal 1 of relay K1 is connected to the D5V DC power supply, the indication contact X2 of the five-wire AC switch is connected to terminal 13 of relay K1, terminal 11 of relay K1 is left floating, terminal 9 of relay K1 is grounded via a bidirectional voltage regulator D12, terminal 9 of relay K1 is connected to one end of resistor R3 of the X2 sampling circuit, the other end of resistor R3 is connected to the first end of the adjustable resistor R1, the adjustable end of the adjustable resistor R1 is connected to the first end and serves as the output terminal AD2 of the X2 sampling circuit and is connected to the sampling terminal MCU ADC0 of the microprocessor; the tail end of the adjustable resistor R1 is connected to the COM1 end of the analog switch U2; The indicating contact X4 of the five-wire AC switch is connected to the 4th terminal of the relay K1, the 6th terminal of the relay K1 is suspended, the 8th terminal of the relay K1 is grounded via the bidirectional voltage regulator D18, the 8th terminal of the relay K1 is connected to one end of the resistor R4 of the X4 sampling circuit, the other end of the resistor R4 is connected to the first end of the adjustable resistor R2, the adjustable end of the adjustable resistor R2 is connected to the first end and serves as the output terminal AD4 of the X4 sampling circuit, which is connected to the sampling terminal MCU ADC1 of the microprocessor; the tail end of the adjustable resistor R2 is connected to the COM1 terminal of the analog switch U2; The five-wire inversion logic detection circuit includes a five-wire inversion commutation logic interlock circuit, an interlock relay K4, a relay K3, an X3 sampling circuit, and an X5 sampling circuit; The five-wire inversion switching logic interlock circuit includes a NOT gate U12, a NOT gate U11 and an analog switch U1. The microprocessor is provided with a five-wire inversion control terminal GPIO3. The five-wire inversion control terminal GPIO3 is connected to the input terminal of the NOT gate U12, the output terminal of the NOT gate U12 is connected to the IN1 terminal of the analog switch U1, the NO1 terminal of the analog switch U1 is connected to the A5V DC power supply, the COM1 terminal of the analog switch U1 is connected to the X3 sampling circuit and the X5 sampling circuit; the NC1 terminal of the analog switch U1 is grounded; the output terminal of the NOT gate U12 is also connected to the input terminal of the NOT gate U11, and the NOT gate U11 is connected to the COM1 terminal of the analog switch U1. The output end is connected to the IN2 end of the analog switch U1, the NO2 end of the analog switch U1 is connected to the A5V DC power supply, the NC2 end of the analog switch U1 is grounded, and the COM2 end of the analog switch U1 is connected to the 9 end of the interlock relay K4; the COM2 end of the analog switch U1 is also grounded through the bidirectional voltage regulator D15, and the 11 end of the interlock relay K4 is left floating; the 13 end of the interlock relay K4 is connected to the display contact X1 of the five-wire AC switch machine; the 16 end of the interlock relay K4 is connected to the control terminal GPIO6 of the microprocessor; the 1 end of the interlock relay K4 is connected to the D5V DC power supply; Terminal 16 of relay K3 is connected to the control terminal GPIO5 of the microprocessor, terminal 1 of relay K3 is connected to the D5V DC power supply, the indication contact X5 of the five-wire AC switch is connected to terminal 13 of relay K3, terminal 11 of relay K3 is left floating, terminal 9 of relay K3 is grounded via a bidirectional voltage regulator D17, terminal 9 of relay K3 is connected to one end of resistor R7 of the X5 sampling circuit, the other end of resistor R7 is connected to the first end of the adjustable resistor R5, the adjustable end of the adjustable resistor R5 is connected to the first end and serves as the output terminal AD5 of the X5 sampling circuit and is connected to the sampling terminal MCU ADC6 of the microprocessor; the tail end of the adjustable resistor R5 is connected to the COM1 end of the analog switch U1; The indicating contact X3 of the five-wire AC switch is connected to the 4th terminal of the relay K3, the 6th terminal of the relay K3 is suspended, the 8th terminal of the relay K3 is grounded via the bidirectional voltage regulator D16, the 8th terminal of the relay K3 is connected to one end of the resistor R8 of the X3 sampling circuit, the other end of the resistor R8 is connected to the first end of the adjustable resistor R6, the adjustable end of the adjustable resistor R6 is connected to its first end and serves as the output end AD3 of the X3 sampling circuit and is connected to the sampling end MCU ADC2 of the microprocessor; the tail end of the adjustable resistor R6 is connected to the COM1 end of the analog switch U1.

2. The five-wire intelligent turnout tester according to claim 1, characterized in that: The five-wire logic check module's positioning circuit logic method is as follows: perform a dual-circuit DC bidirectional check, loop X2-X1, loop X4-X1; Condition 1: Forward check, X2 and X4 are positive, X1 is negative, when the action is in place and the diode polarity is correct, both X2→X1 and X4→X1 circuits are connected; Condition 2: Reverse check, switch the five lines to indicate the positive and negative poles of the logic check module, X2 and X4 are negative, X1 is positive, and the X1→X4 loop is connected. The X1→X2 loop is blocked due to the reverse cutoff of the diode. When both condition 1 and condition 2 are checked to be consistent, the five-wire logic check module outputs "positioning indication".

3. The five-wire intelligent turnout tester according to claim 2, characterized in that: When the results of condition 1 and condition 2 are opposite, it means that the diode polarity is connected incorrectly. The five-line logic check module outputs the "diode polarity error" prompt; When the results of condition 1 and condition 2 check show that all four circuits are connected, it means that the outdoor diode indicates the circuit is short-circuited, and the five-wire logic check module outputs the prompt "Indicates circuit short-circuit error"; When two or more circuits are blocked in the results of condition one and condition two, it indicates an open circuit, and the five-wire logic check module outputs the "Open Circuit Error" prompt.

4. The five-wire intelligent turnout tester according to claim 2, characterized in that: The five-wire logic check module indicates that the inverted position of the circuit has external line loops of X1-X3 and X1-X5, and the logic principle is the same as above.

5. The five-wire intelligent turnout tester according to claim 1, characterized in that: Terminal 1 of interlock relay K2 is connected to terminal 4 of interlock relay K4, and terminal 6 of interlock relay K4 is connected to a D5V DC power supply; terminal 8 of interlock relay K4 is left floating; terminal 1 of interlock relay K4 is connected to terminal 4 of interlock relay K1, and terminal 6 of interlock relay K1 is connected to a D5V DC power supply; terminal 8 of interlock relay K1 is left floating; The output end AD2 of the X2 sampling circuit is connected to the sampling end MCU ADC0 of the microprocessor via a first proportional amplification circuit; the output end AD4 of the X4 sampling circuit is connected to the sampling end MCU ADC1 of the microprocessor via a second proportional amplification circuit; the output end AD3 of the X3 sampling circuit is connected to the sampling end MCU ADC2 of the microprocessor via a third proportional amplification circuit; the output end AD5 of the X5 sampling circuit is connected to the sampling end MCU ADC6 of the microprocessor via a fourth proportional amplification circuit.

6. The five-wire intelligent turnout tester according to claim 1 or 5, characterized in that: The microprocessor is connected to a motor commutation circuit; the motor commutation circuit is provided with a motor commutation logic interlock circuit, the microprocessor is provided with a motor control terminal GPIO0 and a motor control terminal GPIO1, the motor control terminal GPIO0 is connected to a D3.3V DC power supply via a pull-up resistor R60, and the motor control terminal GPIO1 is connected to a D3.3V DC power supply via a pull-up resistor R61, the motor commutation logic interlock circuit is provided with an XOR gate U20, an AND gate U25 and an AND gate U26, the motor control terminal GPIO0 and the motor control terminal GPIO1 are respectively connected to two input terminals of the XOR gate U20, the output terminal of the XOR gate U20 is connected to the input terminal A2 of the AND gate U25 and the input terminal B1 of the AND gate U26, the motor control terminal GPIO0 is also connected to the input terminal B2 of the AND gate U25; the motor control terminal GPIO1 is also connected to the input terminal A1 of the AND gate U26; the output terminal of the AND gate U25 is connected to one end of the resistor R59, and the other end of the resistor R59 serves as the first output terminal DR of the motor commutation logic interlock circuit. CCW is connected to the forward control circuit of the switch machine; the output end of the AND gate U26 is connected to one end of the resistor R58, and the other end of the resistor R58 serves as the second output end DR CW of the motor commutation logic interlock circuit and is connected to the reverse control circuit of the switch machine.

7. The five-wire intelligent turnout tester according to claim 6, characterized in that: The motor commutation logic interlock circuit is connected to the detection inhibition logic control circuit; the detection inhibition logic control circuit is provided with an OR gate U38 and a buffer driver U14, the two input ends of the OR gate U38 are respectively connected to the output end of the AND gate U25 and the output end of the AND gate U26, and the output end of the OR gate U38 is connected to the enable end 1OE# and the enable end 2OE# of the buffer driver U14; the five-wire inversion control end GPIO3, the control end GPIO5, the control end GPIO6, the control end GPIO7, and the control end GPIO8 are respectively connected to the input end of the NOT gate U12, the 16 end of the relay K3, the 16 end of the interlock relay K4, the 16 end of the interlock relay K2, and the 16 end of the relay K1 through the corresponding switches of the buffer driver U14.

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