Micro-led epitaxial structure and process optimization method

Abstract

The application discloses a Micro-LED epitaxial structure and a process optimization method thereof. The process optimization method first detects the concentration of the p-type dopant in the first nitride quantum well light-emitting layer and the first nitride buffer layer of the first epitaxial wafer. According to the detection result, the extension distance of the p-type dopant to the first nitride quantum well light-emitting layer can be determined. In this way, whether the depth of the inverse cone pit in the first nitride quantum well light-emitting layer of the first epitaxial wafer is reasonable can be determined, and the process optimization direction is given. Then, by setting a nitride modulation layer, the inverse cone pit in the nitride quantum well light-emitting layer is re-formed or the inverse cone pit in the nitride quantum well light-emitting layer is isolated. Process adjustment is not needed after chip preparation and testing are completed. The problem of process adjustment lag in the production process is overcome. The process adjustment efficiency is greatly improved, and the rejection rate of the epitaxial wafer can be reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of epitaxial growth of semiconductor technology, and in particular to a Micro-LED epitaxial structure and a process optimization method thereof. BACKGROUND

[0002] GaN-based third-generation semiconductor materials have a wide band gap, high breakdown field, high thermal conductivity, high electron saturation velocity, strong radiation resistance, and other superior properties, and are widely used in the preparation of high-frequency, high-power, and high-temperature microelectronic devices, realizing light electronic devices covering the entire visible light wavelength band, and having broad application prospects in aerospace military fields and commercial fields such as daily lighting and display. Among them, Micro-LED display has many advantages such as self-luminous, high efficiency, low power consumption, high integration, high stability, and the like, and is small in size, high in flexibility, easy to disassemble and combine, and can be applied to any display application from small size to large size. Modern society has entered the information age and is developing towards intelligence, and display is a key link to realize information exchange and intelligence. Among the current many display technologies, Micro-LED display technology is considered to be the next generation of display technology that can revolutionize.

[0003] The current mature preparation of GaN-based semiconductor materials, hydride vapor phase epitaxy (HVPE) and MOCVD epitaxy (Metal-organic Chemical Vapor Deposition), are epitaxial technologies grown on a heterogeneous substrate. Due to the lattice and thermal expansion mismatch between the substrate and the epitaxial layer, the dislocation density of the epitaxially grown semiconductor material is as high as 10 8 / cm 2 The above leads to the easy production of defects, and the inverted cone pit is one of the defects. Precise control of the inverted cone pit has an important influence on the performance of the epitaxial wafer. SUMMARY

[0004] When the inverted cone pit structure is formed in the quantum well light-emitting layer, a large number of inverted cone pit structures are present on the surface of the quantum well light-emitting layer, so that the quantum well also grows on the sidewall of the inverted cone pit structure. The sidewall quantum well has a larger band gap, and forms a potential barrier ring around the dislocation, hindering the leakage of carriers to the dislocation area, so that the dislocation can be shielded and non-radiative recombination can be inhibited. In addition, because the sidewall of the inverted cone pit is a semi-polar surface, holes can more easily inject into the quantum well light-emitting layer through the quantum well of the inverted cone pit sidewall, so that the inverted cone pit structure can effectively promote hole injection and improve the uniformity of carrier distribution in the quantum well light-emitting layer.

[0005] The inverted cone pit structure plays a very important role in the quantum well light emitting layer, and the size and depth of the inverted cone pit will affect the distance between the carriers and the dislocations, so the size and depth of the inverted cone pit have optimal values, especially the depth of the inverted cone pit, when the depth is too small, the lower potential energy carriers cannot form a better injection in the quantum well light emitting layer, and when the depth is too large, the carriers will overflow the quantum well light emitting layer through the side wall of the inverted cone pit, causing carrier leakage, especially in the Mico-LED epitaxial structure as a new generation of display technology, the quantum well light emitting layer has a relatively thin thickness compared with the conventional lighting epitaxial structure, and the control of the depth of the inverted cone pit is more important, so how to verify whether the depth of the inverted cone pit in the quantum well light emitting layer is optimal is of great significance to the performance optimization of the GaN-based semiconductor material epitaxial wafer.

[0006] In summary, the precise control of the inverted cone pit affects the performance of the semiconductor epitaxial wafer, however, the performance of the epitaxial wafer is evaluated by the chip process on the epitaxial wafer, and finally the performance of the chip is tested to feedback the performance of the epitaxial wafer, and at present, the preparation cycle from the epitaxial wafer to the chip is usually 72-96h, according to the production efficiency of the epitaxial wafer, generally 4-6 production batches of epitaxial wafers can be completed within 24h, so 12-16 production batches have been completed within one preparation cycle of the chip, if the performance of the chip has problems such as brightness, which cannot meet the application demand of the customer, the produced epitaxial wafers will be scrapped, so how to efficiently and accurately preliminarily evaluate the performance of the epitaxial wafer before the chip preparation is completed has great significance for reducing the production cost.

[0007] The purpose of the present application is to provide a Micro-LED epitaxial structure and a process optimization method thereof.

[0008] The purpose of the present application is achieved by adopting the following technical solutions:

[0009] A process optimization method of a Micro-LED epitaxial structure, comprising:

[0010] Preparation of a first epitaxial wafer, the first epitaxial wafer comprising a first substrate, a first n-type nitride layer, a first nitride buffer layer, a first nitride quantum well light emitting layer and a first p-type nitride layer located on the first substrate in sequence, the first p-type nitride layer containing a p-type dopant;

[0011] When the concentration of the p-type dopant in the first nitride quantum well light emitting layer is less than 10 19 cm -3 , or when the concentration of the p-type dopant in the first nitride quantum well light emitting layer and the first nitride buffer layer is not less than 10 19 cm -3When the first epitaxial wafer is prepared, a second epitaxial wafer is prepared, the second epitaxial wafer comprising a second substrate, a second n-type nitride layer, a second nitride buffer layer, a nitride modulation layer, a second nitride quantum well light-emitting layer and a second p-type nitride layer successively on the second substrate, the second p-type nitride layer containing a p-type dopant, the nitride modulation layer being used to form inverted pyramids only in the second nitride quantum well light-emitting layer when the second nitride quantum well light-emitting layer is prepared, wherein the preparation method of the structure of the second epitaxial wafer except the nitride modulation layer is the same as the preparation method of the corresponding structure of the first epitaxial wafer.

[0012] Preferably, the preparation method of the first epitaxial wafer comprises:

[0013] Step S11: growing a first n-type nitride layer with a thickness of 1-3 μm on the first substrate under the condition of a pressure of 100-300 torr and a temperature of 1050-1200 ℃, the doping concentration of the n-type dopant in the first n-type nitride layer being 1×10 18 cm -3 -8×10 18 cm -3 , and the growth atmosphere being H2 atmosphere;

[0014] Step S12: growing a first nitride buffer layer on the first n-type nitride layer under the condition of a pressure of 100-400 torr and a temperature of 800-1000 ℃;

[0015] Step S13: growing a first nitride quantum well light-emitting layer on the first nitride buffer layer under the condition of a pressure of 100-400 torr;

[0016] Step S14: growing a first p-type nitride layer on the first nitride quantum well light-emitting layer under the condition of a pressure of 200-600 torr and a temperature of 950-1050 ℃, the doping concentration of the p-type dopant being 1×10 19 cm -3 -1×10 21 cm -3 , and the growth atmosphere being H2;

[0017] The preparation method of the first epitaxial wafer further comprises detecting the concentration of the p-type dopant in the first nitride quantum well light-emitting layer and the first nitride buffer layer;

[0018] In the preparation method of the second epitaxial wafer, when the concentration of the p-type dopant in the first nitride quantum well light-emitting layer is lower than 10 19 cm -3, the nitride modulation layer is a first low-potential nitride modulation layer, and a preparation method of the first low-potential nitride modulation layer is: growing the first low-potential nitride modulation layer on the second nitride buffer layer under the condition that a growth temperature is 700-800 ℃ and a pressure is 50-100 torr, and a growth atmosphere is N 2 ;

[0019] In the preparation method of the second epitaxial wafer, when a concentration of a p-type dopant in the first nitride quantum well light-emitting layer and the first nitride buffer layer is not less than 10 19 cm -3 -6, the nitride modulation layer is a second low-potential nitride modulation layer, and a preparation method of the second low-potential nitride modulation layer is: growing the second low-potential nitride modulation layer on the second nitride buffer layer under the condition that a growth temperature is 850-1050 ℃ and a pressure is 400-600 torr, and a growth atmosphere is H 2.

[0020] Preferably, in the step S12, the first nitride buffer layer comprises nitride superlattice well layers and nitride superlattice barrier layers which are periodically and alternately grown for 2-6 times, wherein a monolayer thickness of the nitride superlattice well layer is 1-6 nm, a growth atmosphere of the nitride superlattice well layer is N 2, a monolayer thickness of the nitride superlattice barrier layer is 12-50 nm, and a growth atmosphere of the nitride superlattice barrier layer is H 2.

[0021] The nitride superlattice well layer and the nitride superlattice barrier layer are respectively an InGaN superlattice well layer and a GaN superlattice barrier layer.

[0022] Preferably, in the step S13, the first nitride quantum well light-emitting layer comprises nitride quantum well layers and nitride quantum barrier layers which are periodically and alternately grown for 1-3 times, wherein a monolayer thickness of the nitride quantum well layer is 1-3 nm, a growth temperature of the nitride quantum well layer is 700-950 ℃, and a growth atmosphere of the nitride quantum well layer is N 2, a monolayer thickness of the nitride quantum barrier layer is 5-10 nm, a growth temperature of the nitride quantum barrier layer is 750-1000 ℃, and a growth atmosphere of the nitride quantum barrier layer is H 2.

[0023] The nitride quantum well layer and the nitride quantum barrier layer are respectively an InGaN quantum well layer and a GaN quantum barrier layer.

[0024] Preferably, when a concentration of a p-type dopant in the first nitride quantum well light-emitting layer is less than 10 19 cm -3, the nitride modulation layer is a first low-potential barrier nitride modulation layer, the second epitaxial wafer further comprises a first high-potential barrier nitride cover layer and a first high-potential barrier nitride isolation layer, the first high-potential barrier nitride cover layer is located between the second nitride buffer layer and the first low-potential barrier nitride modulation layer, and the first high-potential barrier nitride isolation layer is located between the first low-potential barrier nitride modulation layer and the second nitride quantum well light-emitting layer.

[0025] Preferably, the preparation method of the first high-potential barrier nitride cover layer is that the first high-potential barrier nitride cover layer with a thickness of 10-100 nm is grown on the second nitride buffer layer under the condition that the pressure is 150-250 torr and the temperature is 995-1050 ℃, and the growth atmosphere is H2.

[0026] The preparation method of the first low-potential barrier nitride modulation layer is that the first low-potential barrier nitride modulation layer with a thickness of 10-50 nm is grown on the first high-potential barrier nitride cover layer under the condition that the growth temperature is 700-800 ℃ and the pressure is 50-100 torr, and the growth atmosphere is N2.

[0027] The preparation method of the first high-potential barrier nitride isolation layer is that the first high-potential barrier nitride isolation layer with a thickness of 50-100 nm is grown on the first low-potential barrier nitride modulation layer under the condition that the pressure is 50-150 torr and the temperature is 1025-1075 ℃, and the growth atmosphere is H2.

[0028] The first high-potential barrier nitride cover layer is an AlGaN cover layer, the Al component content in the first high-potential barrier nitride cover layer is 0.2-0.5, the first low-potential barrier nitride modulation layer is a GaN modulation layer, the first high-potential barrier nitride isolation layer is an AlGaN isolation layer, and the Al component content in the first high-potential barrier nitride cover layer is lower than the Al component content in the first high-potential barrier nitride isolation layer.

[0029] Preferably, when the concentration of the p-type dopant in the first nitride quantum well light-emitting layer and the first nitride buffer layer is not less than 10 19 cm -3 , the nitride modulation layer is a second low-potential barrier nitride modulation layer, the second epitaxial wafer further comprises a second high-potential barrier nitride cover layer and a second high-potential barrier nitride isolation layer, the second high-potential barrier nitride cover layer is located between the second nitride buffer layer and the second low-potential barrier nitride modulation layer, and the second high-potential barrier nitride isolation layer is located between the second low-potential barrier nitride modulation layer and the second nitride quantum well light-emitting layer.

[0030] Preferably, the preparation method of the second high-potential barrier nitride cover layer is: growing a second high-potential barrier nitride cover layer with a thickness of 100-200 nm on the second nitride buffer layer under the conditions of a pressure of 150-250 torr and a temperature of 995-1050 ℃, and the growth atmosphere is H2.

[0031] The preparation method of the second low-potential barrier nitride modulation layer is: growing the second low-potential barrier nitride modulation layer with a thickness of 10-50 nm on the second high-potential barrier nitride cover layer under the conditions of a growth temperature of 850-1050 ℃ and a pressure of 400-600 torr, and the growth atmosphere is H2.

[0032] The preparation method of the second high-potential barrier nitride isolation layer is: growing a second high-potential barrier nitride isolation layer with a thickness of 50-100 nm on the second low-potential barrier nitride modulation layer under the conditions of a pressure of 50-150 torr and a temperature of 1025-1075 ℃, and the growth atmosphere is H2.

[0033] Preferably, the second high-potential barrier nitride cover layer is an AlGaN cover layer, the Al component content in the second high-potential barrier nitride cover layer is greater than 0.2 and less than or equal to 0.5; the second low-potential barrier nitride modulation layer is a GaN modulation layer; the second high-potential barrier nitride isolation layer is an AlGaN isolation layer, the Al component content in the second high-potential barrier nitride isolation layer is greater than or equal to 0.2 and less than 0.5, and the Al component content in the second high-potential barrier nitride cover layer is higher than that in the second high-potential barrier nitride isolation layer.

[0034] Preferably, before the growth of the AlGaN cover layer and / or the AlGaN isolation layer, a TMIn source is introduced into the growth device.

[0035] A Micro-LED epitaxial structure, which is a second epitaxial wafer, is prepared by the process optimization method of any one of the above.

[0036] Compared with the prior art, the beneficial effects of the present application at least include:

[0037] In one aspect, the process optimization method of the Micro-LED epitaxial structure of the present application can determine the extension distance of the inverse cone pit in the first nitride quantum well light-emitting layer from the first nitride quantum well light-emitting layer according to the detected concentration of the p-type dopant, further determine whether the depth of the inverse cone pit in the first nitride quantum well light-emitting layer of the epitaxial wafer is reasonable, and adjust the process optimization direction and prepare a qualified second epitaxial wafer accordingly. In the epitaxial wafer production process, the process optimization method of the present application can quickly detect and determine the epitaxial wafer and give the process optimization (inverse cone pit) direction, without the need for process adjustment after the completion of chip preparation and testing, overcoming the problem of process adjustment lag in the production process, greatly improving the process adjustment efficiency, and reducing the rejection rate of epitaxial wafers.

[0038] On the other hand, the process optimization method of the Micro-LED epitaxial structure of the present application expands the process window of the epitaxial layer (n-type nitride layer, nitride buffer layer, etc.) between the nitride light-emitting layer and the substrate compared with the conventional process adjustment. The conventional process adjustment needs to satisfy the process matching of the epitaxial layer between the nitride light-emitting layer and the substrate, and needs to perform multiple process debugging and verification on different epitaxial layers. The optimization method only needs to adjust the process control of the inserted nitride modulation layer, expands the process window of the epitaxial layer between the nitride light-emitting layer and the substrate, improves the production stability, improves the epitaxial wafer production efficiency and product consistency, and improves the product competitiveness.

[0039] Further, the method for adjusting the performance of the epitaxial wafer can be efficiently and quickly provided according to the concentration test result of the p-type dopant of the epitaxial wafer. In the prepared second epitaxial wafer, the inverse cone pit in the nitride quantum well light-emitting layer is isolated by setting a high-barrier nitride isolation layer, avoiding the transmission of holes from the nitride quantum well light-emitting layer to the bottom. Meanwhile, the combined barrier effect of the high-barrier nitride covering layer limits the injection of electrons from the n-type nitride layer into the nitride quantum well light-emitting layer in the low-barrier nitride modulation layer, achieving the effect of electron buffering and improving the carrier injection uniformity. The high-barrier nitride covering layer fills the bottom inverse cone pit, avoiding the direct connection of the bottom inverse cone pit with the nitride quantum well light-emitting layer, which causes the direct transmission of holes from the connected inverse cone pit to the bottom n-type nitride layer. In addition, the low-barrier nitride modulation layer plays a role in adjusting the inverse cone pit, and the inverse cone pit is reformed in the nitride quantum well light-emitting layer through low-barrier nitride opening modulation. While utilizing the inverse cone pit hole transmission effect, it will not cause the overflow of holes from the nitride quantum well light-emitting layer, avoiding the capture of electrons by the p-type dopant in the epitaxial structure layer below the nitride quantum well light-emitting layer, improving the distribution uniformity of carriers in the nitride quantum well light-emitting layer, improving the light-emitting efficiency, and improving the light-emitting efficiency droop effect under large current working. BRIEF DESCRIPTION OF DRAWINGS

[0040] Figure 1 is a structural schematic diagram of a first epitaxial wafer of one embodiment of the present application.

[0041] Figure 2 is a structural schematic diagram of a second epitaxial wafer of one embodiment of the present application.

[0042] Figure 3 is a structural schematic diagram of a second epitaxial wafer of another embodiment of the present application.

[0043] Figure 4 is a structural schematic diagram of a second epitaxial wafer of another embodiment of the present application.

[0044] Figure 5 is a structural schematic diagram of a second epitaxial wafer of another embodiment of the present application.

[0045] In the figure: 11, first substrate; 12, first n-type nitride layer; 13, first nitride buffer layer; 14, first nitride quantum well light-emitting layer; 15, first p-type nitride layer; 21, second substrate; 22, second n-type nitride layer; 23, second nitride buffer layer; 24, second nitride quantum well light-emitting layer; 25, second p-type nitride layer; 26, first low-barrier nitride modulation layer; 27, first high-barrier nitride cover layer; 28, first high-barrier nitride isolation layer; 36, second low-barrier nitride modulation layer; 37, second high-barrier nitride cover layer; 38, second high-barrier nitride isolation layer. DETAILED DESCRIPTION

[0046] Example embodiments now will be described more fully hereinafter with reference to the accompanying drawings. Example embodiments, however, can be implemented in many different forms and should not be construed as limited to the implementations set forth herein; rather, these implementations are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the example embodiments to those skilled in the art. Like reference numerals refer to like elements throughout the figures, and descriptions of the same or similar elements can be omitted.

[0047] The words expressing position and direction described in the present application are described with reference to the drawings, but changes can be made according to needs, and the changes made are included in the scope of protection of the present application.

[0048] Referring to Figures 1-5 , the present application provides a Micro-LED epitaxial structure, the Micro-LED epitaxial structure is a second epitaxial wafer, and a process optimization method of the Micro-LED epitaxial structure includes steps S1-S2.

[0049] Step S1: preparing a first epitaxial wafer, the first epitaxial wafer comprising a first substrate 11, a first n-type nitride layer 12, a first nitride buffer layer 13, a first nitride quantum well light-emitting layer 14 and a first p-type nitride layer 15 sequentially on the first substrate 11, the first p-type nitride layer 15 containing a p-type dopant, and detecting the concentration of the p-type dopant in the first nitride quantum well light-emitting layer 14 and the first nitride buffer layer 13.

[0050] The first substrate 11 can be a substrate made of sapphire, and can also be formed of zinc oxide (ZnO), gallium nitride (GaN), silicon carbide (SiC), aluminum nitride (AlN) or the like.

[0051] The first n-type nitride layer 12, the first nitride quantum well light-emitting layer 14 and the first p-type nitride layer 15 can be formed of semiconductor materials of GaN, AlGaN or InGaN (0≤a≤1, 0≤b≤1, 0≤1-a-b≤1). a In b Ga 1-a-b N (0≤a≤1, 0≤b≤1, 0≤1-a-b≤1). The first n-type nitride layer 12 can be formed of a GaN layer or a GaN / AlGaN layer doped with an n-type dopant, and the n-type dopant can be Si, Ge, Sn, O, S or the like, and as a preferred mode, the n-type dopant is Si. The first p-type nitride layer 15 can be formed of a GaN layer or a GaN / AlGaN layer doped with a p-type dopant, and the p-type dopant can be Mg, Be, Zn, Cd, Hg, Ca, Ti or the like, and as a preferred mode, the p-type dopant is Mg.

[0052] The first nitride quantum well light-emitting layer 14 can be formed of an InGaN / GaN layer having a multi-quantum well structure. The first nitride quantum well light-emitting layer 14 can comprise alternately stacked nitride quantum well layers and nitride quantum barrier layers, and can comprise 1-3 nitride quantum well layers and 1-3 nitride quantum barrier layers, the single-layer thickness of the nitride quantum well layers being 1-3 nm, and the single-layer thickness of the nitride quantum barrier layers being 5-10 nm.

[0053] The first nitride buffer layer 13 can be an undoped nitride layer, and can be formed of AlN, GaN or InGaN or the like. The first nitride buffer layer 13 can comprise periodically alternately grown nitride superlattice well layers and nitride superlattice barrier layers for 2-6 times, wherein the single-layer thickness of the nitride superlattice well layers can be 1-6 nm, and the single-layer thickness of the nitride superlattice barrier layers can be 12-50 nm, and the nitride superlattice well layers and the nitride superlattice barrier layers are respectively InGaN superlattice well layers and GaN superlattice barrier layers.

[0054] In a specific embodiment, the method for preparing the first epitaxial wafer comprises steps S11-S14.

[0055] Step Sll: growing a first n-type nitride layer 12 with a thickness of 1-3 μm on the first substrate 11 under the conditions of a pressure of 100-300 torr and a temperature of 1050-1200 °C, the doping concentration of n-type dopant in the first n-type nitride layer 12 being 1 x 1018-8 x 1019cm-3, and the growth atmosphere being an H2 atmosphere. 18 cm -3 -8 x 1019cm-3. 18 cm -3 The growth atmosphere is an H2 atmosphere.

[0056] Step S12: growing a first nitride buffer layer 13 on the first n-type nitride layer 12 under the conditions of a pressure of 100-400 torr and a temperature of 800-1000 °C.

[0057] Specifically, in the step S12, the first nitride buffer layer 13 comprises nitride superlattice well layers and nitride superlattice barrier layers which are periodically and alternately grown 2-6 times, in other words, the nitride superlattice well layers and the nitride superlattice barrier layers are 2-6 layers respectively. The single-layer thickness of the nitride superlattice well layer is 1-6 nm, and the growth atmosphere of the nitride superlattice well layer is N2. The single-layer thickness of the nitride superlattice barrier layer is 12-50 nm, and the growth atmosphere of the nitride superlattice barrier layer is H2. As a preferred mode, the nitride superlattice well layer and the nitride superlattice barrier layer are InGaN superlattice well layer and GaN superlattice barrier layer respectively.

[0058] Step S13: growing a first nitride quantum well light-emitting layer 14 on the first nitride buffer layer 13 under the conditions of a pressure of 100-400 torr.

[0059] Specifically, in the step S13, the first nitride quantum well light-emitting layer 14 comprises nitride quantum well layers and nitride quantum barrier layers which are periodically and alternately grown 1-3 times, in other words, the nitride quantum well layers and the nitride quantum barrier layers are 1-3 layers respectively. The single-layer thickness of the nitride quantum well layer is 1-3 nm, and the growth temperature and the growth atmosphere of the nitride quantum well layer are 700-950 °C and N2 respectively. The single-layer thickness of the nitride quantum barrier layer is 5-10 nm, and the growth temperature and the growth atmosphere of the nitride quantum barrier layer are 750-1000 °C and H2 respectively. As a preferred mode, the nitride quantum well layer is an InGaN quantum well layer, and the nitride quantum barrier layer is a GaN quantum barrier layer.

[0060] Step S14: growing a first p-type nitride layer 15 on the first nitride quantum well light-emitting layer 14 under the conditions of a pressure of 200-600 torr and a temperature of 950-1050 °C, the doping concentration of p-type dopant being 1 x 1018-8 x 1019cm-3.19 cm -3 -1×10 21 cm -3 , the growth atmosphere is H2.

[0061] The concentration of the p-type dopant in the first nitride quantum well light emitting layer 14 and the first nitride buffer layer 13 can be detected by secondary ion mass spectrometry (SIMS).

[0062] Specifically, the SIMS test uses a certain amount of ion bombardment on the surface of a solid to cause the secondary emission of surface atoms, molecules or atomic groups, i.e. ion sputtering. The sputtered particles are generally neutral, some of which have positive or negative charges, which are secondary ions. The secondary ions are received and analyzed by a mass analyzer to obtain the secondary ion mass spectrum. The test results are less affected by the sample, and all elements and isotopes including hydrogen are detected. Compounds are analyzed to obtain information on their molecular weight and molecular structure. The detection limit is very high, and the impurity detection limit is usually ppm, and even reaches the ppb level. In the application of semiconductor epitaxial growth technology, SIMS detection is commonly used to analyze the composition and doping concentration of semiconductor epitaxial wafers, and then the composition and doping concentration of the epitaxial layer are optimized.

[0063] Since it is unpredictable whether a reasonable depth of inverted cone pits is formed in the first nitride quantum well light emitting layer 14 when the first epitaxial wafer is prepared, in the present application, the extension distance of the p-type dopant into the first nitride quantum well light emitting layer 14 is determined according to the detected concentration of the p-type dopant in the first nitride quantum well light emitting layer 14 by using secondary ion mass spectrometry. In this way, it can be determined whether the depth of the inverted cone pits in the first nitride quantum well light emitting layer 14 of the first epitaxial wafer is reasonable, and further targeted process optimization can be performed on the basis of the original first epitaxial wafer process.

[0064] Specifically, because the p-type nitride fills the inverted cone pits of the first nitride quantum well light emitting layer 14, the p-type nitride filled in the inverted cone pits extends into the first nitride quantum well light emitting layer 14, so that the extension distance of the p-type dopant in the first nitride quantum well light emitting layer 14 can be determined according to the SIMS test result, and the depth of the inverted cone pit is determined. On the one hand, if the extension distance of the p-type dopant in the first nitride quantum well light emitting layer 14 is too small in the SIMS test, it indicates that the p-type dopant does not extend into the first nitride quantum well light emitting layer 14, that is, the depth of the inverted cone pit in the nitride quantum well light emitting layer is too small at this time. On the other hand, if the extension distance of the p-type dopant in the first nitride quantum well light emitting layer 14 is too large in the SIMS test, it exceeds the first nitride quantum well light emitting layer 14, which indicates that the p-type dopant diffuses into the epitaxial structure layer (including the first n-type nitride layer 12 and the first nitride buffer layer 13) below the first nitride quantum well light emitting layer 14. When the epitaxial wafer works in the forward current, the holes in the p-type nitride are injected into the light emitting layer to form an inhibition, and the p-type dopant also captures electrons in the epitaxial structure layer below the first nitride quantum well light emitting layer 14, thereby reducing the light emitting efficiency. When the depth of the inverted cone pit is too small, the lower potential carriers cannot form a good injection in the first nitride quantum well light emitting layer 14, and when the depth of the inverted cone pit is too large, the carriers will overflow the first nitride quantum well light emitting layer 14 through the side wall of the inverted cone pit, causing carrier leakage. The above two cases are not conducive to the photoelectric performance of the epitaxial wafer.

[0065] The present application detects the concentration of the p-type dopant in the first nitride quantum well light emitting layer 14 and the first nitride buffer layer 13. When the concentration of the p-type dopant in the first nitride quantum well light emitting layer 14 is less than 10 19 cm -3 , or when the concentration of the p-type dopant in the first nitride quantum well light emitting layer 14 and the first nitride buffer layer 13 is not less than 10 19 cm -3 , a second epitaxial wafer is prepared. Because the p-type dopant does not provide holes in its entirety, only 1% of the dopant provides holes, which requires that the minimum concentration requirement of the p-type dopant in the first p-type nitride layer 15 is not less than 10 19 cm -3If the first nitride quantum well light emitting layer 14 is formed with inverse conical pits, or the inverse conical pits extend into the first nitride buffer layer 13, the same order of magnitude of p-type dopant will also be formed in the structure layer. By detecting the doping concentration of the p-type dopant in the layer, it can be determined whether the first nitride quantum well light emitting layer 14 is formed with inverse conical pits, or whether the inverse conical pits have passed through the first nitride quantum well light emitting layer 14 and extended to the first nitride buffer layer 13. Then, by detecting the concentration of the p-type dopant and according to the size of the concentration, targeted process optimization can be carried out on the basis of the original first epitaxial wafer preparation process, without the need to wait until the chip preparation and testing are completed to make process adjustments, overcoming the problem of process adjustment lag in the production process, greatly improving the process adjustment efficiency, and reducing the rejection rate of epitaxial wafers. The specific content is described below.

[0066] Step S2: When the concentration of the p-type dopant in the first nitride quantum well light emitting layer 14 is less than 10 19 cm -3 , or when the concentration of the p-type dopant in the first nitride quantum well light emitting layer 14 and the first nitride buffer layer 13 is not less than 10 19 cm -3 , a second epitaxial wafer is prepared, which includes a second substrate 21, a second n-type nitride layer 22, a second nitride buffer layer 23, a nitride modulation layer, a second nitride quantum well light emitting layer 24 and a second p-type nitride layer 25 successively located on the second substrate 21. The nitride modulation layer is used to form inverse conical pits only in the second nitride quantum well light emitting layer 24 when the second nitride quantum well light emitting layer 24 is prepared, and the opening diameter of the inverse conical pits is, for example, 100-300 nm. Through the modulation effect of the nitride modulation layer, the second nitride quantum well light emitting layer 24 is not affected by the various epitaxial layers between the second nitride quantum well light emitting layer 24 and the second substrate 21.

[0067] The preparation method of the structure of the second epitaxial wafer except for the nitride modulation layer is the same as the preparation method of the corresponding structure of the first epitaxial wafer. In other words, the second substrate 21 can be the same as the first substrate 11, the preparation method of the second n-type nitride layer 22 is the same as that of the first n-type nitride layer 12, the preparation method of the second nitride buffer layer 23 is the same as that of the first nitride buffer layer 13, the preparation method of the second nitride quantum well light emitting layer 24 is the same as that of the first nitride quantum well light emitting layer 14, and the preparation method of the second p-type nitride layer 25 is the same as that of the first p-type nitride layer 15.

[0068] In a specific embodiment, when the concentration of the p-type dopant in the first nitride quantum well light emitting layer 14 is less than 10 19 cm -3When the nitride modulation layer is the first low-potential barrier nitride modulation layer 26, the first low-potential barrier nitride modulation layer 26 is prepared by growing the first low-potential barrier nitride modulation layer 26 on the second nitride buffer layer 23 at a growth temperature of 700-800°C and a pressure of 50-100 torr, with N2 as the growth atmosphere, and the thickness of the first low-potential barrier nitride modulation layer 26 is preferably 10-50 nm. The above preparation method uses a low-temperature and low-pressure growth process, and the first low-potential barrier nitride modulation layer 26 obtained thereby can form an open opening. The low-potential barrier first low-potential barrier nitride modulation layer 26 prepared by the above method can readjust the inverted cone pits, and by means of low-potential barrier nitride opening modulation, the inverted cone pits are reformed in the second nitride quantum well light-emitting layer 24. The inverted cone pit hole transport function is utilized, and the holes do not overflow the second nitride quantum well light-emitting layer 24, thereby avoiding the capture of electrons by the p-type dopant in the epitaxial structure layer below the second nitride quantum well light-emitting layer 24, improving the uniformity of the distribution of carriers in the second nitride quantum well light-emitting layer 24, improving the light-emitting efficiency, and improving the light-emitting efficiency droop effect under large current operation.

[0069] In a preferred embodiment, when the concentration of the p-type dopant in the first nitride quantum well light-emitting layer 14 is less than 10 19 cm -3When the nitride modulation layer is a first low-potential barrier nitride modulation layer 26, the second epitaxial wafer further comprises a first high-potential barrier nitride cover layer 27 and a first high-potential barrier nitride isolation layer 28, the first high-potential barrier nitride cover layer 27 is located between the second nitride buffer layer 23 and the first low-potential barrier nitride modulation layer 26, and the first high-potential barrier nitride isolation layer 28 is located between the first low-potential barrier nitride modulation layer 26 and the second nitride quantum well light-emitting layer 24. Preferably, the first high-potential barrier nitride cover layer 27 is an AlGaN cover layer, and the Al component content in the first high-potential barrier nitride cover layer 27 is 0.2-0.5, for example, 0.3 or 0.4. The first low-potential barrier nitride modulation layer 26 is preferably a GaN modulation layer, and the first high-potential barrier nitride isolation layer 28 is preferably an AlGaN isolation layer. The Al component content in the first high-potential barrier nitride cover layer 27 is lower than that in the first high-potential barrier nitride isolation layer 28. The Al component content in the first high-potential barrier nitride isolation layer 28 can be greater than 0.2 and less than 0.5, for example, 0.3, 0.4 or 0.5. The first high-potential barrier nitride cover layer 27 and the first high-potential barrier nitride isolation layer 28 are selected to have the above composition. The first high-potential barrier nitride cover layer 27 is controlled to have a longitudinal (height direction) growth speed greater than a lateral growth speed by a process, and mainly plays a role of filling and regulating the epitaxial layer between the second nitride quantum well light-emitting layer 24 and the second substrate 21, and matching the opening modulation of the first low-potential barrier nitride modulation layer 26. The first high-potential barrier nitride isolation layer 28 is controlled to have a lateral growth speed greater than a longitudinal (height direction) growth speed by a process, and mainly plays a role of forming a good cover layer surface, which is conducive to obtaining a high-quality second nitride quantum well light-emitting layer 24.

[0070] By matching the Al component content of the first high-potential barrier nitride covering layer 27 and the first high-potential barrier nitride isolation layer 28, on one hand, the inverted cone pits in the second nitride quantum well light emitting layer 24 are isolated by arranging the first high-potential barrier nitride isolation layer 28, and the bottom transmission of holes in the second nitride quantum well light emitting layer 24 to the second substrate 21 is avoided, and the electrons injected from the second n-type nitride layer 22 to the first nitride quantum well light emitting layer 24 are limited in the first low-potential barrier nitride modulation layer 26 with low potential, which has the effect of electron buffering and improves the uniformity of carrier injection; on the other hand, in the present application, the Al component content of the first high-potential barrier nitride covering layer 27 is lower than that of the first high-potential barrier nitride isolation layer 28, and the relatively low Al component content of the first high-potential barrier nitride covering layer 27 can reduce the shielding of dislocations between the second substrate 21 and the second nitride buffer layer 23, so that it is easier to form the required opening in the first low-potential barrier nitride modulation layer 26.

[0071] In a specific embodiment, the preparation method of the first high-potential barrier nitride covering layer 27 is step S21: growing the first high-potential barrier nitride covering layer 27 with a thickness of 10-100 nm on the second nitride buffer layer 23 under the conditions of a pressure of 150-250 torr and a temperature of 995-1050 ℃, and the growth atmosphere is H2.

[0072] The preparation method of the first low-potential barrier nitride modulation layer 26 is step S22: growing the first low-potential barrier nitride modulation layer 26 with a thickness of 100-300 nm on the first high-potential barrier nitride covering layer 27 under the conditions of a growth temperature of 700-800 ℃ and a pressure of 50-100 torr, and the growth atmosphere is N2.

[0073] The preparation method of the first high-potential barrier nitride isolation layer 28 is step S23: growing the first high-potential barrier nitride isolation layer 28 with a thickness of 50-100 nm on the first low-potential barrier nitride modulation layer 26 under the conditions of a pressure of 50-150 torr and a temperature of 1025-1075 ℃, and the growth atmosphere is H2.

[0074] In a specific embodiment, when the concentration of the p-type dopant in the first nitride quantum well light emitting layer 14 and the first nitride buffer layer 13 is not less than 10 19 cm -3When the nitride modulation layer is the second low-potential barrier nitride modulation layer 36, the second low-potential barrier nitride modulation layer 36 is prepared by growing the second low-potential barrier nitride modulation layer 36 on the second nitride buffer layer 23 at a growth temperature of 850-1050℃ and a pressure of 400-600 torr, with H2as the growth atmosphere, and the thickness of the second low-potential barrier nitride modulation layer 36 is preferably 10-50 nm. The above preparation method uses a high-temperature and high-pressure growth process, and the obtained second low-potential barrier nitride modulation layer 36 can play a role in forming an open block. The low-potential barrier second low-potential barrier nitride modulation layer 36 prepared by the above method plays a role in readjusting the inverted cone pits. Through low-potential barrier nitride open modulation, inverted cone pits are reformed in the second nitride quantum well light-emitting layer 24. The formed inverted cone pits will not pass through the second nitride quantum well light-emitting layer 24. While utilizing the hole transport effect of the inverted cone pits, the holes will not overflow the second nitride quantum well light-emitting layer 24. The p-type dopant avoids capturing electrons in the epitaxial structure layer below the second nitride quantum well light-emitting layer 24. The distribution uniformity of the carriers in the second nitride quantum well light-emitting layer 24 is improved, the light-emitting efficiency is improved, and the light-emitting efficiency droop effect under large current operation is improved.

[0075] In a preferred embodiment, when the concentration of the p-type dopant in the first nitride quantum well light-emitting layer 14 and the first nitride buffer layer 13 is not less than 10 19 cm -3When the nitride modulation layer is a second low-potential barrier nitride modulation layer 36, the second epitaxial wafer further comprises a second high-potential barrier nitride covering layer 37 and a second high-potential barrier nitride isolation layer 38, the second high-potential barrier nitride covering layer 37 is located between the second nitride buffer layer 23 and the second low-potential barrier nitride modulation layer 36, and the second high-potential barrier nitride isolation layer 38 is located between the second low-potential barrier nitride modulation layer 36 and the second nitride quantum well light-emitting layer 24. Preferably, the second high-potential barrier nitride covering layer 37 is an AlGaN covering layer, the Al component content in the second high-potential barrier nitride covering layer 37 is greater than 0.2 and less than or equal to 0.5, for example, 0.3 or 0.4; the second low-potential barrier nitride modulation layer 36 is preferably a GaN modulation layer, and the second high-potential barrier nitride isolation layer 38 is preferably an AlGaN isolation layer, the Al component content in the second high-potential barrier nitride isolation layer 38 is greater than or equal to 0.2 and less than 0.5, for example, 0.3 or 0.4, and the Al component content in the second high-potential barrier nitride covering layer 37 is higher than that in the second high-potential barrier nitride isolation layer 38. The second high-potential barrier nitride covering layer 37 and the second high-potential barrier nitride isolation layer 38 with the above composition are selected, the longitudinal (height direction) growth speed of the second high-potential barrier nitride covering layer 37 is greater than the lateral growth speed through process control, mainly to fill and regulate the epitaxial layer between the second nitride quantum well light-emitting layer 24 and the second substrate 21, and match the opening modulation of the second low-potential barrier nitride modulation layer 36; the lateral growth speed of the second high-potential barrier nitride isolation layer 38 is greater than the longitudinal (height direction) growth speed through process control, mainly to form a good covering layer surface, which is conducive to obtaining a high-quality second nitride quantum well light-emitting layer 24.

[0076] By matching the Al component content of the second high-potential barrier nitride covering layer 37 and the second high-potential barrier nitride isolation layer 38, on one hand, the inverted cone pits in the second nitride quantum well light emitting layer 24 are isolated by arranging the second high-potential barrier nitride isolation layer 38, the bottom transmission of holes in the second nitride quantum well light emitting layer 24 to the second substrate 21 direction is avoided, and the electrons injected from the second n-type nitride layer 22 to the second nitride quantum well light emitting layer 24 are limited in the low-potential second low-potential barrier nitride modulation layer 36 by the common barrier effect of the second high-potential barrier nitride covering layer 37, the effect of electron buffering is achieved, and the carrier injection uniformity is improved; on the other hand, in the application, the Al component content of the second high-potential barrier nitride covering layer 37 is higher than that of the second high-potential barrier nitride isolation layer 38, the relatively high Al component content of the second high-potential barrier nitride covering layer 37 can improve the shielding of dislocations between the second substrate 21 and the second nitride buffer layer 23, so that it is easier to form the opening required by the process in the second low-potential barrier nitride modulation layer 36.

[0077] In a specific embodiment, the preparation method of the second high-potential barrier nitride covering layer 37 is step S31: growing the second high-potential barrier nitride covering layer 37 with a thickness of 100-200 nm on the second nitride buffer layer 23 under the condition of a pressure of 150-250 torr and a temperature of 995-1050 ℃, and the growth atmosphere is H2.

[0078] The preparation method of the second low-potential barrier nitride modulation layer 36 is step S32: growing the second low-potential barrier nitride modulation layer 36 with a thickness of 10-50 nm on the second high-potential barrier nitride covering layer 37 under the condition of a growth temperature of 850-1050 ℃ and a pressure of 400-600 torr, and the growth atmosphere is H2.

[0079] The preparation method of the second high-potential barrier nitride isolation layer 38 is step S33: growing the second high-potential barrier nitride isolation layer 38 with a thickness of 50-100 nm on the second low-potential barrier nitride modulation layer 36 under the condition of a pressure of 50-150 torr and a temperature of 1025-1075 ℃, and the growth atmosphere is H2.

[0080] In a preferred embodiment, in the preparation of the first high-potential barrier nitride cover layer 27, the first high-potential barrier nitride isolation layer 28, the second high-potential barrier nitride cover layer 37 and the second high-potential barrier nitride isolation layer 38, before the growth of the AlGaN cover layer and / or the AlGaN isolation layer, a TMIn source (trimethylindium source) is introduced into the growth equipment, and the flow rate of the TMIn source is 500-2000sccm. By introducing the TMIn source, the active agent effect of the In source in the growth process is utilized, the migration performance of Al atoms is improved, the uniformity of the material is improved, and the wavelength uniformity of the Micro-LED epitaxial structure is improved.

[0081] The following examples and comparative examples use a MOCVD epitaxial growth equipment to prepare a Micro-LED epitaxial structure.

[0082] Comparative Example 1:

[0083] This embodiment is a conventional process for preparing a Micro-LED epitaxial structure, which specifically includes the following steps.

[0084] Step S111: grow an n-type GaN layer with a thickness of 2μm on a 4-inch sapphire substrate under the condition of a pressure of 200torr and a temperature of 1085℃, and the doping concentration of Si in the n-type GaN layer is 5×10 18 cm -3 , and the growth atmosphere is H2 atmosphere.

[0085] Step S121: grow a nitride buffer layer on the n-type GaN layer under the condition of a pressure of 200torr and a temperature of 935℃, including periodically growing an InGaN superlattice well layer with a single layer thickness of 1.5nm and a GaN superlattice barrier layer with a single layer thickness of 22nm for 3 times, wherein the growth atmosphere of the InGaN superlattice well layer is N2, and the growth atmosphere of the GaN superlattice barrier layer is H2.

[0086] Step S131: grow a nitride quantum well light-emitting layer on the nitride buffer layer under the condition of a pressure of 300torr, including periodically and alternately growing an InGaN quantum well layer and a GaN quantum barrier layer, the repeating period of the light-emitting layer is 2, the single layer thickness of the InGaN quantum well layer is 2nm, and the single layer thickness of the GaN quantum barrier layer is 8nm, wherein the growth temperature of the InGaN quantum well layer is 760℃, and the growth atmosphere is N2, and the growth temperature of the GaN quantum barrier layer is 820℃, and the growth atmosphere is H2.

[0087] Step S141: grow a p-type GaN layer with a thickness of 120nm on the nitride quantum well light-emitting layer under the condition of a pressure of 400torr and a temperature of 980℃, and the doping concentration of the p-type dopant Mg is 8×10 19 cm -3, the growth atmosphere is switched to H2 atmosphere.

[0088] The conventional epitaxial wafer prepared in different batches of Comparative Example 1 is subjected to SIMS detection, and the occurrence case (1) (Comparative Example-(1)) is as follows:

[0089] There is no Mg doping in the InGaN / GaN multi-quantum well light-emitting layer, the GaN / InGaN superlattice buffer layer and the n-type GaN layer (the concentration of the p-type dopant is less than 10 19 cm -3 ), that is, the p-type dopant in the nitride quantum well light-emitting layer has a too small extension distance, and no inverted cone pit is found extending into the nitride quantum well light-emitting layer closest to the p-type GaN layer in the direction from the p-type GaN layer to the n-type GaN layer, and it is determined that the inverted cone pit setting is unreasonable.

[0090] The conventional epitaxial wafer prepared in different batches of Comparative Example 1 is subjected to SIMS detection, and the occurrence case (2) (Comparative Example-(2)) is as follows:

[0091] There is Mg doping in the InGaN / GaN multi-quantum well light-emitting layer, the GaN / InGaN superlattice buffer layer and the n-type GaN layer (the concentration of the p-type dopant is not less than 10 19 cm -3 ), that is, the inverted cone pit is detected in the direction from the p-type GaN layer to the n-type GaN layer, and it is found that the inverted cone pit extends and passes through the nitride quantum well light-emitting layer closest to the n-type GaN layer, and it is determined that the inverted cone pit setting is unreasonable, indicating that the inverted cone pit is formed in the nitride quantum well light-emitting layer, but the depth of the inverted cone pit needs to be optimized through process control, and the inverted cone pit can play a role in hole transport, but there is also a defect that the hole passes through the nitride quantum well light-emitting layer.

[0092] Example 1:

[0093] This embodiment is optimized for the occurrence case (1) in Comparative Example 1, and the preparation process of this embodiment is basically the same as that of Comparative Example 1, and the difference between this embodiment and Comparative Example 1 is that the preparation process of the Micro-LED epitaxial structure further includes setting step S211 between step S121 and step S131.

[0094] Step S211: growing a GaN layer as a first low-potential barrier nitride modulation layer 26 on the nitride buffer layer under the condition of a growth temperature of 725°C and a pressure of 75 torr, with a thickness of 15 nm, and a growth atmosphere of N2.

[0095] In step S131, the nitride quantum well light-emitting layer is formed on the first low-potential barrier nitride modulation layer 26.

[0096] Example 2:

[0097] This embodiment is optimized for case (1) in Comparative Example 1, and the preparation process of this embodiment is basically the same as that of Comparative Example 1, and the difference between this embodiment and Comparative Example 1 is that the preparation process of the Micro-LED epitaxial structure further includes steps S210, S211 and S212 between steps S121 and S131.

[0098] Step S210: growing a first high-potential barrier nitride cover layer 27 with a thickness of 25 nm on the nitride buffer layer under the conditions of a pressure of 175 torr and a temperature of 1020°C, the material of the first high-potential barrier nitride cover layer 27 being AlGaN with an Al component content of 0.25, and the growth atmosphere being H2.

[0099] Step S211: growing a first low-potential barrier nitride modulation layer 26 with a thickness of 15 nm on the first high-potential barrier nitride cover layer 27 under the conditions of a growth temperature of 725°C and a pressure of 75 torr, the material of the first low-potential barrier nitride modulation layer 26 being GaN, and the growth atmosphere being N2.

[0100] Step S212: growing a first high-potential barrier nitride isolation layer 28 with a thickness of 70 nm on the first low-potential barrier nitride modulation layer 26 under the conditions of a pressure of 100 torr and a temperature of 1055°C, the material of the first high-potential barrier nitride isolation layer 28 being AlGaN with an Al component content of 0.35, and the growth atmosphere being H2.

[0101] In step S131, the nitride quantum well light-emitting layer is formed on the first high-potential barrier nitride isolation layer 28.

[0102] Example 3:

[0103] This embodiment is optimized for case (2) in Comparative Example 1, and the preparation process of this embodiment is basically the same as that of Comparative Example 1, and the difference between this embodiment and Comparative Example 1 is that the preparation process of the Micro-LED epitaxial structure further includes step S311 between steps S121 and S131.

[0104] Step S311: growing a second low-potential barrier nitride modulation layer 36 with a thickness of 20 nm on the nitride buffer layer under the conditions of a growth temperature of 995°C and a pressure of 500 torr, the growth atmosphere being N2, and the material of the second low-potential barrier nitride modulation layer 36 being GaN.

[0105] In step S131, the nitride quantum well light-emitting layer is formed on the second low-potential barrier nitride modulation layer 36.

[0106] Example 4:

[0107] The present embodiment is optimized for case (2) in Comparative Example 1, and the preparation process of the present embodiment is basically the same as that of Comparative Example 1, except that the preparation process of the Micro-LED epitaxial structure further comprises steps S310, S311 and S312 arranged between steps S121 and S131.

[0108] Step S310: A second high-potential barrier nitride cover layer 37 with a thickness of 150 nm is grown on the nitride buffer layer at a pressure of 200 torr and a temperature of 1045°C, the material of the second high-potential barrier nitride cover layer 37 is AlGaN, the Al component content is 0.35, and the growth atmosphere is H2.

[0109] Step S311: A second low-potential barrier nitride modulation layer 36 with a thickness of 20 nm is grown on the second high-potential barrier nitride cover layer 37 at a growth temperature of 995°C and a pressure of 500 torr, the material of the second low-potential barrier nitride modulation layer 36 is GaN, and the growth atmosphere is H2.

[0110] Step S312: A second high-potential barrier nitride isolation layer 38 with a thickness of 80 nm is grown on the second low-potential barrier nitride modulation layer 36 at a pressure of 125 torr and a temperature of 1060°C, the material of the second high-potential barrier nitride isolation layer 38 is AlGaN, the Al component content is 0.25, and the growth atmosphere is H2.

[0111] Example 5:

[0112] The preparation process of the present embodiment is basically the same as that of Example 4, except that a TMIn source is introduced before growth in S310 and S312, respectively, with a flow rate of 800 ccm;

[0113] Example 5 utilizes the active agent effect of the In source during the growth process, improves the migration performance of Al atoms, improves the uniformity of the material, and is conducive to improving the wavelength uniformity of the Micro-LED epitaxial structure.

[0114] Detection results:

[0115] SIMS detection is performed on each of the Micro-LED epitaxial structures of Examples 1-5 to obtain the concentration of Mg dopants in the InGaN / GaN multi-quantum well light-emitting layer and the GaN / InGaN superlattice buffer layer, and the specific results are shown in Table 1.

[0116] Table 1

[0117]

[0118] 0 means no Mg doping is found, according to the common sense in the industry, when the SIMS test, the background interference concentration (10 17 cm -3 ) of Mg atom test exists when the test, that is, the test Mg doping concentration level does not exceed 10 17 cm -3 , it is determined that there is no Mg doping. The average luminance of the comparative example (1) epitaxial structure wavelength 465 nm at 20 mA is 132 mW, and from table 1, it can be seen that the epitaxial wafer without finding the inverted cone pit extending to the nitride quantum well light emitting layer closest to the p-type GaN layer or the inverted cone pit extending and crossing the nitride quantum well light emitting layer closest to the n-type GaN layer has low luminance performance. By optimizing the structure, the epitaxial wafer of example 1-5 has a luminance increase of more than 20% at the same wavelength (465 nm) point, which shows that the optimization method of the present application improves the uniformity of carrier distribution in the nitride quantum well light emitting layer and improves the light emitting efficiency.

[0119] Although the embodiments of the present application have been shown and described above, it should be understood that the above embodiments are exemplary and should not be construed as limiting the present application. Those skilled in the art can make changes, modifications, replacements and variations to the above embodiments without departing from the principles and spirit of the present application within the scope of the present application. All these changes should be within the protection scope of the claims of the present application.

Claims

1. A process optimization method for a Micro-LED epitaxial structure, characterized in that: include: Prepare a first epitaxial wafer, the first epitaxial wafer comprising a first substrate, a first n-type nitride layer, a first nitride buffer layer, a first nitride quantum well light-emitting layer, and a first p-type nitride layer sequentially located on the first substrate, wherein the first p-type nitride layer contains a p-type dopant; When the concentration of the p-type dopant in the first nitride quantum well light-emitting layer is lower than 10 19 cm -3 , or, when the concentration of the p-type dopant in the first nitride quantum well light-emitting layer and the first nitride buffer layer is not less than 10 19 cm -3 When preparing the second epitaxial wafer, the second epitaxial wafer includes a second substrate, a second n-type nitride layer, a second nitride buffer layer, a nitride modulation layer, a second nitride quantum well light-emitting layer, and a second p-type nitride layer, the second p-type nitride layer containing a p-type dopant, and the nitride modulation layer is used to form an inverted cone pit located only in the second nitride quantum well light-emitting layer when preparing the second nitride quantum well light-emitting layer, wherein the preparation method of the structure of the second epitaxial wafer other than the nitride modulation layer is the same as the preparation method of the corresponding structure of the first epitaxial wafer; When the concentration of the p-type dopant in the first nitride quantum well light-emitting layer is lower than 10 19 cm -3 The nitride modulation layer is a first low-barrier nitride modulation layer, and the second epitaxial wafer further includes a first high-barrier nitride capping layer and a first high-barrier nitride isolation layer, wherein the first high-barrier nitride capping layer is located between the second nitride buffer layer and the first low-barrier nitride modulation layer, and the first high-barrier nitride isolation layer is located between the first low-barrier nitride modulation layer and the second nitride quantum well light-emitting layer; wherein the first low-barrier nitride modulation layer is prepared by: growing the first low-barrier nitride modulation layer with a thickness of 10-50 nm on the first high-barrier nitride capping layer at a growth temperature of 700-800° C. and a pressure of 50-100 torr, in a growth atmosphere of N2; When the concentration of the p-type dopant in the first nitride quantum well light-emitting layer and the first nitride buffer layer is not less than 10 19 cm -3 When the nitride modulation layer is a second low-barrier nitride modulation layer, the second epitaxial wafer further includes a second high-barrier nitride capping layer and a second high-barrier nitride isolation layer, the second high-barrier nitride capping layer is located between the second nitride buffer layer and the second low-barrier nitride modulation layer, and the second high-barrier nitride isolation layer is located between the second low-barrier nitride modulation layer and the second nitride quantum well light-emitting layer; wherein the second low-barrier nitride modulation layer is prepared by: growing the second low-barrier nitride modulation layer with a thickness of 10-50 nm on the second high-barrier nitride capping layer at a growth temperature of 850-1050° C. and a pressure of 400-600 torr, wherein the growth atmosphere is H2; The first low-barrier nitride modulation layer and the second low-barrier nitride modulation layer are GaN modulation layers, the first high-barrier nitride capping layer and the second high-barrier nitride capping layer are AlGaN capping layers, and the first high-barrier nitride isolation layer and the second high-barrier nitride isolation layer are AlGaN isolation layers; the first high-barrier nitride isolation layer and the second high-barrier nitride isolation layer are used to isolate the inverted cone pits in the nitride quantum well light-emitting layer; the first high-barrier nitride capping layer and the second high-barrier nitride capping layer are used to fill the inverted cone pits at the bottom.

2. The process optimization method according to claim 1, characterized in that: The method for preparing the first epitaxial wafer comprises: Step S11: growing a first n-type nitride layer with a thickness of 1-3 μm on the first substrate under the conditions of a pressure of 100-300 Torr and a temperature of 1050-1200° C., wherein the doping concentration of the n-type dopant in the first n-type nitride layer is 1×10 18 cm -3 -8×10 18 cm -3 , the growth atmosphere is H2 atmosphere; Step S12: growing a first nitride buffer layer on the first n-type nitride layer under conditions of a pressure of 100-400 Torr and a temperature of 800-1000° C.; Step S13: growing a first nitride quantum well light-emitting layer on the first nitride buffer layer under a pressure of 100-400 Torr; Step S14: growing a first p-type nitride layer on the first nitride quantum well light-emitting layer under the conditions of a pressure of 200-600 torr and a temperature of 950-1050°C, wherein the doping concentration of the p-type dopant is 1×10 19 cm -3 -1×10 21 cm -3 , the growth atmosphere is H2; The method for preparing the first epitaxial wafer further includes detecting the concentration of the p-type dopant in the first nitride quantum well light-emitting layer and the first nitride buffer layer; In the method for preparing the second epitaxial wafer, when the concentration of the p-type dopant in the first nitride quantum well light-emitting layer is lower than 10 19 cm -3 The nitride modulation layer is a first low-barrier nitride modulation layer, and the preparation method of the first low-barrier nitride modulation layer is: growing the first low-barrier nitride modulation layer on the second nitride buffer layer at a growth temperature of 700-800° C. and a pressure of 50-100 Torr, with a growth atmosphere of N2; In the method for preparing the second epitaxial wafer, when the concentration of the p-type dopant in the first nitride quantum well light-emitting layer and the first nitride buffer layer is not less than 10 19 cm -3 When the nitride modulation layer is a second low-barrier nitride modulation layer, the preparation method of the second low-barrier nitride modulation layer is: growing the second low-barrier nitride modulation layer on the second nitride buffer layer at a growth temperature of 850-1050°C and a pressure of 400-600 torr, and the growth atmosphere is H2.

3. The process optimization method according to claim 2, characterized in that: In step S12, the first nitride buffer layer includes a nitride superlattice well layer and a nitride superlattice barrier layer that are periodically grown alternately 2-6 times, wherein the single layer thickness of the nitride superlattice well layer is 1-6 nm, the growth atmosphere of the nitride superlattice well layer is N2, and the single layer thickness of the nitride superlattice barrier layer is 12-50 nm, and the growth atmosphere of the nitride superlattice barrier layer is H2; The nitride superlattice well layer and the nitride superlattice barrier layer are respectively an InGaN superlattice well layer and a GaN superlattice barrier layer.

4. The process optimization method according to claim 2, characterized in that: In step S13, the first nitride quantum well light-emitting layer includes a nitride quantum well layer and a nitride quantum barrier layer that are periodically grown alternately 1-3 times, wherein the single layer thickness of the nitride quantum well layer is 1-3 nm, the growth temperature of the nitride quantum well layer is 700-950° C., and the growth atmosphere is N2; the single layer thickness of the nitride quantum barrier layer is 5-10 nm, the growth temperature of the nitride quantum barrier layer is 750-1000° C., and the growth atmosphere is H2; The nitride quantum well layer and the nitride quantum barrier layer are respectively an InGaN quantum well layer and a GaN quantum barrier layer.

5. The process optimization method according to claim 1, characterized in that: The first high-barrier nitride capping layer is prepared by growing a first high-barrier nitride capping layer with a thickness of 10-100 nm on the second nitride buffer layer under conditions of a pressure of 150-250 Torr and a temperature of 995-1050° C., with a growth atmosphere of H2; The first high-barrier nitride isolation layer is prepared by growing a first high-barrier nitride isolation layer with a thickness of 50-100 nm on the first low-barrier nitride modulation layer under conditions of a pressure of 50-150 Torr and a temperature of 1025-1075° C., with a growth atmosphere of H2; The Al component content in the first high barrier nitride capping layer is 0.2-0.5; the Al component content in the first high barrier nitride capping layer is lower than the Al component content in the first high barrier nitride isolation layer.

6. The process optimization method according to claim 1, characterized in that: The second high-barrier nitride capping layer is prepared by growing a second high-barrier nitride capping layer with a thickness of 100-200 nm on the second nitride buffer layer under conditions of a pressure of 150-250 Torr and a temperature of 995-1050° C., with a growth atmosphere of H2; The preparation method of the second high-barrier nitride isolation layer is: growing a second high-barrier nitride isolation layer with a thickness of 50-100 nm on the second low-barrier nitride modulation layer under the conditions of a pressure of 50-150 torr and a temperature of 1025-1075° C., and the growth atmosphere is H2.

7. The process optimization method according to claim 1, characterized in that: The Al component content in the second high barrier nitride covering layer is greater than 0.2 and less than or equal to 0.5; the Al component content in the second high barrier nitride isolation layer is greater than or equal to 0.2 and less than 0.5, and the Al component content in the second high barrier nitride covering layer is higher than the Al component content in the second high barrier nitride isolation layer.

8. The process optimization method according to claim 5 or 7, characterized in that: Before the AlGaN cap layer and / or AlGaN isolation layer is grown, a TMIn source is introduced into the growth device.

9. A Micro-LED epitaxial structure, characterized in that: The Micro-LED epitaxial structure is a second epitaxial wafer, and the Micro-LED epitaxial structure is prepared by the process optimization method described in any one of claims 1 to 8.

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