A method for fabricating an electrode metal layer
By using a method of growing the buffer layer and epitaxial layer on the substrate in sequence in the LED chip, and growing the indium tin oxide layer on the P-type gallium nitride of the epitaxial layer, combined with photolithography technology that reduces the exposure amount and increases the development temperature, the problem of excessive size of the electrode metal layer is solved, and the effect of reducing the area of the electrode metal layer and improving the luminous brightness is achieved.
Patent Information
- Application Number
- CN202211063491.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-08-31
- Publication Date
- 2025-05-27
- Estimated Expiration
- 2042-08-31
AI Technical Summary
The size of the electrode metal layer in the existing LED chips is large, which causes the ITO light output area to be blocked and the line width limit is large, resulting in faults and poor adhesion after the electrode metal layer is evaporated.
By growing the buffer layer and the epitaxial layer on the substrate in turn, and growing the indium tin oxide layer on the P-type gallium nitride of the epitaxial layer, using photolithography techniques that reduce exposure and increase development temperature on the indium tin oxide layer and the N-type gallium nitride of the epitaxial layer, exposure and development of the photoresist are carried out, and the electrode metal layer is evaporated at the developed position.
The area of the electrode metal layer is effectively reduced, the blocked area of the indium tin oxide layer is reduced, thereby improving the luminous brightness and improving the adhesion quality of the electrode metal layer.
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Figure CN115274961B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of semiconductor electronic technology, and in particular to a method for manufacturing an electrode metal layer. Background Art
[0002] LED (Light Emitting Diode) is made of several thin layers of doped semiconductor materials. Among them, the electrode metal layer and ITO layer are important components of GaN-based light-emitting diodes and play a vital role. The electrode metal layer is used for current expansion leads and pads connected to external circuits, and the ITO layer is used to form a transparent conductive film with low resistivity and high transmittance on the surface of P-GaN to increase chip current expansion and light output.
[0003] At present, the structure design of LED chips is that the electrode metal layer is attached to the light-emitting layer, that is, the indium tin oxide layer, as the lead for current expansion and the pad connected to the external circuit. At present, there is a phenomenon that the electrode metal layer is too large, resulting in the blocking of the ITO light-emitting area. In addition, affected by many factors such as the photolithography machine, the electrode metal layer of the LED chip is exposed to a minimum line width of 3.2μm. If it is too small, the line width will be abnormal after development, resulting in faults and poor adhesion of the electrode metal layer after evaporation. Summary of the invention
[0004] The technical problem to be solved by the present invention is to provide a method for manufacturing an electrode metal layer, which can reduce the size of the electrode metal layer and improve the brightness of LEDs.
[0005] In order to solve the above technical problems, the technical solution adopted by the present invention is:
[0006] A method for manufacturing an electrode metal layer comprises the steps of:
[0007] Growing a buffer layer and an epitaxial layer in sequence on a substrate, etching the epitaxial layer, and growing an indium tin oxide layer on the P-type gallium nitride of the epitaxial layer;
[0008] On the indium tin oxide layer and the N-type gallium nitride of the epitaxial layer, the photoresist is exposed and developed using an exposure amount of 90-150 mj and a development temperature of 110-114° C., and an electrode metal layer is evaporated.
[0009] The beneficial effects of the present invention are: a buffer layer and an epitaxial layer are grown on a substrate in sequence, a buffer layer and an epitaxial layer are grown on a substrate in sequence, an indium tin oxide layer is grown on the P-type gallium nitride of the epitaxial layer after etching the epitaxial layer; an exposure amount of 90-150mj and a development temperature of 110-114°C are used on both the indium tin oxide layer and the N-type gallium nitride of the epitaxial layer to expose and develop the photoresist, and an electrode metal layer is obtained by evaporation at the developed position. In the prior art, an exposure amount of 280mj and a development temperature of 106°C are usually used for exposure and development of the photoresist, and reducing the exposure amount will increase the size, while in the present invention, the exposure amount is reduced while the development temperature is increased. At this time, increasing the development temperature can reduce the size after photolithography, and selecting a reduced exposure amount for exposure can save time. Therefore, increasing the development temperature while reducing the exposure amount can effectively reduce the area of the electrode metal layer and reduce the blocked area of the indium tin oxide layer, thereby improving the luminous brightness. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] Figure 1 A flowchart of a method for manufacturing an electrode metal layer according to an embodiment of the present invention;
[0011] Figure 2 This is a side view of an LED chip according to an embodiment of the present invention;
[0012] Description of labels:
[0013] 1. Substrate; 2. Buffer layer; 3. N-type gallium nitride; 4. Quantum well; 5. P-type gallium nitride; 6. Indium tin oxide layer; 7. Current blocking layer; 8. P electrode; 9. N electrode; 10. Electrode extension strip. DETAILED DESCRIPTION
[0014] In order to explain the technical content, achieved objectives and effects of the present invention in detail, the following is an explanation in combination with the implementation modes and the accompanying drawings.
[0015] Please refer to Figure 1 The embodiment of the present invention provides a method for manufacturing an electrode metal layer, comprising the steps of:
[0016] Growing a buffer layer and an epitaxial layer in sequence on a substrate, etching the epitaxial layer, and growing an indium tin oxide layer on the P-type gallium nitride of the epitaxial layer;
[0017] On the indium tin oxide layer and the N-type gallium nitride of the epitaxial layer, the photoresist is exposed and developed using an exposure amount of 90-150 mj and a development temperature of 110-114° C., and an electrode metal layer is evaporated at the developed position.
[0018] From the above description, it can be seen that the beneficial effects of the present invention are: a buffer layer and an epitaxial layer are grown on the substrate in sequence, and an indium tin oxide layer is grown on the P-type gallium nitride of the epitaxial layer after etching the epitaxial layer; an exposure amount of 90-150mj and a development temperature of 110-114°C are used on both the indium tin oxide layer and the N-type gallium nitride of the epitaxial layer to expose and develop the photoresist, and an electrode metal layer is obtained by evaporation at the developed position. In the prior art, an exposure amount of 280mj and a development temperature of 106°C are usually used for exposure and development of the photoresist, and reducing the exposure amount will increase the size, while in the present invention, while reducing the exposure amount, the development temperature is increased. At this time, increasing the development temperature can reduce the size after photolithography, and selecting a reduced exposure amount for exposure can save time. Therefore, while reducing the exposure amount, increasing the development temperature can effectively reduce the area of the electrode metal layer, reduce the blocked area of the indium tin oxide layer, and thus improve the luminous brightness.
[0019] Further, on the indium tin oxide layer and the N-type gallium nitride of the epitaxial layer, the photoresist is exposed and developed using an exposure amount of 90-150 mj and a development temperature of 110-114° C., and an electrode metal layer is evaporated at the developed position, including:
[0020] On the indium tin oxide layer, using an exposure amount of 90-150 mj and a development temperature of 110-114° C., exposing and developing the photoresist, and evaporating to obtain a P electrode and an electrode extension strip with a line width of 4.9-5.1 μm;
[0021] On the N-type gallium nitride of the epitaxial layer, the photoresist is exposed and developed using an exposure amount of 90-150mj and a development temperature of 110-114°C, and an N electrode is evaporated.
[0022] From the above description, it can be seen that the photoresist is exposed and developed with an exposure amount of 90-150mj and a development temperature of 110-114°C, and evaporated to obtain a P electrode and an electrode extension strip with a line width of 4.9-5.1μm, while in the prior art, an exposure amount of 280mj and a development temperature of 106°C are used to expose and develop the photoresist, and then evaporated to obtain an electrode extension strip with a size of 6μm. Therefore, compared with the prior art, the line width of the extension strip after evaporation and the area of the PN electrode can be reduced.
[0023] Further, on the indium tin oxide layer, the photoresist is exposed and developed using an exposure amount of 90-150 mj and a development temperature of 110-114° C., and evaporated to obtain a P electrode and an electrode extension strip with a line width of 4.9-5.1 μm, including:
[0024] Coating a negative photoresist on the indium tin oxide layer, exposing the negative photoresist to light and developing it with yellow light using an exposure amount of 90-150 mj and a development temperature of 110-114° C. to obtain a developed area;
[0025] Evaporation is performed on the development area of the negative photoresist to obtain a P electrode and an electrode extension strip.
[0026] Furthermore, the width of the development area is 3.9-4.1 μm, and the line width of the electrode extension strip is 4.9-5.1 μm.
[0027] Furthermore, an electrode metal layer with a thickness of 1.6 μm was evaporated.
[0028] From the above description, it can be seen that a photoresist with a size of 4 μm is prepared under the conditions of an exposure amount of 90-150 mj and a yellow light development temperature of 110-114°C, and an electrode extension strip with a size of 5 μm is obtained by vapor deposition; while in the prior art, a photoresist with a size of 5 μm is prepared by an exposure amount of 280 mj and a yellow light development temperature of 106°C, and an electrode extension strip with a size of 6 μm is obtained by vapor deposition. Therefore, compared with the prior art, the line width of the extension strip after vapor deposition can be reduced, and the blocked area of the indium tin oxide layer can be reduced.
[0029] Furthermore, the evaporation of the electrode metal layer comprises:
[0030] Encapsulating a first bonding wire connected to a positive electrode of an external circuit on the P-electrode pad of the electrode metal layer;
[0031] A second bonding wire connected to a negative electrode of an external circuit is packaged on the N-electrode pad of the electrode metal layer.
[0032] It can be seen from the above description that by packaging the bonding wires connected to the external circuit on the electrode pads, the normal use of the LED can be ensured.
[0033] The above-mentioned method for manufacturing an electrode metal layer of the present invention is suitable for reducing the area of the electrode metal layer in an LED, thereby improving the luminous brightness of the LED, and is described below through specific implementation methods:
[0034] Embodiment 1
[0035] Please refer to Figure 1 , a method for manufacturing an electrode metal layer, comprising the steps of:
[0036] S1. Growing a buffer layer 2 and an epitaxial layer in sequence on a substrate 1, etching the epitaxial layer, and growing an indium tin oxide layer 6 on the P-type gallium nitride 5 of the epitaxial layer.
[0037] Please refer to Figure 2 A buffer layer 2 and an epitaxial layer are sequentially grown on a substrate 1, wherein the epitaxial layer includes an N-type gallium nitride 3, a quantum well 4 and a P-type gallium nitride 5 stacked sequentially from bottom to top, and the epitaxial layer in a preset area is etched to the N-type gallium nitride 3 using photolithography technology; then a current blocking layer 7 and an indium tin oxide layer 6 are grown on the P-type gallium nitride 5.
[0038] S2. On the indium tin oxide layer 6 and the N-type gallium nitride 3 of the epitaxial layer, the negative photoresist is exposed and developed using an exposure amount of 90-150 mj and a development temperature of 110-114° C., and an electrode metal layer is evaporated at the developed position.
[0039] S21. On the indium tin oxide layer 6, the negative photoresist is exposed and developed using an exposure amount of 90-150 mj and a development temperature of 110-114° C., and a P electrode 8 and an electrode extension strip 10 with a line width of 4.9-5.1 μm are obtained by evaporation.
[0040] Specifically, a negative photoresist is coated on the indium tin oxide layer 6, and the negative photoresist is exposed and developed using an exposure amount of 90-150mj and a development temperature of 110-114°C to obtain a development area with a width of 3.9-4.1μm. Vapor deposition is performed in the development area of the negative photoresist, and combined with the shape characteristics of the negative photoresist that is wide at the top and narrow at the bottom, an electrode extension strip with a line width of 4.9-5.1μm is obtained.
[0041] In this embodiment, the exposure and development conditions are set to an exposure amount of 110mj, a development temperature of 112°C, and a time of 90s. A 4μm wide development area is obtained by yellow light exposure and development, and then a 5μm wide electrode extension strip is obtained by vapor deposition on the development area of the photoresist.
[0042] S22. On the N-type gallium nitride 3 of the epitaxial layer, an exposure amount of 90-150 mj and a development temperature of 110-114° C. are used to expose, develop and evaporate an N electrode 9.
[0043] The thickness of the electrode metal layer is 1.6 μm.
[0044] S3, encapsulating a first bonding wire connected to the positive electrode of an external circuit on the bonding pad of the P electrode 8 of the electrode metal layer, and encapsulating a second bonding wire connected to the negative electrode of an external circuit on the bonding pad of the N electrode 9 of the electrode metal layer. In this embodiment, the bonding wire is a gold wire.
[0045] In this embodiment, the P electrode 8 pad is used for welding wires and connected to the positive electrode of the external circuit, the N electrode 9 pad is used for welding wires and connected to the negative electrode of the external circuit, the electrode extension strip 10 is a lead for current expansion on the chip surface, and the electrode metal layer can affect the photoelectric parameters of the chip.
[0046] The indium tin oxide (ITO) layer is used to form a transparent conductive film with low resistivity and high light transmittance on the surface of P-type gallium nitride 5, which increases the chip current expansion and light output; the ITO layer can affect the chip's LOP (light output power), VF (forward voltage), ESD (electrostatic discharge), IR (reverse voltage) and other optoelectronic parameters. The structure of the LED chip is designed as an electrode metal layer as a lead for current expansion and a pad connected to the external circuit attached to the ITO film layer.
[0047] Therefore, by optimizing the exposure and development adaptation conditions, increasing the baking plate temperature after development and exposure while reducing the exposure energy, the purpose of reducing the extended line width and P / N electrode area after evaporation is achieved; after the electrode metal layer is reduced, the luminous area blocked is reduced, thereby improving the luminous brightness.
[0048] This embodiment has the following beneficial effects:
[0049] 1. Reducing the electrode metal layer can effectively improve the light output efficiency: for bare cores, the normalized brightness of chips produced by the first epitaxial production machine increased by 0.36%, and the normalized brightness of chips produced by the second epitaxial production machine increased by 1.03%. When the voltage increased by 0.02V, the light efficiency of chips produced by the first epitaxial production machine increased by 0.18%, and the light efficiency of chips produced by the second epitaxial production machine increased by 0.23%; for glue-filled chips, the normalized brightness of chips produced by the first epitaxial production machine increased by 0.03%, and the normalized brightness of chips produced by the second epitaxial production machine increased by 0.50%. When the voltage increased by 0.02V, the light efficiency of chips produced by the first epitaxial production machine increased by 0.012%, and the light efficiency of chips produced by the second epitaxial production machine increased by 0.24%.
[0050] 2. Increase the amount of precious metals recovered: Reducing the area of the electrode metal layer after evaporation can reduce the gold evaporation area and usage. For example, the amount of gold recovered is increased by about 91.12g, the amount of platinum is 9.55g, and the benefit is about 35,612.29 yuan / month. The gold usage is calculated as follows: electrode area - reduced area 1634.707μm2 * electrode evaporation thickness 1.6μm * gold density 19.32g / cm2 * theoretical number of core particles 49,000 pieces / piece * production capacity 36,744 pieces * recovery rate 93.3% * gold price 400 yuan / gram = 34,007.89 yuan / month.
[0051] 3. Increase the capacity of the exposure machine: By adjusting the conditions for post-exposure baking, the exposure amount is reduced from 280mj to 120mj, shortening the exposure process time by about 3.2 minutes / batch, saving time: (280mj-120mj) / 20mj=8 seconds / piece, exposure amount 20mj, exposure time 1 second, and increasing the yellow light negative photoresist exposure capacity by 12111 pieces / month.
[0052] In summary, the present invention provides a method for manufacturing an electrode metal layer, which sequentially grows a buffer layer and an epitaxial layer on a substrate, etches the epitaxial layer, and then grows an indium tin oxide layer on the P-type gallium nitride of the epitaxial layer; uses an exposure amount of 90-150mj and a development temperature of 110-114°C on both the indium tin oxide layer and the N-type gallium nitride of the epitaxial layer, exposes and develops the photoresist, and evaporates the electrode metal layer at the developed position. In the prior art, an exposure amount of 280mj and a development temperature of 106°C are usually used for exposure and development of the photoresist, and reducing the exposure amount will increase the size, while in the present invention, while reducing the exposure amount, the development temperature is increased. At this time, increasing the development temperature can reduce the size after photolithography, and selecting a reduced exposure amount for exposure can save time. Therefore, while reducing the exposure amount, increasing the development temperature can effectively reduce the area of the electrode metal layer, reduce the blocked area of the indium tin oxide layer, and thus improve the luminous brightness.
[0053] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent transformations made using the contents of the present invention's specification and drawings, or directly or indirectly applied in related technical fields, are also included in the patent protection scope of the present invention.
Claims
1. A method for manufacturing an electrode metal layer, It is characterized in that Includes steps: Growing a buffer layer and an epitaxial layer in sequence on a substrate, etching the epitaxial layer, and growing an indium tin oxide layer on the P-type gallium nitride of the epitaxial layer; On the indium tin oxide layer and the N-type gallium nitride of the epitaxial layer, the photoresist is exposed and developed using an exposure amount of 90-150 mj and a development temperature of 110-114° C., and an electrode metal layer is evaporated at the developed position: A negative photoresist is coated on the indium tin oxide layer, and the negative photoresist is exposed and developed with yellow light using an exposure amount of 90-150 mj and a development temperature of 110-114° C. to obtain a development area, wherein the width of the development area is 3.9-4.1 μm, and a P electrode and an electrode extension strip with a line width of 4.9-5.1 μm are obtained by evaporation on the development area of the negative photoresist in combination with the shape characteristic of the negative photoresist being wide at the top and narrow at the bottom; On the N-type gallium nitride of the epitaxial layer, the photoresist is exposed and developed using an exposure amount of 90-150mj and a development temperature of 110-114°C, and an N electrode is evaporated.
2. A method for manufacturing an electrode metal layer according to claim 1, It is characterized in that The electrode metal layer with a thickness of 1.6 μm was evaporated.
3. The method for manufacturing an electrode metal layer according to claim 1, It is characterized in that The evaporation of the electrode metal layer comprises: Encapsulating a first bonding wire connected to a positive electrode of an external circuit on the P-electrode pad of the electrode metal layer; A second bonding wire connected to a negative electrode of an external circuit is packaged on the N-electrode pad of the electrode metal layer.
Citation Information
Patent Citations
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