A field-effect transistor adjustable predistortion linearizer

Abstract

The present invention discloses a field effect transistor adjustable predistortion linearizer, which specifically adopts a series transmission structure and is cascaded by front and rear stage nonlinear generators. The first part is a front stage common gate structure, which adopts the connection mode of the common gate of the field effect transistor. The radio frequency signal is input from the source stage of the field effect transistor, and the drain stage outputs and enters the rear stage. The second part is a rear stage common source structure, which adopts the connection mode of the common source of the field effect transistor. The radio frequency signal is input from the gate stage of the field effect transistor, and the drain stage outputs. The front stage and the rear stage are connected by a matching microstrip line. The field effect transistor as a nonlinear generating device operates in the variable resistance region, and its predistortion characteristics are changed by adjusting the gate voltage; by separately changing the front stage bias voltage, the independent adjustment of the AM-PM characteristic is realized; by separately changing the rear stage bias voltage, the independent adjustment of the AM-AM characteristic is realized, thereby reducing the amplitude correlation; and the adopted circuit structure is based on the superposition principle, greatly simplifying the adjustable linearizer circuit and being easy to adjust.

Description

Technical Field

[0001] The present invention belongs to the technical field of microwave power, and particularly relates to a predistortion linearizer. Background Art

[0002] In modern mobile communication systems, in order to improve the spectrum utilization rate, some multi-carrier communication technologies and complex digital modulation technologies have been widely applied. However, this has led to an increase in the average power of signal transmission, making the final-stage power amplifier more likely to enter the saturation region, causing nonlinear distortion, and thus generating varying degrees of crosstalk to adjacent channels. Therefore, in order to meet the requirements of high-speed and large-capacity communication systems, it is necessary to ensure the high linearity and high efficiency of the power amplifier.

[0003] Currently, an effective method that takes into account both the linearity and efficiency of the power amplifier is to add a predistorter in the front stage of the power amplifier to cancel the nonlinear characteristics generated by the power amplifier. For the main nonlinear generating devices in the analog predistorter, Schottky diodes or field-effect transistors are often used in engineering. Among them, Schottky diodes have a high cut-off frequency and mature theory, and are commonly used nonlinear devices in today's analog predistorters. Field-effect transistors have richer nonlinear components and have the advantages of broadband and easy integration, and are currently a research hotspot. On the other hand, for the adjustability of the analog predistorter, the adjustment of the compensation amount of the amplitude characteristic (AM-AM) and phase characteristic (AM-PM) curves is an important part of the predistorter design. However, in traditional analog predistorters, when adjusting the bias voltage, both the amplitude characteristic and phase characteristic of the predistorter change simultaneously, with strong amplitude correlation.

[0004] The predistortion structure based on field-effect transistors includes common-source and common-gate transmission structures, as well as common-gate reflection structures. In the early stage, common-gate transmission and common-source transmission structures were mostly used for field-effect transistor linearizers, and they were applied in C, X, and Ku bands. However, the predistortion characteristics were only controlled by a group of gate voltages, resulting in weak adjustability. The common-gate reflection structure usually combines devices such as bridges or combiners, which increases the circuit complexity but still has weak adjustability. Currently, with the improvement of integration, some circuits embed it in the front end of the power amplifier for matching, but this causes the state of the predistorter to be difficult to adjust and has too strong a specificity. In order to improve the adjustability of the predistorter and reduce the correlation between the amplitude and phase characteristics, existing solutions usually adopt the form of vector superposition, using the synthesis of multi-path vector signals to generate the required transmission characteristics. In terms of circuit structure, two-way or bridge reflection structures are usually adopted, and it is still urgently needed to study the realization of independent amplitude and phase adjustment with a more simplified circuit.

[0005] In a predistortion circuit where a field effect transistor is used as a non - linear device and the amplitude - phase characteristics are independently adjusted, the two - path structure is currently widely used. One path serves as a linear branch for adjusting the angle between vector signals, and the other path serves as a non - linear branch for generating non - linear components. This structure adopts the vector synthesis principle, and a specific combination of the bias voltages of the two branches is required when adjusting the amplitude - phase characteristics, making the adjustment difficult; moreover, this structure consists of two branches, which is relatively complex in circuit form. In addition, another reflective structure uses the two reflective branches of a bridge as the linear branch and the non - linear branch respectively. Compared with the two - path structure, it simplifies the circuit form. However, like the two - path structure, this structure also adopts the vector synthesis method, and the vector angle needs to be strictly controlled, making it difficult to implement the predistortion circuit and not easy to adjust. Summary of the Invention

[0006] To solve the above problems existing in the prior art, the present invention proposes a field - effect transistor adjustable predistortion linearizer.

[0007] The technical solution of the present invention is: a field - effect transistor adjustable predistortion linearizer, specifically including: a radio - frequency signal input port, a first DC - blocking capacitor, a first DC - grounding inductor, a first radio - frequency grounding capacitor, a first field - effect transistor, a first gate radio - frequency choke inductor, a first gate power supply, a first drain radio - frequency choke inductor, a first drain power supply, a second DC - blocking capacitor, a second gate radio - frequency choke inductor, a second gate power supply, a second field - effect transistor, a second drain radio - frequency choke inductor, a second drain power supply, a third DC - blocking capacitor, and a radio - frequency signal output port; where,

[0008] The first gate radio - frequency choke inductor is connected to the first gate power supply to form a first gate bias circuit, the first drain radio - frequency choke inductor is connected to the first drain power supply to form a first drain bias circuit, the second gate radio - frequency choke inductor is connected to the second gate power supply to form a second gate bias circuit, and the second drain radio - frequency choke inductor is connected to the second drain power supply to form a second drain bias circuit;

[0009] The radio - frequency signal input port is connected to the first DC - blocking capacitor; the first DC - blocking capacitor is connected to the source of the first field - effect transistor; the source of the first field - effect transistor is grounded through the connection of the first DC - grounding inductor; the gate of the first field - effect transistor is connected to the first radio - frequency grounding capacitor and the first gate bias circuit; the other end of the first radio - frequency grounding capacitor is grounded; the drain of the first field - effect transistor is connected to the first drain bias circuit; the source of the second field - effect transistor is grounded; the gate of the second field - effect transistor is connected to the second gate bias circuit and is connected to the drain of the first field - effect transistor through the second DC - blocking capacitor; the drain of the second field - effect transistor is connected to the second drain bias circuit and is connected to the radio - frequency output port through the third DC - blocking capacitor.

[0010] Advantages of the present invention: The field effect transistor adjustable predistortion linearizer of the present invention adopts a series transmission structure, which is cascaded by front and rear stage nonlinear generators and mainly consists of two parts. The first part is a front stage common gate structure, which adopts the connection method of the common gate of the field effect transistor. The radio frequency signal is input from the source stage of the field effect transistor and output from the drain stage to enter the rear stage. The second part is a rear stage common source structure, which adopts the connection method of the common source of the field effect transistor. The radio frequency signal is input from the gate stage of the field effect transistor and output from the drain stage. The front stage and the rear stage are connected by a matching microstrip line. The field effect transistor as the nonlinear generating device operates in the variable resistance region, and its predistortion characteristics are changed by adjusting the gate voltage. By separately changing the front stage bias voltage, the independent adjustment of the AM-PM characteristic can be realized. By separately changing the rear stage bias voltage, the independent adjustment of the AM-AM characteristic can be realized, thereby reducing the amplitude correlation. And the adopted circuit structure is based on the superposition principle. Compared with the existing vector synthesis type circuit structure, the adjustable linearizer circuit is greatly simplified and is easy to adjust. Description of the Drawings

[0011] Figure 1 It is a structural diagram of the field effect transistor adjustable predistortion linearizer according to the embodiment of the present invention;

[0012] Figure 2 It is the simulation result of the independently adjustable amplitude of the adjustable predistortion linearizer according to the embodiment of the present invention;

[0013] Figure 3 It is the simulation result of the independently adjustable phase of the adjustable predistortion linearizer according to the embodiment of the present invention.

[0014] Among them, 1. Radio frequency signal input port; 2. First DC blocking capacitor; 3. First DC grounding inductor; 4. First radio frequency grounding capacitor; 5. First field effect transistor; 6. First gate radio frequency choke inductor; 7. First gate power supply; 8. First drain radio frequency choke inductor; 9. First drain power supply; 10. Second DC blocking capacitor; 11. Second gate radio frequency choke inductor; 12. Second gate power supply; 13. Second field effect transistor; 14. Second drain radio frequency choke inductor; 15. Second drain power supply; 16. Third DC blocking capacitor; 17. Radio frequency signal output port. Detailed Embodiment

[0015] The present invention will be further described below in conjunction with the drawings and specific embodiments.

[0016] The structure of a field effect transistor adjustable predistortion linearizer provided in this embodiment is as Figure 1 shown, and has the following characteristics: The structure adopts a series transmission structure, and only two field effect transistors are used as nonlinear generating devices, with a simple structure and richer nonlinear characteristics; the front stage field effect transistor adopts a common gate structure, and the rear stage field effect transistor adopts a common source structure, and the front and rear stages are independently adjusted, which is easy to adjust.

[0017] Specifically, it includes: a radio frequency signal input port 1, a first DC blocking capacitor 2, a first DC grounding inductor 3, a first radio frequency grounding capacitor 4, a first field effect transistor 5, a first gate radio frequency choke inductor 6, a first gate power supply 7, a first drain radio frequency choke inductor 8, a first drain power supply 9, a second DC blocking capacitor 10, a second gate radio frequency choke inductor 11, a second gate power supply 12, a second field effect transistor 13, a second drain radio frequency choke inductor 14, a second drain power supply 15, a third DC blocking capacitor 16, and a radio frequency signal output port 17.

[0018] In this embodiment, the first gate radio frequency choke inductor 6 is connected to the first gate power supply 7 to form a first gate bias circuit; the first drain radio frequency choke inductor 8 is connected to the first drain power supply 9 to form a first drain bias circuit; the second gate radio frequency choke inductor 11 is connected to the second gate power supply 12 to form a second gate bias circuit, and the second drain radio frequency choke inductor 14 is connected to the second drain power supply 15 to form a second drain bias circuit.

[0019] According to Figure 1 the circuit structure, the radio frequency signal input port 1 is connected to the first DC blocking capacitor 2; the first DC blocking capacitor 2 is connected to the source of the first field effect transistor 5; the source of the first field effect transistor 5 is grounded through the connection of the first DC grounding inductor 3; the gate of the first field effect transistor 5 is connected to the first radio frequency grounding capacitor 4 and the first gate bias circuit; the other end of the first radio frequency grounding capacitor 4 is grounded; the drain of the first field effect transistor 5 is connected to the first drain bias circuit; the source of the second field effect transistor 13 is grounded; the gate of the second field effect transistor 13 is connected to the second gate bias circuit and is connected to the drain of the first field effect transistor through the second DC blocking capacitor 10; the drain of the second field effect transistor 13 is connected to the second drain bias circuit and is connected to the radio frequency output port 17 through the third DC blocking capacitor 16.

[0020] After the input signal is input through the radio frequency signal input port 1, it enters the source of the first field effect transistor 5, and the linear signal is changed into a non-linear signal that can independently adjust the phase. The signal is output from the drain of the first stage first field effect transistor 5 and enters the source of the second stage second field effect transistor 13, where the second field effect transistor 13 can independently adjust the amplitude characteristic of the previous stage signal. The radio frequency signal after passing through the second stage is output from the drain of the second field effect transistor 13 to the radio frequency signal output port 17.

[0021] For other parts of the circuit, the first gate control voltage is input from the first gate bias circuit, the first drain voltage is input from the first drain bias circuit, the second gate control voltage is input from the second gate bias circuit, and the second drain voltage is input from the second drain bias circuit; the first DC grounding inductor 3 provides a DC grounding loop for the previous stage, and the first RF grounding capacitor 4 provides an RF grounding loop for the previous stage; the source of the second field effect transistor 13 is grounded to provide DC and RF loops for the subsequent circuit.

[0022] When the field effect transistor is biased in the variable resistance region, the internal channel resistance changes with the change of the gate voltage. The higher the signal power, the higher the voltage, the smaller the internal channel resistance, and the larger the output signal. Therefore, it exhibits the characteristic of power expansion and is suitable for the construction of a linearizer. When adjusting the gate bias voltage, the regulation of the predistortion characteristic can be achieved.

[0023] For the first field effect transistor 5 of the previous stage, a common-gate structure is adopted for connection. Its predistortion characteristic shows the expansion of the AM-AM characteristic and the compression of the AM-PM characteristic. And within a certain voltage range, adjusting the first gate voltage only changes the magnitude of the AM-PM characteristic compression.

[0024] For the second field effect transistor 13 of the subsequent stage, a common-source structure is adopted for connection. Its predistortion characteristic shows the expansion of the AM-AM characteristic and the constancy of the AM-PM characteristic. And within a certain voltage range, adjusting the second gate voltage only changes the magnitude of the AM-AM characteristic expansion.

[0025] Therefore, by cascading two circuits with independently adjustable predistortion characteristics, according to the superposition principle, the constructed linearizer has the characteristic of independently adjustable amplitude and phase within a certain voltage change range, and is separately controlled only by the previous and subsequent stage circuits.

[0026] In this embodiment, the independently adjustable amplitude and phase characteristic is calculated at the operating frequency of 3.5 GHz, and the drain voltages of the first field effect transistor 5 and the second field effect transistor 13 are set to 2V. Adjusting the first gate voltage Vg1 mainly affects the AM-PM characteristic of the linearizer; adjusting the second gate voltage Vg2 mainly affects the AM-AM characteristic of the linearizer.

[0027] The specific simulation results are as Figure 2 、 Figure 3As shown, it can be seen from the simulation results that the gate voltage Vg2 of the first-stage first field-effect transistor 5 remains at -0.82 V, the gate voltage Vg1 of the second-stage second field-effect transistor 13 increases from -0.74 V to -0.66 V, the amplitude expansion amount of the linearizer decreases from 19 dB to 9 dB, and the phase compression amount basically remains unchanged at 55°; when the gate voltage Vg1 of the second-stage second field-effect transistor 13 remains at -0.70 V and the gate voltage Vg2 of the first-stage second field-effect transistor 5 increases from -0.84 V to -0.80 V, the phase compression amount of the linearizer decreases from 80° to 40°, and the amplitude expansion amount basically remains unchanged at 14 dB. Therefore, the amplitude-phase characteristics of this linearizer are determined by the gate bias states of the front and rear stages of field-effect transistors respectively, enabling independent adjustment of the AM-AM characteristic and the AM-PM characteristic.

[0028] In summary, the field-effect transistor adjustable predistortion linearizer of the present invention realizes independent adjustment of the AM-AM characteristic and the AM-PM characteristic, reducing the amplitude-phase correlation of the traditional predistorter. In this structure, only two field-effect transistors are selected as non-linear generating devices, and the circuit form adopts a series transmission structure, further simplifying the circuit on the basis of meeting the independent adjustability. In terms of the circuit implementation principle, compared with the traditional predistortion circuit using vector synthesis, the superposition principle is adopted, and the front-stage circuit with independently adjustable phase is cascaded with the rear-stage circuit with independently adjustable amplitude, making the circuit implementation principle simple and easy to implement. By adjusting the bias state of the front-stage field-effect transistor, independent adjustment of the AM-PM characteristic is realized; by adjusting the bias state of the rear-stage field-effect transistor, independent adjustment of the AM-AM characteristic is realized, where the influence of the front and rear stages of the circuit is small, facilitating independent adjustment of the predistortion characteristic and effectively reducing the correlation of the amplitude-phase characteristic. Therefore, the linearizer circuit structure of the present invention is simple, solving the problems of strong amplitude-phase correlation of the traditional predistorter, complex structure of the traditional vector synthesis circuit, difficult implementation and inconvenient adjustment, and the output signal of the linearizer exhibits the characteristics of amplitude expansion and phase compression, which is beneficial to improving the non-linearity of the solid-state power amplifier.

[0029] Those of ordinary skill in the art will realize that the embodiments described herein are for helping the reader understand the principles of the present invention, and it should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those of ordinary skill in the art can make various other specific deformations and combinations that do not depart from the essence of the present invention according to the technical revelations disclosed in the present invention, and these deformations and combinations are still within the protection scope of the present invention.

Claims

1. A field-effect transistor adjustable predistortion linearizer, specifically including: RF signal input port, first DC-blocking capacitor, first DC-grounding inductor, first RF-grounding capacitor, first field-effect transistor, first gate RF choke inductor, first gate power supply, first drain RF choke inductor, first drain power supply, second DC-blocking capacitor, second gate RF choke inductor, second gate power supply, second field-effect transistor, second drain RF choke inductor, second drain power supply, third DC-blocking capacitor, RF signal output port; wherein, The first gate RF choke inductor is connected to the first gate power supply to form a first gate bias circuit, the first drain RF choke inductor is connected to the first drain power supply to form a first drain bias circuit, the second gate RF choke inductor is connected to the second gate power supply to form a second gate bias circuit, and the second drain RF choke inductor is connected to the second drain power supply to form a second drain bias circuit; The RF signal input port is connected to the first DC-blocking capacitor; the first DC-blocking capacitor is connected to the source of the first field-effect transistor; the source of the first field-effect transistor is grounded through the connection of the first DC-grounding inductor; the gate of the first field-effect transistor is connected to the first RF-grounding capacitor and the first gate bias circuit; the other end of the first RF-grounding capacitor is grounded; the drain of the first field-effect transistor is connected to the first drain bias circuit; the source of the second field-effect transistor is grounded; the gate of the second field-effect transistor is connected to the second gate bias circuit and is connected to the drain of the first field-effect transistor through the second DC-blocking capacitor; the drain of the second field-effect transistor is connected to the second drain bias circuit and is connected to the RF output port through the third DC-blocking capacitor.

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