Photolithography registration method and chip manufacturing method

Abstract

The present application is applicable to the field of chip manufacturing technology, and proposes a photolithography registration method, including: placing a wafer on the stage of a photolithography machine, placing a photolithography plate on the carrier of the photolithography machine, the wafer including multiple exposure areas, each exposure area is provided with a first alignment mark, and the photolithography plate is provided with a registration mark; coarsely aligning the photolithography plate with the wafer; moving the photolithography plate to finely align the registration mark with the first alignment mark; moving the photolithography plate by a first preset distance, the first alignment mark and the registration mark are staggered, so as to use the photolithography plate to perform photolithography on the wafer. The above-mentioned photolithography registration method can achieve the registration of multiple pattern layers, save chips occupied by marks, and increase chip production. The present application also provides a chip manufacturing method.

Description

Technical Field

[0001] The present application relates to the technical field of chip manufacturing, and in particular to a photolithography alignment method and a chip manufacturing method. Background Art

[0002] Lithography is the core equipment for chip manufacturing, which is used to print the fine patterns on the photomask onto the chip through light exposure. Since multiple layers of film need to be made during the chip manufacturing process, some lithography machines need to transmit information through reflected waves to identify the mark, and then achieve the registration between layers. Since the mark will be etched after alignment and cannot be reused, it is necessary to leave a mark in each film layer for subsequent registration.

[0003] At present, the existing lithography machines that use reflected waves to identify marks are heavily dependent on the shape and size of the marks. The shape and size of the marks need to meet the needs of the lithography machine for horizontal and vertical scanning, and the marks cannot be reused. For large-size chips, due to the limitation of the scanning range of the lithography machine, there is not enough space within the scanning range to place the required marks. Two chips have to be sacrificed in each exposure area (block) to set the alignment mark, which increases the chip loss rate. Summary of the invention

[0004] In view of this, the present application provides a photolithography registration method and a chip manufacturing method to save chips occupied by markings, reduce chip loss rate, and increase production volume.

[0005] An embodiment of the first aspect of the present application provides a photolithography registration method, comprising:

[0006] Placing a wafer on a stage of a photolithography machine, placing a photomask on a carrier of the photolithography machine, wherein the wafer comprises a plurality of exposure areas, each of which is provided with a first alignment mark, and the photomask is provided with a registration mark;

[0007] Coarsely aligning the photoresist plate with the wafer;

[0008] Moving the photoresist to finely align the registration mark with the first alignment mark;

[0009] The photomask is moved by a first preset distance, the first alignment mark is staggered with the registration mark, and the wafer is photolithographically processed using the photomask;

[0010] Among them, each of the exposure areas is also provided with a plurality of array-arranged tube cores, a plurality of first scribing lanes and a plurality of second scribing lanes, the first scribing lane is arranged between the tube cores in two adjacent rows, the second scribing lane is arranged between the tube cores in two adjacent columns, the first alignment mark is arranged at the intersection of the first scribing lane and the second scribing lane, the number of layers of the tube core to be formed with the pattern layer is N, N is a positive integer greater than 0, the photolithography machine is used to identify the first alignment mark through the reflected wave, and the photolithography machine has a identifiable area, the number of intersections of the first scribing lane and the second scribing lane in the identifiable area is M, M is a positive integer greater than 0, and M and N satisfy the following conditions: M<2N.

[0011] In some embodiments, the registration mark is offset by a second preset distance relative to an original design position, the original design position being the projection position of the first registration mark on the photomask when the wafer is aligned with the edge of the photomask and is in a registration state, and the second preset distance is equal to the first preset distance.

[0012] In some embodiments, the step of moving the photomask by a first preset distance includes: moving the photomask by the first preset distance along a first direction, wherein the first direction is a row direction, a column direction, or a diagonal direction of the die arrangement.

[0013] In some embodiments, the length of the tube core along the row direction is L1, the length along the column direction is L2, and the length along the diagonal direction of the tube core is L3; the width of the first scribing street is W1, the width of the second scribing street is W2, the diagonal length at the intersection of the first scribing street and the second scribing street is W3, and the first preset distance is D;

[0014] When the first direction is a row direction, D=P1*(L1+W2);

[0015] When the first direction is the column direction, D=P2*(L2+W1);

[0016] When the first direction is the diagonal direction of the tube core, D=P3*(L3+W3), and P1, P2, and P3 are all positive integers greater than 0.

[0017] In some embodiments, a second alignment mark is further provided in each exposure area, and after the step of roughly aligning the photomask with the wafer, the photolithography alignment method further comprises:

[0018] Determining whether the first alignment mark is identifiable;

[0019] When the first alignment mark cannot be identified, the photoresist is moved to finely align the registration mark with the second alignment mark.

[0020] In some embodiments, when N>5, a second alignment mark is further provided in each exposure area, and after the step of roughly aligning the photomask with the wafer, the photolithography alignment method further includes:

[0021] Determine whether the number of pattern layers that have been photolithographically processed on the die is greater than Q, where Q is a positive integer greater than 1 and less than N;

[0022] When the number of pattern layers that have been photolithographed on the tube core is greater than Q, the photomask is moved to finely align the registration mark with the second alignment mark.

[0023] In some embodiments, the length of the exposure area is 30000um and the width is 14900um; the length of the tube core in the row direction or the column direction is 1500um to 6000um.

[0024] In some embodiments, the photomask is a photomask used in any one of a plurality of photolithography processes in a semiconductor manufacturing process of a chip, and the plurality of photolithography processes all use the first alignment mark to align the corresponding photomask with the wafer.

[0025] A second aspect of the present application provides a chip manufacturing method, comprising:

[0026] Adopting the photolithography registration method as described in the first aspect to align the wafer with the photoresist;

[0027] Performing photolithography on the wafer using the photomask to form a pattern layer;

[0028] Repeat the above alignment and photolithography steps, align the plurality of photomasks with the wafer in sequence and form multiple pattern layers on the wafer in sequence.

[0029] In some embodiments, a photoresist layer is provided on the wafer, and performing photolithography on the wafer using the photoresist includes:

[0030] Exposing the photoresist layer on the wafer using the photoresist;

[0031] Using the exposed photoresist layer as a mask, etching the wafer to obtain a pattern layer on the wafer, wherein the first alignment mark is not etched;

[0032] The photoresist layer is removed.

[0033] In the photolithography registration method provided by the present application, the photomask is first roughly aligned with the wafer, and then the first alignment mark is finely aligned with the registration mark. Then, the photomask is moved by a first preset distance to a preset exposure position, and then the wafer is photolithographically processed using the photomask. At this time, the registration mark and the first alignment mark are staggered, and the wafer position corresponding to the registration mark will be exposed and etched, while the first alignment mark is not etched, so that the first alignment mark can be repeatedly used for multiple registration and photolithography processes. The photolithography registration method provided by the present application realizes registration and exposure at different positions, and can reuse the first alignment mark on the wafer to realize registration between layers, without making marks on each film layer, saving the tube core occupied by the mark, reducing the chip loss rate, and increasing production.

[0034] In the chip manufacturing method provided by the present application, a photolithography registration method is first used to achieve registration, and then photolithography is performed to form a pattern layer, and the registration and photolithography steps can be repeated to form multiple pattern layers. Since the first alignment mark is used in multiple registration processes, the layers are aligned; and the first alignment mark can be reused, and there is no need to form a new alignment mark on the wafer each time the photolithography is performed, thereby saving the tube core occupied by the mark, reducing the chip loss rate, and increasing the production volume. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0036] Figure 1 A flow chart of the photolithography registration method provided in this application;

[0037] Figure 2 A schematic diagram of a wafer provided in an embodiment of the present application;

[0038] Figure 3 A schematic diagram of an exposure area in a wafer provided in an embodiment of the present application;

[0039] Figure 4 A schematic diagram of the photolithography registration process provided in an embodiment of the present application;

[0040] Figure 5 A schematic diagram of an exposure area in a wafer provided in another embodiment of the present application;

[0041] Figure 6 A flowchart of a chip manufacturing method provided in an embodiment of the present application.

[0042] The meanings of the marks in the figure are:

[0043] 10. Wafer; 101. Exposure area; 11. Die; 121. First scribing lane; 122. Second scribing lane; 13. First alignment mark; 14. Second alignment mark; 21. Registration mark. DETAILED DESCRIPTION

[0044] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings, i.e., embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0045] It should be noted that when a component is referred to as being "fixed to" or "disposed on" another component, it may be directly or indirectly on the other component. When a component is referred to as being "connected to" another component, it may be directly or indirectly connected to the other component. The terms "first" and "second" are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the number of technical features. "Multiple" means two or more, unless otherwise clearly and specifically defined.

[0046] It should also be noted that, in the embodiments of the present application, the same figure mark is used to represent the same component or the same part. For the same parts in the embodiments of the present application, the figure may only mark one of the parts or components as an example. It should be understood that the figure mark also applies to other identical parts or components.

[0047] In order to illustrate the technical solution of the present application, a description is given below with reference to specific drawings and embodiments.

[0048] The embodiment of the first aspect of the present application provides a photolithography registration method, which can align a wafer 10 to be photolithography with a photomask 20 on a photolithography machine, thereby achieving registration between patterns of various layers on the wafer 10. Figure 1 As shown, the photolithography registration method includes the following steps.

[0049] Step S110: placing the wafer 10 on the stage of the photolithography machine, and placing the photoresist plate 20 on the carrier of the photolithography machine.

[0050] Please refer to Figures 2 to 4 The wafer 10 is used to manufacture a plurality of chips. The wafer 10 comprises a plurality of exposure areas 101 , each of which is provided with a first alignment mark 13 .

[0051] Each exposure area 101 is also provided with a plurality of array-arranged tube cores 11, a plurality of first scribing lanes 121 and a plurality of second scribing lanes 122. The first scribing lane 121 is provided between two adjacent rows of tube cores 11, the second scribing lane 122 is provided between two adjacent columns of tube cores 11, and the first alignment mark 13 is provided at the intersection of the first scribing lane 121 and the second scribing lane 122. In order to meet the needs of the lithography machine for horizontal and vertical scanning, the first comparison mark 11 includes a portion extending along the X direction and a portion extending along the Y direction. For example, the first comparison mark 11 is a cross shape.

[0052] The number of layers of the die 11 to be patterned is N, where N is a positive integer greater than 0. The photolithography machine is used to identify the first alignment mark 13 by the reflected wave, and the photolithography machine has an identifiable area, and the number of intersections of the first scribing street 121 and the second scribing street 122 in the identifiable area is M, where M is a positive integer greater than 0, and M and N satisfy the following condition: M<2N.

[0053] Specifically, since the photolithography machine has requirements on the size of the first alignment mark 13 , the first alignment mark needs to be placed at the intersection of the first scribing street 121 and the second scribing street 122 .

[0054] The optical scanning mechanism in the lithography machine scans the left and right sides of the exposure area 101 at the same time. The identifiable area of ​​the lithography machine is divided into a first sub-area and a second sub-area, which scan the left and right sides of the exposure area 101 respectively; a first alignment mark 11 is provided on the left and right sides of each exposure area 101 for simultaneous identification by the lithography machine. For example, N=5, M=8, then the above condition M<2N is satisfied.

[0055] When the above conditions are met, if the existing registration method is used, 2N alignment marks need to be set in the exposure area 101. However, there are only M positions in the identifiable area of ​​the lithography machine where alignment marks can be set. Therefore, it is necessary to occupy the additional tube core 11 to place the remaining alignment marks. The method provided in the present application does not require the alignment marks to be set on the tube core 11.

[0056] Please refer to Figure 4 The photomask 20 is an optical mask (MASK), and the photomask 20 can be a photomask 20 used in any of the multiple photolithography processes in the semiconductor manufacturing process of the wafer 10, and a pattern is provided on the photomask 20. The photomask 20 is provided with a registration mark 21, and the registration mark 21 is used to align with the first alignment mark 13. The photomask 20 is placed on a carrier, and the carrier can drive the photomask 20 to move to complete the subsequent alignment action.

[0057] Step S120 : performing rough alignment between the photomask 20 and the wafer 10 .

[0058] Please refer to Figure 4 , Figure 4(a) is a schematic diagram of the rough alignment of the photomask 20 and the wafer 10. The rough alignment is to move the photomask 20 over a large range so that the photomask 20 is moved above the wafer 10. After the rough alignment, the first alignment mark 13 and the registration mark 21 are staggered, and the two do not overlap or have a small overlap ratio.

[0059] The present application does not limit the specific means of rough alignment, for example, the photomask 20 can be roughly aligned with reference to the wafer 10, or the photomask 20 can be roughly aligned with reference to the photolithography machine. After the rough alignment, the photomask 20 is close to the preset exposure position.

[0060] Step S130 : moving the photoresist plate 20 to finely align the registration mark 21 with the first alignment mark 13 .

[0061] For details, please refer to Figure 4 In (b), the carrier drives the photomask 20 to move until the registration mark 21 on the photomask 20 is finely aligned with the first alignment mark 13 on the wafer 10, so as to achieve accurate alignment of the photomask 20 and the wafer 10. During fine alignment, the projection of the registration mark on the wafer 10 completely overlaps with the first alignment mark 13. When there are multiple registration marks 21 and first alignment marks 13, each registration mark 21 is finely aligned with the corresponding first alignment mark 13. It can be understood that the carrier can be relatively moved by using the mechanical adjustment system on the lithography machine.

[0062] Step S140 : moving the photomask 20 by a first preset distance, so that the first alignment mark 13 and the registration mark 21 are staggered, and the wafer 10 is photolithographically processed by using the photomask 20 .

[0063] Please refer to Figure 4 In (c), after accurate alignment, the photomask 20 is moved by a first preset distance so that the registration mark 21 is offset from the corresponding first alignment mark 13 and the two do not overlap at all, and then the wafer 10 is photolithographically processed using the moved photomask 20. "Photolithography" includes processes such as exposure and etching, which can form a pattern layer on the wafer 10, and the pattern layer is the same as the photolithographic pattern on the photomask 20.

[0064] When the photolithography plate 20 is used to perform photolithography on the wafer 10, since the registration mark on the photolithography plate 20 is staggered with the first alignment mark 13, the first alignment mark 13 will not be etched, so that the first alignment mark 13 can be retained on the wafer 10 and can be used for the registration of the next layer. When the wafer 10 is aligned for the next time, the above steps S110 to S140 are repeated and the first alignment mark 13 is also used for registration. In this way, the first alignment mark 13 can be reused.

[0065] In the photolithography registration method provided by the present application, the photomask 20 is first roughly aligned with the wafer 10, and then the first alignment mark 13 is finely aligned with the alignment mark 21. Then, the photomask 20 is moved by a first preset distance, so that the photomask 20 is moved to a preset exposure position, and then the wafer 10 is photolithographically processed using the photomask 20. At this time, the alignment mark 21 and the first alignment mark 13 are staggered, and the position of the wafer 10 corresponding to the alignment mark 21 will be exposed and etched, while the first alignment mark 13 is not etched, so that the first alignment mark 13 can be repeatedly used for multiple alignment and photolithography processes. The photolithography registration method provided by the present application realizes alignment and exposure at different positions, and can reuse the first alignment mark on the wafer 10 to realize alignment between layers, without making marks on each film layer, saving the tube core occupied by the mark, reducing the chip loss rate, and increasing the production volume.

[0066] The above-mentioned photolithography registration method can be used in chip manufacturing process, and for large-size chips, it can significantly reduce the chip loss rate. Taking a product with a size of 138mil as an example, an exposure area 101 can arrange 24 tube cores. In the prior art, the alignment mark needs to occupy 2 chips, and the chip loss rate is 8.3%; while the method provided by the present application saves the tube core occupied by the alignment mark, which can save 8.3% of the waste.

[0067] by Figure 3 For example, the length of the exposure area 101 is 30000um, the width is 14000um, the length of the tube core 11 is 3500um, N=6, M=6. There are 24 tube cores 11 in the exposure area 101, and 6 pattern layers and 6 photolithography processes are required on the tube core 11.

[0068] If the existing technical solution is adopted, Figure 3 Among the four columns of tube cores 11 on the left, three intersection points of the first scribe lanes 121 and the second scribe lanes 122 are located in the scannable area of ​​the photolithography machine, and among the four columns of tube cores 11 on the right, three intersection points of the first scribe lanes 121 and the second scribe lanes 122 are located in the scannable area of ​​the photolithography machine, so that only three alignment marks can be placed on the left and right sides of the exposure area, which can be used for three photolithography processes. Therefore, one tube core 11 is respectively used on the left and right sides to place the alignment marks required for the remaining three photolithography processes.

[0069] By adopting the technical solution provided by the present application, only one first alignment mark 13 needs to be placed on the left and right sides respectively to meet the alignment requirements in the six photolithography processes. Figure 3 For example, this embodiment reduces the waste by 8.3% compared with the prior art.

[0070] It can be understood that the size of the tube core 11 and the number of tube cores 11 in the exposure area can be adjusted according to design requirements.

[0071] In one embodiment, the registration mark 21 is offset by a second preset distance relative to the original design position, the original design position being the projection position of the first registration mark 13 on the photomask 20 when the wafer 10 and the photomask 20 are aligned at their edges and in alignment, and the second preset distance is equal to the first preset distance. It can be seen that the moving distance of the photomask 20 in step S140 is preset and equal to the offset distance of the registration mark 21.

[0072] It can be understood that the photolithography plate 20 has a preset photolithography pattern (layout) to be photolithographed onto the wafer 10, and the positional relationship of the registration mark 21 relative to the photolithography pattern is different from the positional relationship of the first alignment mark 13 relative to the pattern to be formed. After exposure and etching, the photolithography pattern on the photolithography plate 20 can be formed on the wafer 10.

[0073] By adopting the above technical solution, the registration mark 21 has an offset distance (second preset distance) relative to the original design position and the first alignment mark 13. After fine alignment is achieved in step S130, the photomask 20 is moved by the same distance (first preset distance), and the photolithography pattern on the photomask 20 can be formed on the wafer 10. Therefore, the moving distance of the photomask 20 in step S140 can be precisely controlled to ensure the alignment accuracy. It can be understood that the first preset distance and the second preset distance can be set according to product requirements.

[0074] In one embodiment, the step of moving the photomask 20 by a first preset distance includes: moving the photomask 20 by a first preset distance along a first direction, where the first direction is a row direction, a column direction, or a diagonal direction of the die 11 .

[0075] By adopting the above technical solution, the photomask 20 can be moved so that the registration mark 21 of the photomask 20 is offset from the first alignment mark 13, and the exposure position corresponding to the registration mark 21 is still located at the intersection of the first scribing street 121 and the second scribing street 122.

[0076] In one embodiment, the length of the tube core 11 along the row direction is L1, the length along the column direction is L2, and the length along the diagonal direction of the tube core 11 is L3; the width of the first scribe line 121 is W1, the width of the second scribe line 122 is W2, the diagonal length at the intersection of the first scribe line 121 and the second scribe line 122 is W3, and the first preset distance is D;

[0077] When the first direction is the row direction, D=P1*(L1+W2);

[0078] When the first direction is the column direction, D=P2*(L2+W1);

[0079] When the first direction is the diagonal direction of the tube core 11, D=P3*(L3+W3), and P1, P2, and P3 are all positive integers greater than 0.

[0080] By adopting the above technical solution, the moving distance of the photomask 20 can be accurately controlled to ensure that after the photomask 20 moves, the exposure position corresponding to the registration mark 21 of the photomask 20 is still located at the intersection of the first scribing lane 121 and the second scribing lane 122.

[0081] Please refer to Figure 5 In one embodiment, when N>5, a second alignment mark 14 is further provided in each exposure area 101. The second alignment mark 14 is located at the intersection of the first scribing lane 121 and the second scribing lane 122. The second alignment mark 14 can be formed simultaneously with the first alignment mark 13, or can be formed in the step of photolithography of any lane of the wafer 10 with the first alignment mark 13. The second alignment mark 14 can have the same shape or a different shape as the first alignment mark 13.

[0082] A certain photolithography process of the wafer 10 may select the first alignment mark 13 or the second alignment mark 14 for alignment; or, when the clarity of the first alignment mark 13 decreases, the second alignment mark 14 may be selected for alignment.

[0083] In one embodiment, after the step of roughly aligning the photomask 20 with the wafer 10, the photolithography registration method further includes:

[0084] Determining whether the first alignment mark 13 is identifiable;

[0085] When the first alignment mark 13 cannot be identified, the photoresist plate 20 is moved to finely align the registration mark 21 with the second alignment mark 14 .

[0086] By adopting the above technical solution, the second alignment mark 14 can utilize the empty scribe line and will not occupy the tube core 11. The registration method provided in this embodiment can use the second alignment mark 14 for registration when the first alignment mark 13 cannot be identified, which can also solve the problem that the alignment mark needs to occupy the tube core 11.

[0087] In another embodiment, after the step of roughly aligning the photomask 20 with the wafer 10, the photolithography registration method further includes:

[0088] Determine whether the number of pattern layers that have been photolithographically processed on the tube core 11 is greater than Q, where Q is a positive integer greater than 1 and less than N;

[0089] When the number of pattern layers that have been photolithographically processed on the tube core 11 is greater than Q, the photoresist plate 20 is moved to finely align the registration mark 21 with the second alignment mark 14 .

[0090] For example, N=6, Q=4, after the rough alignment, determine whether the number of pattern layers that have been photolithographically processed on the tube core 11 is greater than 4; if so, finely align the registration mark 21 with the second alignment mark 14; if not, continue with step S130, and still finely align the registration mark 21 with the first alignment mark 13.

[0091] By adopting the above technical solution, the second alignment mark 14 can utilize the empty dicing lane and will not occupy the tube core 11. The registration method provided in this embodiment can use the second alignment mark 14 for registration after using the first alignment mark 13 multiple times, which can also solve the problem that the alignment mark needs to occupy the tube core 11.

[0092] In one embodiment, the length of the exposure area 101 is 30000 um and the width is 14900 um; the length of the tube core 11 in the row direction or the column direction is 1500 um to 6000 um.

[0093] In this way, the above method is suitable for large-sized chips, and there is no need to occupy the tube core 11 to set the alignment mark, which can significantly increase the chip production and avoid waste. It can be understood that for small and medium-sized chips, the above-mentioned photolithography registration method can also avoid occupying the tube core 11, but for large-sized chips, the number of tube cores 11 in the exposure area 101 is small, so the effect of saving tube core 11 is more significant.

[0094] In one embodiment, the first alignment mark 13 is a raised pattern or a recessed pattern. In the prior art, after alignment and photolithography, the raised pattern or the recessed pattern will be etched away, but with the method of the present application, the first alignment mark 13 will not be etched and can be reused. If the first alignment mark 13 is a raised pattern, after a film layer is deposited on the first alignment mark 13, the raised pattern is raised because it is not etched, and it is still a raised pattern after the photolithography process; if the first alignment mark 13 is a recessed pattern, such as a groove or a slit, after a film layer is deposited on the first alignment mark 13, it is still a recessed pattern after the photolithography process. The first alignment mark 13 will not be etched during the photolithography process, so that the first alignment mark 13 can maintain sufficient clarity.

[0095] In one embodiment, the first alignment mark 13 is in a cross shape, and the registration mark 21 is a cross-shaped light-transmitting portion disposed on the photolithography plate 20. Figure 3 For example, the four blocks around the registration mark 21 in the figure are all opaque parts, and a cross-shaped light-transmitting part is formed between the four blocks.

[0096] In this embodiment, the first alignment mark 13 and the registration mark 21 are set to be cross-shaped, which can achieve alignment in the X and Y directions at the same time. It can be understood that the shapes of the first alignment mark 13 and the registration mark 21 are not limited thereto. For example, the first alignment mark 13 includes a first strip portion along the X direction and a second strip portion along the Y direction, and the first strip portion and the second strip portion are arranged at intervals; for another example, the first alignment mark 13 can be circular or polygonal.

[0097] The sizes of the registration mark 21 and the first alignment mark 13 may be the same or different. For example, the registration mark 21 may be in a cross shape but the length of each branch may be greater than that of the first alignment mark 13 .

[0098] In the photolithography alignment method provided in the present application, the photolithography plate 20 is a photolithography plate used in any one of multiple photolithography processes in the semiconductor manufacturing process of the chip, and the multiple photolithography processes all use the first alignment mark 13 to align the photolithography plate 20 with the wafer 10.

[0099] Please refer to Figure 6 The second aspect of the present application proposes a chip manufacturing method, comprising the following steps.

[0100] Step S510: using the photolithography registration method of the first aspect to align the wafer 10 with the photomask 20 .

[0101] As in the first aspect, after alignment, the exposure position of the photoresist 20 avoids the first alignment mark 13 .

[0102] Step S520 : performing photolithography on the wafer 10 using the photomask 20 to form a pattern layer.

[0103] After photolithography, the pattern layer formed on the wafer 10 is the same as the photolithography pattern on the photomask 20 , and the first alignment mark 13 is not etched and remains on the wafer 10 .

[0104] Step S530 : repeating the above alignment and photolithography steps, aligning the plurality of photomasks 20 with the wafer 10 in sequence and forming a plurality of pattern layers on the wafer 10 in sequence.

[0105] The number of pattern layers on the wafer 10 can be set according to demand, and each pattern layer is aligned using the first alignment mark 13 .

[0106] The chip manufacturing method provided in the present application first adopts the above-mentioned photolithography registration method to achieve registration, and then performs photolithography to form a pattern layer, and can repeat the registration and photolithography steps to form a multi-layer pattern layer. Since the first alignment mark 13 is used in multiple registration processes, alignment is achieved between layers, ensuring the correspondence between each pattern layer and improving the overlay accuracy; and the first alignment mark 13 is reusable, and there is no need to form a new alignment mark on the wafer 10 during each photolithography, thereby saving the tube core occupied by the mark, reducing the chip loss rate, and increasing production.

[0107] Optionally, the first alignment mark 13 is disposed in the first film layer on the wafer 10. When manufacturing the second, third, ... Nth film layers, the first comparison mark 11 can be used to achieve alignment with the corresponding photolithography plate 20, thereby achieving registration between the film layers.

[0108] In one embodiment, a photoresist layer is provided on the wafer 10, and step S520 performs photolithography on the wafer 10 using the photoresist plate 20, including: exposing the photoresist layer on the wafer using the photoresist plate 20; etching the wafer 10 using the exposed photoresist layer as a mask to obtain a pattern layer on the wafer 10, wherein the first alignment mark 13 is not etched; and removing the photoresist layer.

[0109] The photoresist layer can be a positive photoresist or a negative photoresist. Taking the positive photoresist as an example, the positive photoresist covers the surface of the wafer 10. The photoresist layer is exposed using the photoresist plate 20. The first alignment mark 13 is staggered with the registration mark 21 and the first alignment mark 13 corresponds to the opaque portion on the photoresist plate 20, so that the first alignment mark 13 will not be exposed. After development, the photoresist on the first alignment mark 13 remains on the wafer 10, and the first alignment mark 13 below is protected during the etching process. Therefore, the first alignment mark 13 is not etched. The principle of the negative photoresist is similar and will not be repeated.

[0110] In one embodiment, in the process of aligning a plurality of photomasks 20 with the wafer 10 in sequence, the first preset distances moved by the photomasks 20 after accurate alignment are all equal. The first preset distance is equal to the second preset distance by which the registration mark 21 is offset from the original design position. In this way, the chip manufacturing method can accurately control the moving distance of the photomask 20.

[0111] The third aspect of the present application proposes a chip, which is manufactured using the chip manufacturing method provided by the second aspect.

[0112] The chip manufactured by the chip manufacturing method includes multiple pattern layers, and the layers are aligned to ensure the corresponding relationship between the multiple pattern layers, and the performance is good.

[0113] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A photolithography registration method, It is characterized in that include: Placing a wafer on a stage of a photolithography machine, placing a photomask on a carrier of the photolithography machine, wherein the wafer comprises a plurality of exposure areas, each of which is provided with a first alignment mark, and the photomask is provided with a registration mark; Coarsely aligning the photoresist plate with the wafer; Moving the photoresist to finely align the registration mark with the first alignment mark; The photomask is moved by a first preset distance, the first alignment mark is staggered with the registration mark, and the wafer is photolithographically processed using the photomask; Among them, each of the exposure areas is also provided with a plurality of array-arranged tube cores, a plurality of first scribing lanes and a plurality of second scribing lanes, the first scribing lane is arranged between the tube cores in two adjacent rows, the second scribing lane is arranged between the tube cores in two adjacent columns, the first alignment mark is arranged at the intersection of the first scribing lane and the second scribing lane, the number of layers of the tube core to be formed with the pattern layer is N, N is a positive integer greater than 0, the photolithography machine is used to identify the first alignment mark through the reflected wave, and the photolithography machine has a identifiable area, the number of intersections of the first scribing lane and the second scribing lane in the identifiable area is M, M is a positive integer greater than 0, and M and N satisfy the following conditions: M<2N.

2. The photolithography registration method according to claim 1, It is characterized in that The registration mark is offset by a second preset distance relative to an original design position, wherein the original design position is the projection position of the first registration mark on the photomask when the wafer is aligned with the edge of the photomask and is in a registration state, and the second preset distance is equal to the first preset distance.

3. The photolithography registration method according to claim 1, It is characterized in that The step of moving the photomask by a first preset distance includes: moving the photomask by the first preset distance along a first direction, wherein the first direction is a row direction, a column direction, or a diagonal direction of the die arrangement.

4. The photolithography registration method according to claim 3, It is characterized in that Assume that the length of the tube core along the row direction is L1, the length along the column direction is L2, and the length along the diagonal direction of the tube core is L3; Assume that the width of the first scribing lane is W1, the width of the second scribing lane is W2, the length of the diagonal at the intersection of the first scribing lane and the second scribing lane is W3, and the first preset distance is D; When the first direction is a row direction, D=P1*(L1+W2); When the first direction is the column direction, D=P2*(L2+W1); When the first direction is the diagonal direction of the tube core, D=P3*(L3+W3), and P1, P2, and P3 are all positive integers greater than 0.

5. The photolithography registration method according to claim 1, It is characterized in that A second alignment mark is also provided in each exposure area. After the step of roughly aligning the photomask with the wafer, the photolithography alignment method further comprises: Determining whether the first alignment mark is identifiable; When the first alignment mark cannot be identified, the photoresist is moved to finely align the registration mark with the second alignment mark.

6. The photolithography registration method according to claim 1, It is characterized in that When N>5, a second alignment mark is further provided in each exposure area, and after the step of roughly aligning the photomask with the wafer, the photolithography alignment method further includes: Determine whether the number of pattern layers that have been photolithographically processed on the die is greater than Q, where Q is a positive integer greater than 1 and less than N; When the number of pattern layers that have been photolithographed on the tube core is greater than Q, the photomask is moved to finely align the registration mark with the second alignment mark.

7. The photolithography registration method according to any one of claims 1 to 6, It is characterized in that The length of the exposure area is 30000um and the width is 14900um; the length of the tube core in the row direction or the column direction is 1500um to 6000um.

8. The photolithography registration method according to claim 1, It is characterized in that The photomask is a photomask used in any one of a plurality of photolithography processes in a semiconductor manufacturing process of a chip, and the plurality of photolithography processes all use the first alignment mark to align the corresponding photomask with the wafer.

9. A chip manufacturing method, It is characterized in that include: Adopting the photolithography registration method as described in any one of claims 1 to 8 to align the wafer with the photolithography plate; Performing photolithography on the wafer using the photomask to form a pattern layer; Repeat the above alignment and photolithography steps, align the plurality of photomasks with the wafer in sequence and form multiple pattern layers on the wafer in sequence.

10. The chip manufacturing method according to claim 9, It is characterized in that The wafer is provided with a photoresist layer, and the photolithography is performed on the wafer using the photoresist, including: Exposing the photoresist layer on the wafer using the photoresist; Using the exposed photoresist layer as a mask, etching the wafer to obtain a pattern layer on the wafer, wherein the first alignment mark is not etched; The photoresist layer is removed.

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