Method of manufacturing semiconductor device and pattern forming method for manufacturing semiconductor device

Abstract

Disclosed are a method of manufacturing a semiconductor device and a pattern forming method of manufacturing a semiconductor device. In the pattern forming method for semiconductor device manufacturing, an original pattern for manufacturing a photomask is obtained; a modified original pattern is obtained by performing optical proximity correction on the original pattern; a sub-resolution assist feature (SRAF) seed map with respect to the modified original pattern is obtained, the SRAF seed map indicating a position at which image quality is improved by an SRAF pattern; the SRAF pattern is placed around the original pattern; the SRAF pattern and the modified original pattern are output as mask data; and the mask data is used to manufacture the photomask.

Description

Technical Field

[0001] This disclosure relates to methods for manufacturing semiconductor devices and methods for patterning semiconductor devices. Background Technology

[0002] The electronics industry has experienced a growing demand for smaller and faster electronic devices to support a greater number of increasingly complex and sophisticated functions. Consequently, there is a persistent trend in the semiconductor industry to manufacture low-cost, high-performance, and low-power integrated circuits (ICs). To date, these goals have been largely achieved by shrinking the size of semiconductor ICs (e.g., the smallest feature size), thereby increasing production efficiency and reducing associated costs. However, this shrinkage also increases the complexity of semiconductor manufacturing processes. Therefore, continued advancements in semiconductor ICs and devices require similar advancements in semiconductor manufacturing processes and technologies.

[0003] As just one example, IC size reduction has been achieved by extending the available resolution of a given lithography generation using one or more resolution enhancement technologies (RETs) (e.g., phase shift mask (PSM), off-axis illumination (OAI), optical proximity correction (OPC), and inserting sub-resolution assist features (SRAFs) into the design layout). Several SRAF insertion or placement techniques have been proposed. Some are rule-based and have relatively short turnaround times, but their accuracy is far from ideal. Some use multiple mask optimization iterations to achieve excellent accuracy, but each SRAF insertion exercise takes a long time. Therefore, the existing techniques cannot be proven to be completely satisfactory in all aspects. Summary of the Invention

[0004] According to a first aspect of this disclosure, a patterning method for manufacturing a semiconductor device is provided, comprising: acquiring an original pattern for manufacturing a photomask; obtaining a modified original pattern by performing optical proximity correction on the original pattern; obtaining a sub-resolution auxiliary feature (SRAF) seed map relative to the modified original pattern, the SRAF seed map indicating locations where image quality is improved by the SRAF pattern; placing the SRAF pattern around the original pattern; outputting the SRAF pattern and the modified original pattern as mask data; and using the mask data to manufacture the photomask.

[0005] According to a second aspect of this disclosure, a patterning method for manufacturing a semiconductor device is provided, comprising: acquiring an original pattern for manufacturing a photomask; calculating a sub-resolution auxiliary feature (SRAF) seed map to find candidate locations where placing the SRAF would improve the image slope of an edge of an optical image of the original pattern; placing the SRAF pattern at one or more of the candidate locations; outputting the SRAF pattern and the original pattern as mask data; using the mask data to manufacture the photomask; and using the photomask to form a resist pattern by photolithography.

[0006] According to a third aspect of this disclosure, an apparatus for manufacturing a photomask is provided, comprising: a processor; and a non-transitory computer-readable storage medium storing a program, wherein: when executed by the processor, the program causes the processor to perform the following operations: acquiring an original pattern for manufacturing the photomask; calculating a sub-resolution auxiliary feature (SRAF) seed map to find candidate locations where placing the SRAF improves the image slope of an edge of an optical image of the original pattern; placing the SRAF pattern at one or more of the candidate locations; and outputting the SRAF pattern and the original pattern as mask data. Attached Figure Description

[0007] Various aspects of this disclosure can be best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, according to industry standard practice, the various features are not drawn to scale. In fact, for clarity of discussion, the dimensions of the various features may be arbitrarily enlarged or reduced.

[0008] Figure 1 This is a schematic diagram of the components of an exposure tool according to various aspects of this disclosure.

[0009] Figure 2 This is a flowchart illustrating an embodiment of a method for manufacturing a photomask according to various aspects of this disclosure.

[0010] Figure 3 This is a schematic diagram of the components of an exposure tool according to various aspects of this disclosure.

[0011] Figure 4A and Figure 4B Examples of mask patterns according to various embodiments of the present disclosure are shown.

[0012] Figure 5A , Figure 5B , Figure 5C and Figure 5D A schematic diagram illustrating the acquisition of an SRAF seed map according to various embodiments of the present disclosure is shown.

[0013] Figure 6A , Figure 6B , Figure 6C and Figure 6D A calculated SRAF seed map and SRAF pattern according to an embodiment of the present disclosure are shown.

[0014] Figure 7A , Figure 7B , Figure 7C and Figure 7D Calculated SRAF patterns according to various embodiments of the present disclosure are shown.

[0015] Figure 8A A flowchart illustrating a method for manufacturing semiconductor devices is shown, and Figure 8B , Figure 8C , Figure 8D , Figure 8E and Figure 8F The sequential manufacturing operations of a method for manufacturing a semiconductor device according to embodiments of the present disclosure are illustrated.

[0016] Figure 9A and Figure 9B An apparatus for manufacturing a photolithographic mask for semiconductor circuits according to some embodiments of the present disclosure is shown. Detailed Implementation

[0017] The following disclosure provides numerous different embodiments or examples for implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to simplify this disclosure. Of course, these are merely examples and are not intended to be limiting. For example, in the following description, forming a first feature on or over a second feature can include embodiments in which the first and second features are formed in direct contact, and can also include embodiments in which an additional feature can be formed between the first and second features such that the first and second features do not need to be in direct contact. Furthermore, reference numerals and / or letters may be repeated in various examples throughout this disclosure. Such repetition is for simplicity and clarity and does not in itself indicate a relationship between the various embodiments and / or configurations discussed.

[0018] Spatially related terms (e.g., “below,” “under,” “down,” “above,” “up,” etc.) may be used herein to readily describe the relationship of one element or feature shown in the figures relative to another element(s) or feature(s). These spatially related terms are intended to cover different orientations of the device in use or operation other than those shown in the figures. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially related descriptors used herein shall be interpreted accordingly. In this disclosure, A and B mean A, B, or A and B, and unless otherwise stated, do not mean one from A and one from B.

[0019] This disclosure generally relates to methods for manufacturing photomasks for semiconductor device fabrication and methods for manufacturing semiconductor devices, as well as mask simulation methods, simulation apparatus, and simulation programs. More specifically, this disclosure relates to methods for generating SRAF seed maps for sub-resolution auxiliary feature (SRAF) placement. SRAFs are mask features that are too small to be printed onto a substrate (wafer) in a photolithography process (i.e., below the resolution limit of the photolithography apparatus), but can be shaped and placed on a mask to improve the quality of the photolithographic image on the substrate. Methods for determining the shape and position of SRAFs have received considerable attention. Several SRAF placement techniques have been proposed for SRAF placement. For example, one SRAF placement technique is a rule-based SRAF placement method. In this method, a large number of test patterns and corresponding wafer images are obtained to populate empirical data, and the empirical data is studied and analyzed to establish rules. The SRAF is then placed on the mask according to these rules. Because the SRAF is placed based on a rule table, the turnaround time is short. However, because the test patterns may not represent the actual patterns, the rule-based SRAF placement technique may have unsatisfactory accuracy.

[0020] Another SRAF placement technique is inference mapping lithography (IML). Real-world exposure tools use partially coherent radiation sources, and this partial coherence can be decomposed into the sum of coherent systems (SOCS) by performing a decomposition on the transmission cross coefficient (TCC). In optical physics, TCC represents the autocorrelation between the radiation source of the exposure tool and the projection pupil of the exposure tool. Therefore, TCC is a mathematical representation of the imaging capability of the exposure tool, which includes a set of various exposure conditions of the exposure tool. TCC can be decomposed into a set of characteristic functions (Φ) and a set of eigenvalues ​​(λ). IML only considers the first-order characteristic functions of TCC to determine SRAF placement. Because IML only includes first-order characteristic functions, it may not fully account for the influence of the exposure conditions of the exposure tool, and the accuracy may be less than satisfactory.

[0021] Another SRAF placement technique is called inverse lithography (ILT). ILT gets its name from the fact that it performs lithography in the reverse manner. Instead of calculating an aerial image based on a given mask design, ILT calculates the mask design needed to generate an aerial image of the target. While ILT may offer higher accuracy, its turnaround time can be excessively long and difficult to manage. In some cases, ILT can take more than 300 times longer to complete a rule-based SRAF placement process. This is why ILT is currently primarily used for performing spot repair of masks.

[0022] This disclosure discloses a method for manufacturing semiconductor devices, wherein the placement of SRAFs includes better consideration of exposure conditions of the exposure tool and the effects caused by mask 3D effects. The method according to embodiments of this disclosure considers exposure conditions of the exposure tool, including the illumination intensity of the exposure tool, the numerical aperture of the exposure tool, the depth of focus (DOF), the thickness of the resist stack to be patterned, and / or the range of aberrations. Furthermore, the method of this disclosure may include diffraction components to address polarization caused by mask 3D effects. Because it considers both exposure conditions and mask 3D effects, the method of this disclosure offers better accuracy compared to the aforementioned rule-based SRAF placement techniques and IML techniques.

[0023] IC manufacturing involves multiple entities, such as design firms, mask companies, and IC manufacturers (i.e., wafer fabs). These entities interact with each other throughout the design, development, and manufacturing cycles and / or services associated with manufacturing integrated circuit (IC) devices. These entities are connected via communication networks, which can be a single network or various different networks, such as intranets and the Internet, and can include wired and / or wireless communication channels. Each entity can interact with other entities and can provide services to and / or receive services from other entities. One or more of the design firms, mask companies, and IC manufacturers may have common owners and may even coexist in shared facilities and use shared resources. In various embodiments, a design firm that may include one or more design teams generates IC design layouts. IC design layouts may include various geometric patterns designed for manufacturing IC devices. For example, a geometric pattern may correspond to a pattern of metal, oxide, or semiconductor layers that constitute the various components of the IC device to be manufactured. The various layers together form the various features of the IC device. For example, various parts of an IC design layout may include features such as active regions, gate electrodes, source and drain regions, metal lines or vias for metal interconnects, openings for bonding pads, and other features known in the art to be formed within a semiconductor substrate (e.g., a silicon wafer) and various material layers disposed on the semiconductor substrate. In various examples, a design firm implements a design process to form an IC design layout. The design process may include logic design, physical design, and / or placement and routing. The IC design layout may be presented in one or more data files containing information related to geometric patterns that will be used in the fabrication of the IC device. In some examples, the IC design layout may be expressed in either a Graphical Design System (GDS)-II file format or a Design Framework (DF)-II file format.

[0024] In some cases, a design company can send an IC design layout to a mask company, for example, via the aforementioned network connection. The mask company can then use the IC design layout to generate a mask design (e.g., a first mask design), modify the mask design to form a modified mask design, and fabricate one or more masks for the various layers of an IC device based on the modified mask design. In various examples, the mask company performs mask data preparation, where the IC design layout is converted into a form that can be physically written by a mask writer, and performs mask fabrication, where the design layout prepared by the mask data preparation is modified to generate the modified mask design, and then fabrication is performed. In some embodiments of this disclosure, some of the above operations are performed by the IC manufacturer, not the mask company, particularly when using information from exposure tools.

[0025] Figure 1 The diagram shows the main component planes of an exposure tool (or lithography system). The exposure tool (e.g., an optical stepper and an optical scanner) includes a radiation source (light source), a photomask (mask plate), a pupil plane, and an aerial image of the wafer / substrate. The radiation source (or light source) can be represented as a function S(S(f,g)), where f and g are the coordinates on the plane at the radiation source. The photomask (or photomask) can be represented as a function a(x,y) (or m(x,y)), where x and y are the coordinates on the plane at the photomask. The light (radiation) diffracted from the features on the photomask can be represented as the Fourier transform of the mask function: a(f,g) = FT[a(x,y)]. At the pupil plane, the pupil function is represented as functions P, P(f,g). The complex conjugate of the pupil function is given by the function P*(f,g). The transmission cross coefficient TCC is obtained by the following equation:

[0026] TCC(f1,g1,f2,g2)=∫∫S(f,g)P(f+f1,g+g1)P*(f+f2,g+g2)dedg

[0027] The aerial image I(x,y) is given by the following formula:

[0028]

[0029] In some embodiments, the radiation from the exposure tool can be polarized, and the polarization can be altered by a mask. For example, the radiation from the exposure tool incident on the mask can be polarized in the X direction, and the light diffracted by the mask can be polarized in the Y direction at the pupil. For such a near-field incident and outgoing radiation pair, the first mask function includes the XY component (a 1xy (x,y)), and the XY components represent the simulated interaction between the X-polarized radiation on the mask and the Y-polarized radiation on the pupil. Similarly, for X-polarized incident and X-polarized outgoing radiation, the first mask function includes the XX components (a 1xx (x,y)); For Y-polarized incident radiation and X-polarized outgoing radiation, the first masking function includes the YX component (a1yx(x,y)); For Y-polarized incident radiation and Y-polarized outgoing radiation, the first masking function includes the YY component (a1yx(x,y)); 1yy (x,y)). In the case that the mask design is implemented as an ideal mask, the XX, XY, YX, and YY components are identical. In the case that the first mask design 202 is implemented as a real-world mask with a three-dimensional (3D) mask effect, the XX, XY, YX, and YY components are not identical and should be considered separately.

[0030] Although Figure 1Transmissive photomasks used in excimer laser lithography systems (optical scanners / steppers), such as KrF or ArF, are shown, but extreme ultraviolet (EUV) lithography systems using reflective photomasks can also be represented by the same equation.

[0031] In the above photolithography model, various parameters are specified, including but not limited to the wavelength of the light source, the numerical aperture (NA) of the optical system, information about illumination (e.g., illumination shapes such as ring illumination, multi-polar illumination, etc.), information about lens aberrations, information about light polarization, information about the film stack structure on which the photoresist layer is formed, information about the three-dimensional (3D) effect of the mask, and information about the photoresist layer.

[0032] Figure 2 This is a flowchart of sequential operations 100 for manufacturing a photomask for semiconductor device fabrication according to embodiments of the present disclosure. It should be understood that for other embodiments of the method, [further details may be needed]. Figure 2 Additional operations are provided before, during, and after the process shown, and some of the operations described below can be replaced or eliminated. The order of operations / processes can be interchanged.

[0033] Now for reference Figure 2 Operation 100 includes block S102, in which the optical conditions (parameters) of the photolithography tool are set. In some embodiments, one or more of the above parameters are specified. In some embodiments, the photolithography tool includes a DUV exposure tool with a deep ultraviolet (DUV) radiation source (e.g., a KrF excimer laser or an ArF excimer laser) or an EUV exposure tool with an extreme ultraviolet (EUV) radiation source (e.g., tin droplet laser plasma EUV generation). In some embodiments, the exposure tool may be a DUV exposure tool with immersion lithography capability. Unless the configuration of the exposure tool is intentionally or unintentionally changed, the set of exposure conditions is generally unique to the exposure tool, except for information regarding the photoresist and film structure.

[0034] exist Figure 2 At box S104, it is determined whether a calculated kernel exists for a given set of optical conditions. If the answer is yes, the operation proceeds to box S106. If the answer at S104 is no, the kernel is calculated at box S105 as described below.

[0035] Figure 3 An illustration of a computed TCC kernel according to an embodiment of this disclosure is shown. (As per...) Figure 1The TCC kernel, as explained, is calculated from the radiation source function S(f,g), the pupil function P(f,g), and the complex conjugate of the pupil function P*(f,g). In some implementations, the TCC can be decomposed into eigenvalues ​​of multiple orders (each eigenvalue can be represented as λ). i , where i represents the i-th eigenvalue of TCC) and multiple order eigenfunctions Φ (each eigenfunction can be represented as Φ). i , where i represents the i-th feature function of the TCC. In some embodiments, there are N feature functions and N feature values, where N is an integer and can be between 1 and the number of point sources in the light source. Therefore, the TCC kernel can be represented by the Mecer expansion as follows:

[0036]

[0037] Furthermore, the pupil function P(f,g) is expressed as follows:

[0038]

[0039] Where W(f,g) represents lens aberration, "d" is the defocusing amount, and NA is the numerical aperture. Therefore, the optical image I(x,y) on the wafer is represented as:

[0040]

[0041] Here, m(x,y) is the mask function, which can also be interchangeably described as a(x,y).

[0042] Then, in Figure 2 At frame S106, the original mask pattern (input mask) is obtained. In some embodiments, the target shape of the pattern is also obtained. In some embodiments, the target pattern shape is the same as the original pattern shape, while in other embodiments, the target pattern shape differs from the original pattern, taking into account the CD (critical dimension) tolerance.

[0043] Figure 4A Examples of the original mask pattern (L-shape) and the target pattern shape according to embodiments of the present disclosure are shown. In some embodiments, in Figure 2 At frame S108, an optical proximity correction (OPC) operation is performed on the original mask pattern. In the OPC operation, edges and / or edge segments are moved inward or outward based on the optical proximity effect caused by the pattern itself and / or the surrounding pattern.

[0044] Figure 4BExamples of mask patterns and target pattern shapes following an OPC operation are shown according to embodiments of the present disclosure. In some embodiments, the OPC operation is optional. In other embodiments, the OPC-processed mask pattern is obtained as the original mask pattern, and in this case, OPC is not performed at block S108.

[0045] Then, in Figure 2 At frame S110, an SRAF seed map is generated. Figure 5A A concept diagram is shown, and Figure 5B A flowchart for calculating the SRAF seed graph is shown.

[0046] In some embodiments, Figure 5B At frame S502, an optical image of the original mask pattern 410 with OPC is calculated using the TCC kernel of a given lithography tool. More specifically, the SRAF seed map is obtained by applying a mask function (a) representing the original mask pattern. 1 The mask function is determined by convolution with (x,y) and the TCC kernel. As mentioned above, the mask function includes XY components (a,y) and (x,y) and is determined by convolution with the TCC kernel. 1xy (x,y)), XX component (a 1xx (x,y)), YX component (a 1yx (x,y)) and YY components (a 1yy (x,y)). and (a 1xx The i-th feature function of the TCC interaction (x,y) is defined as With (a) 1xy The i-th feature function of the TCC interaction (x,y) is defined as With (a) 1yx The i-th feature function of the TCC interaction (x,y) is defined as With (a) 1yy The i-th feature function of the TCC interaction (x,y) is defined as

[0047] Then, as Figure 5A As shown, the small dot pattern (unit pattern) 420 is placed at the (x', y') position around the original mask pattern 410, and... Figure 5B At frame S504, optical images of the original mask pattern 410 and unit pattern 420 are calculated using a TCC kernel.

[0048] Then, at block S506, the optical image of only the original mask pattern 410 is compared with the optical image of the combination of the original mask pattern 410 and the unit pattern 420 to determine whether the unit pattern improves the quality of the optical image of the original mask pattern. In some embodiments, when the unit pattern improves the quality of the optical image of the original mask pattern, the amount of improvement is represented as a positive value in the SRAF seed image, and when the unit pattern degrades the quality of the optical image of the original mask pattern, the amount of degradation is represented as a negative value in the SRAF seed image.

[0049] In some embodiments, the quality of the optical image is the slope of the optical image at the edge of the pattern, and the image slope along the edge of the target is compared. Figure 5D The diagram illustrates how the image slope E(x) is determined. If the image slope is improved along the target edge, then location a(x',y') is determined to be a good location for placing the SRAF. In some embodiments, the slope is the image log slope (ILS). In other embodiments, the quality of the optical image is contrast, intensity, and / or focus tolerance (depth of focus). More than one quality of the optical image is used to generate the SRAF seed map.

[0050] Then, at box S508, the position of the unit pattern is changed, and the calculation of the optical image at box S504 and the comparison at box S506 are repeated to find a good position for placing the SRAF pattern. In some embodiments, the repeated placement of the unit pattern and comparison are performed for a given area around the original pattern.

[0051] In some embodiments, the placement of the unit pattern is performed according to a grid or matrix surrounding the original pattern, such as Figure 5C As shown. In some embodiments, the size of the grid (a square) ranges from about 2 nm to about 40 nm (on a wafer). In some embodiments, the total computational area of ​​the unit pattern is the region at a distance L from the original pattern. In some embodiments, the distance L ranges from about 100 nm to about 1,000 nm. In some embodiments, if the distance between a given pattern and an adjacent pattern is less than L, the image calculation of the unit pattern is performed for the region between the given pattern and the adjacent pattern.

[0052] In some embodiments, the SRAF seed graph t(x',y') can be calculated using the following equation:

[0053] t(x′,y′)=∫∫[I x (x,y;x′,y′)+I y (x,y;x′,y′)]dxdy,

[0054] in

[0055]

[0056]

[0057]

[0058]

[0059]

[0060] λ i Φ is the i-th eigenvalue of TCC. i It is the i-th characteristic function of TCC, and

[0061] By applying the above equations, the SRAF seed pattern of a target pattern for a given photolithography tool can be calculated. In some embodiments, the target pattern includes multiple patterns. In some embodiments, the multiple patterns are used for contact (via) holes in the standard cell structure of logic circuits or memory devices. In other embodiments, the multiple patterns are used for wiring patterns of logic circuits.

[0062] Figures 6A-6D The calculation of an SRAF seed map and an SRAF pattern placed according to an embodiment of the present disclosure is illustrated. In this embodiment, the original mask pattern is square, and the target shape is circular, as shown below. Figure 6A As shown. No OPC is applied to the original shape. (As indicated) Figure 6B As shown, the parameters of the photolithography tool are: source radiation wavelength = 193 nm; numerical aperture = 1.35; ring illumination; and defocusing is applied. The parameters also include the application of mask 3D effects and photoresist stacking structures. The original mask pattern is a 50 nm square island pattern (aperture pattern in bright field).

[0063] By applying the above equation to the original pattern, the SRAF seed image is calculated, such as... Figure 6C As shown ( Figure 2 (S110). In the SRAF seed image, bright lines indicate locations where image quality (e.g., the image slope along the edge of the target shape) has been improved.

[0064] like Figure 6CAs shown, the SRAF seed map includes information useful for determining the placement of the SRAF. For example, the SRAF seed map includes a local minimum interference distribution (including intensity and coordinates), a local maximum interference distribution (including intensity and coordinates), and noise (including intensity and coordinates). The local maximum interference distribution may be referred to as the peak interference distribution, while the local minimum interference distribution may be referred to as the valley interference distribution. In some cases, both the peak and valley interference distributions include components extending parallel to adjacent mask features, and the noise may include components extending perpendicular to adjacent mask features. Therefore, further processes are needed to eliminate or reduce the noise level and enhance the signal strength of the peak and valley interference distributions. In some embodiments, high-pass filtering, band-pass filtering, or low-pass filtering can be used to remove noise and improve the resolution of the peak and valley interference distributions. If the noise level is not reduced, an SRAF extending perpendicularly from the mask features may be generated. Such an SRAF does not improve accuracy and may also introduce defects in the aerial image. The SRAF map includes not only the placement of the SRAF but also the polygonal shape of the SRAF. Therefore, further processes are needed to determine the polygonal shape and size of the SRAF. For example, after filtering the SRAF seed map to remove noise and improve resolution, a polygon shape of appropriate size can be placed on or around the peaks in the filtered SRAF seed map. One or more processes for determining the polygon shape and size of the SRAF can also be referred to as processes(one or more) for growing the SRAF. Based on the foregoing, in some embodiments, such further processes include operations for reducing noise and operations for superimposing polygon shapes based on peak and valley interference distributions.

[0065] According to some embodiments of this disclosure, the non-ideal characteristics of real-world masks are also considered in the SRAF diagram calculation. An ideal mask comprises an infinitesimally small thickness and is capable of completely blocking incident radiation. Due to the complete blocking of incident radiation and the infinitesimally small thickness, the radiation amplitude passing through an ideal mask comprises a step function. When an ideal mask blocks incident radiation, the radiation amplitude drops to zero (0%). When an ideal mask allows incident radiation to pass through mask openings, the radiation amplitude increases to the full amplitude of the incident radiation (100%).

[0066] However, in reality, masks have at least a finite thickness and cannot completely block radiation. In some cases, real-world masks can be set on glass substrates. The finite thickness and non-ideal radiation blocking ability of real-world masks can produce non-ideal radiation amplitudes. These non-ideal characteristics can be generally referred to as mask three-dimensional (3D) effects. While the above explanation applies to transmission masks, similar ideal and non-ideal behaviors can be observed in reflection masks. An ideal reflection mask consists of a perfectly reflective pattern defined on a perfectly absorbing surface. Furthermore, radiation is reflected only on the topmost surface and does not penetrate into the mask. A real-world reflection mask consists of a partially reflective pattern defined on a partially absorbing surface. In terms of penetration, radiation can penetrate to a depth of one or more layers on a real-world reflection mask and can be reflected by layers other than the topmost layer.

[0067] Because radiation is an electromagnetic wave, Maxwell's equations can be used to calculate the 3D effect of the mask. These equations include Gauss's law:

[0068]

[0069] Gauss's Law of Magnetism Maxwell-Faraday equations

[0070]

[0071] Ampere's Circuit Law

[0072]

[0073] In some embodiments, the mask 3D effect can be approximated using a simplified solution to Maxwell's equations. For example, while SRAFs placed on the mask may also contribute to the mask 3D effect, their contribution is less than their contribution to the master mask pattern. A simplified solution to Maxwell's equations can reduce the mask 3D effect contributed by SRAFs. This simplification can significantly reduce the complexity of calculating the mask 3D effect. Solutions or simplified solutions to Maxwell's equations can be used to modify the mask function to account for the mask 3D effect. The mask 3D effect can be represented as one or more functions M. In some implementations, the mask 3D effect can be decomposed into X diffraction components (M). xx ), XY diffraction components (M xy ), YX diffraction components (M yx ), and YY diffraction components (M yy ).

[0074] In some embodiments, it is assumed that the original mask design is implemented as a real-world mask affected by mask 3D effects, and its mask function can be expressed as (a M (x,y)). Mask function (aM (x,y) includes XX components (a Mxx (x,y)), XY components (a Mxy (x,y)), YX component (a Myx (x,y)) and YY components (a Myy (x,y)). XX component (a Mxx (x,y)), XY components (a Mxy (x,y)), YX component (a Myx (x,y)) and YY components (a Myy (x,y) can be obtained by performing a Fourier transform on the corresponding diffraction components:

[0075] a Mxx (x, y) = FT(M) xx ),

[0076] a Mxy (x, y) = FT(M) xy ),

[0077] a Myx (x, y) = FT(M) yx ),

[0078] a Myy (x, y) = FT(M) yy ).

[0079] Unlike the corresponding components of the assumed ideal mask, the mask function a M The XX, XY, YX, and YY components of (x,y) are distinct from each other and are considered individually.

[0080] Based on the SRAF seed map, in Figure 2 At frame S112, place one or more SRAF patterns around the original mask pattern, such as... Figure 6D As shown. In some embodiments, when the SRAF placement location indicated by the SRAF seed map is closer to the original pattern than a threshold distance, the SRAF is not placed at such a location. In some embodiments, the threshold is determined based on one or more of the pattern size of the original pattern, the distance to adjacent patterns, optical conditions including resolution limitations, and / or values ​​in the SRAF seed map. Similarly, in some embodiments, when the SRAF placement location indicated by the SRAF seed map is too far from the original pattern (much greater than the threshold distance), the SRAF is not placed at such a location.

[0081] In some embodiments, the SRAF pattern is placed at a location in the SRAF seed image where the value is positive (indicating an improvement in image quality). In other embodiments, the SRAF pattern is placed at a location in the SRAF seed image where the value is equal to or greater than a threshold.

[0082] The combination of the original pattern and the SRAF pattern is output as a modified mask layout design. In some embodiments, the modified mask layout design is obtained by placing the SRAF pattern in the SRAF image on the original mask design by overlaying the SRAF image onto the original mask design.

[0083] Then, in some embodiments, in Figure 2 At box S114, an additional OPC operation is performed. This additional OPC operation is optional, and in some embodiments, it is not performed.

[0084] In addition, Figure 2 At box S116, a mask rule check is performed to determine if any patterns, including the original mask pattern and the SRAF pattern, violate design rules such as minimum distance (separation), minimum size, etc. If any violation is found, one or more violating patterns are modified automatically or manually.

[0085] Next, the final mask layout design will be determined. Figure 2 At frame S118, the output mask design is used to manufacture the photomask, and the photomask is manufactured according to the mask design.

[0086] Figures 7A-7D The SRAF calculation results according to other embodiments are shown. Figure 7A In this process, the parameters of the photolithography tool are: source radiation wavelength = 13.5 nm; numerical aperture = 0.33; non-polarized; annular illumination; and no lens aberrations. The parameters also include the application of 3D mask effects and photoresist stacking structures. The original mask pattern is a 50 nm square island pattern (aperture pattern in bright field). Compared with... Figure 6D The high NA illumination and polarization conditions shown ( Figure 6D Unlike circular or frame-shaped SRAF patterns, SRAF is a discontinuous arc pattern set around the original pattern under low NA illumination and without polarization.

[0087] exist Figure 7B In this process, the parameters of the photolithography tool are: source radiation wavelength = 193 nm; numerical aperture = 1.35; TE (lateral electrical) polarization; quadrupole illumination; and no lens aberrations. The parameters also include the application of 3D mask effects and photoresist stacking structures. The original mask pattern is a 50 nm square island pattern (aperture pattern in bright field). (Compared to...) Figure 6B and Figure 7AThe situation is different under ring lighting. Under quadruple illumination, some SRAF patterns are arcs that bulge towards the original pattern.

[0088] exist Figure 7C In this process, the parameters of the photolithography tool are: source radiation wavelength = 13.5 nm; numerical aperture = 0.33; non-polarized; quadrupole illumination; and no lens aberrations. The parameters also include the application of mask 3D effects and photoresist stacking structures. The original mask pattern is a 50 nm square island pattern (aperture pattern in bright field). Under quadrupole illumination with low NA, a discontinuous SRAF pattern is formed around the original pattern.

[0089] exist Figure 7D In this process, the parameters of the photolithography tool are: source radiation wavelength = 193 nm; numerical aperture = 1.35; TE polarized illumination; ring illumination; and no lens aberrations. The parameters also include the application of mask 3D effects and photoresist stacking structures. The original mask pattern is an OPC-based pattern of an L-shaped pattern. A serif pattern is added to the corners of the L-shaped pattern. The original L-shaped pattern has a width of 50 nm, a long side of 300 nm, and a short side of 135 nm in bright field. Figure 7D The diagram shows SRAF patterns for the original L-shape (white) and the L-shape (gray) after OPC. Different SRAF patterns can be obtained by performing OPC before calculating the SRAF seed map (and placing the SRAF pattern).

[0090] Figure 8A A flowchart illustrating a method for manufacturing semiconductor devices is shown. Figure 8B , Figure 8C , Figure 8D and Figure 8E The sequential manufacturing operations of a method for manufacturing a semiconductor device according to embodiments of the present disclosure are illustrated. A semiconductor substrate or other suitable substrate is provided to be patterned to form an integrated circuit thereon. In some embodiments, the semiconductor substrate comprises silicon. Alternatively or additionally, the semiconductor substrate comprises germanium, silicon-germanium, or other suitable semiconductor materials, such as group III-V semiconductor materials. Figure 8A At S801, a target layer to be patterned is formed on a semiconductor substrate. In some embodiments, the target layer is a semiconductor substrate. In some embodiments, the target layer includes a conductive layer, such as a metal layer or a polysilicon layer; a dielectric layer, such as silicon oxide, silicon nitride, SiON, SiOC, SiOCN, SiCN, hafnium oxide, or aluminum oxide; or a semiconductor layer, such as an epitaxially formed semiconductor layer. In some embodiments, the target layer is formed on an underlying structure such as an isolation structure, a transistor, or wiring. Figure 8A At S802, a photoresist layer is formed on top of the target layer, such as... Figure 8BAs shown. During subsequent photolithography exposure processes, the photoresist layer is sensitive to radiation from the exposure source. The photoresist layer can be formed on the target layer by spin coating or other suitable techniques. The coated photoresist layer can be further baked to remove the solvent from the photoresist layer.

[0091] exist Figure 8A At point S803, the photoresist layer is patterned using an optical lithography tool. In some embodiments, the optical lithography tool is an ArF or KrF excimer laser scanner using a transmission mask, such as... Figure 8C As shown. The transmission mask includes the SRAF pattern as described above. In other embodiments, the optical lithography tool is an EUV scanner using a reflective mask including the SRAF pattern, such as... Figure 8D As shown. During the exposure process, an integrated circuit (IC) design pattern defined on the mask is imaged onto a photoresist layer to form a latent pattern thereon, without printing the SRAF pattern.

[0092] Patterning the photoresist layer also includes developing the exposed photoresist layer to form a patterned photoresist layer with one or more openings. In one embodiment where the photoresist layer is a positive photoresist layer, the exposed portions of the photoresist layer are removed during the development process. Patterning the photoresist layer may also include other process steps, such as various baking steps at different stages. For example, a post-exposure baking (PEB) process can be performed after the photolithography exposure process and before the development process.

[0093] exist Figure 8A At S804, a patterned photoresist layer is used as an etching mask to pattern the target layer, such as... Figure 8E As shown. In some embodiments, patterning the target layer includes applying an etching process to the target layer using a patterned photoresist layer as an etching mask. The portion of the target layer exposed within the openings of the patterned photoresist layer is etched, while the remaining portion is protected from etching. Furthermore, the patterned photoresist layer can be removed by wet stripping or plasma ashing, such as... Figure 8F As shown.

[0094] Figure 9A and Figure 9B The fabrication of a photolithographic mask for semiconductor circuits is illustrated according to some embodiments of the present disclosure. In some embodiments, the apparatus is an optical simulator.

[0095] Figure 9AThis is a schematic diagram of a computer system executing a process for manufacturing a photomask according to one or more embodiments described above. All or part of the processes, methods, and / or operations of the foregoing embodiments can be implemented using computer hardware and computer programs executed thereon. As described above, these operations include OPC correction, TCC kernel calculation, SRAF seed map calculation, SRAF placement, etc. Figure 9A In the computer system 1100, a computer 1101 is provided, which includes an optical disc read-only memory (e.g., CD-ROM or DVD-ROM) drive 1105 and a disk drive 1106, a keyboard 1102, a mouse 1103 and a monitor 1104.

[0096] Figure 9B This is a diagram illustrating the internal configuration of computer system 1100. In addition to optical disc drive 1105 and hard disk drive 1106, computer 1101 also includes one or more processors 1111 (e.g., microprocessor unit (MPU)), ROM 1112 (where programs such as boot programs are stored), random access memory (RAM) 1113 (connected to MPU 1111, where application commands are temporarily stored, and where temporary storage areas are provided), hard disk 1114 (where application programs, system programs, and data are stored), and bus 1115 (connected to MPU 1111, ROM 1112, etc.). Note that computer 1101 may include a network interface card (NIC) (not shown) for providing a connection to a LAN.

[0097] The program used to enable computer system 1100 to perform the process of calculating the SRAF seed map and placing the SRAF pattern in the above embodiments can be stored on optical disc 1121 or disk 1122 (which is inserted into optical disc drive 1105 or disk drive 1106) and can be transferred to hard disk 1114. Alternatively, the program can be transferred to computer 1101 via a network (not shown) and stored in hard disk 1114. During execution, the program is loaded into RAM 1113. The program can be loaded from optical disc 1121 or disk 1122, or directly from the network. The program does not necessarily have to include, for example, an operating system (OS) or a third-party program for enabling computer 1101 to perform the process of manufacturing a photolithographic mask for the semiconductor device in the foregoing embodiments. The program may only include a command portion for invoking appropriate functions (modules) in controlled mode and obtaining the desired results.

[0098] The embodiments of this disclosure offer advantages over the prior art; however, it should be understood that other embodiments may offer different advantages, and not all advantages need to be discussed herein, nor are specific advantages required in all embodiments. By including eigenvalues ​​and eigenfunctions of all orders of TCC in the kernel calculation, the method according to embodiments of this disclosure considers the exposure conditions of the exposure tool, including the illumination intensity of the exposure tool, the numerical aperture of the exposure tool, the depth of focus (DOF), the thickness of the resist stack to be patterned, or the range of aberrations. Furthermore, the method of this disclosure may include diffraction components to address polarization caused by three-dimensional (3D) mask effects. Because it considers both exposure conditions and mask 3D effects, the method of this disclosure has better accuracy than conventional rule-based SRAF placement techniques. Furthermore, using image slope as a factor in determining the SRAF pattern position allows for more efficient placement of SRAF patterns, thereby improving overall lithography quality. This embodiment can also improve image quality at specific locations because the input mask and target can be different. For example, if a weak point (which may be called a hotspot) is found, a heavier weight is placed around the weak point to improve the image quality at that point. Because this embodiment involves image computation with / without unit patterns and qualitatively evaluates image quality improvements, the SRAF seed map qualitatively illustrates the impact of SRAFs on the target. In this way, it becomes clear which SRAF locations are more important than others. An additional benefit is the ability to specify the image slope to be improved. While it may be empirically known that increasing image intensity can (indirectly) improve image slope, this embodiment directly shows SRAF locations that contribute to improving image slope.

[0099] According to one aspect of this disclosure, in a patterning method for manufacturing a semiconductor device, an original pattern for manufacturing a photomask is obtained; a modified original pattern is obtained by performing optical proximity correction on the original pattern; a sub-resolution auxiliary feature (SRAF) seed map relative to the modified original pattern is obtained, the SRAF seed map indicating the locations where image quality is improved by the SRAF pattern; the SRAF pattern is placed around the original pattern; the SRAF pattern and the modified original pattern are output as mask data; and the mask data is used to manufacture a photomask. In one or more of the foregoing and the following embodiments, another optical proximity correction is performed on the SRAF pattern and the modified original pattern. The mask data includes the SRAF pattern with the other optical proximity correction performed and the modified original pattern. In one or more of the foregoing and the following embodiments, a design rule check operation is performed on the SRAF pattern and the modified original pattern. In one or more of the foregoing and the following embodiments, one or more of the SRAF pattern or the modified original pattern is modified after the design rule check operation. In one or more of the foregoing and following embodiments, when obtaining the SRAF seed map, a location is found where placing the cell pattern improves the image quality of the modified original pattern. In one or more of the foregoing and following embodiments, the image quality includes the image slope of the edges of the modified original pattern. In one or more of the foregoing and following embodiments, the cell pattern is a square with a size of 2 nm to 40 nm.

[0100] According to another aspect of this disclosure, in a pattern forming method, an original pattern for fabricating a photomask is obtained: a sub-resolution auxiliary feature (SRAF) seed map is calculated to find candidate locations where placing the pattern improves the image slope of the edges of an optical image of the original pattern; the SRAF pattern is placed at one or more of the candidate locations; the SRAF pattern and the original pattern are output as mask data; the mask data is used to fabricate a photomask; and a resist pattern is formed using the photomask via photolithography. In one or more of the foregoing and the following embodiments, calculating the SRAF seed map includes calculating the SRAF seed map according to the following equation:

[0101] t(x′,y′)=∫∫[I x (x,y;x′,y′)+I y (x,y;x′,y′)]dxdy,

[0102] in

[0103]

[0104]

[0105]

[0106]

[0107]

[0108] λ i It is the i-th eigenvalue of the transmission cross coefficient (TCC), Φ i It is the i-th characteristic function of the TCC, W(x,y) represents the lens aberration, and Here, FT stands for Fourier Transform.

[0109] In one or more of the foregoing and following embodiments, a modified original pattern is obtained by performing optical proximity correction on the original pattern. The SRAF seed map is obtained relative to the modified original pattern. In one or more of the foregoing and following embodiments, another optical proximity correction is performed on the SRAF pattern and the modified original pattern. The mask data includes the SRAF pattern and the modified original pattern after the other optical proximity correction has been performed. In one or more of the foregoing and following embodiments, a design rule check operation is performed on the SRAF pattern and the modified original pattern. In one or more of the foregoing and following embodiments, positions with positive values ​​in the SRAF seed map indicate candidate positions. In one or more of the foregoing and following embodiments, one or more positions with positive values ​​are selected, and the SRAF pattern is placed at the selected positions. No SRAF pattern is placed at at least one of the unselected positions with positive values.

[0110] According to another aspect of this disclosure, an apparatus for manufacturing a photomask includes: a processor; and a non-transitory computer-readable storage medium storing a program. When executed by the processor, the program causes the processor to perform the following operations: acquire an original pattern for manufacturing the photomask; calculate a sub-resolution auxiliary feature (SRAF) seed map to find candidate locations where placing the pattern improves the image slope of the edges of an optical image of the original pattern; place the SRAF pattern at one or more of the candidate locations; and output the SRAF pattern and the original pattern as mask data. In one or more of the foregoing and the following embodiments, calculating the SRAF seed map includes calculating the SRAF seed map according to the following equation:

[0111] t(x′,y′)=∫∫[I x (x,y;x′,y′)+I y (x,y;x′,y′)]dxdy,

[0112] in

[0113]

[0114]

[0115]

[0116]

[0117]

[0118] λ i It is the i-th eigenvalue of the transmission cross coefficient (TCC), Φ i It is the i-th characteristic function of the TCC, W(x,y) represents the lens aberration, and Here, FT stands for Fourier Transform.

[0119] In one or more of the foregoing and following embodiments, the executed program further causes the processor to perform the following operations: obtain a modified original pattern by performing optical proximity correction on the original pattern, and the SRAF seed map is obtained relative to the modified original pattern. In one or more of the foregoing and following embodiments, the executed program further causes the processor to perform the following operations: perform another optical proximity correction on the SRAF pattern and the modified original pattern, and the mask data includes the SRAF pattern with the other optical proximity correction performed and the modified original pattern. In one or more of the foregoing and following embodiments, the executed program further causes the processor to perform the following operations: select one or more, but not all, of the candidate locations indicated in the SRAF seed map. In one or more of the foregoing and following embodiments, the selection of one or more locations is performed based on distance from the original pattern.

[0120] The foregoing has outlined features of several embodiments to enable those skilled in the art to better understand various aspects of this disclosure. Those skilled in the art should understand that they can readily use this disclosure as a basis for designing or modifying other processes and structures to achieve the same purposes and / or the same advantages of the embodiments described herein. Those skilled in the art should also recognize that such equivalent constructions do not depart from the spirit and scope of this disclosure, and that various changes, substitutions, and modifications can be made herein without departing from the spirit and scope of this disclosure.

[0121] Example

[0122] Example 1. A patterning method for manufacturing a semiconductor device, comprising: acquiring an original pattern for manufacturing a photomask; obtaining a modified original pattern by performing optical proximity correction on the original pattern; obtaining a sub-resolution auxiliary feature (SRAF) seed map relative to the modified original pattern, the SRAF seed map indicating locations where image quality is improved by the SRAF pattern; placing the SRAF pattern around the original pattern; outputting the SRAF pattern and the modified original pattern as mask data; and using the mask data to manufacture the photomask.

[0123] Example 2. The pattern forming method according to Example 1 further includes: performing another optical proximity correction on the SRAF pattern and the modified original pattern, wherein the mask data includes the SRAF pattern and the modified original pattern after the other optical proximity correction has been performed.

[0124] Example 3. The pattern forming method according to Example 1 further includes: performing a design rule check operation on the SRAF pattern and the modified original pattern.

[0125] Example 4. The pattern forming method according to Example 3, wherein one or more of the SRAF pattern or the modified original pattern are modified after the design rule check operation.

[0126] Example 5. According to the pattern forming method of Example 1, obtaining the SRAF seed image includes: finding a position where placing the unit pattern can improve the image quality of the modified original pattern.

[0127] Example 6. The pattern forming method according to Example 5, wherein the image quality includes the image slope of the edges of the modified original pattern.

[0128] Example 7. The pattern forming method according to Example 5, wherein the unit pattern is a square with a size of 2 nm to 40 nm.

[0129] Example 8. A patterning method for manufacturing a semiconductor device, comprising: acquiring an original pattern for manufacturing a photomask; calculating a sub-resolution auxiliary feature (SRAF) seed map to find candidate locations where placing the SRAF would improve the image slope of an edge of an optical image of the original pattern; placing the SRAF pattern at one or more of the candidate locations; outputting the SRAF pattern and the original pattern as mask data; using the mask data to manufacture the photomask; and using the photomask to form a resist pattern by photolithography.

[0130] Example 9. The pattern forming method according to Example 8, wherein calculating the SRAF seed map includes calculating the SRAF seed map according to the following equation:

[0131] t(x′,y′)=∫∫[I x (x,y;x′,y′)+I y (x,y;x′,y′)]dxdy,

[0132] in

[0133]

[0134]

[0135]

[0136]

[0137]

[0138] λ i It is the i-th eigenvalue of the transmission cross coefficient (TCC), Φ i It is the i-th characteristic function of the TCC, W(x,y) represents the lens aberration, and Here, FT stands for Fourier Transform.

[0139] Example 10. The pattern forming method according to Example 9 further includes: obtaining a modified original pattern by performing optical proximity correction on the original pattern, wherein the SRAF seed map is obtained relative to the modified original pattern.

[0140] Example 11. The pattern forming method according to Example 10 further includes: performing another optical proximity correction on the SRAF pattern and the modified original pattern, wherein the mask data includes the SRAF pattern and the modified original pattern after the other optical proximity correction has been performed.

[0141] Example 12. The pattern forming method according to Example 11 further includes: performing a design rule check operation on the SRAF pattern and the modified original pattern.

[0142] Example 13. The pattern forming method according to Example 9, wherein, in the SRAF seed map, positions with positive values ​​indicate the candidate positions.

[0143] Example 14. The pattern forming method according to Example 13 further includes: selecting one or more locations having the positive value, and placing the SRAF pattern at the selected locations, wherein the SRAF pattern is not placed at at least one of the unselected locations having the positive value.

[0144] Example 15. An apparatus for manufacturing a photomask, comprising: a processor; and a non-transitory computer-readable storage medium storing a program, wherein: when executed by the processor, the program causes the processor to perform the following operations: acquiring an original pattern for manufacturing the photomask; calculating a sub-resolution auxiliary feature (SRAF) seed map to find candidate locations where placing the SRAF improves the image slope of an edge of an optical image of the original pattern; placing the SRAF pattern at one or more of the candidate locations; and outputting the SRAF pattern and the original pattern as mask data.

[0145] Example 16. The apparatus according to Example 15, wherein calculating the SRAF seed map comprises calculating the SRAF seed map according to the following equation:

[0146] t(x′,y′)=∫∫[I x (x,y;x′,y′)+I y (x,y;x′,y′)]dxdy,

[0147] in

[0148]

[0149]

[0150]

[0151]

[0152]

[0153] λ i It is the i-th eigenvalue of the transmission cross coefficient (TCC), Φ i It is the i-th characteristic function of the TCC, W(x,y) represents the lens aberration, and Here, FT stands for Fourier Transform.

[0154] Example 17. The apparatus according to Example 16, wherein: the executed program further causes the processor to perform the following operations: to obtain a modified original pattern by performing optical proximity correction on the original pattern, and the SRAF seed map is obtained relative to the modified original pattern.

[0155] Example 18. The apparatus according to Example 17, wherein: the executed program further causes the processor to perform the following operations: perform another optical proximity correction on the SRAF pattern and the modified original pattern, and the mask data includes the SRAF pattern and the modified original pattern after the other optical proximity correction has been performed.

[0156] Example 19. The apparatus according to Example 16, wherein the executed program further causes the processor to perform the following operation: select one or more, but not all, of the candidate locations indicated in the SRAF seed map.

[0157] Example 20. The apparatus according to Example 19, wherein the selection of the one or more positions is performed based on the distance from the original pattern.

Claims

1. A patterning method for manufacturing semiconductor devices, comprising: Obtain the original pattern used to manufacture the photomask; The modified original pattern is obtained by performing optical proximity correction on the original pattern; Obtain a sub-resolution auxiliary feature seed map relative to the modified original pattern, the sub-resolution auxiliary feature seed map indicating where image quality is improved by the sub-resolution auxiliary feature pattern, wherein obtaining the sub-resolution auxiliary feature seed map includes finding the location where the placement of the unit pattern can improve the image quality of the modified original pattern, and wherein the image quality includes the image slope of the edges of the modified original pattern; Subresolution auxiliary feature patterns are placed around the original pattern; Perform a design rule check operation on the sub-resolution auxiliary feature pattern and the modified original pattern; Output the sub-resolution auxiliary feature pattern and the modified original pattern as mask data; and The photomask is manufactured using the mask data.

2. The pattern forming method according to claim 1, further comprising: Another optical proximity correction is performed on the sub-resolution auxiliary feature pattern and the modified original pattern. The mask data includes the sub-resolution auxiliary feature pattern after the other optical proximity correction has been performed and the modified original pattern.

3. The pattern forming method according to claim 1, wherein, One or more of the sub-resolution auxiliary feature pattern or the modified original pattern are modified after the design rule check operation.

4. The pattern forming method according to claim 1, wherein, The unit pattern is a square with a size ranging from 2nm to 40nm.

Images