High electron mobility transistor and method of making the same

Abstract

A high electron mobility transistor and a manufacturing method thereof are disclosed. The high electron mobility transistor includes a substrate, a channel layer disposed on the substrate, and an active layer disposed on the channel layer. The active layer includes a P-type aluminum gallium nitride layer. A P-type gallium nitride gate is disposed on the active layer. A source electrode and a drain electrode are disposed on the active layer.

Description

Technical Field

[0001] This invention relates to a high electron mobility transistor in which a P-type dopant is added to the active layer to increase the threshold voltage. Background Technology

[0002] III-V semiconductor compounds, due to their semiconductor properties, can be used to form many types of integrated circuit devices, such as high-power field-effect transistors (FETs), high-frequency transistors, or high electron mobility transistors (HEMTs). In HEMTs, two semiconductor materials with different band gaps are combined to form a heterojunction, providing a channel for charge carriers. In recent years, gallium nitride (GaN) series materials have become suitable for high-power and high-frequency products due to their wide band gap and high saturation velocity. GaN series HEMTs generate a two-dimensional electron gas (2DEG) through the piezoelectric effect of the material itself. Compared to traditional transistors, HEMTs have higher electron velocity and density, thus increasing switching speed.

[0003] For normally-off high electron mobility transistors, a P-type gallium nitride gate is often used to form a depletion region in the channel layer to increase the threshold voltage. However, when the P-type doping concentration in the P-type gallium nitride gate is too high, leakage current will be generated from the gate electrode and flow to the channel layer. Summary of the Invention

[0004] In view of this, the present invention provides a novel superlattice structure to solve the above problems.

[0005] According to a preferred embodiment of the present invention, a high electron mobility transistor includes a substrate, a channel layer disposed on the substrate, an active layer disposed on the channel layer, wherein the active layer includes a P-type aluminum gallium nitride layer, a P-type gallium nitride gate disposed on the active layer, and a source electrode and a drain electrode disposed on the active layer.

[0006] According to another preferred embodiment of the present invention, a method for fabricating a high electron mobility transistor includes first providing a substrate, forming a channel layer on the substrate, then forming an active layer on the channel layer, wherein the active layer includes a P-type aluminum gallium nitride layer, then forming a P-type gallium nitride gate disposed on the active layer, and finally forming a source electrode and a drain electrode disposed on the active layer.

[0007] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. However, the following preferred embodiments and drawings are for reference and illustration only and are not intended to limit the present invention. Attached Figure Description

[0008] Figure 1 A schematic diagram illustrating a high electron mobility transistor according to a first preferred embodiment of the present invention;

[0009] Figure 2 The illustration is for a preferred embodiment of the present invention. Figure 1 The concentration distribution of P-type dopant in the P-type gallium nitride gate, active layer, and channel layer is shown along the tangent AA'.

[0010] Figure 3 Illustration for another preferred embodiment of the present invention Figure 1 The concentration distribution of P-type dopant in the P-type gallium nitride gate, active layer, and channel layer is shown along the tangent AA'.

[0011] Figure 4 Illustration for yet another preferred embodiment of the present invention Figure 1 The concentration distribution of P-type dopant in the P-type gallium nitride gate, active layer, and channel layer is shown along the tangent AA'.

[0012] Figure 5 A schematic diagram illustrating a high electron mobility transistor according to a second preferred embodiment of the present invention;

[0013] Figure 6 The illustration is for a preferred embodiment of the present invention. Figure 5 The concentration distribution of P-type dopant in the P-type gallium nitride gate, active layer, and channel layer is shown along the tangent BB'.

[0014] Figure 7 Illustration for another preferred embodiment of the present invention Figure 5 The concentration distribution of P-type dopant in the P-type gallium nitride gate, active layer, and channel layer is shown along the tangent BB'.

[0015] Figure 8 This is a schematic diagram illustrating a method for fabricating a high electron mobility transistor according to a preferred embodiment of the present invention;

[0016] Figure 9 This is a schematic diagram illustrating a method for fabricating a high electron mobility transistor according to another preferred embodiment of the present invention.

[0017] Explanation of main component symbols

[0018] 10: Base

[0019] 12: Nucleation layer

[0020] 14: Channel Layer

[0021] 16: Active (Powered) Layer

[0022] 17: Protective layer

[0023] 18: P-type gallium nitride gate

[0024] 18a: P-type gallium nitride layer

[0025] 20: Source electrode

[0026] 22: Drain electrode

[0027] 24: Two-dimensional electronic gas

[0028] 100: Normally Off High Electron Mobility Transistor

[0029] 116: Active Layer

[0030] 116a: P-type aluminum gallium nitride layer

[0031] 116b: Undoped aluminum gallium nitride layer

[0032] 200: Normally Off High Electron Mobility Transistor

[0033] 216: Undoped aluminum gallium nitride layer

[0034] 316: P-type aluminum gallium nitride layer

[0035] W1: Width

[0036] W2: Width Detailed Implementation

[0037] Figure 1 A high electron mobility transistor is illustrated according to a first preferred embodiment of the present invention.

[0038] like Figure 1As shown, a normally off high electron mobility transistor 100 includes a substrate 10, a nucleation layer 12 disposed on the substrate 10, a channel layer 14 disposed on the nucleation layer 12, and an active layer 16 disposed on and in contact with the channel layer 14. The active layer 16 is a P-type aluminum gallium nitride layer, which is an aluminum gallium nitride layer with P-type dopant. The aforementioned P-type dopant includes C, Mg, Zn, or Fe; in this embodiment, Mg is preferred. Furthermore, a P-type gallium nitride gate 18 is disposed on the active layer 16, a protective layer 17 is disposed on both sides of the active layer 16 on the P-type gallium nitride gate 18, a source electrode 20, and a drain electrode 22 are disposed on the active layer 16. A two-dimensional electron gas (2DEG) 24 is formed in the channel layer 14 not covered by the P-type gallium nitride gate 18. The channel layer 14 comprises gallium nitride, aluminum nitride, indium nitride, aluminum gallium nitride, gallium indium nitride, or aluminum indium nitride. In this embodiment, the channel layer 14 is preferably gallium nitride.

[0039] Figure 2 A preferred embodiment of the invention is illustrated. Figure 1 The concentration distribution of P-type dopant in the P-type gallium nitride gate, active layer, and channel layer is shown along the tangent AA'. Figure 3 Illustration for another preferred embodiment of the invention Figure 1 The concentration distribution of P-type dopant in the P-type gallium nitride gate, active layer, and channel layer is shown along the tangent AA'. Figure 4 Illustration for yet another preferred embodiment of the present invention Figure 1 The concentration distribution of P-type dopant in the P-type gallium nitride gate, active layer, and channel layer is shown along the tangent AA'.

[0040] like Figure 1 and Figure 2 As shown, the P-type dopant concentration in the P-type aluminum gallium nitride (GaN) layer decreases gradually towards the channel layer 14, meaning the P-type dopant concentration varies at different depths within the P-type GaN layer. The P-type dopant concentration in the GaN gate 18 is higher than that in the active layer 16. Furthermore, the P-type dopant in the GaN gate 18 and the active layer 16 are of the same element, such as Mg. There is no P-type dopant in the channel layer 14, but in different embodiments, the channel layer 14 may contain a small amount of P-type dopant diffused from the active layer 16. Moreover, the P-type dopant concentration in the active layer 16 is between 1E16 atoms / cm². 3 Up to 1E19 atoms / cm 3The concentration of P-type dopant in the active layer 16 can be between 5% and 20% of the concentration of P-type dopant in the P-type gallium nitride gate 18. According to a preferred embodiment of the present invention, the concentration of P-type dopant in the active layer 16 is between 6% and 12% of the concentration of P-type dopant in the P-type gallium nitride gate 18.

[0041] like Figure 3 As shown, the P-type dopant concentration in the active layer 16 decreases in a stepwise manner towards the channel layer 14. Specifically, in this embodiment, the same P-type dopant concentration exists at all depths in the active layer 16. Other element characteristics, such as the range of P-type dopant concentration and dopant type in the active layer 16, are also consistent with... Figure 2 The situation is the same as in [the previous case], so I will not repeat it here.

[0042] like Figure 4 As shown, the P-type dopant concentration in the active layer 16 decreases in a stepwise manner towards the channel layer 14. Different depth ranges in the active layer 16 correspond to different P-type dopant concentrations. Specifically, in this embodiment, there are two depth ranges, each corresponding to a fixed P-type dopant concentration. Other component details, such as the P-type dopant concentration range and dopant type in the active layer 16, are similar to... Figure 2 The situation is the same as in [the previous case], so I will not repeat it here.

[0043] Figure 5 This is a high electron mobility transistor illustrated according to a second preferred embodiment of the present invention, wherein components having the same function will use the component designations from the first preferred embodiment. For example... Figure 5 As shown, the difference between the normally-off high electron mobility transistor 200 of the second preferred embodiment and the normally-off high electron mobility transistor 100 of the first preferred embodiment is that the active layer 116 of the normally-off high electron mobility transistor 200 in the second preferred embodiment simultaneously includes a P-type aluminum gallium nitride layer 116a and an undoped aluminum gallium nitride layer 116b, while the active layer 16 in the first preferred embodiment is only a P-type aluminum gallium nitride layer. Please continue reading. Figure 5 An undoped aluminum gallium nitride layer 116b is disposed between the P-type aluminum gallium nitride layer 116a and the channel layer 14, and the width W2 of the undoped aluminum gallium nitride layer 116b is the same as the width W1 of the P-type aluminum gallium nitride layer 116a. The remaining components are the same as in the first preferred embodiment, and will not be described again here.

[0044] Figure 6 A preferred embodiment of the invention is illustrated. Figure 5 The concentration distribution of P-type dopant in the P-type gallium nitride gate, active layer, and channel layer is shown along the tangent BB'. Figure 7 Illustration for another preferred embodiment of the invention Figure 5Another concentration distribution of P-type dopant in the P-type gallium nitride gate, active layer, and channel layer, drawn along the tangent BB'.

[0045] like Figure 6 As shown, the P-type dopant concentration in the P-type aluminum gallium nitride (AGaN) layer 116a decreases gradually towards the channel layer 14. This means the P-type dopant concentration varies at different depths within the AGaN layer 116a, and the P-type dopant concentration in the AGaN gate 18 is higher than that in the AGaN layer 116a. The P-type dopant concentration in the undoped AGaN layer 116b of the active layer 116 is 0. Furthermore, the P-type dopant in the AGaN gate 18 and the AGaN layer 116a is the same element, such as Mg. There is no P-type dopant in the channel layer 14. Moreover, the P-type dopant concentration in the AGaN layer 116a is between 1E¹⁶ atoms / cm². 3 Up to 1E19 atoms / cm 3 The concentration of P-type dopant in the P-type aluminum gallium nitride layer 116a can be between 5% and 20% of the concentration of P-type dopant in the P-type gallium nitride gate 18. According to a preferred embodiment of the present invention, the concentration of P-type dopant in the P-type aluminum gallium nitride layer 116a is between 6% and 12% of the concentration of P-type dopant in the P-type gallium nitride gate 18.

[0046] like Figure 7 As shown, the P-type dopant concentration in the P-type aluminum gallium nitride layer 116a decreases in a stepwise manner towards the channel layer 14. All depths in the P-type aluminum gallium nitride layer 116a have the same P-type dopant concentration, while the P-type dopant concentration in the undoped aluminum gallium nitride layer 116b is 0. Other component characteristics, such as the range of P-type dopant concentration and dopant type in the P-type aluminum gallium nitride layer 116a, are similar to... Figure 6 The situation is the same as in [the previous case], so I will not repeat it here.

[0047] Figure 8 This is a method for fabricating a high electron mobility transistor according to a preferred embodiment of the present invention, wherein components having the same function will use the component designations in the first and second preferred embodiments.

[0048] like Figure 8 As shown, a method for fabricating a high electron mobility transistor includes providing a substrate 10, forming a nucleation layer 12 covering the substrate 10, then forming a channel layer 12 on the substrate 10, followed by forming an undoped aluminum gallium nitride layer 216 on the channel layer 14. Subsequently, a p-type gallium nitride layer 18a is formed to cover the undoped aluminum gallium nitride layer 216. Please also refer to... Figure 8 and Figure 5During the formation of the P-type gallium nitride layer 18a, a portion of the P-type dopant located in the P-type gallium nitride layer 18a is diffused into the undoped aluminum gallium nitride layer 216, transforming the undoped aluminum gallium nitride layer 216 into a P-type aluminum gallium nitride layer 116a. The P-type dopant can diffuse only into a portion of the depth of the undoped aluminum gallium nitride layer 216; the region where the P-type dopant does not diffuse into becomes the undoped aluminum gallium nitride layer 116b. This process can form a layer such as... Figure 6 The concentration distribution shown. Or as... Figure 1 and Figure 8 As shown, the P-type dopant can diffuse into all the undoped aluminum gallium nitride layers 216, transforming the entire undoped aluminum gallium nitride layer 216 into a P-type aluminum gallium nitride layer, that is... Figure 1 Active layer 16 in the middle forms as follows Figure 2 The concentration distribution shown indicates that the fabrication process temperature for the diffused P-type dopant is greater than 600℃, preferably greater than 1000℃. Then, as... Figure 1 or Figure 5 As shown, after patterning the P-type gallium nitride layer 18a, a P-type gallium nitride gate 18 is formed, and then a source electrode 20 and a drain electrode 22 are formed on the active layer 16 / active layer 116.

[0049] According to another preferred embodiment of the present invention, the step of diffusing the P-type dopant can also be performed after the completion of the P-type gallium nitride layer 18a, by diffusing a portion of the P-type dopant located in the P-type gallium nitride layer 18a into the undoped aluminum gallium nitride layer 216, thereby transforming the undoped aluminum gallium nitride layer 216 into a P-type aluminum gallium nitride layer. Similarly, the P-type dopant can only diffuse into a portion of the depth of the undoped aluminum gallium nitride layer 216. Alternatively, the P-type dopant can diffuse into the entire undoped aluminum gallium nitride layer 216, and the fabrication process temperature for diffusing the P-type dopant is greater than 600°C. After the completion of the P-type aluminum gallium nitride layer, the P-type gallium nitride gate 18, the source electrode 20, and the drain electrode 22 are then formed.

[0050] Figure 9 A method for fabricating a high electron mobility transistor is illustrated according to another preferred embodiment of the present invention. Figure 8 The differences in their production methods are: Figure 9The p-type aluminum gallium nitride (AGaN) layer 316 is formed directly in-situ using chemical vapor deposition (CVD) with the introduction of P-type dopant, rather than by diffusing P-type dopant into the existing AGaN layer. In other words, the PGaN layer is formed only after the PGaN layer 316 is completed. Alternatively, an undoped AGaN layer (not shown) can be formed first using CVD before forming the PGaN layer 316. Depending on the timing and flow rate of the P-type dopant introduction, the PGaN layer 316 can have varying P-type dopant concentration distributions. For example, when the entire depth of the PGaN layer 316 contains P-type dopant, it can be used as… Figure 1 In the active layer 16, when there is an undoped aluminum gallium nitride layer (not shown) below the p-type aluminum gallium nitride layer 316, the p-type aluminum gallium nitride layer 316 and the undoped aluminum gallium nitride layer can respectively serve as active layers. Figure 5 The structure consists of a p-type aluminum gallium nitride layer 116a and an undoped aluminum gallium nitride layer 116b. In other words, the p-type aluminum gallium nitride layer 316 is selectively combined with an undoped aluminum gallium nitride layer to form a structure such as... Figure 2 , Figure 3 , Figure 4 , Figure 6 and Figure 7 The concentration distribution in the matrix can be controlled simply by adjusting the flow rate of the P-type dopant during chemical vapor deposition. After completing the P-type aluminum gallium nitride layer 316, a P-type gallium nitride layer (not shown) is formed, and then... Figure 1 or Figure 5 As shown, a P-type gallium nitride layer is patterned to form a P-type gallium nitride gate 18, followed by the formation of a source electrode 20 and a drain electrode 22.

[0051] This invention specifically incorporates P-type dopant into the active layer of a high electron mobility transistor (HEMT). This increases the HEMT's threshold voltage. The depth of the P-type dopant in the active layer can be adjusted according to product requirements. The deeper the P-type dopant in the active layer, meaning the closer the P-type dopant is to the channel layer, the greater the increase in the HEMT's threshold voltage. However, a deeper P-type dopant also results in a greater on-resistance for the HEMT. Therefore, the depth of the P-type dopant can be adjusted to modify the device's function to meet different product needs.

[0052] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made in accordance with the claims of the present invention should be included within the scope of the present invention.

Claims

1. A high electron mobility transistor, characterized in that, Include: Base; The channel layer is disposed on this substrate; An active layer is disposed on the channel layer, wherein the active layer comprises a P-type aluminum gallium nitride layer; A p-type gallium nitride gate is disposed on the active layer, wherein an interface exists between the p-type gallium nitride gate and the p-type aluminum gallium nitride layer, and the concentration of p-type dopant in the p-type aluminum gallium nitride layer gradually decreases from the interface toward the channel layer; and The source electrode and the drain electrode are disposed on the active layer.

2. The high electron mobility transistor of claim 1, wherein the active layer further comprises an undoped aluminum gallium nitride layer disposed between the P-type aluminum gallium nitride layer and the channel layer, and the undoped aluminum gallium nitride layer contacts the channel layer.

3. The high electron mobility transistor of claim 1, wherein the P-type aluminum gallium nitride layer contacts the channel layer.

4. The high electron mobility transistor of claim 1, wherein the concentration of the P-type dopant in the P-type aluminum gallium nitride layer decreases as it approaches the channel layer.

5. The high electron mobility transistor of claim 1, wherein the concentration of P-type dopant in the P-type aluminum gallium nitride layer is between 1E16 atoms / cm². 3 Up to 1E19 atoms / cm 3 between.

6. The high electron mobility transistor of claim 1, wherein the concentration of P-type dopant in the P-type aluminum gallium nitride layer is between 6% and 12% of the concentration of P-type dopant in the P-type gallium nitride gate.

7. The high electron mobility transistor of claim 1, wherein the P-type dopant in the P-type aluminum gallium nitride layer comprises C, Mg, Zn or Fe.

8. A method for fabricating a high electron mobility transistor, comprising: Provide a base; A channel layer is formed on this substrate; An active layer is formed on the channel layer, wherein the active layer comprises a P-type aluminum gallium nitride layer; A p-type gallium nitride gate is formed on the active layer, wherein an interface exists between the p-type gallium nitride gate and the p-type aluminum gallium nitride layer, and the concentration of p-type dopant in the p-type aluminum gallium nitride layer gradually decreases from the interface toward the channel layer; and The source electrode and drain electrode are formed on the active layer.

9. The method for fabricating a high electron mobility transistor as described in claim 8, wherein the step of forming the P-type aluminum gallium nitride layer comprises: An undoped aluminum gallium nitride layer is formed to cover the channel layer; A p-type gallium nitride (GaN) layer is formed to cover the undoped aluminum gallium nitride (AGaN) layer. Simultaneously with the formation of the P-type GaN layer, a portion of the P-type dopant in the P-type GaN layer diffuses into the undoped AGaN layer, thereby transforming the undoped AGaN layer into the P-type AGaN layer. The P-type gallium nitride layer is patterned to form the P-type gallium nitride gate.

10. The method for fabricating a high electron mobility transistor as described in claim 8, wherein the step of forming the P-type aluminum gallium nitride layer comprises: An undoped aluminum gallium nitride layer is formed to cover the channel layer; A P-type gallium nitride layer is formed to cover the undoped aluminum gallium nitride layer; After completing the P-type gallium nitride layer, a portion of the P-type dopant in the P-type gallium nitride layer is diffused into the undoped aluminum gallium nitride layer, thereby transforming the undoped aluminum gallium nitride layer into the P-type aluminum gallium nitride layer; and The P-type gallium nitride layer is patterned to form the P-type gallium nitride gate.

11. The method for fabricating a high electron mobility transistor as described in claim 8, wherein the step of forming the P-type aluminum gallium nitride layer comprises: The P-type aluminum gallium nitride layer was formed by in-situ doping using chemical vapor deposition and the introduction of P-type dopant.

12. The method for fabricating a high electron mobility transistor as claimed in claim 8, wherein the active layer further comprises an undoped aluminum gallium nitride layer disposed between the P-type aluminum gallium nitride layer and the channel layer, and the undoped aluminum gallium nitride layer contacts the channel layer.

13. The method for fabricating a high electron mobility transistor as claimed in claim 8, wherein the P-type aluminum gallium nitride layer contacts the channel layer.

14. The method for fabricating a high electron mobility transistor as described in claim 8, wherein the concentration of the P-type dopant in the P-type aluminum gallium nitride layer decreases as it approaches the channel layer.

15. The method for fabricating a high electron mobility transistor as described in claim 8, wherein the concentration of the P-type dopant in the P-type aluminum gallium nitride layer is between 1E16 atoms / cm². 3 Up to 1E19 atoms / cm 3 between.

16. The method for fabricating a high electron mobility transistor as described in claim 8, wherein the P-type dopant in the P-type aluminum gallium nitride layer comprises C, Mg, Zn or Fe.

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