A superconducting quantum Josephson junction and its preparation method

Abstract

The present invention discloses a method for preparing a superconducting quantum Josephson junction, which is related to the field of quantum chips, and in particular, a method for preparing the same. The method comprises the steps of setting a first superconducting metal layer on a substrate, patterning the first superconducting metal layer to obtain a superconducting metal pattern, setting a first insulating layer on the surface of the superconducting metal pattern, covering the target sidewall of the superconducting metal pattern with the first insulating layer, setting a second superconducting metal layer on the substrate on which the first insulating layer is set, removing the second superconducting metal layer above the superconducting metal pattern, and obtaining a Josephson junction precursor, setting a second insulating layer on the surface of the Josephson junction precursor, and covering the second superconducting metal layer with the second insulating layer to obtain a Josephson junction. The present invention transforms the Josephson junction precision originally determined by the photolithography line width into that determined by the thickness, breaks through the limitation of the equipment, reduces the requirements for the equipment, reduces the production cost, and increases the versatility of the preparation method.

Description

Technical Field

[0001] The present invention relates to the field of quantum chips, and in particular to a superconducting quantum Josephson junction and a preparation method thereof. Background Art

[0002] The "quantum superiority" of superconducting quantum computing has received great attention from governments and scientific communities around the world. Superconducting quantum has become one of the most likely solutions to achieve general computing in the field of quantum computing.

[0003] The Josephson junction (a special structure with quantum tunneling effect, with a sandwich structure of superconducting layer-insulating layer-superconducting layer) is one of the most important devices in superconducting quantum chips, and its quality largely determines the quality of the chip. The current conventional design and preparation process is to adopt a dual-angle evaporation superconducting metal solution, using the shielding effect of the mask to evaporate the superconducting metal film twice from different angles to form an overlapping area, and oxidize the metal after the first evaporation to form a Josephson junction with a SIS structure, which requires special evaporation equipment to meet process requirements. At the same time, the current Josephson junction has a superconducting layer-insulating layer-superconducting layer (SIS) distribution in the form of top, middle and bottom, and the size is generally 100-200nm, which leads to high requirements for the resolution accuracy of the lithography equipment, and the EBL equipment is the main exposure processing method, and the production cost is high.

[0004] Therefore, how to reduce the demand for Josephson junction production equipment in order to reduce its production cost is an urgent problem to be solved by those skilled in the art. Summary of the invention

[0005] The purpose of the present invention is to provide a superconducting quantum Josephson junction and a preparation method thereof, so as to solve the problems of strict requirements on production equipment and high production cost in the prior art.

[0006] In order to solve the above technical problems, the present invention provides a method for preparing a superconducting quantum Josephson junction, comprising:

[0007] Disposing a first superconducting metal layer on a substrate;

[0008] Patterning the first superconducting metal layer to obtain a superconducting metal pattern;

[0009] A first insulating layer is provided on the surface of the superconducting metal pattern; the first insulating layer covers the target side wall of the superconducting metal pattern;

[0010] Disposing a second superconducting metal layer on the substrate on which the first insulating layer is disposed;

[0011] removing the second superconducting metal layer above the superconducting metal pattern to obtain a Josephson junction precursor;

[0012] A second insulating layer is arranged on the surface of the Josephson junction precursor, and the second insulating layer covers the second superconducting metal layer to obtain a Josephson junction.

[0013] Optionally, in the method for preparing a superconducting quantum Josephson junction, providing a first insulating layer on the surface of the superconducting metal pattern comprises:

[0014] The superconducting metal pattern is subjected to oxidation treatment, and a first metal oxide layer is grown on the superconducting metal pattern.

[0015] Optionally, in the method for preparing a superconducting quantum Josephson junction, providing a second insulating layer on the surface of the Josephson junction precursor comprises:

[0016] The Josephson junction precursor is subjected to oxidation treatment, and a second metal oxide layer is grown on the second superconducting metal layer.

[0017] Optionally, in the method for preparing a superconducting quantum Josephson junction, providing a second superconducting metal layer on the substrate on which the first insulating layer is provided, and removing the second superconducting metal layer above the superconducting metal pattern comprises:

[0018] Disposing a first photoresist layer on the surface of the first insulating layer;

[0019] Disposing a second superconducting metal layer on the substrate on which the first photoresist layer is disposed;

[0020] The first photoresist layer and the second superconducting metal layer on the surface of the first photoresist layer are removed through a stripping process.

[0021] Optionally, in the method for preparing a superconducting quantum Josephson junction, patterning the first superconducting metal layer to obtain a superconducting metal pattern includes:

[0022] Patterning the first superconducting metal layer to obtain a superconducting metal pattern divided by trenches;

[0023] Accordingly, the step of removing the second superconducting metal layer above the superconducting metal pattern to obtain a Josephson junction precursor includes:

[0024] Removing the second superconducting metal layer above the superconducting metal pattern to obtain a Josephson junction precursor, wherein the Josephson junction precursor includes a target junction and a parasitic junction, wherein the target junction and the parasitic junction are respectively located at two target side walls of the trench;

[0025] Correspondingly, the second insulating layer is provided on the surface of the Josephson junction precursor, and the second insulating layer covers the second superconducting metal layer, so that the Josephson junction is obtained, comprising:

[0026] A second insulating layer is provided on the surface of the Josephson junction precursor, wherein the second insulating layer covers the second superconducting metal layer, the Josephson junction is obtained from the target junction, and a parasitic Josephson junction is obtained from the parasitic junction;

[0027] removing the insulating layer of the surface area corresponding to the parasitic Josephson junction;

[0028] Disposing a third superconducting metal layer in the surface area corresponding to the parasitic Josephson junction;

[0029] A third insulating layer is disposed on the surface of the third superconducting metal layer.

[0030] Optionally, in the method for preparing a superconducting quantum Josephson junction, the step of providing a third superconducting metal layer in a surface region corresponding to the parasitic Josephson junction comprises:

[0031] Disposing a second photoresist layer in an area other than the surface area corresponding to the parasitic Josephson junction;

[0032] Disposing a third superconducting metal layer on the surface of the substrate on which the second photoresist layer is disposed;

[0033] The second photoresist layer and the third superconducting metal layer on the surface of the second photoresist layer are removed by a stripping process.

[0034] Optionally, in the method for preparing a superconducting quantum Josephson junction, the first superconducting metal layer and the second superconducting metal layer are made of the same material.

[0035] Optionally, in the method for preparing a superconducting quantum Josephson junction, the first superconducting metal layer and the second superconducting metal layer are layers composed of at least one of niobium, aluminum, tantalum and titanium nitride.

[0036] Optionally, in the method for preparing a superconducting quantum Josephson junction, the thickness of the first superconducting metal layer is the same as that of the second superconducting metal layer.

[0037] A superconducting quantum Josephson junction, wherein the superconducting quantum Josephson junction is a Josephson junction obtained by any of the above-mentioned superconducting quantum Josephson junction preparation methods;

[0038] The current flow direction in the superconducting quantum Josephson junction is parallel to the extension plane of the substrate corresponding to the superconducting quantum Josephson junction.

[0039] The method for preparing a superconducting quantum Josephson junction provided by the present invention comprises the following steps: arranging a first superconducting metal layer on a substrate; patterning the first superconducting metal layer to obtain a superconducting metal pattern; arranging a first insulating layer on the surface of the superconducting metal pattern; the first insulating layer covers the target side wall of the superconducting metal pattern; arranging a second superconducting metal layer on the substrate on which the first insulating layer is arranged; removing the second superconducting metal layer above the superconducting metal pattern to obtain a Josephson junction precursor; arranging a second insulating layer on the surface of the Josephson junction precursor, the second insulating layer covers the second superconducting metal layer, and thus obtaining a Josephson junction.

[0040] In the present invention, by using an insulating layer covering the side wall after the superconducting metal layer is patterned, the Josephson junction of the top-middle-bottom structure is transformed into a left-middle-right form, so that the Josephson junction accuracy originally determined by the lithography line width is changed to be determined by the thickness, breaking through the limitation of the equipment, and can be prepared by traditional semiconductor thin film growth equipment without the need for special dual-angle evaporation equipment, greatly reducing the requirements for the equipment lithography resolution, which is equivalent to reducing the production cost, and making the technology easy to promote, greatly increasing the versatility of the preparation method. The present invention also provides a superconducting quantum Josephson junction preparation method with the above-mentioned beneficial effects. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the embodiments of the present invention or the technical solutions of the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0042] Figure 1 A schematic flow chart of a specific implementation method of the superconducting quantum Josephson junction preparation method provided by the present invention;

[0043] Figure 2 A schematic diagram of an intermediate process structure of a specific implementation method of the superconducting quantum Josephson junction preparation method provided by the present invention;

[0044] Figure 3 A schematic flow chart of another specific implementation of the method for preparing a superconducting quantum Josephson junction provided by the present invention;

[0045] Figure 4 A schematic flow chart of another specific implementation of the method for preparing a superconducting quantum Josephson junction provided by the present invention;

[0046] Figure 5 The present invention provides a process flow chart of another specific implementation method of the superconducting quantum Josephson junction preparation method. DETAILED DESCRIPTION

[0047] In order to enable those skilled in the art to better understand the scheme of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0048] The core of the present invention is to provide a method for preparing a superconducting quantum Josephson junction, a flow chart of a specific implementation method thereof is shown as follows: Figure 1 As shown, it is called specific implementation mode 1, including:

[0049] S101 : a first superconducting metal layer 02 is provided on a substrate 01 .

[0050] The substrate 01 can be high-resistance silicon or sapphire.

[0051] S102: Patterning the first superconducting metal layer 02 to obtain a superconducting metal pattern.

[0052] The patterning in this step can be to etch the superconducting metal layer through an etching process to complete the pattern transfer and obtain the desired superconducting metal pattern (the etching process can be a dry method or a wet method, and of course, the desired etched structural morphology can also be defined through a photolithography process). Of course, other patterning methods can also be selected according to actual needs.

[0053] The superconducting metal pattern may be a resonant cavity, a transmission line, a control line, a Pad area, etc. in a pre-processed state.

[0054] S103: Disposing a first insulating layer 03 on the surface of the superconducting metal pattern; the first insulating layer 03 covers the target side wall of the superconducting metal pattern.

[0055] The target sidewall refers to the sidewall where the Josephson junction needs to be grown. Please refer to Figure 2 Of course, in actual production, the angle between the target side wall and the substrate 01 will not be strictly 90 degrees, and will generally be less than or equal to 90 degrees.

[0056] In this step, as a preferred implementation, the superconducting metal pattern can be oxidized, and a first metal oxide layer can be grown on the superconducting metal pattern. The oxide acts as a natural insulating layer, which can isolate the superconducting layer in the Josephson junction. The oxide layer cannot grow only on the upward surface, but will also grow on the target side wall, which greatly simplifies the production process, improves production efficiency, and reduces production costs.

[0057] Of course, in addition to oxidation, the insulating layer may also be provided by other methods, such as growing an insulating layer by CVD or ALD or other process methods, and the insulating layer is not limited to the oxide of the corresponding superconducting metal layer.

[0058] S104: a second superconducting metal layer 05 is provided on the substrate 01 on which the first insulating layer 03 is provided.

[0059] The second superconducting metal layer 05 in this step is laid on the entire substrate 01 , that is, in addition to covering the exposed area of ​​the substrate 01 after patterning, it also covers the top of the superconducting metal pattern.

[0060] S105: removing the second superconducting metal layer 05 above the superconducting metal pattern to obtain a Josephson junction precursor.

[0061] In this step, the structure of superconducting layer-insulating layer-superconducting layer has been completed, except that part of the superconducting layer (corresponding to the second superconducting metal layer 05) is exposed and needs to be sealed to ensure the working stability of the final Josephson junction.

[0062] S106: a second insulating layer 06 is provided on the surface of the Josephson junction precursor, wherein the second insulating layer 06 covers the second superconducting metal layer 05 to obtain a Josephson junction.

[0063] In this step, preferably, the Josephson junction precursor is subjected to oxidation treatment, and a second metal oxide layer is grown on the second superconducting metal layer 05 .

[0064] The advantages of using the second metal oxide layer for insulation can be found in the above description of the first metal oxide layer, which will not be elaborated here.

[0065] Furthermore, the first superconducting metal layer 02 and the second superconducting metal layer 05 are made of the same material, which is at least one of niobium, aluminum, tantalum and titanium nitride. The same material is more conducive to increasing the tightness of the connection between the various structures of the Josephson junction, and the processing technology of the above-mentioned metals and metal compounds is mature and has good compatibility with traditional semiconductor technology. Of course, different materials can also be selected according to actual conditions.

[0066] Furthermore, the first superconducting metal layer 02 and the second superconducting metal layer 05 have the same thickness, which is beneficial to the spatial layout of the Josephson junction, achieving efficient use of space, and making the electrical signal of the Josephson junction more controllable. Of course, according to design requirements, the film thickness at different Josephson junctions may be different.

[0067] When the area of ​​the Josephson junction is constant, the lithography line width can be increased by reducing the thickness of the superconducting metal film, reducing the capacity limitation of the equipment. For example, for the 200nm*200nm Josephson junction of the existing technology, the lithography line width requirement is 200nm, and only EBL or KrF, ArF light source equipment can be used; while this technology can reduce the lithography line width requirement to 500nm by controlling the film thickness to 80nm, so I-line or laser direct writing equipment can also meet it.

[0068] The method for preparing a superconducting quantum Josephson junction provided by the present invention comprises the following steps: arranging a first superconducting metal layer 02 on a substrate 01; patterning the first superconducting metal layer 02 to obtain a superconducting metal pattern; arranging a first insulating layer 03 on the surface of the superconducting metal pattern; the first insulating layer 03 covers the target side wall of the superconducting metal pattern; arranging a second superconducting metal layer 05 on the substrate 01 on which the first insulating layer 03 is arranged; removing the second superconducting metal layer 05 above the superconducting metal pattern to obtain a Josephson junction precursor; arranging a second insulating layer 06 on the surface of the Josephson junction precursor, the second insulating layer 06 covers the second superconducting metal layer 05, and obtaining a Josephson junction. In the present invention, by utilizing an insulating layer covering the side walls of the patterned superconducting metal layer, the Josephson junction with a top-middle-bottom structure is transformed into a left-middle-right form, so that the Josephson junction accuracy originally determined by the lithography line width is transformed into that determined by the thickness, breaking through the limitation of the equipment, and can be prepared using traditional semiconductor thin film growth equipment without the need for special dual-angle evaporation equipment, greatly reducing the requirements for the lithography resolution of the equipment, which is equivalent to reducing the production cost, while making the technology easy to promote and greatly increasing the versatility of the preparation method.

[0069] On the basis of the first specific implementation mode, a technical means for removing the non-target superconducting metal layer is further given to obtain the second specific implementation mode, and its flow chart is as follows: Figure 3 As shown, including:

[0070] S201 : Disposing a first superconducting metal layer 02 on a substrate 01 .

[0071] S202: Patterning the first superconducting metal layer 02 to obtain a superconducting metal pattern.

[0072] S203: Disposing a first insulating layer 03 on the surface of the superconducting metal pattern; the first insulating layer 03 covers the target side wall of the superconducting metal pattern.

[0073] S204 : Disposing a first photoresist layer 04 on the surface of the first insulating layer 03 .

[0074] The first photoresist layer 04 in this step is disposed on the upper surface of the first insulating layer 03. The term “disposed on the surface” in the present invention means disposed on the upper surface unless otherwise specified.

[0075] S205 : Disposing a second superconducting metal layer 05 on the substrate 01 on which the first photoresist layer 04 is disposed.

[0076] S206: removing the first photoresist layer 04 and the second superconducting metal layer 05 on the surface of the first photoresist layer 04 through a stripping process to obtain a Josephson junction precursor.

[0077] The photoresist layer in steps S204 to S206 may also be replaced by other hard masks.

[0078] S207: a second insulating layer 06 is provided on the surface of the Josephson junction precursor, wherein the second insulating layer 06 covers the second superconducting metal layer 05 to obtain a Josephson junction.

[0079] The difference between this specific embodiment and the above specific embodiment is that this specific embodiment provides a specific technical solution for removing the second superconducting metal layer 05 above the superconducting metal pattern, and the remaining steps are the same as the above specific embodiment and will not be elaborated here.

[0080] In this specific embodiment, a method of removing the second superconducting metal layer 05 in the non-target area by setting a photoresist layer is particularly disclosed. The second superconducting metal layer 05 in the preset area is obtained by using a mask method with high precision and low equipment requirements, which can further reduce production costs and improve the versatility of the method. Of course, the second superconducting metal layer 05 on the superconducting metal pattern can also be removed by methods other than the mask method, such as directly using a laser etching removal method, etc., and corresponding selections can be made according to actual needs.

[0081] On the basis of the second specific implementation mode, a technical means for removing the non-target superconducting metal layer is further given to obtain a third specific implementation mode, the flow chart of which is as follows: Figure 4 As shown, including:

[0082] S301 : Disposing a first superconducting metal layer 02 on a substrate 01 .

[0083] S302: Patterning the first superconducting metal layer 02 to obtain a superconducting metal pattern divided by channels.

[0084] The patterning in this step can also be achieved through a mask method.

[0085] S303: Disposing a first insulating layer 03 on the surface of the superconducting metal pattern; the first insulating layer 03 covers the target side wall of the superconducting metal pattern.

[0086] S304 : Disposing a first photoresist layer 04 on the surface of the first insulating layer 03 .

[0087] S305 : Disposing a second superconducting metal layer 05 on the substrate 01 on which the first photoresist layer 04 is disposed.

[0088] S306: removing the first photoresist layer 04 and the second superconducting metal layer 05 on the surface of the first photoresist layer 04 through a stripping process to obtain a Josephson junction precursor, wherein the Josephson junction precursor includes a target junction and a parasitic junction, and the target junction and the parasitic junction are respectively located at two target side walls of the channel.

[0089] Can be combined Figure 5 understand, Figure 5 It is a structural schematic diagram of the process flow corresponding to each step in this specific implementation manner.

[0090] S307: a second insulating layer 06 is provided on the surface of the Josephson junction precursor, wherein the second insulating layer 06 covers the second superconducting metal layer 05, the Josephson junction is obtained from the target junction, and a parasitic Josephson junction is obtained from the parasitic junction.

[0091] S308: removing the insulating layer in the surface area corresponding to the parasitic Josephson junction.

[0092] It should be noted that the surface area corresponding to the parasitic Josephson junction should cross the insulating layer area corresponding to the parasitic Josephson junction (if continuing with the specific embodiment above, it should cross the oxide layer of the target side wall corresponding to the parasitic Josephson junction). Therefore, the first insulating layer 03 and the second insulating layer 06 are partially removed. Figure 5 Check.

[0093] S309: Disposing a third superconducting metal layer 07 in the surface area corresponding to the parasitic Josephson junction.

[0094] As a preferred implementation, the third superconducting metal layer 07 is arranged in the following manner:

[0095] A1: a second photoresist layer is provided in the area except the surface area corresponding to the parasitic Josephson junction.

[0096] A2: a third superconducting metal layer 07 is provided on the surface of the substrate 01 provided with the second photoresist layer.

[0097] A3: removing the second photoresist layer and the third superconducting metal layer 07 on the surface of the second photoresist layer through a stripping process.

[0098] As in the previous text, the use of a photoresist mask method can greatly reduce the requirements for patterning equipment and reduce production costs. As a specific implementation method, the metal oxide layer exposed in the photolithography pattern area is removed by ion-milling, and then a layer of the third superconducting metal layer 07 is deposited. According to actual design requirements, one or more SIS junctions (a sandwich structure of a superconducting layer-insulating layer-superconducting layer, corresponding to the target junction and the parasitic junction in the previous text) can also be photolithographically processed to obtain a connection pattern spanning the metal oxide layer area.

[0099] S310 : Disposing a third insulating layer 08 on the surface of the third superconducting metal layer 07 .

[0100] Of course, in order to ensure the normal use of the Josephson junction, the third insulating layer 08 should be connected to the first insulating layer 03 and the second insulating layer 06 to completely cover the superconducting metal.

[0101] The difference between this specific embodiment and the above specific embodiment is that this specific embodiment provides a technical solution for removing the parasitic Josephson junction, and the remaining steps are the same as those in the above specific embodiment, which will not be elaborated here.

[0102] Taking the actual situation into consideration, the first superconducting metal layer 02 is mostly patterned in the form of grooves, and this specific implementation provides a specific solution for removing parasitic Josephson junctions in the face of groove-type patterning. The bandage process mode is adopted to eliminate the influence of the parasitic Josephson junction. Finally, only the desired target Josephson junction is retained in the structure, and the remaining parasitic Josephson junctions can be removed, which greatly improves the versatility of this specific implementation.

[0103] Figure 5 For the process flow chart corresponding to each step in this specific embodiment, of course, Figure 5 The photolithography pattern is only a schematic diagram, and can actually be designed into other patterns according to design requirements. There can be 2 or more Josephson junctions, which can be in series or parallel form, and the sizes of Josephson junctions can be inconsistent.

[0104] The present invention also provides a superconducting quantum Josephson junction, wherein the superconducting quantum Josephson junction is a Josephson junction obtained by any of the above-mentioned superconducting quantum Josephson junction preparation methods;

[0105] The current flow direction in the superconducting quantum Josephson junction is parallel to the extension plane of the substrate 01 corresponding to the superconducting quantum Josephson junction.

[0106] The current flow direction in the superconducting quantum Josephson junction, that is, the superconducting layer-insulating layer-superconducting layer direction of the superconducting quantum Josephson junction, the superconducting quantum Josephson junction provided by the present invention changes the traditional "upper middle lower" mode to a "left middle right" mode, which greatly reduces the requirements for processing equipment.

[0107] The superconducting quantum Josephson junction provided by the present invention transforms the Josephson junction of the top-middle-bottom structure into the left-middle-right form by utilizing the insulating layer covering the side wall after the superconducting metal layer is patterned, so that the Josephson junction accuracy originally determined by the lithography line width is transformed into that determined by the thickness, breaking through the limitation of the equipment, and can be prepared by using the traditional semiconductor thin film growth equipment without the need for special dual-angle evaporation equipment, which greatly reduces the requirements for the lithography resolution of the equipment, which is equivalent to reducing the production cost, and at the same time makes the technology easy to promote, greatly increasing the versatility of the preparation method.

[0108] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0109] It should be noted that, in this specification, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

[0110] The superconducting quantum Josephson junction and its preparation method provided by the present invention are introduced in detail above. Specific examples are used in this article to illustrate the principle and implementation mode of the present invention. The description of the above embodiment is only used to help understand the method and core idea of ​​the present invention. It should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A method for preparing a superconducting quantum Josephson junction, characterized in that: include: Disposing a first superconducting metal layer on a substrate; Patterning the first superconducting metal layer to obtain a superconducting metal pattern; Disposing a first insulating layer on the surface of the superconducting metal pattern; The first insulating layer covers the target side wall of the superconducting metal pattern; Disposing a second superconducting metal layer on the substrate on which the first insulating layer is disposed; removing the second superconducting metal layer above the superconducting metal pattern to obtain a Josephson junction precursor; A second insulating layer is provided on the surface of the Josephson junction precursor, wherein the second insulating layer covers the second superconducting metal layer to obtain a Josephson junction; Patterning the first superconducting metal layer to obtain a superconducting metal pattern includes: Patterning the first superconducting metal layer to obtain a superconducting metal pattern divided by trenches; Accordingly, the step of removing the second superconducting metal layer above the superconducting metal pattern to obtain a Josephson junction precursor includes: Removing the second superconducting metal layer above the superconducting metal pattern to obtain a Josephson junction precursor, wherein the Josephson junction precursor includes a target junction and a parasitic junction, wherein the target junction and the parasitic junction are respectively located at two target side walls of the trench; Correspondingly, the second insulating layer is provided on the surface of the Josephson junction precursor, and the second insulating layer covers the second superconducting metal layer, so that the Josephson junction is obtained, comprising: A second insulating layer is provided on the surface of the Josephson junction precursor, wherein the second insulating layer covers the second superconducting metal layer, the Josephson junction is obtained from the target junction, and a parasitic Josephson junction is obtained from the parasitic junction; removing the insulating layer of the surface area corresponding to the parasitic Josephson junction; Disposing a third superconducting metal layer in the surface area corresponding to the parasitic Josephson junction; A third insulating layer is disposed on the surface of the third superconducting metal layer.

2. The method for preparing a superconducting quantum Josephson junction according to claim 1, characterized in that: The step of providing a first insulating layer on the surface of the superconducting metal pattern comprises: The superconducting metal pattern is subjected to oxidation treatment, and a first metal oxide layer is grown on the superconducting metal pattern.

3. The method for preparing a superconducting quantum Josephson junction according to claim 1, characterized in that: The second insulating layer is provided on the surface of the Josephson junction precursor, comprising: The Josephson junction precursor is subjected to oxidation treatment, and a second metal oxide layer is grown on the second superconducting metal layer.

4. The method for preparing a superconducting quantum Josephson junction according to claim 1, characterized in that: The step of providing a second superconducting metal layer on the substrate on which the first insulating layer is provided, and removing the second superconducting metal layer above the superconducting metal pattern comprises: Disposing a first photoresist layer on the surface of the first insulating layer; Disposing a second superconducting metal layer on the substrate on which the first photoresist layer is disposed; The first photoresist layer and the second superconducting metal layer on the surface of the first photoresist layer are removed through a stripping process.

5. The method for preparing a superconducting quantum Josephson junction according to claim 1, characterized in that: The providing of a third superconducting metal layer in the surface area corresponding to the parasitic Josephson junction comprises: Disposing a second photoresist layer in an area other than the surface area corresponding to the parasitic Josephson junction; Disposing a third superconducting metal layer on the surface of the substrate on which the second photoresist layer is disposed; The second photoresist layer and the third superconducting metal layer on the surface of the second photoresist layer are removed by a stripping process.

6. The method for preparing a superconducting quantum Josephson junction according to claim 1, characterized in that: The first superconducting metal layer and the second superconducting metal layer are made of the same material.

7. The method for preparing a superconducting quantum Josephson junction according to claim 6, characterized in that: The first superconducting metal layer and the second superconducting metal layer are layers composed of at least one of niobium, aluminum, tantalum and titanium nitride.

8. The method for preparing a superconducting quantum Josephson junction according to claim 1, characterized in that: The first superconducting metal layer and the second superconducting metal layer have the same thickness.

9. A superconducting quantum Josephson junction, characterized in that: The superconducting quantum Josephson junction is a Josephson junction obtained by the superconducting quantum Josephson junction preparation method according to any one of claims 1 to 8; The current flow direction in the superconducting quantum Josephson junction is parallel to the extension plane of the substrate corresponding to the superconducting quantum Josephson junction.

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