Power supply voltage switching circuit and power supply voltage switching method

Abstract

The present application discloses a power supply voltage switching circuit and a power supply voltage switching method, including: a charge pump, switches S1 to S4, a high-voltage transistor MN1, and an adjustable circuit. By improving the circuit structure, a flexible and adjustable internal power supply voltage is provided for the chip, and the internal power supply voltage AVDD is adjusted from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT, so as to achieve a smooth switching of the internal power supply voltage AVDD, reduce the fluctuation of the internal power supply voltage when switching the power supply voltage, and reduce the impact on the internal circuit, thereby avoiding affecting the normal operation of the chip.

Description

Technical Field

[0001] This application relates to the technical field of electronic circuits, and particularly to a power supply voltage switching circuit and a power supply voltage switching method. Background Art

[0002] The boost circuit is one of the six basic chopper circuits and is a switching DC boost circuit. It can make the output voltage higher than the input voltage and is mainly applied to DC motor drives, single-phase power factor correction (PFC) circuits, and other AC-DC power supplies.

[0003] However, in the boost circuit, since the VIN voltage is much lower than the VOUT voltage, generally the chip is powered by VIN, which has the advantages of low power consumption and high efficiency. But sometimes the VIN voltage is too low to meet the needs of the internal circuit, so the power supply method needs to be switched to be powered by VOUT. During normal use of the chip, the VIN voltage often gradually decreases. Therefore, during the operation of the chip, the power supply needs to be switched from VIN to VOUT. When suddenly switching the power supply, it is easy to cause fluctuations in the internal power supply voltage, which is a great impact on the internal circuit and affects the normal operation of the chip. Summary of the Invention

[0004] The purpose of this application is to propose a power supply voltage switching circuit and a power supply voltage switching method. By improving the circuit structure, a flexible and adjustable internal power supply voltage is provided for the chip, and the internal power supply voltage AVDD is adjusted from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT, so as to achieve a smooth switching of the internal power supply voltage AVDD, reduce the fluctuation of the internal power supply voltage when switching the power supply voltage, and reduce the impact on the internal circuit, thereby avoiding affecting the normal operation of the chip.

[0005] To achieve the above object, this application provides the following technical solutions:

[0006] A power supply voltage switching circuit includes: a charge pump, switches S1 to S4, a switching transistor MN1, and an adjustable circuit, where:

[0007] The switch S1, the switch S3, and the first end of the charge pump are connected, and their common end is connected to the power supply voltage VIN. One end of the switch S2 is connected to the power supply voltage VOUT. The other end of the switch S1 is connected to the other end of the switch S2, and their common end is respectively connected to the switching transistor MN1 and the first end of the adjustable circuit. The gate of the switching transistor MN1 is connected to the second end of the charge pump, and the enable end of the charge pump is connected to an enable signal;

[0008] The drain of the switching transistor MN1 is connected to the second end of the adjustable circuit, and its common terminal is connected to one end of the switch S4. The other end of the switch S3 and the other end of the switch S4 are connected, and their common terminal serves as the output terminal of the power supply voltage switching circuit to output the internal power supply voltage AVDD;

[0009] The third end of the adjustable circuit is connected to the power supply voltage VOUT. When the power supply voltage VIN drops to a preset voltage point, the internal power supply voltage AVDD is adjusted by adjusting the voltage signal input to the adjustable circuit, and the internal power supply voltage AVDD is switched from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT to achieve smooth switching of the internal power supply voltage AVDD.

[0010] Preferably, the adjustable circuit includes: a switching transistor MN2, a switching transistor MN3, a current source I, and a resistor R, where:

[0011] The source of the switching transistor MN2 serves as the first end of the adjustable circuit and is connected to the source of the switching transistor MN1, and the drain of the switching transistor MN2 serves as the second end of the adjustable circuit and is connected to the drain of the switching transistor MN1;

[0012] The gate of the switching transistor MN2 is connected to the gate of the switching transistor MN3. The gate of the switching transistor MN3 is connected to the source and is connected to the second end of the current source I. The drain of the switching transistor MN3 is grounded through the resistor R;

[0013] One end of the current source I serves as the third end of the adjustable circuit and is connected to the power supply voltage VOUT. The other end of the current source I is connected to the source of the switching transistor MN3, and the drain of the switching transistor MN3 is grounded through the resistor R;

[0014] When the power supply voltage VIN drops to the preset voltage point, a current is injected into the resistor R through the current source I to generate a voltage signal V_R = I * R. By adjusting the current value of the current source I and the resistance value of the resistor R, the internal power supply voltage AVDD is switched from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT to achieve smooth switching of the internal power supply voltage AVDD.

[0015] Preferably, the gate signal V_PWR of the switching transistor MN3 and the switching transistor MN2 is generated by adding the voltage signal V_R to the Vgs of the switching transistor MN3. Then, the internal power supply voltage AVDD = V_PWR - Vgs_MN2 = V_R + Vgs_MN3 - Vgs_MN2 ≈ I * R. By adjusting the current value of the current source I and the resistance value of the resistor R, the internal power supply voltage AVDD is adjusted from the power supply voltage VIN to the power supply voltage VOUT to achieve smooth switching of the internal power supply voltage AVDD.

[0016] Preferably, the switching transistors MN1, MN2, and MN3 are high-voltage transistors.

[0017] Preferably, the charge pump is only used when the chip is powered on and started. After the start is completed, the charge pump is turned off by inputting an enable signal EN.

[0018] Preferably, when the chip is operating normally, the power supply voltage VOUT is high voltage, the switch S1 is disconnected, and the switch S2 is closed. If the VIN voltage is greater than VOUT, the switch S1 is closed and the switch S2 is disconnected.

[0019] Preferably, when the power supply voltage VIN is above the preset voltage point, the switch S3 is closed, the switch S4 is disconnected, and the internal power supply voltage AVDD is provided by the power supply voltage VIN.

[0020] Preferably, when the power supply voltage VIN drops below the preset voltage point, the switch S3 is disconnected, the switch S4 is closed, the charge pump is turned off, the gate of the high-voltage transistor MN1 is 0V, and the internal power supply voltage AVDD is provided by the power supply voltage VOUT through the switch S2 and the high-voltage transistor MN2.

[0021] A power supply voltage switching method, based on the above-mentioned power supply voltage switching circuit, the power supply voltage switching circuit includes: a charge pump, switches S1 to S4, a switching transistor MN1, and an adjustable circuit. The method includes:

[0022] Comparing the power supply voltage VIN with a preset voltage point to judge the magnitude of the power supply voltage VIN;

[0023] When the power supply voltage VIN is above the preset voltage point, the switch S3 is closed, the switch S4 is disconnected, and the internal power supply voltage AVDD is provided by the power supply voltage VIN;

[0024] When the power supply voltage VIN drops to a preset voltage point, the internal power supply voltage AVDD is adjusted by adjusting the voltage signal input to the adjustable circuit, and the internal power supply voltage AVDD is adjusted from the power supply voltage VIN to the power supply voltage VOUT to achieve smooth switching of the internal power supply voltage AVDD.

[0025] Preferably, the adjustable circuit includes: a switching transistor MN2, a switching transistor MN3, a current source I, and a resistor R. When the power supply voltage VIN drops to a preset voltage point, the internal power supply voltage AVDD is adjusted by adjusting the voltage signal input to the adjustable circuit, and the internal power supply voltage AVDD is adjusted from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT to achieve smooth switching of the internal power supply voltage AVDD. Specifically:

[0026] When the power supply voltage VIN drops to the preset voltage point, a current is injected into the resistor R through the current source I to generate a voltage signal V_R = I * R. By adjusting the current value of the current source I and the resistance value of the resistor R, the internal power supply voltage AVDD is adjusted from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT to achieve smooth switching of the internal power supply voltage AVDD.

[0027] As can be seen from the above technical solutions, compared with the prior art, the present application discloses a power supply voltage switching circuit and a power supply voltage switching method, including: a charge pump, switches S1 to S4, a switching transistor MN1, and an adjustable circuit, wherein: the switch S1, the switch S3, and the first end of the charge pump are connected, and their common end is connected to the power supply voltage VIN; one end of the switch S2 is connected to the power supply voltage VOUT; the other end of the switch S1 is connected to the other end of the switch S2, and their common end is respectively connected to the switching transistor MN1 and the first end of the adjustable circuit; the gate of the switching transistor MN1 is connected to the second end of the charge pump, and the enable end of the charge pump is connected to an enable signal; the drain of the switching transistor MN1 is connected to the second end of the adjustable circuit, and their common end is connected to one end of the switch S4; the other end of the switch S3 and the other end of the switch S4 are connected, and their common end serves as the output end of the power supply voltage switching circuit, outputting an internal power supply voltage AVDD; the third end of the adjustable circuit is connected to the power supply voltage VOUT. When the power supply voltage VIN drops to a preset voltage point, the internal power supply voltage AVDD is adjusted by adjusting the voltage signal input to the adjustable circuit, and the internal power supply voltage AVDD is switched from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT to achieve smooth switching of the internal power supply voltage AVDD. By improving the circuit structure, the present application provides a flexible and adjustable internal power supply voltage for the chip, switches the internal power supply voltage AVDD from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT to achieve smooth switching of the internal power supply voltage AVDD, reduces the fluctuation of the internal power supply voltage when switching the power supply voltage, and reduces the impact on the internal circuit, thereby avoiding affecting the normal operation of the chip. Description of the Drawings

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only the embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained according to the provided drawings without creative efforts.

[0029] Figure 1 FIG. 9 is a schematic structural diagram of a power supply voltage switching circuit provided in the prior art;

[0030] Figure 2 FIG. 13 is a timing diagram of the change in the power supply voltage during the power supply switching provided in the prior art;

[0031] Figure 3 FIG. 17 is a block diagram of a power supply voltage switching circuit provided in an embodiment of the present application;

[0032] Figure 4 Schematic diagram of a power supply voltage switching circuit structure provided by an embodiment of the present application;

[0033] Figure 5 Timing diagram of the power supply voltage during the power supply switching provided by an embodiment of the present application;

[0034] Figure 6 Schematic diagram of a power supply voltage switching method flow provided by an embodiment of the present application. Detailed implementation manners

[0035] The applicant found in the research that, in order to reduce the impact on the internal circuit and avoid affecting the normal operation of the chip, a solution was proposed. By using a switching transistor to shield the high voltage of VOUT, the internal circuit is protected. As Figure 1 shown, switches S1 and S2 are the maximum power supply selection switches. When VIN > VOUT, switch S1 is closed and switch S2 is open. When VIN < VOUT, switch S1 is open and switch S2 is closed; when VIN meets the chip voltage requirement, switch S3 is closed and switch S4 is open, and the internal power supply AVDD is directly powered by VIN; when VIN is too low, switch S3 is open and switch S4 is closed, and AVDD is powered by the higher voltage VOUT instead. Here, the function of the switching transistor MN1 is to shield the high voltage of VOUT and protect the internal circuit. Among them, the gate voltage of the switching transistor MN1 provides a voltage of 2 times VIN for the charge pump 11 (charge pump, also known as a switched-capacitor voltage converter). When switch S4 is closed, it provides a voltage of 2*VIN - Vgs for AVDD, and during the low VIN startup process, VOUT gradually increases. When VOUT exceeds VIN, AVDD = VOUT can be achieved through the charge pump, so that AVDD can be increased to a sufficient voltage as early as possible and as quickly as possible. However, the disadvantage of this method is that, as Figure 2 shown, when VIN drops to the power supply switching moment, AVDD will still step from VIN to 2*VIN - Vgs. If it is assumed that VIN = 3V and Vgs = 1V, AVDD will step from 3V to 5V, which still has a great impact on the internal circuit and thus affects the normal operation of the chip.

[0036] Therefore, the present application provides a power supply voltage switching circuit. By improving the circuit structure, when powered by VOUT, a flexible and adjustable internal power supply voltage is provided for the chip, reducing the fluctuation of the internal power supply voltage during power supply switching, and reducing the impact on the internal circuit, thereby avoiding affecting the normal operation of the chip.

[0037] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.

[0038] Please refer to the Figure 3 accompanying drawings, which shows a block diagram of a power supply voltage switching circuit structure provided by an embodiment of the present application. As Figure 3 shown, an embodiment of the present application provides a power supply voltage switching circuit, which includes: a charge pump 11, switches S1 to S4, a switching transistor MN1, and an adjustable circuit 12, where:

[0039] The first ends of the switch S1, the switch S3, and the charge pump 11 are connected, and their common end is connected to the power supply voltage VIN. One end of the switch S2 is connected to the power supply voltage VOUT. The other end of the switch S1 is connected to the other end of the switch S2, and their common end is respectively connected to the first ends of the switching transistor MN1 and the adjustable circuit 12. The gate of the switching transistor MN1 is connected to the second end of the charge pump 11, and the enable end of the charge pump 11 is connected to an enable signal;

[0040] The drain of the switching transistor MN1 is connected to the second end of the adjustable circuit 12, and their common end is connected to one end of the switch S4. The other end of the switch S3 and the other end of the switch S4 are connected, and their common end serves as the output end of the power supply voltage switching circuit, outputting the internal power supply voltage AVDD;

[0041] The third end of the adjustable circuit 12 is connected to the power supply voltage VOUT. When the power supply voltage VIN drops to a preset voltage point, the internal power supply voltage AVDD is adjusted by adjusting the voltage signal input to the adjustable circuit 12, and the internal power supply voltage AVDD is switched smoothly from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT.

[0042] It should be noted that the charge pump in the embodiments of the present application, also known as a switched-capacitor voltage converter, is a DC-DC (converter) that stores energy using so-called "flying" or "pumping" capacitors (instead of inductors or transformers). The charge pump uses some switching elements to control the voltage connected to the capacitor. For example, in cooperation with a two-stage cycle, a higher pulsed voltage output can be generated with a lower input voltage. In the first stage of the cycle, the capacitor is connected to the power supply terminal and thus charged to the same voltage as the power supply. In the first stage, the circuit configuration is adjusted so that the capacitor and the power supply voltage are in series. Ignoring the effect of leakage current and assuming no load, the output voltage will be twice the input voltage (the original power supply voltage plus the voltage across the capacitor). The pulsed characteristics of the higher output voltage can be filtered by an output filter capacitor.

[0043] In a specific embodiment, the charge pump can eliminate the magnetic fields and electromagnetic interference carried by inductors and transformers. However, there is still a possible minor noise source, which is the high charging current flowing into the fast capacitor when it is connected to an input source or another capacitor with a different voltage. Similarly, the "splitter" charge pump can also improve the efficiency on the LDO without being as complex as an inductive buck regulator.

[0044] In a specific embodiment, as Figure 4 shown, the adjustable circuit 12 described above includes: a switching transistor MN2, a switching transistor MN3, a current source I, and a resistor R, where:

[0045] The source of the switching transistor MN2 is connected to the source of the switching transistor MN1 as the first end of the adjustable circuit 12, and the drain of the switching transistor MN2 is connected to the drain of the switching transistor MN1 as the second end of the adjustable circuit 12;

[0046] The gate of the switching transistor MN2 is connected to the gate of the switching transistor MN3. The gate of the switching transistor MN3 is connected to the source and is connected to the second end of the current source I. The drain of the switching transistor MN3 is grounded through the resistor R;

[0047] One end of the current source I is connected to the power supply voltage VOUT as the third end of the adjustable circuit 12, the other end of the current source I is connected to the source of the switching transistor MN3, and the drain of the switching transistor MN3 is grounded through the resistor R;

[0048] When the power supply voltage VIN drops to the preset voltage point, current is injected onto the resistor R through the current source I to generate a voltage signal V_R = I * R. By adjusting the current value of the current source I and the resistance value of the resistor R, the internal power supply voltage AVDD is adjusted from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT, so as to achieve a smooth switching of the internal power supply voltage AVDD.

[0049] It should be noted that in the embodiments of the present application, the gate signal V_PWR of the switching transistor MN3 and the switching transistor MN2 is generated by adding the voltage signal V_R to the Vgs of the high-voltage transistor MN3. Then the internal power supply voltage AVDD = V_PWR - Vgs_MN2 = V_R + Vgs_MN3 - Vgs_MN2 ≈ I * R. By adjusting the current value of the current source I and the resistance value of the resistor R, the internal power supply voltage AVDD is adjusted from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT, so as to achieve a smooth switching of the internal power supply voltage AVDD.

[0050] It should be noted that in specific embodiments, the switching transistors MN1, MN2, and MN3 are high-voltage transistors.

[0051] It should be noted that in specific embodiments, the charge pump 11 is only used when the chip is powered on and started. After the start is completed, the charge pump 11 is turned off by the input enable signal EN.

[0052] It should be noted that in specific embodiments, when the chip is operating normally, the power supply voltage VOUT is high, the switch S1 is disconnected, the switch S2 is closed, and the internal power supply voltage AVDD is provided by the power supply voltage VOUT.

[0053] It should be noted that in specific embodiments, when the power supply voltage VIN is above the preset voltage point, the switch S3 is closed and the switch S4 is disconnected, and the internal power supply voltage AVDD is provided by the power supply voltage VIN.

[0054] It should be noted that in specific embodiments, when the power supply voltage VIN drops below the preset voltage point, the switch S3 is disconnected, the switch S4 is closed, the charge pump is turned off, the gate of the high-voltage transistor MN1 is 0V, and the internal power supply voltage AVDD is provided by the power supply voltage VOUT through the switch S2 and the high-voltage transistor MN2.

[0055] In the embodiment of the present application, the left charge pump 11 is only used when the chip is powered on and started. After the start is completed, the charge pump 11 is turned off through the enable signal EN; when working normally, VOUT is a high voltage, the switch S1 is disconnected, and the switch S2 is closed; at first, VIN is relatively high, the switch S3 is closed, and the switch S4 is disconnected. As time goes by, VIN slowly decreases. After dropping to the preset voltage point, the switch S3 is disconnected, and the switch S4 is closed. At this time, the charge pump 11 is turned off, the gate of the switching transistor MN1 is 0V, and the internal power supply AVDD is provided by VOUT through the switch S2 and the switching transistor MN2. The right branch current source I injects current onto the resistor R to generate a voltage signal V_R = I * R. The gate signal V_PWR of the switching transistors MN3 and MN2 is generated by adding V_R to the Vgs of MN3. The Vgs of the switching transistors MN3 and MN2 are very close and are approximately considered equal. Then, at this time, AVDD = V_PWR - Vgs_MN2 = V_R + Vgs_MN3 - Vgs_MN2 ≈ I * R. By adjusting the current value of the current source I and the resistance value of the resistor R, and cooperating with the preset VIN switching voltage, a flexible and adjustable internal power supply voltage is provided for the chip, and the internal power supply voltage AVDD is adjusted from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT to achieve a smooth switching of the internal power supply voltage AVDD, reduce the fluctuation of the internal power supply voltage when switching the power supply voltage, and reduce the impact on the internal circuit, thereby avoiding affecting the normal operation of the chip.

[0056] It should be noted that in the embodiment of the present application, the above high-voltage transistors MN1 - MN3 are metal-oxide-semiconductor field-effect transistors, abbreviated as metal-oxide-semiconductor field-effect transistors, MOSFETs, which are a type of field-effect transistor that can be widely used in analog circuits and digital circuits. MOSFETs can be divided into two types, "N-type" and "P-type", according to the polarity of their "channels" (working carriers), and are usually also called NMOSFETs and PMOSFETs. Other abbreviations also include NMOS and PMOS, etc. The source and drain of the MOS transistor can be swapped, and they are both N-type regions formed in the P-type backgate. In most cases, these two regions are the same, and even if the two ends are swapped, it will not affect the performance of the device. Its working principle: Use VGS to control the amount of "induced charge" to change the condition of the conductive channel formed by these "induced charges", and then achieve the purpose of controlling the drain current. When manufacturing the transistor, a large number of positive ions appear in the insulating layer through the process. Therefore, more negative charges can be induced on the other side of the interface. These negative charges connect the N region with high-permeability impurities to form a conductive channel, and there is a large drain current ID even when VGS = 0. When the gate voltage changes, the amount of charge induced in the channel also changes, and the width of the conductive channel also changes accordingly. Therefore, the drain current ID changes with the change of the gate voltage.

[0057] Regardless of whether it is an N-type or P-type MOS transistor, their working principles are essentially the same. The MOS transistor is controlled by the voltage applied to the gate at the input terminal to control the current at the drain terminal at the output. The MOS transistor is a voltage-controlled device. It controls the characteristics of the device through the voltage applied to the gate and does not exhibit the charge storage effect caused by the base current when a bipolar transistor is used as a switch. Therefore, in switching applications, the switching speed of the MOS transistor should be faster than that of the bipolar transistor. The internal structure of the MOS transistor is shown in the following figure; when it is conducting, only one type of carrier (majority carrier) participates in conduction, and it is a unipolar transistor. The conduction mechanism is the same as that of a low-power MOS transistor, but there are significant differences in structure. The low-power MOS transistor is a lateral conduction device, and most power MOSFETs adopt a vertical conduction structure, also known as VMOSFET, which greatly improves the breakdown voltage and current-carrying capacity of the MOSFET device.

[0058] Its main feature is that there is a layer of silicon dioxide insulating layer between the metal gate and the channel, so it has a very high input resistance. When the transistor is conducting, an n-type conducting channel is formed between two high-concentration n-diffusion regions. For an n-channel enhancement-mode MOS transistor, a positive bias voltage must be applied to the gate, and an n-channel MOS transistor with a conducting channel is generated only when the gate-source voltage is greater than the threshold voltage. An n-channel depletion-mode MOS transistor refers to an n-channel MOS transistor that has a conducting channel when no gate voltage (gate-source voltage is zero) is applied.

[0059] It should be noted that the functions of the MOS transistor are as follows: 1. It can be applied to an amplifier circuit. Since the input impedance of the MOS transistor amplifier is very high, the coupling capacitor can have a smaller capacitance, and there is no need to use an electrolytic capacitor. 2. The very high input impedance is very suitable for impedance transformation. It is often used for impedance transformation at the input stage of a multi-stage amplifier. 3. It can be used as a variable resistor. 4. It can be easily used as a constant current source. 5. It can be used as an electronic switch.

[0060] The MOS transistor is a voltage-controlled component. As long as the voltage required for its voltage-controlled component is applied to it, it can be made to conduct. Its conduction is like that of a bipolar transistor in the saturation state, and the voltage drop across the conducting junction is the smallest. This is the so-called classic switching function. Removing this control voltage will cause it to cut off.

[0061] An embodiment of the present application discloses a power supply voltage switching circuit, including: a charge pump, switches S1 to S4, a switching transistor MN1, and an adjustable circuit, wherein: the switch S1, the switch S3, and a first end of the charge pump are connected, and their common end is connected to a power supply voltage VIN; one end of the switch S2 is connected to a power supply voltage VOUT; the other end of the switch S1 is connected to the other end of the switch S2, and their common end is respectively connected to the switching transistor MN1 and a first end of the adjustable circuit; a gate of the switching transistor MN1 is connected to a second end of the charge pump; an enable end of the charge pump is connected to an enable signal; a drain of the switching transistor MN1 is connected to a second end of the adjustable circuit, and their common end is connected to one end of the switch S4; the other end of the switch S3 and the other end of the switch S4 are connected, and their common end serves as an output end of the power supply voltage switching circuit to output an internal power supply voltage AVDD; a third end of the adjustable circuit is connected to the power supply voltage VOUT. When the power supply voltage VIN drops to a preset voltage point, the internal power supply voltage AVDD is adjusted by adjusting a voltage signal input to the adjustable circuit, and the internal power supply voltage AVDD is adjusted from being supplied by the power supply voltage VIN to being supplied by the power supply voltage VOUT, so as to achieve a smooth switching of the internal power supply voltage AVDD. By improving the circuit structure, the present application provides a flexible and adjustable internal power supply voltage for the chip, adjusts the internal power supply voltage AVDD from being supplied by the power supply voltage VIN to being supplied by the power supply voltage VOUT, so as to achieve a smooth switching of the internal power supply voltage AVDD, reduce the fluctuation of the internal power supply voltage when switching the power supply voltage, and reduce the impact on the internal circuit, thereby avoiding affecting the normal operation of the chip.

[0062] As Figure 6 shown, an embodiment of the present application also discloses a power supply voltage switching method. Based on the above-mentioned power supply voltage switching circuit, the power supply voltage switching circuit includes: a charge pump, switches S1 to S4, a switching transistor MN1, and an adjustable circuit. The method includes:

[0063] S601: Compare the power supply voltage VIN with a preset voltage point to determine the magnitude of the power supply voltage VIN;

[0064] S602: When the power supply voltage VIN is above the preset voltage point, the switch S3 is closed, the switch S4 is opened, and the internal power supply voltage AVDD is provided by the power supply voltage VIN;

[0065] S603: When the power supply voltage VIN drops to a preset voltage point, the internal power supply voltage AVDD is adjusted by adjusting the voltage signal input to the adjustable circuit, and the internal power supply voltage AVDD is switched from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT, so as to achieve a smooth switching of the internal power supply voltage AVDD.

[0066] Specifically, the above-mentioned adjustable circuit includes: a switching transistor MN2, a switching transistor MN3, a current source I, and a resistor R. When the power supply voltage VIN drops to the preset voltage point, the internal power supply voltage AVDD is adjusted by adjusting the voltage signal input to the adjustable circuit, and the internal power supply voltage AVDD is switched from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT, so as to achieve a smooth switching of the internal power supply voltage AVDD. Specifically:

[0067] When the power supply voltage VIN drops to the preset voltage point, a current is injected into the resistor R through the current source I to generate a voltage signal V_R = I * R. By adjusting the current value of the current source I and the resistance value of the resistor R, the internal power supply voltage AVDD is switched from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT, so as to achieve a smooth switching of the internal power supply voltage AVDD.

[0068] The embodiment of the present application provides a power supply voltage switching method. Based on the above-mentioned power supply voltage switching circuit, the power supply voltage switching circuit includes: a charge pump, switches S1 to S4, a switching transistor MN1, and an adjustable circuit. The method includes: comparing the power supply voltage VIN with a preset voltage point to judge the magnitude of the power supply voltage VIN; when the power supply voltage VIN is above the preset voltage point, the switch S3 is closed and the switch S4 is opened, and the internal power supply voltage AVDD is provided by the power supply voltage VIN; when the power supply voltage VIN drops to the preset voltage point, the internal power supply voltage AVDD is adjusted by adjusting the voltage signal input to the adjustable circuit, and the internal power supply voltage AVDD is switched from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT, so as to achieve a smooth switching of the internal power supply voltage AVDD. By improving the circuit structure, a flexible and adjustable internal power supply voltage is provided for the chip, and the internal power supply voltage AVDD is switched from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT, so as to achieve a smooth switching of the internal power supply voltage AVDD, reduce the fluctuation of the internal power supply voltage when switching the power supply voltage, and reduce the impact on the internal circuit, thereby avoiding affecting the normal operation of the chip.

[0069] It should be noted that, in this document, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that an article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such article or device. Without further limitation, an element defined by the phrase "comprising an..." does not exclude the presence of additional identical elements in the article or device comprising the above element.

[0070] It should be noted that the above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A power supply voltage switching circuit, characterized in that, For providing an internal power supply voltage AVDD for a chip, including: a charge pump, switches S1 to S4, a switching transistor MN1, and an adjustable circuit, where: The first ends of the switch S1, the switch S3, and the charge pump are connected, and their common end is connected to the power supply voltage VIN. One end of the switch S2 is connected to the power supply voltage VOUT. The other end of the switch S1 is connected to the other end of the switch S2, and their common end is respectively connected to the first end of the switching transistor MN1 and the adjustable circuit. The gate of the switching transistor MN1 is connected to the second end of the charge pump, and the enable end of the charge pump is connected to an enable signal; The drain of the switching transistor MN1 is connected to the second end of the adjustable circuit, and their common end is connected to one end of the switch S4. The other end of the switch S3 and the other end of the switch S4 are connected, and their common end serves as the output end of the power supply voltage switching circuit, outputting the internal power supply voltage AVDD; The third end of the adjustable circuit is connected to the power supply voltage VOUT. When the power supply voltage VIN drops to a preset voltage point, the internal power supply voltage AVDD is adjusted by adjusting the voltage signal input to the adjustable circuit, and the internal power supply voltage AVDD is adjusted from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT, so as to achieve a smooth switching of the internal power supply voltage AVDD.

2. The power supply voltage switching circuit according to claim 1, wherein The adjustable circuit includes: a switching transistor MN2, a switching transistor MN3, a current source I, and a resistor R, where: The source of the switching transistor MN2 serves as the first end of the adjustable circuit and is connected to the source of the switching transistor MN1. The drain of the switching transistor MN2 serves as the second end of the adjustable circuit and is connected to the drain of the switching transistor MN1; The gate of the switching transistor MN2 is connected to the gate of the switching transistor MN3. The gate of the switching transistor MN3 is connected to the source and is connected to the second end of the current source. The drain of the switching transistor MN3 is grounded through the resistor R; One end of the current source I serves as the third end of the adjustable circuit and is connected to the power supply voltage VOUT. The other end of the current source I is connected to the source of the switching transistor MN3, and the drain of the switching transistor MN3 is grounded through the resistor R; When the power supply voltage VIN drops to the preset voltage point, a current is injected into the resistor R through the current source I to generate a voltage signal V_R = I * R. By adjusting the current value of the current source I and the resistance value of the resistor R, the internal power supply voltage AVDD is adjusted from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT, so as to achieve a smooth switching of the internal power supply voltage AVDD.

3. The power supply voltage switching circuit according to claim 2, wherein The gate signal V_PWR of the switching transistor MN3 and the switching transistor MN2 is generated by adding the voltage signal V_R to the Vgs of the switching transistor MN3. Then, the internal power supply voltage AVDD = V_PWR - Vgs_MN2 = V_R + Vgs_MN3 - Vgs_MN2 ≈ I * R. By adjusting the current value of the current source I and the resistance value of the resistor R, the internal power supply voltage AVDD is adjusted from the power supply voltage VIN to the power supply voltage VOUT to achieve smooth switching of the internal power supply voltage AVDD.

4. The power supply voltage switching circuit according to claim 2, wherein The switching transistors MN1, MN2, and MN3 are high-voltage transistors.

5. The power supply voltage switching circuit according to claim 1, wherein The charge pump is only used when the chip is powered on and started. After the start is completed, the charge pump is turned off by the input enable signal EN.

6. The power supply voltage switching circuit according to claim 1, wherein When the chip is operating normally, the power supply voltage VOUT is high, the switch S1 is open, and the switch S2 is closed. If the VIN voltage is greater than VOUT, the switch S1 is closed and the switch S2 is open.

7. The power supply voltage switching circuit according to claim 1, wherein When the power supply voltage VIN is above the preset voltage point, the switch S3 is closed and the switch S4 is open, and the internal power supply voltage AVDD is provided by the power supply voltage VIN.

8. The power supply voltage switching circuit according to claim 1, wherein When the power supply voltage VIN drops below the preset voltage point, the switch S3 is open, the switch S4 is closed, the charge pump is turned off, the gate of the switching transistor MN1 is 0V, and the internal power supply voltage AVDD is provided by the power supply voltage VOUT through the switch S2 and the switching transistor MN2.

9. A power supply voltage switching method, characterized in that, Based on the power supply voltage switching circuit according to any one of the above claims 1-8, the power supply voltage switching circuit includes: a charge pump, switches S1 to S4, a high-voltage transistor MN1, and an adjustable circuit. The method includes: Comparing the power supply voltage VIN with a preset voltage point to determine the magnitude of the power supply voltage VIN; When the power supply voltage VIN is above the preset voltage point, the switch S3 is closed and the switch S4 is open, and the internal power supply voltage AVDD is provided by the power supply voltage VIN; When the power supply voltage VIN drops to the preset voltage point, the internal power supply voltage AVDD is adjusted by adjusting the voltage signal input to the adjustable circuit, and the internal power supply voltage AVDD is adjusted from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT to achieve smooth switching of the internal power supply voltage AVDD.

10. The power supply voltage switching method according to claim 9, characterized in that The adjustable circuit includes: a high-voltage transistor MN2, a high-voltage transistor MN3, a current source I, and a resistor R. When the power supply voltage VIN drops to the preset voltage point, the internal power supply voltage AVDD is adjusted by adjusting the voltage signal input to the adjustable circuit, and the internal power supply voltage AVDD is adjusted from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT to achieve smooth switching of the internal power supply voltage AVDD. Specifically: When the power supply voltage VIN drops to the preset voltage point, current is injected onto the resistor R through the current source I to generate a voltage signal V_R = I * R. By adjusting the current value of the current source I and the resistance value of the resistor R, the internal power supply voltage AVDD is switched from being powered by the power supply voltage VIN to being powered by the power supply voltage VOUT, so as to achieve a smooth switching of the internal power supply voltage AVDD.

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