A high-power signal generator

Abstract

The application provides a high-power signal generator, comprising a man-machine interaction unit, a control unit, an inverter unit and a detection unit. The man-machine interaction unit is used for transmitting a command signal to the control unit. The control unit is connected with the inverter unit and is used for controlling the inverter unit to generate a high-power signal. The inverter unit comprises an inverter circuit and an RLC filter circuit, which are used for generating a high-frequency and variable-frequency high-power sine signal and taking the high-frequency and variable-frequency high-power sine signal as a raw excitation for generating a square wave, a triangular wave and a pulse wave signal. The detection unit performs output sampling at a terminal of the signal generator, performs Fourier transform, calculates a switching angle, superimposes the switching angle with a switching angle calculated by SHEPWM after taking the switching angle as a negative value, and sends the switching angle to the control unit to provide a switching angle negative feedback compensation. The application generates a high-frequency and variable-frequency high-power signal by using the inverter circuit, omits a previous power amplification circuit, further reduces total harmonic distortion of an output end, and has low harmonic content of an output voltage and low electromagnetic interference level.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of signal generator, in particular to a high-power signal generator. BACKGROUND

[0002] Signal generator is a device that can provide various frequency, waveform and output level electrical signal. It has a wide range of applications in circuit design and verification, communication, instruments and meters, etc. The current high-power signal generator generally uses the method of using power amplifier circuit to amplify analog signal. This method has the disadvantage of high power loss. In addition, the frequency of signal generation is greatly limited by the switching frequency of the device, making it difficult to generate high-quality high-frequency AC signals in a wide frequency band.

[0003] The embodiment of the invention patent "Multi-level inverter" discloses a multi-level inverter, which belongs to the field of power electronics. The multi-level inverter comprises a main topology, at least four resistance devices, switching devices and a controller. The main topology comprises a power supply, a flying capacitor and at least four semiconductor switching devices. The flying capacitor is electrically connected with the power supply. The switching devices and the resistance devices are arranged on the connection line between the first end of the flying capacitor and the positive pole of the power supply. The switching devices and the resistance devices are arranged on the connection line between the first end of the flying capacitor and the negative pole of the power supply. The switching devices and the resistance devices are arranged on the connection line between the second end of the flying capacitor and the positive pole of the power supply. The switching devices and the resistance devices are arranged on the connection line between the second end of the flying capacitor and the negative pole of the power supply. The controller is used to control the closing of the switching devices before the main topology works, and control the opening of the switching devices when it is detected that the flying capacitor is fully charged. By using the invention, the semiconductor switching devices can be prevented from being damaged.

[0004] The invention patent "A novel switched capacitor quasi-resonant multi-level inverter" discloses a novel switched capacitor quasi-resonant multi-level inverter, which comprises a switched capacitor module, a quasi-resonant module and a full-bridge inverter module. The input end of the switched capacitor module is connected with a driving power supply V1. The quasi-resonant module is connected in series between the switched capacitor module and the full-bridge inverter module. The switched capacitor module cooperates with the full-bridge inverter module to output the required five-level. The invention completes the resonance between the capacitor and the inductor while realizing the five-level output and the two times boost gain, and eliminates the problems of voltage spike and rapid current change rate in the capacitor charging and discharging process.

[0005] The amplitude of the output signal of the commonly used signal generator is generally within ±30V. The high-power signal generation method using the signal generator in cooperation with the power amplifier circuit has the problems of high power loss, low efficiency, narrow output frequency band and difficulty in generating continuous and stable high-precision signals. In addition, there are many harmonics in high-frequency signal output, and the high-speed conduction state increases the possibility of damage to analog devices. SUMMARY

[0006] In view of the above, the present application provides a high-power signal generator, comprising: a human-computer interaction unit, a control unit, an inverter unit, a detection unit;

[0007] The human-computer interaction unit is configured to deliver a command signal to the control unit.

[0008] The control unit is connected to the inverter unit on the other side and configured to control the inverter unit to generate a high-power signal.

[0009] The inverter unit comprises an inverter circuit and an RLC filter circuit, configured to generate a high-frequency, variable-frequency high-power sinusoidal signal, and use the same as a raw excitation to generate square wave, triangular wave and pulse wave signals.

[0010] The detection unit performs output sampling at the terminal of the signal generator, performs Fourier transform on the collected periodic signal to obtain a harmonic signal in the periodic signal, calculates a switching angle, superimposes the switching angle after taking the inverse of the result with a switching angle calculated by SHEPWM, and sends the superimposed switching angle to the control unit to provide switching angle negative feedback compensation.

[0011] Preferably, the inverter circuit is a single-phase half-bridge inverter circuit or a single-phase full-bridge inverter circuit.

[0012] Preferably, the inverter circuit is a three-phase modular multilevel converter, each phase of which is composed of an upper bridge arm and a lower bridge arm, each bridge arm is composed of n sub-modules with the same structure and sequentially connected voltage terminals, and a bridge arm inductor, the sub-module is a full-bridge sub-module topology or a half-bridge sub-module topology, and the upper half-bridge arm and the lower half-bridge arm are connected in series with two direct current power supplies.

[0013] Preferably, the full-bridge sub-module topology is composed of four switching devices K1, K2, K3 and K4 and a capacitor C, the switching device is an insulated gate bipolar transistor or a metal-oxide semiconductor field effect transistor, the source of K1 is connected to the drain of K2, the source of K3 is connected to the drain of K4, the drain of K1 is connected to the drain of K3 and one end of the capacitor C, and the source of K2 is connected to the source of K4 and the other end of the capacitor C.

[0014] Preferably, the half-bridge sub-module topology is composed of two switching devices K01 and K02 and a capacitor C0, the switching device is an insulated gate bipolar transistor or a metal-oxide semiconductor field effect transistor, the source of K01 is connected to the drain of K02, the drain of K01 is connected to one end of the capacitor C0, and the source of K02 is connected to the other end of the capacitor C0.

[0015] Preferably, the capacitance C0 is calculated by the following formula:

[0016]

[0017] Wherein C0 is the half-bridge sub-module capacitor size, u c_ref is the capacitor voltage rating, Δu c is the allowable capacitor voltage ripple, is the load power factor angle, ω is the fundamental angular frequency, m is the modulation ratio, and N is the number of sub-modules.

[0018] Preferably, the sub-modules each have a corresponding controller connected to the gate of the power switching device in the sub-module; the main controller is connected to the controller 1-2n for controlling the corresponding controllers of the sub-modules.

[0019] Advantages of the present application:

[0020] The present application introduces the idea of inverter circuit into the design of signal generation method, and solves the problem of high-power signal generation method design. The present application generates high-frequency variable-frequency high-power sinusoidal signals by using an inverter circuit, and uses the high-frequency variable-frequency high-power sinusoidal signals as the original excitation for generating square waves, triangular waves, pulse waves and other signals. The selection of the inverter unit is based on the principle of realizing high-frequency variable-frequency inversion. The present application includes a single-phase half-bridge inverter circuit, a single-phase full-bridge inverter circuit, and a modular multi-level converter circuit. The negative feedback idea is introduced into the switching angle calculation problem. The periodic signal collected at the output end of the circuit is subjected to Fourier transform or fast Fourier transform to obtain the harmonic signal in the periodic signal. The switching angle is calculated according to the harmonic signal, and the switching angle is superimposed after being taken inversely and the switching angle calculated by SHEPWM. The superimposed switching angle is sent to the controller in the modular multi-level converter to adjust the conduction state of the sub-modules. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 is a whole scheme design block diagram of a high-power signal generator of the present application;

[0022] Figure 2 is a single-phase half-bridge inverter main circuit topology diagram of an embodiment of the present application;

[0023] Figure 3 is a single-phase full-bridge inverter main circuit topology diagram of an embodiment of the present application;

[0024] Figure 4 is a three-phase modular multi-level converter main circuit topology diagram of an embodiment of the present application;

[0025] Figure 5 is a three-phase modular multi-level converter half-bridge sub-module structure of an embodiment of the present application;

[0026] Figure 6This is the three-phase modular multilevel converter full-bridge sub-module structure of the present invention.

[0027] Figure 7 This is a structural diagram of a three-phase modular multilevel converter with a controller according to an embodiment of the present invention;

[0028] Figure 8 This is a diagram of the negative feedback strategy for adjusting the switching angle according to an embodiment of the present invention. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be further described below with reference to the accompanying drawings.

[0030] One embodiment of the present invention provides a technical solution: a high-power signal generator, comprising: a human-machine interaction unit, a control unit, an inverter unit, and a detection unit;

[0031] The human-machine interface unit is used to transmit command signals to the control unit;

[0032] The other side of the control unit is connected to the inverter unit, which is used to control the inverter unit to generate a high-power signal;

[0033] The inverter unit includes an inverter circuit and an RLC filter circuit, used to generate high-frequency, frequency-converted, high-power sinusoidal signals, which serve as the primary excitation for generating square wave, triangular wave, and pulse wave signals. The inverter circuit is either a single-phase half-bridge inverter circuit or a single-phase full-bridge inverter circuit.

[0034] (1) As Figure 2 As shown, a single-phase half-bridge inverter circuit consists of two power devices (insulated-gate bipolar transistors or metal-oxide-semiconductor field-effect transistors, etc.) and two capacitors. The load is connected between the two capacitors and the two power devices. For circuit simplification, the protection circuit is omitted. The basic idea for achieving inversion is as follows: When K1 is on and K2 is off, the power supply supplies power to the load and charges capacitor C2; when both K1 and K2 are off, no current flows through the negative terminal (dead zone). When K1 is off and K2 is on, capacitor C2 discharges to the load; when both K1 and K2 are off, a dead zone is formed. This process repeats, resulting in the current shown in the diagram across the load, thus achieving the purpose of inversion.

[0035] (2) Figure 3The single-phase full-bridge inverter circuit shown is composed of four power devices (insulated gate bipolar transistors or metal-oxide semiconductor field effect transistors, etc.) and a capacitor, and a load is connected across two pairs of power devices, and protection circuits are omitted for simplicity of the circuit. The basic idea of realizing inversion is as follows: K1 and K4 are turned on, K2 and K3 are turned off, the power supply supplies power to the load in the forward direction; K1-K4 are all turned off, and no current passes through the negative terminal (dead zone); K2 and K3 are turned on, and K1 and K4 are turned off, and the power supply supplies power to the load in the reverse direction; K1-K4 are all turned off, and a dead zone is formed.

[0036] The single-phase bridge inverter circuit adopts a sinusoidal pulse width modulation (SPWM) strategy for inversion. SPWM is a modulation pulse method improved on the basis of PWM for outputting a sinusoidal signal, and its characteristic is that the pulse width time duty cycle is arranged according to a sinusoidal law, and the output waveform can achieve sinusoidal wave output after appropriate filtering.

[0037] The detection unit samples the output at the terminal of the signal generator, Fourier transforms the collected periodic signal to obtain the harmonic signal in the periodic signal, calculates the switching angle, takes the inverse of the result, and superimposes the switching angle calculated by the SHEPWM to send the superimposed switching angle to the control unit to provide switching angle negative feedback compensation to adjust the conduction state of the sub-module, and finally outputs a signal after RLC filtering, as shown in the figure. Figure 8

[0038] The basic principle of the specific harmonic elimination pulse width modulation (SHEPWM) is as follows: Fourier expansion is listed, the fundamental wave amplitude is related to the amplitude of the modulation ratio, and the amplitude of the harmonic to be eliminated is expanded to 0, and a relationship is listed, so that certain specific low-order harmonics in the output voltage waveform can be eliminated.

[0039] In another embodiment of the present application, the present application provides a technical solution: a high-power signal generator, comprising: a human-computer interaction unit, a control unit, an inverter unit, a detection unit;

[0040] The human-computer interaction unit is used to transmit a command signal to the control unit;

[0041] The control unit is connected to the inverter unit on the other side, and is used to control the inverter unit to generate a high-power signal;

[0042] The inverter unit includes an inverter circuit and an RLC filter circuit, and is used to generate a high-frequency, variable-frequency high-power sinusoidal signal, and to generate a square wave, a triangular wave, and a pulse wave signal as a raw excitation. The inverter circuit is a three-phase modular multilevel converter.

[0043] As Figure 4 ​As shown, the three-phase modular multilevel converter is composed of upper and lower bridge arms for each phase, and Ia, Ib and Ic are the bridge arm currents for each phase. Each bridge arm is composed of n sub-modules with the same structure and sequentially connected voltage terminals and a bridge arm inductor. The bridge arm inductor functions to filter, freewheel, limit inter-phase circulating current and reduce voltage impact during switching, etc. The sub-modules are turned on or off by switching tubes. Figure 5 ) or full-bridge sub-module topology structure ( Figure 6 ). The upper and lower half-bridge arms are connected to the series connection of two DC power sources. The output voltage fluctuation is controlled by the turn-on and turn-off of the sub-modules to form n+1-level AC output and realize the inverter function.

[0044] The modular multilevel converter can independently control the turn-on and turn-off of each sub-module. When the sub-module is turned on, the sub-module voltage U sm = U c (Uc is the stable voltage of the sub-module when it is working), and when the sub-module is turned off, the sub-module voltage U sm = 0. Since the sub-modules are controlled independently, the upper and lower bridges can be regarded as independent controlled voltage sources, each sub-module capacitor voltage is equal, and the DC bus voltage can be regarded as an ideal voltage source with a voltage of U dc .

[0045] As shown in Figure 7 , each sub-module has a corresponding controller connected to the gate of the power switching device in the sub-module. The main controller is connected to the controllers 1-2n for controlling the corresponding controllers of the sub-modules. The number of controller connections is not limited by the legend and is determined by the actual situation.

[0046] As shown in Figure 6 , the full-bridge sub-module topology structure is composed of four switching devices K1, K2, K3 and K4 and a capacitor C. The switching devices are insulated gate bipolar transistors or metal-oxide semiconductor field effect transistors. The source of K1 and the drain of K2 are connected, the source of K3 and the drain of K4 are connected, the drain of K1 and the drain of K3 are connected and connected to one end of the capacitor C, and the source of K2 and the source of K4 are connected and connected to the other end of the capacitor C.

[0047] As shown in Figure 5 , the half-bridge sub-module topology structure is composed of two switching devices K01 and K02 and a capacitor C0. The switching devices are insulated gate bipolar transistors or metal-oxide semiconductor field effect transistors. The source of K01 and the drain of K02 are connected, the drain of K01 and one end of the capacitor C0 are connected, and the source of K02 and the other end of the capacitor C0 are connected.

[0048] The half-bridge sub-module mainly has two working modes of input and cut-off. When the half-bridge sub-module is input, the upper switch tube is turned on, the lower switch tube is turned off, the capacitor is connected to the circuit at this time, and the voltage at the interface is equal to the voltage of the capacitor. When the half-bridge sub-module is cut off, the lower switch tube is turned on, the upper switch tube is turned off, the capacitor is not connected to the circuit at this time, the voltage at the interface is equal to zero, and the sub-module acts as a wire.

[0049] The capacitor of the half-bridge sub-module is calculated according to the maximum ripple voltage, and the capacitance value of the capacitor C0 of the half-bridge sub-module is calculated by the formula:

[0050]

[0051] Where C0 is the size of the half-bridge sub-module capacitor, u c_ref is the rated value of the capacitor voltage, Δu c is the allowed capacitor upper ripple voltage, φ is the load power factor angle, ω is the fundamental angular frequency, m is the modulation ratio, and N is the number of sub-modules.

[0052] The number of sub-modules in the main topology is selected according to the following principles: when the system is running, the total voltage of the total sub-modules input in the bridge arm is equal to the input voltage on the DC side, that is, the minimum number of sub-modules is limited by the withstand voltage of the sub-module switch tube and the withstand voltage of the capacitor; the more the number of sub-modules, the smoother the output waveform and the lower the harmonic, so as to reduce the harmonic as the main consideration standard; in a certain harmonic elimination pulse width modulation circuit, the number of sub-modules determines the number of levels, and also affects the number of switching angles, which is equal to the number of harmonics that can be eliminated plus one.

[0053] The selection of the bridge arm inductance in the main topology affects filtering, freewheeling, limiting inter-phase circulating current, and reducing voltage impact when switching, etc. The bridge arm inductance value is selected to avoid the resonance point, and generally the inductance value is greater than the bridge arm inductance value at twice the harmonic resonance. The specific bridge arm inductance value still needs to consider the specific power, the harmonic suppression of circulating current, the DC side short-circuit current and other factors to meet the actual operation situation.

[0054] The detection unit outputs sampling at the terminal of the signal generator, Fourier transforms the collected periodic signal to obtain the harmonic signal in the periodic signal, calculates the switching angle, takes the inverse of the result, and superimposes the switching angle calculated by the SHEPWM to send the superimposed switching angle to the control unit to provide switching angle negative feedback compensation to adjust the conduction state of the sub-module, and finally outputs the signal after RLC filtering, as shown in Figure 8 .

[0055] The basic principle of the specific harmonic elimination pulse width modulation (SHEPWM) is: list the Fourier expansion, make the fundamental amplitude related to the modulation ratio, and make the harmonic amplitude to be eliminated equal to 0 after expansion, list the relationship, and some specific low-order harmonics in the output voltage waveform can be eliminated.

[0056] Take the three-phase bridge PWM circuit as an example, suppose that the inverter bipolar output voltage changes three times in 1 / 4 cycle, that is, six switching angles in 1 / 2 cycle, so in 1 / 2 cycle axis even symmetry. In a cycle, the waveform is about odd symmetry, and then Fourier series description.

Claims

1. A high power signal generator, characterized by, It comprises: A human-computer interaction unit, a control unit, an inverter unit and a detection unit; The human-computer interaction unit is used to deliver command signals to the control unit; The control unit is connected with the inverter unit on the other side, and is used to control the inverter unit to generate a high-power signal; The inverter unit comprises an inverter circuit and an RLC filter circuit, and is used to generate a high-frequency, variable-frequency high-power sinusoidal signal, and to take the sinusoidal signal as a raw excitation for generating square wave, triangular wave and pulse wave signals; The detection unit performs output sampling at the terminal of the signal generator, performs Fourier transform on the collected periodic signal to obtain a harmonic signal in the periodic signal, calculates a switching angle, takes the result in reverse, superimposes the switching angle calculated through the SHEPWM, and sends the superimposed switching angle to the control unit to provide switching angle negative feedback compensation; The inverter circuit is a three-phase modular multilevel converter, each phase of the three-phase modular multilevel converter is composed of upper and lower bridge arms, each bridge arm is composed of n sub-modules with the same structure and sequentially connected voltage terminals and a bridge arm inductor, the sub-module is a full-bridge sub-module topology or a half-bridge sub-module topology, and the upper half-bridge arm and the lower half-bridge arm are respectively connected with the series connection of two DC power supplies; The full-bridge sub-module topology is composed of four switching devices K1, K2, K3 and K4 and a capacitor C, the source of K1 is connected with the drain of K2, the source of K3 is connected with the drain of K4, the drain of K1 is connected with the drain of K3 and connected with one end of the capacitor C, and the source of K2 is connected with the source of K4 and connected with the other end of the capacitor C; The half-bridge sub-module topology is composed of two switching devices K01 and K02 and a capacitor C0, the source of K01 is connected with the drain of K02, the drain of K01 is connected with one end of the capacitor C0, and the source of K02 is connected with the other end of the capacitor C0; The capacitance value of the capacitor C0 is calculated by the following formula: wherein is the half-bridge sub-module capacitance size, is the capacitor voltage rating, is the allowed capacitor voltage over-shoot, is the load power factor angle, is the fundamental angular frequency, m is the modulation ratio, and N is the number of sub-modules.

2. A high power signal generator as claimed in claim 1, characterized in that: Each sub-module has a corresponding controller, and the controller is connected to the gate of the power switching device in the sub-module; The main controller is connected to the controllers 1-2n, and is used to control the corresponding controllers of the sub-modules.

3. A high power signal generator as claimed in claim 1, characterized in that: The switching device is an insulated gate bipolar transistor or a metal-oxide semiconductor field effect transistor.

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