Substrate for miniature LED and preparation method thereof, epitaxial wafer

Abstract

The invention discloses a substrate for miniature LEDs and a preparation method thereof, and an epitaxial wafer, and relates to the field of semiconductor optoelectronic devices and semiconductor lighting manufacturing. The preparation method of the substrate comprises: providing an initial substrate, coating a negative photoresist, underexposure, and developing to obtain an intermediate, sequentially forming an aluminum oxide film and a silicon oxide film on the surface of the intermediate, and finally removing the negative photoresist to obtain a finished substrate for miniature LEDs; the substrate obtained by the preparation method of the invention can change the light emission angle, increase the external quantum efficiency, and increase the light emission performance of the LED.

Description

Technical Field

[0001] The invention relates to the field of semiconductor optoelectronic devices and semiconductor lighting manufacturing, and in particular to a substrate for miniature LEDs and a preparation method thereof, and an epitaxial wafer. Background Art

[0002] In recent years, GaN-based light-emitting diodes (LEDs) have been widely used in backlight sources for panel displays and solid-state lighting. Although the commercialization of GaN-based LEDs is very mature, the low external quantum efficiency (EQE) of LEDs is still a problem that plagues the LED industry. There are two main factors that affect EQE: internal quantum efficiency (IQE) and light extraction efficiency (LEE). The low crystal quality of the epitaxial GaN layer, the lattice mismatch between the epitaxial GaN layer and the sapphire substrate of 16%, and the thermal expansion coefficient mismatch of 23% have resulted in a high density of dislocations (108-1010 / cm2) in the epitaxial GaN layer, low internal quantum efficiency, and deteriorated performance of LED devices. Based on the refractive index of GaN (n=2.4) and air (n=1), the critical angle for total reflection at the GaN-air interface when the LED emits light is only 23°, which seriously limits the improvement of the LEE of GaN-based LEDs. To this end, the industry has proposed many methods to improve EQE, including patterned sapphire substrate (PSS technology), epitaxial lateral overgrowth (ELOG), semi-polar / non-polar technology, and nano-poly GaN technology, etc. Among these technologies, the PSS method is widely used in the LED industry due to its large output and mature technology.

[0003] PSS technology mainly optimizes PSS graphics and size, and improves IQE and LEE by reducing threading dislocations and enhancing light scattering. At present, the industry generally uses SiO2 or photoresist (PR glue) as a mask to form PSS substrates of various shapes and SiO2 embedded PSS substrates through wet etching or ICP dry etching processes; however, the wet etching process is difficult to finely control the line width and other key difficulties, and the ICP dry etching process has the problems of complex process, long time consumption and high cost.

[0004] At the same time, in the application field of Mini-LED backlight, the light diffusion distance (OD) between the backlight panel and the liquid crystal panel is a very important factor. If the distance between the Mini-LED backlight panel and the liquid crystal panel is not enough, dark areas are likely to be generated between the chips, and good light mixing uniformity cannot be guaranteed, which makes it difficult to achieve an ultra-thin design for the backlight module. Using a large number of densely packed LED packaged lamp beads on the panel can reduce the mixing distance, but this method is costly, and because of the height limitation of the packaged lamp beads themselves, the thickness of the backlight panel cannot be reduced. Another method is to use packaging to perform secondary optical design, and adjust the light emission angle distribution by adding lenses to increase the light emission angle of the backlight lamp beads. However, this requires complex modeling calculations and manufacturing processes. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a method for preparing a substrate for a miniature LED, wherein the prepared substrate can change the light emission angle, increase the external quantum efficiency, and improve the light emitting performance of the LED.

[0006] Another technical problem to be solved by the present invention is to provide a substrate for a miniature LED.

[0007] Another technical problem to be solved by the present invention is to provide an epitaxial wafer.

[0008] Another technical problem to be solved by the present invention is to provide a miniature LED chip.

[0009] In order to solve the above problems, the present invention discloses a method for preparing a substrate for a miniature LED, which comprises:

[0010] (1) providing an initial substrate;

[0011] (2) forming a negative photoresist layer on the surface of the initial substrate;

[0012] (3) exposing the negative photoresist in a predetermined area to form an exposure area and a non-exposure area;

[0013] (4) developing the initial substrate obtained in step (3) to remove the negative photoresist in the non-exposed area to form an array mask to obtain an intermediate;

[0014] (5) forming an aluminum oxide film on the surface of the intermediate;

[0015] (6) forming a silicon oxide film on the aluminum oxide film;

[0016] (7) removing the array mask and the aluminum oxide film and silicon oxide film thereon, thereby obtaining a finished substrate for miniature LEDs;

[0017] In step (3), the photoresist is exposed by an underexposure process so that the photoresist in the non-exposed area is in an inverted trapezoidal shape that is wider at the top and narrower at the bottom, and then an inverted terrace-shaped array mask that is wider at the top and narrower at the bottom is formed after development.

[0018] As an improvement of the above technical solution, in step (4), an array mask is formed by overdevelopment, so that a portion of the negative photoresist close to the initial substrate is dissolved, and an inscribed concave portion is formed at the bottom of the inverted terrace-shaped array mask;

[0019] The overdevelopment time is 1.3 to 2 times of the normal development time.

[0020] As an improvement of the above technical solution, in step (3), during exposure, the mask is in full contact with the initial substrate to reduce the standing wave effect during exposure;

[0021] The exposure wavelength is 300-450 nm, and the exposure amount is 30%-80% of the normal exposure amount.

[0022] As an improvement of the above technical solution, in step (4), the development time is 30-600s.

[0023] As an improvement of the above technical solution, the angle between the upper edge of the inverted cone array mask and the plane where the initial substrate is located is 45-80°;

[0024] The spacing between adjacent array masks is 0.5-5 μm.

[0025] As an improvement of the above technical solution, in step (6), a 0.1-2 μm aluminum oxide film is deposited by a plasma-assisted evaporation process;

[0026] In step (7), a 0.1-2 μm silicon oxide film is deposited using a plasma assisted evaporation process.

[0027] Correspondingly, the present invention also discloses an epitaxial wafer, which includes the above-mentioned substrate.

[0028] As an improvement of the above technical solution, it also includes an aluminum nitride layer, a u-GaN layer, an N-GaN layer, an InGaN / GaN superlattice layer, an InGaN / GaN multi-quantum well layer, an electron blocking layer and a P-GaN layer which are sequentially arranged on the substrate.

[0029] Correspondingly, the present invention also discloses a miniature LED, which includes the above-mentioned substrate.

[0030] The implementation of the present invention has the following beneficial effects:

[0031] 1. The method for preparing a substrate for a miniature LED of the present invention forms an inverted array mask that is wide at the top and narrow at the bottom on the surface of the substrate by controlling the exposure and development processes, and then forms a dome-shaped EPSS substrate pattern after forming an aluminum oxide film and a silicon oxide film and removing the array mask. This substrate presents an obvious peak at the two luminous angles of -50° and +50°, and a trend of decreasing light intensity at the luminous angle of 0° in the vertical direction, and the overall light output presents a bat-wing-shaped light output distribution. That is, the substrate in the present invention can change the light output angle in the interface area of ​​the dome, and convert part of the light from axial light into lateral light output, so while increasing the external quantum efficiency, it can also increase the light output angle of the chip.

[0032] 2. The epitaxial wafer provided by the present invention is arranged on the substrate of the present invention. Since there is a silicon oxide film on the surface of the substrate pattern, a large number of gallium nitride point seeds can be formed on the side walls of the silicon oxide film during the epitaxial deposition process, thereby promoting the lateral growth of the GaN material, inducing mutual bending and annihilation between dislocations in the substrate region, thereby effectively suppressing the dislocation density caused by the lattice mismatch of the material, reducing stress strain, and thus improving the crystal quality of the GaN epitaxial layer. On the other hand, this arc dome-shaped substrate pattern will increase the scattering effect of light on the GaN-SiO2 interface, increase the probability of the light field escaping to the side of the chip, reduce the axial light intensity, and increase the lateral light intensity, thereby increasing the light output angle of the chip, which is beneficial to the application field of ultra-high-definition ultra-thin Mini LED backlight. In addition, the strong electric field emitted by the substrate in the present invention is more widely distributed in the air, the field value in the air layer at the top of the chip is enhanced, and the light energy trapped in the layer is weakened, thereby improving the light extraction efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 is a flow chart of a method for preparing a substrate of a miniature LED in one embodiment of the present invention;

[0034] Figure 2 is a schematic structural diagram of a substrate after step S2 in one embodiment of the present invention;

[0035] Figure 3 is a schematic structural diagram of a substrate after step S3 in one embodiment of the present invention;

[0036] Figure 4 is a schematic structural diagram of a substrate after step S3 in another embodiment of the present invention;

[0037] Figure 5 is an electron microscope image of the array mask after step S3 in another embodiment of the present invention;

[0038] Figure 6 is a schematic structural diagram of a substrate after step S6 in one embodiment of the present invention;

[0039] Figure 7 is an electron microscope image of the substrate after step S7 in one embodiment of the present invention;

[0040] Figure 8 It is a light distribution curve diagram of the miniLED prepared by the substrate in the embodiments and comparative examples of the present invention. DETAILED DESCRIPTION

[0041] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention is described in further detail below.

[0042] refer to Figure 1 The present invention discloses a method for preparing a substrate for a miniature LED, which comprises the following steps:

[0043] S1: providing an initial substrate;

[0044] Specifically, the initial substrate is a sapphire substrate or a silicon substrate, but is not limited thereto. Preferably, it is a sapphire substrate. Further preferably, the initial substrate in the present invention is a planar sapphire substrate, that is, its surface does not have a micro-pyramid structure.

[0045] Furthermore, the initial substrate is cleaned, specifically, a mixed solution of sulfuric acid and hydrogen peroxide, and a mixed solution of acetone and isopropanol are sequentially used to clean the initial substrate to remove pollutants on its surface. It should be noted that the cleaning solution used is not limited thereto.

[0046] S2: forming a negative photoresist layer on the surface of the initial substrate;

[0047] Specifically, a negative photoresist is coated on one side of the initial substrate 1 and dried to form a negative photoresist layer 2. Specifically, the thickness of the negative photoresist layer is 0.5-5um. If the thickness is less than 0.5um, the standing wave effect is significant during the exposure process, the array mask formed by exposure and development is irregular, and the subsequent aluminum oxide film and silicon oxide film are difficult to be effectively disconnected at the array mask, and it is difficult to form a dome-shaped EPSS substrate pattern; if the thickness is greater than 5um, a clear micro-pattern structure cannot be formed.

[0048] It should also be noted that only negative photoresist can be used in the present invention, because only negative photoresist can form an inverted trapezoidal photolithography pattern, so that the aluminum oxide film and silicon oxide film deposited subsequently will be disconnected in the inverted trapezoidal area to form a dome-shaped EPSS substrate pattern. If a positive photoresist is used, the aluminum oxide and silicon oxide materials deposited subsequently will form a continuous film layer, and a dome-shaped EPSS substrate pattern cannot be formed.

[0049] S3: exposing the negative photoresist in the preset area to form an exposure area and a non-exposure area;

[0050] Specifically, the exposure is performed by using an underexposure process so that the photoresist in the exposure area is in an inverted trapezoidal shape with a wide top and a narrow bottom (see Figure 2 ), and then this inverted trapezoidal shape forms a plurality of array-distributed inverted terrace array masks 21 after development (see Figure 3 ).

[0051] Specifically, the exposure process in the present invention is carried out in a contact photolithography machine, that is, the mask is in full contact with the initial substrate coated with negative photoresist, thereby reducing the standing wave effect during exposure. The exposure amount is based on the minimum exposure amount without residue after development. Preferably, in one embodiment of the present invention, the wavelength of the light used for exposure is 300-450nm, and the exposure amount is 30-80% of the normal exposure amount.

[0052] S4: developing the initial substrate obtained in step S3 to remove the negative photoresist in the non-exposed area, forming an array mask, and obtaining an intermediate;

[0053] Specifically, the initial substrate obtained in step S3 is immersed in a developer for a preset time to remove the negative photoresist in the unexposed area to form a plurality of array-distributed inverted terrace array masks, and a trapezoidal portion 3 for forming an EPSS substrate pattern is provided between the inverted terrace array masks. Specifically, the distance between adjacent array masks 21 (i.e., the bottom width of the trapezoidal portion) is 0.5 to 5 μm. When the distance is less than 0.5 μm, the aluminum oxide film 4 and the silicon oxide film 5 are difficult to be effectively disconnected between the trapezoidal portion 3 and the array mask 21, and a continuous film layer will be formed. When the distance is greater than 5 μm, there are fewer protruding points in the EPSS substrate pattern formed, and it is difficult to effectively improve the external quantum efficiency.

[0054] Specifically, the main component of the developer is tetramethylammonium hydroxide (TMAH), and the overdevelopment time is 1.3 to 2 times of the normal development time, preferably 1.5 times.

[0055] Specifically, the angle α between the upper edge of the inverted array mask and the plane where the initial substrate is located is 45 to 80° ( Figure 3 ). If α is less than 45°, the inverted array mask is prone to collapse, resulting in damage to the EPSS substrate pattern. If α is greater than 80°, the aluminum oxide film and the silicon oxide film are difficult to be effectively disconnected between the trapezoidal portion 3 and the array mask 21, and a continuous film layer will be formed.

[0056] Preferably, in one embodiment of the present invention, the array mask is formed by overdevelopment so that the negative photoresist near the initial substrate is dissolved, thereby forming an inscribed concave portion at the bottom of the inverted array mask (see Figure 4 , Figure 5 ). Based on this shape of array mask, a double dome structure EPSS substrate pattern can be formed, further improving the external quantum efficiency and increasing the light output angle of the finished chip.

[0057] S5: forming an aluminum oxide film 4 on the surface of the intermediate;

[0058] Specifically, the aluminum oxide film 4 may be formed by electron evaporation, magnetron sputtering, etc., but is not limited thereto. Preferably, the aluminum oxide film is deposited by plasma-assisted evaporation. The thickness of the aluminum oxide film is 0.1 to 2 μm, but is not limited thereto.

[0059] S6: forming a silicon oxide film 5 on the aluminum oxide film;

[0060] Specifically, the silicon oxide film 5 can be formed by electron evaporation, magnetron sputtering and other methods, but is not limited thereto. In the process of forming the silicon oxide film, the inscribed concave part of the inverted array mask will also form silicon oxide material, thereby forming a dome-shaped EPSS substrate pattern with low sides and high middle ( Figure 6 , Figure 7 ).

[0061] Preferably, a plasma-assisted evaporation process is used to deposit the silicon oxide film. Based on this process, during the evaporation process, due to the free path diffusion of molecules in a vacuum state, more silicon oxide material is deposited in the inscribed concave portion of the inverted terrace array mask, which can increase the width (diameter) of the bottom of the dome-shaped EPSS substrate pattern and improve the external quantum efficiency. Figure 6 , Figure 7 ).

[0062] S7: removing the array mask and the aluminum oxide film and silicon oxide film thereon, thereby obtaining a finished substrate for miniature LEDs;

[0063] Specifically, the array mask and the aluminum oxide film and silicon oxide film thereon are removed by wet stripping, oxygen stripping or plasma stripping to obtain a finished substrate for miniature LEDs.

[0064] Correspondingly, the present invention also discloses an epitaxial wafer, which includes the above-mentioned substrate, and also includes an aluminum nitride layer, a u-GaN layer, an N-GaN layer, an InGaN / GaN superlattice layer, an InGaN / GaN multi-quantum well layer, an electron blocking layer and a P-GaN layer sequentially arranged on the substrate, but is not limited to this.

[0065] The present invention is described below with specific embodiments:

[0066] Example

[0067] This embodiment provides a method for preparing a substrate for a miniature LED, which includes:

[0068] (1) providing a sapphire substrate, and sequentially cleaning the initial substrate with a mixed solution of sulfuric acid and hydrogen peroxide, and a mixed solution of acetone and isopropanol;

[0069] (2) forming a negative photoresist layer with a thickness of 350 nm on the surface of the cleaned sapphire substrate;

[0070] (3) Exposure: Full contact exposure is adopted, that is, the mask is in full contact with the sapphire substrate, wherein the exposure wavelength is 350nm and the exposure amount is 60% of the normal exposure amount;

[0071] (4) Overdevelopment: The intermediate is immersed in a developer for development. After normal pattern development is completed, the development time is increased by 50% to form an array mask to obtain an intermediate; the distance between adjacent array masks is 2.5 μm, and the angle between the upper edge of the array mask and the plane where the sapphire substrate is located is 65°;

[0072] (5) Aluminum oxide film with a thickness of 1 μm was deposited by plasma-assisted evaporation process;

[0073] (6) Plasma-assisted evaporation process to deposit a silicon oxide film with a thickness of 1 μm;

[0074] (7) The array mask and the aluminum oxide film and silicon oxide film thereon are removed to obtain a finished substrate for miniature LEDs.

[0075] Comparative Example

[0076] In this comparative example, a commercially available PSS substrate (Zhongtu Semiconductor D27) was used.

[0077] The substrates obtained in the examples and comparative examples were made into microLED chips (200 μm) according to conventional processes (201110189797.0), and tested using a distributed photometer. The test results are as follows: Figure 8 shown.

[0078] As can be seen from the figure, the light distribution curve of the traditional PSS-LED chip presents a Lambertian distribution, the axial light intensity of the chip light-emitting area is high, the light intensity at the edge of the chip gradually decreases, the light emission is mainly concentrated on the front axial light, and the light emission angle is small. The EPSS-LED chip of the present invention presents an obvious peak at the two light-emitting angles of -50° and +50°, and shows a trend of decreasing light intensity at the vertical light-emitting angle of 0°. The overall light emission presents a bat-wing-shaped light emission distribution, which increases the external quantum efficiency while also increasing the light emission angle of the chip.

[0079] The above is a preferred embodiment of the invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the invention. These improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A method for preparing a substrate for a miniature LED, characterized in that: include: (1) Providing an initial substrate; (2) forming a negative photoresist layer on the surface of the initial substrate; (3) exposing the negative photoresist in a predetermined area to form an exposure area and a non-exposure area; (4) developing the initial substrate obtained in step (3) to remove the negative photoresist in the non-exposed area to form an array mask to obtain an intermediate; (5) forming an aluminum oxide film on the surface of the intermediate; (6) forming a silicon oxide film on the aluminum oxide film; (7) removing the array mask and the aluminum oxide film and silicon oxide film thereon, thereby obtaining a finished substrate for miniature LEDs; In step (3), the photoresist is exposed by an underexposure process, so that the photoresist in the non-exposed area is in an inverted trapezoidal shape that is wide at the top and narrow at the bottom, and then an inverted terrace-shaped array mask that is wide at the top and narrow at the bottom is formed after development; During exposure, the mask is in full contact with the initial substrate to reduce the standing wave effect during exposure; the exposure wavelength is 300~450nm, and the exposure amount is 30%-80% of the normal exposure amount; In step (4), an array mask is formed by overdevelopment, so that a portion of the negative photoresist close to the initial substrate is dissolved, and an inscribed recess is formed at the bottom of the inverted terrace array mask; wherein the overdevelopment time is 1.3 to 2 times the normal development time.

2. The method for preparing a substrate for a miniature LED according to claim 1, characterized in that: In step (4), the developing time is 30-600s.

3. The method for preparing a substrate for a miniature LED according to claim 1, characterized in that: The angle between the upper edge of the inverted cone array mask and the plane where the initial substrate is located is 45-80°; The spacing between adjacent array masks is 0.5-5 μm.

4. The method for preparing a substrate for a miniature LED according to claim 1, characterized in that: In step (6), a 0.1-2 μm aluminum oxide film is deposited by plasma assisted evaporation process; In step (7), a 0.1-2 μm silicon oxide film is deposited using a plasma assisted evaporation process.

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