Circuit board structure and method of manufacturing the same

Abstract

The present application provides a circuit board structure and a manufacturing method thereof. The circuit board structure includes a first circuit board; a second circuit board, wherein the first circuit board and the second circuit board are stacked on each other; a plurality of conductive bumps formed between the first circuit board and the second circuit board; and a plurality of spacers formed between the first circuit board and the second circuit board and spaced apart from the conductive bumps. The present application also provides a method for manufacturing a circuit board structure. In this way, the difficulty of wiring the signal line can be effectively reduced, and the short circuit of the conductive bumps can be effectively prevented.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the field of circuit board, and in particular, to a circuit board structure and a manufacturing method thereof. BACKGROUND

[0002] A conventional rigid printed circuit board (PCB) includes a plurality of components, a plurality of signal lines connected to the components, and a plurality of metal lines connected between the signal lines on the front and back surfaces thereof. As the number of components increases, the wiring of the signal lines becomes more difficult. SUMMARY

[0003] The present disclosure is accomplished in view of the above problems, and provides a circuit board structure and a manufacturing method thereof capable of effectively reducing the difficulty of wiring signal lines.

[0004] To solve the above problems, the present disclosure provides a circuit board structure, comprising:

[0005] a first circuit board;

[0006] a second circuit board, wherein the first circuit board and the second circuit board are stacked on top of each other;

[0007] a plurality of conductive bumps formed between the first circuit board and the second circuit board; and

[0008] a plurality of spacers formed between the first circuit board and the second circuit board and spaced apart from the conductive bumps.

[0009] To solve the above problems, the present disclosure also provides a method of manufacturing a circuit board structure, comprising:

[0010] providing a first circuit board and a second circuit board;

[0011] forming a plurality of conductive bumps on the second circuit board;

[0012] after forming the conductive bumps, forming a plurality of spacers on one of the first circuit board and the second circuit board, the spacers being spaced apart from the conductive bumps; and

[0013] coupling the conductive bumps to the first circuit board.

[0014] Compared with the prior art, a plurality of conductive bumps are formed between the first circuit board and the second circuit board, and a plurality of spacers are formed, the plurality of spacers being spaced apart from the plurality of conductive bumps, which can effectively reduce the difficulty of wiring signal lines while effectively preventing the conductive bumps from short-circuiting. BRIEF DESCRIPTION OF DRAWINGS

[0015] Aspects of the disclosure are best understood from the following detailed description when read in conjunction with the accompanying drawings. It is noted that, for the purposes of conciseness and clarity, various features are not necessarily drawn to scale in the various diagrams. Indeed, the dimensions of the various features can be arbitrarily increased or reduced for the sake of presentation.

[0016] Figure 1 is a schematic cross-sectional view showing a circuit board structure of a first embodiment of the present disclosure.

[0017] Figure 2 is a schematic plan view of a first circuit board of the circuit board structure of Figure 1 a first embodiment of the present disclosure.

[0018] Figure 3 is a schematic plan view of a second circuit board of the circuit board structure of Figure 1 a first embodiment of the present disclosure.

[0019] Figures 4-11 is a schematic cross-sectional view showing an intermediate stage of manufacturing the circuit board structure of Figure 1 some embodiments of the present disclosure.

[0020] Figure 12 is a schematic cross-sectional view showing a circuit board structure of a second embodiment of the present disclosure.

[0021] Figure 13A is a schematic plan view of a first circuit board of the circuit board structure of Figure 12 a second embodiment of the present disclosure.

[0022] Figure 13B is a schematic plan view of a second circuit board of the circuit board structure of Figure 12 a second embodiment of the present disclosure.

[0023] Figure 14 is a schematic cross-sectional view showing a circuit board structure of a third embodiment of the present disclosure.

[0024] Figure 15A is a schematic plan view of a first circuit board of the circuit board structure of Figure 14 a third embodiment of the present disclosure.

[0025] Figure 15B is a schematic plan view of a second circuit board of the circuit board structure of Figure 14 a third embodiment of the present disclosure.

[0026] Figure 16 is a schematic cross-sectional view showing a circuit board structure of a fourth embodiment of the present disclosure.

[0027] Figure 17is a schematic cross-sectional view showing a circuit board structure of a fifth embodiment of the present disclosure.

[0028] Figure 18 is a schematic cross-sectional view showing a circuit board structure of a sixth embodiment of the present disclosure.

[0029] Figure 19 is a flowchart showing a method of manufacturing a circuit board structure of some embodiments of the present disclosure. Figure 1 DETAILED DESCRIPTION

[0030] The detailed description of the present disclosure is described below with reference to the accompanying drawings. It is to be understood, however, that the description and drawings disclosed herein are merely illustrative and exemplary, and are not intended to limit the scope of the present disclosure.

[0031] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the present disclosure. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising," or "includes" and / or "including" when used herein, specify the presence of stated features, regions, integers, steps, operations, elements, and / or components but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and / or groups thereof. Unless otherwise specified or limited, the terms "mounting," "connected," "supported," and "coupled" and variations thereof are used broadly and encompass both direct and indirect mounting, connecting, supporting, and coupling. Further, "connected" and "coupled" are not restricted to physical or mechanical connections or couplings.

[0032] It will be understood that the terms "and / or," and "at least one of" include any and all combinations of one or more of the associated listed items. It will be further understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or steps, these elements, components, regions, layers and / or steps should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer and / or step from another element, component, region, layer and / or step. Thus, a first element, component, region, layer and / or step discussed below could be termed a second element, component, region, layer and / or step without departing from the teachings of the present disclosure.

[0033] (FIRST EMBODIMENT)

[0034] ​Figure 1 is a schematic cross-sectional view illustrating a circuit board structure 100 of a first embodiment of the present disclosure. As shown, the circuit board structure 100 includes a first circuit board 110, a second circuit board 120, a plurality of conductive bumps 130 (only one conductive bump 130 is illustrated in the middle) and a plurality of spacers 140. The first circuit board 110 is a rigid circuit board, for example, a rigid printed circuit board (PCB), and is composed of one or more board layers 110a. As shown, the first circuit board 110 (e.g., a mother board) includes a plurality of components 110b mounted on (i.e., soldered to) a front side and / or a back side of the board layers 110a, a plurality of signal lines 110c formed on the front side and / or the back side of the board layers 110a and connected to one or more of the components 110b, an electrical ground (not shown) formed on the front side and / or the back side of the board layers 110a and connected to one or more of the components 110b, a plurality of metal lines 110d (only one metal line 110d is labeled in the middle) formed in the board layers 110a and connected between the signal lines 110c on the front side and the back side of the board layers 110a and / or between the electrical ground on the front side and the back side of the board layers 110a. Figure 1 Figure 1 Figure 1 Figure 1

[0035]

[0036]

[0037] Figure 1

[0038] ​​​​​​​​In the present embodiment, the second circuit board 120 is stacked on the back surface of the first circuit board 110 and the signal lines 110c of the back surface of the first circuit board 110 are interconnected, thereby reducing the difficulty of routing the signal lines of the first circuit board 110. In alternative embodiments, the second circuit board 120 can be stacked on the front surface of the first circuit board 110 and the signal lines 110c of the front surface of the first circuit board 110 are interconnected.

[0039] The second circuit board 120 (e.g., a daughter board) is a flexible circuit board, which can be, for example, a flexible PCB, and is composed of one or more film layers 120a. As shown, the second circuit board 120 includes a plurality of signal lines 120c formed on the front and / or back surfaces of the film layers 120a, an electrical ground (not shown) formed on the front and / or back surfaces of the film layers 120a, and a plurality of metal lines 120d (only one metal line 120d is labeled) formed on the film layers 120a and connecting between the signal lines 120c and / or the electrical ground of the front and back surfaces of the film layers 120a. Figure 1 Figure 1 In certain embodiments, the second circuit board 120 further includes a plurality of components 120b, at least one of which is an SMD, mounted (e.g., soldered) on the front and / or back surfaces of the film layers 120a and connected with one or more of the signal lines 120c and / or the electrical ground.

[0040] The film layers 120a include a flexible substrate that is less rigid than the rigid substrate of the board layers 110 and is easily deformable. In different embodiments, the flexible substrate of the film layers 120a is a plastic substrate (e.g., a glass epoxy substrate and a glass polyimide substrate), a metal substrate (e.g., an aluminum substrate and an iron substrate), a film substrate (e.g., a polyimide substrate and a polyethylene film substrate), or any suitable flexible substrate. For example, the thickness of the film layers 120a is about 10 μιη to about 100 μιη.

[0041] The components 120b can include ICs, active and passive devices (e.g., resistors, capacitors, inductors, diodes, and transistors), sockets, switches, connectors, and the like. The signal lines 120c and / or the electrical ground can be formed by etching a copper foil attached to the film layers 120a.

[0042] It is noted herein that, in some embodiments, the signal lines 110c, 120c are data buses configured to transmit / receive data from one component 110b, 120b to another component. In other embodiments, the signal lines 110c, 120c can be control buses, address buses, any type of buses, or a combination thereof.

[0043] The plurality of conductive pads 160 (​Figure 1 The conductive pads 160 (only one of which is labeled in FIG. 1) can be formed as part of the signal lines 120c and / or the electrical ground of the second circuit board 120. The metal lines 120d (e.g., vias) can include vias formed in the film layer 120a and filled with a conductive material, such as, for example, copper, tungsten, aluminum, tin, silver, gold, alloys thereof, and various types of solder.

[0044] Each of the conductive bumps 130, which are, for example, solder bumps, solder blocks, or solder balls, connects between a respective conductive pad 150 of the first circuit board 120 and a respective conductive pad 160 of the second circuit board 120. Examples of materials of the conductive bumps 130 include, but are not limited to, alloys of tin and lead, alloys of tin and antimony, alloys of tin and silver, alloys of tin, silver, and copper, alloys of tin and zinc, alloys of tin, silver, indium, and copper, and various types of solder.

[0045] As will be described further below, the spacers 140 are used to prevent shorting between adjacent conductive bumps 130 during manufacture of the circuit board structure 100. As shown in FIG. 1, the spacers 140 are mounted (e.g., soldered) to the conductive pads 160 of the second circuit board 120 and abut (i.e., not soldered to) the conductive pads 150 of the first circuit board 110. Figure 1 In some embodiments, the spacers 140 are mounted (i.e., soldered) to the conductive pads 160 of the second circuit board 120 and abut the signal lines 120c and / or the electrical ground of the second circuit board 120. In other embodiments, the spacers 140 are mounted (i.e., soldered) to the conductive pads 160 of the second circuit board 120 and abut the rigid substrate of the board layer 120a of the second circuit board 120.

[0046] The spacers 140 are spaced apart from the conductive bumps 130 and are made of a different material than the conductive bumps 130. For example, at least one of the spacers 140 is in the form of an SMD. In some embodiments, each of the spacers 140 has two or more terminals (not shown) that are connected (e.g., soldered) to the conductive pads 160 of the signal lines 120c of the second circuit board 120. In other embodiments, each of the spacers 140 has two or more terminals (not shown) that are connected (e.g., soldered) to the conductive pads 160 of the electrical ground of the second circuit board 120. For example, at least one of the spacers 140 is a resistor, such as a 0201 resistor.

[0047] It should be appreciated that other types of spacers 140 are considered to be within the scope of the present disclosure, provided that their intended functions are achieved and / or can be mounted on the second circuit board 120 using surface mount technology (SMT), after reading the present disclosure.

[0048] Figure 2 This is a schematic plan view of a first circuit board 110 illustrating a circuit board structure 100 according to a first embodiment of the present disclosure. Figure 2 As shown, conductive pad 150 ( Figure 2 The conductive pad 150 (marked only once) is divided into multiple pad groups PS1-PS11 arranged along the length of the board layer 110a. In this embodiment, pad groups PS1 and PS11 are located at two opposite ends 210 and 220 of the board layer 110a. Pad groups PS2-PS10 are located in the middle portion 230 of the board layer 110a between the ends 210 and 220. The conductive pad 150 in the pad groups PS1 and PS11 respectively defines a first region and a second region. In some embodiments, the first region and the second region have substantially the same size and / or shape. For example, as shown in... Figure 2 As shown, the first and second regions have a generally rectangular shape. In other embodiments, the first and second regions may also have different sizes and / or shapes.

[0049] The conductive pads 150 in pad groups PS2-PS10 define a plurality of third regions, which are smaller than at least one of the first and second regions. In some embodiments, these third regions have substantially the same size and / or shape. Figure 2 As shown, in this embodiment, these third regions have a generally rectangular shape. In other embodiments, at least two of these third regions may also have different sizes and / or shapes.

[0050] Figure 3 This is a schematic plan view illustrating a second circuit board 120 of a circuit board structure 100 according to a first embodiment of the present disclosure. In this embodiment, the size of the film layer 120a is smaller than the size of the board layer 110a of the first circuit board 110, and the film layer 120a is typically rectangular. In an alternative embodiment, the film layer 120a may be other polygonal shapes, circular shapes, elliptical shapes, or any suitable shape.

[0051] like Figure 3 As shown, conductive bump 130 ( Figure 3The plurality of bump groups BS1-BS11 are arranged along the length of the film layer 120a. In this embodiment, the bump groups BS1, BS11 are located at the two opposite ends 310, 320 of the film layer 120a. The bump groups BS2-BS10 are located at the middle portion 330 of the film layer 120a between the ends 310, 320 of the film layer 120a. The conductive bumps 130 in the bump groups BS1, BS11 define a fourth region and a fifth region, respectively. In some embodiments, the fourth region and the fifth region have substantially the same size and / or shape. For example, as shown in FIG. 3A, the fourth region and the fifth region have a generally rectangular shape. In other embodiments, the fourth region and the fifth region can also have different sizes and / or shapes. Figure 3

[0052] The conductive bumps 130 in the bump groups BS2-BS10 define a plurality of sixth regions, which are smaller than at least one of the fourth region and the fifth region. In some embodiments, the sixth regions have substantially the same size and / or shape. For example, as shown in FIG. 3A, the third regions have a generally rectangular shape. In other embodiments, at least two of the sixth regions have different sizes and / or shapes. Figure 3

[0053] In this embodiment, the second circuit board 120 is stacked on the back side of the first circuit board 110 and interconnects the signal lines 110c of the back side of the first circuit board 110, thereby reducing the difficulty of routing the signal lines of the first circuit board 110. For example, the conductive bumps 130 in the bump groups BS1, BS11 (i.e., the conductive bumps 130 at the ends 310, 320 of the film layer 120a) are connected to the conductive pads 150 on the back side of the board layer 110a. In alternative embodiments, the second circuit board 120 is stacked on the front side of the first circuit board 110. In such alternative embodiments, the conductive bumps 130 in the bump groups BS1, BS11 (i.e., the conductive bumps 130 at the ends 310, 320 of the film layer 120a) are connected to the conductive pads 150 on the front side of the board layer 110a.

[0054] It is noted that the arrangement of the spacers 140 (only one spacer 140 is labeled) on the film layer 120a helps to prevent short circuits between the conductive bumps 130 during the manufacturing of the circuit board structure 100 of the present disclosure. For example, as shown in FIG. 3A, three or more spacers 140 (e.g., the spacers 140 enclosed by S1, S2, S3, or S4) can be provided near the corners of the film layer 120a. Figure 3 Figure 3

[0055] ​​​​One or more of the spacers 140 (e.g., the spacers 140 enclosed by S5) can be arranged within one or more bump regions, e.g., a bump region defined by the conductive bumps 130 in the bump set BS3.

[0056] The spacers 140 at the ends 310, 320 of the film layer 120a can surround the conductive bumps 130 in the bump sets BS1, BS11, respectively. The spacers 140 between the ends 310, 320 of the film layer 120a (e.g., the spacers 140 enclosed by S5, S6, S7, and S8) can be arranged in an array-like manner. In certain embodiments, the distance D1 between adjacent pairs of spacers 140 in a column can be substantially equal. The distance D2 between adjacent pairs of spacers 140 in a row can be substantially equal. In some embodiments, the distance D1 can be smaller than the distance D2. In other embodiments, the distance D1 can also be substantially equal to or larger than the distance D2.

[0057] It should be appreciated that, upon reading the present disclosure, other arrangements of the spacers 140 are considered to be within the scope of the present disclosure as long as short circuits between the conductive bumps 130 are prevented during the manufacturing of the circuit board structure 100 of the present disclosure.

[0058] Figures 4-10 is a schematic cross-sectional view showing an intermediate stage of manufacturing the circuit board structure 100 of some embodiments of the present disclosure. As Figure 4 indicated, a first circuit board 110 is provided. The first circuit board 110 is a rigid circuit board, e.g., a rigid PCB, and consists of one or more board layers 110a.

[0059] The first circuit board 110 comprises: a plurality of components 110b mounted (e.g., soldered) on the front and / or back of the board layers 110a, at least one of the components being an SMD; a plurality of signal lines 110c formed on the front and / or back of the board layers 110a and connected to one or more of the components 110b; an electrical ground (not shown) formed on the front and / or back of the board layers 110a and connected to one or more of the components 110b; a plurality of metal lines 110d (only one metal line 110d is labeled in the figure) formed on the board layers 110a and connected between the signal lines 110c and / or the electrical ground on the front and back of the board layers 110a. Figure 1

[0060] ​Layer 110a includes a rigid substrate that is not easily deformed, such as a glass fiber epoxy resin substrate, a glass fiber fabric bismaleimide triazine resin substrate, a glass fiber polyphenylene ether resin substrate, an aromatic polyamide nonwoven fabric-epoxy resin substrate, an aromatic polyamide nonwoven fabric-polyimide resin substrate, or any suitable rigid substrate. For example, the thickness of layer 110a is from about 20 μm to about 600 μm.

[0061] Component 110b may include ICs, active and passive devices (e.g., resistors, capacitors, inductors, diodes, and transistors), sockets, switches, connectors, etc. Signal lines 110c and / or electrical grounds may be formed by etching copper foil attached to layer 110a.

[0062] Multiple conductive pads 150 ( Figure 4 A conductive pad 150 (marked only in the middle) may be formed as part of a signal line 110c and / or an electrical ground. A metal line 110d (e.g., a via) may include a via formed in a plate layer 110a and filled with a conductive material, which may be, for example, copper, tungsten, aluminum, tin, silver, gold and their alloys, as well as different types of solder.

[0063] Next, as Figure 5 As shown, a second circuit board 120 is provided. The second circuit board 120 is a flexible circuit board, such as a flexible PCB board, and is composed of one or more film layers 120a.

[0064] The second circuit board 120 includes: multiple signal lines 120c formed on the front and / or back of the film layer 120a; an electrical ground (not shown) formed on the front and / or back of the film layer 120a; and multiple metal lines 120d. Figure 1 Only one metal line 120d is marked in the diagram, which is formed on the film layer 120a and connects between the signal lines 120c on the front and back sides of the film layer 120a and / or between the electrical grounds on the front and back sides of the film layer 120a. In some embodiments, the second circuit board 120 also includes a plurality of components 120b, for example, at least one of these components is an SMD, which are mounted (e.g., soldered) on the front and / or back sides of the film layer 120a and connected to one or more signal lines 120c and / or electrical grounds.

[0065] Film layer 120a includes a flexible substrate, which is less rigid than the rigid substrate of plate layer 110 and is easily deformable. In different embodiments, the flexible substrate of film layer 120 is a plastic substrate (such as a glass epoxy resin substrate and a glass polyimide substrate), a metal substrate (such as an aluminum substrate and an iron substrate), a film substrate (such as a polyimide substrate and a polyethylene film substrate), or any suitable flexible substrate. For example, the thickness of film layer 120a is from about 10 μm to about 100 μm.

[0066] The components 120b can include ICs, active and passive devices (e.g., resistors, capacitors, inductors, diodes, and transistors), sockets, switches, connectors, etc. The signal lines 120c and / or the electrical ground can be formed by etching the copper foil attached to the film layer 120a.

[0067] It is noted herein that, in some embodiments, the signal lines 110c, 120c are data buses configured to transmit / receive data from one component 110b, 120b to another component. In other embodiments, the signal lines 110c, 120c can be control buses, address buses, any type of bus, or a combination thereof.

[0068] The plurality of conductive pads 160 (only one conductive pad 160 is labeled in Figure 5 The metal lines 120d (e.g., vias) can include vias formed in the film layer 120a and filled with a conductive material, such as, for example, copper, tungsten, aluminum, tin, silver, gold, alloys thereof, and different types of solder.

[0069] Next, as shown in Figure 6 , a plurality of conductive bumps 130 (only one conductive bump 130 is labeled in Figure 6 ) are provided, the conductive bumps 130 being, for example, solder bumps, solder blocks, or solder balls, each of the conductive bumps 130 being connected with a corresponding one of the conductive pads 160 of the second circuit board 120. Examples of materials of the conductive bumps 130 include, but are not limited to, alloys of tin and lead, alloys of tin and antimony, alloys of tin and silver, alloys of tin, silver, and copper, alloys of tin and zinc, alloys of tin, silver, indium, and copper, and various types of solder.

[0070] Next, as shown in Figure 7 , a plurality of spacers 140 are mounted on the conductive pads 160 of the second circuit board 120, for example, by SMT.

[0071] As will be described below, the spacers 140 serve to prevent short circuits between adjacent conductive bumps 130 during the manufacturing of the circuit board structure 100. As shown in Figure 7 , the spacers 140 are mounted (e.g., soldered) on the conductive pads 160 of the second circuit board 120.

[0072] Spacers 140 are spaced apart from conductive bumps 130 and are made of a different material than conductive bumps 130. For example, at least one spacer 140 is in the form of an SMD (Surface Mount Device). In some embodiments, each spacer 140 has two or more terminals (not shown) of conductive pads 160 connected (e.g., soldered) to signal lines 120c of the second circuit board 120. In other embodiments, each spacer 140 has two or more terminals (not shown) of conductive pads 160 connected (e.g., soldered) to electrically grounded conductive pads 160 of the second circuit board 120. For example, at least one of the spacers 140 is a resistor, such as a 0201 resistor.

[0073] It should be noted that since the spacer 140 is in the form of an SMD (e.g., a resistor), the spacer 140 is readily available from the market and is therefore cheaper and easier to implement.

[0074] It should be understood that, upon reading this disclosure, other types of spacers 140 are considered within the scope of this disclosure, provided that their intended function is achieved and / or they can be mounted on the second circuit board 120 using surface mount technology (SMT).

[0075] Next, as Figure 8 As shown, the first circuit board 110 is placed on the support member 810 of the fixture 820. Then, solder paste is applied to the conductive pad 150 of the first circuit board 110.

[0076] Next, as Figure 9 As shown, the second circuit board 120 is mounted on the first circuit board 110, for example, via SMT. Each conductive bump 130 is connected to a corresponding conductive pad 150 of the first circuit board 110.

[0077] In this embodiment, the second circuit board 120 is stacked on the back side of the first circuit board 110, and the signal lines 110c on the back side of the first circuit board 110 are interconnected, thereby reducing the difficulty of routing the signal lines of the first circuit board 110. For example, conductive bumps 130 at opposite ends of the film layer 120a are connected to conductive pads 150 on the back side of the film layer 110a. In an alternative embodiment, the second circuit board 120 is stacked on the front side of the first circuit board 110. In this alternative embodiment, conductive bumps 130 at the end portions of the film layer 120a are connected to conductive pads 150 on the front side of the film layer 110a.

[0078] Next, as Figure 10 As shown, the pressing member 1010 using the fastener 820 is, for example, about 40 kg / cm. 2 The pressure presses the second circuit board 120 onto the first circuit board 110.

[0079] Next, as Figure 11 As shown, a reflow soldering process is performed on the first circuit board 110 and the second circuit board 120 to obtain Figure 1 The circuit board structure is 100. For example... Figure 11 As shown, the spacer 140 abuts against (i.e., is not soldered) the conductive pad 150 of the first circuit board 110, thereby preventing short circuits between the conductive bumps 130. In some embodiments, the spacer 140 abuts against (i.e., is not soldered to) the signal line 110c and / or the electrical ground terminal of the first circuit board 110. In other embodiments, the spacer 140 abuts against the rigid substrate of the layer 110a of the first circuit board 110.

[0080] (Second Implementation)

[0081] The following is based on Figures 12-13B The second embodiment of this disclosure will be described. Furthermore, for ease of explanation, components having the same function as those described in the first embodiment will be labeled with the same reference numerals, and their descriptions will be omitted.

[0082] Figure 12 This is a schematic cross-sectional view showing the circuit board structure 1200 of the second embodiment of the present disclosure. Figure 13A This is a schematic plan view of the first circuit board 110 of the circuit board structure 1200 of the second embodiment of the present disclosure. Figure 13B This is a schematic plan view of a second circuit board 120 illustrating a circuit board structure 1200 according to a second embodiment of the present disclosure. Figure 12 and Figure 13A As shown, the difference between circuit board structure 1200 and circuit board structure 100 is that the spacer 140 in circuit board structure 1200 ( Figure 13A Only one spacer (140) is marked in the diagram, which is a layer 110a of the first circuit board 110 of the circuit board structure 1200, mounted (e.g., soldered) on the board. Further reference... Figure 13B The second circuit board 120 of the circuit board structure 1200 has no spacers in its film layer 120a.

[0083] Therefore, when the film layer 120a of the second circuit board 120 of the circuit board structure 1200 is mounted on the board layer 110a of the first circuit board 110 of the circuit board structure 1200, the spacer 140 abuts (i.e., does not solder) against (the conductive pad of the film layer 120a of the second circuit circuit 120 of the circuit board structure 1200) (e.g., Figure 1 The conductive pads (160), signal lines, electrical grounding, and / or rigid substrates are included.

[0084] (Third Implementation)

[0085] The following is based on Figures 14-15BA third embodiment of the present disclosure will be described. Further, for ease of explanation, components having the same function as those described in the above first embodiment are labeled with the same reference numerals, and the description thereof will be omitted. Figure 14 is a schematic cross-sectional view illustrating a circuit board structure 1400 of the third embodiment of the present disclosure. Figure 15A is a schematic plan view illustrating a first circuit board 110 of the circuit board structure 1400 of the third embodiment of the present disclosure. Figure 15B is a schematic plan view illustrating a second circuit board 120 of the circuit board structure 1400 of the third embodiment of the present disclosure. As Figure 14 and Figure 15A illustrated, the circuit board structure 1400 differs from the circuit board structure 100 in that a first set of spacers 140 (only one spacer 140 is labeled in Figure 15A is mounted (e.g., soldered) in a middle portion 230 of a board layer 110a of the first circuit board 110 of the circuit board structure 1400, for example. With further reference to Figure 15B , a second set of spacers 140 (only one spacer 140 is labeled in Figure 15B ) of the circuit board structure 1400 is mounted (e.g., soldered) to end portions 310, 320 of a film layer 120a of the second circuit board 120 of the circuit board structure 1400. A middle portion 330 of the film layer 120a of the second circuit board 120 of the circuit board structure 1400 is spacer-free.

[0086] As such, when the film layer 120a of the second circuit board 120 of the circuit board structure 1400 is mounted on the board layer 110a of the first circuit board 110 of the circuit board structure 1400, the first set of spacers 140 abut against (i.e., are not soldered to) conductive pads (e.g., conductive pads 160 of Figure 1 ), signal lines (e.g., signal lines 120c), electrical ground, and / or flexible substrates of the film layer 120a of the second circuit board 120 of the circuit board structure 1400.

[0087] The spacers 140 in the second set abut against (i.e., are not soldered to) conductive pads (e.g., conductive pads 150 of Figure 1 ), signal lines (e.g., signal lines 110c), electrical ground, and / or rigid substrates of the board layer 110a of the first circuit board 110 of the circuit board structure 1400.

[0088] (Fourth Embodiment)

[0089] Hereinafter, a third embodiment of the present disclosure will be described based on Figure 16 Further, for ease of explanation, components having the same function as those described in the above first embodiment are labeled with the same reference numerals, and the description thereof will be omitted.

[0090] Figure 16 is a schematic cross-sectional view illustrating a circuit board structure 1600 of the fourth embodiment of the present disclosure. The circuit board structure 1600 differs from the aforementioned embodiments in that the circuit board structure 1600 further includes a carrier 1610, e.g., a stiffener, attached to the front portion of the film layer 120a of the second circuit board 120 of the circuit board structure 1600. The carrier 1610 is configured to reinforce the film layer 120a of the second circuit board 120 of the circuit board structure 1600. Such a construction facilitates the manufacturing of the second circuit board 120 of the circuit board structure 1600. Examples of materials for the carrier 1610 include, but are not limited to, polyimide, aluminum, and stainless steel. For example, the thickness of the carrier 1610 is about 10 um to about 100 um.

[0091] (Fifth Embodiment)

[0092] Hereinafter, based on Figure 17 The fifth embodiment of the present disclosure is described. Further, for ease of explanation, the same reference numerals are labeled to members having the same function as the members described in the above first embodiment, and the description thereof is omitted.

[0093] Although the circuit board structures 100, 1200, 1400, 1600 are exemplified as the end portions 310, 320 of the second circuit board 120 are connected to the back surface of the first circuit board 110, it is understood that the second circuit board 120 can partially overlap the first circuit board 110 after reading the present disclosure. For example, Figure 17 is a schematic cross-sectional view illustrating a circuit board structure 1700 of the fifth embodiment of the present disclosure. The circuit board structure 1700 differs from the aforementioned embodiments in that the conductive bumps 130 at the end portions 310, 320 of the second circuit board 120 of the circuit board structure 1700 are connected to the conductive pads 150 of the front and back surfaces of the first circuit board 110 of the circuit board structure 1700, respectively.

[0094] The spacers 140 at the end portions 310, 320 of the second circuit board 120 of the circuit board structure 1700 are mounted (e.g., soldered) to one of the first and second circuit boards 110, 120 and abut against (i.e., not soldered) the other of the first and second circuit boards 110, 120.

[0095] (Sixth Embodiment)

[0096] Hereinafter, based on Figure 18 The sixth embodiment of the present disclosure is described. Further, for ease of explanation, the same reference numerals are labeled to members having the same function as the members described in the above first embodiment, and the description thereof is omitted. Figure 18This is a schematic cross-sectional view showing the circuit board structure 1800 according to the sixth embodiment of the present disclosure. The circuit board structure 1800 differs from the previous embodiment in that the conductive bumps 130 at the ends 310 and 320 of the second circuit board 120 of the circuit board structure 1800 are respectively connected to the conductive pads 150 of the first circuit board 110 and the conductive pads 150 of the third circuit board 1810 of the circuit board structure 1800.

[0097] The spacer 140 at the end 310 of the second circuit board 120 of the circuit board structure 1800 is mounted (e.g., soldered) to one of the first circuit board 110 and the second circuit board 120, and abuts (i.e., does not solder) against the other of the first circuit board 110 and the second circuit board 120.

[0098] The spacer 140 at the end 320 of the second circuit board 120 of the circuit board structure 1800 is mounted (e.g., soldered) to one of the second circuit board 120 and the third circuit board 1810 of the circuit board structure 1800, and abuts (i.e., not soldered) to the other of the second circuit board 120 and the third circuit board 1810 of the circuit board structure 1800.

[0099] Figure 19 This illustrates a circuit board structure manufactured according to some embodiments of the present disclosure (e.g., Figure 1 The flowchart illustrates method 1900 for a circuit board structure 100. Method 1900 begins at operation 1910, in which a first circuit board, such as first circuit board 110, is provided. At operation 1920, a plurality of conductive bumps (e.g., conductive bump 130) are formed on a second circuit board (e.g., second circuit board 120). At operation 1930, a plurality of spacers (e.g., spacers 140) are formed on one of the first circuit board 110 and the second circuit board 120. At operation 1940, conductive bump 130 is coupled to the first circuit board 110 such that spacers 140 abut against the other of the first circuit board 110 and the second circuit board 120.

[0100] In one embodiment, this disclosure provides a circuit board structure. The circuit board structure includes a rigid circuit board, a flexible circuit board, a plurality of conductive bumps, and a plurality of spacers. The rigid and flexible circuit boards are stacked one on top of the other. Conductive bumps are formed between the rigid and flexible circuit boards. Spacers are formed between the rigid and flexible circuit boards and spaced apart from the conductive bumps.

[0101] In another embodiment, the disclosure discloses a circuit board structure. The circuit board structure includes a first rigid circuit board, a second flexible circuit board, and a plurality of conductive bumps. The first rigid circuit board and the second flexible circuit board are stacked on top of each other. The conductive bumps are formed between the first rigid circuit board and the second flexible circuit board.

[0102] In another embodiment, the disclosure discloses a method of manufacturing a circuit board structure. The method includes providing a first circuit board and a second circuit board, forming a plurality of conductive bumps on the second circuit board, forming a plurality of spacers on one of the first circuit board and the second circuit board after forming the conductive bumps, and coupling the conductive bumps to the first circuit board such that the spacers abut the other of the first circuit board and the second circuit board.

[0103] The features of the several embodiments have been outlined above in such a way that those skilled in the art can better understand the aspects of the disclosure. Those skilled in the art will appreciate that they can readily use the disclosure as a basis for designing or modifying other processes and structures for implementing the same purposes and / or achieving the same advantages as the embodiments introduced herein. Those skilled in the art will also realize that such equivalent constructions do not depart from the spirit and scope of the disclosure, and that they can make various changes, substitutions, and alterations thereto without departing from the spirit and scope of the disclosure.

Claims

1. A circuit board structure comprising: First circuit board; A second circuit board, wherein the first circuit board and the second circuit board are stacked one on top of the other; Multiple conductive bumps are formed between the first circuit board and the second circuit board, and the conductive bumps define a bump area; A plurality of spacers are formed between the first circuit board and the second circuit board and spaced apart from the conductive bumps, wherein the spacers surround the bump region or are located in the bump region, and one or more of the spacers are surface mount devices; and A carrier, which is attached to the second circuit board and configured to reinforce the second circuit board. The spacer is mounted on one of the first circuit board and the second circuit board and abuts against the other of the first circuit board and the second circuit board, and the arrangement of the spacer can prevent short circuits of the conductive bumps.

2. The circuit board structure according to claim 1, characterized in that, The spacer is mounted on the signal line of the second circuit board, or the spacer is mounted on the electrical ground of the second circuit board.

3. The circuit board structure according to claim 1, characterized in that, The spacers are arranged in a matrix.

4. A method for manufacturing a circuit board structure, characterized in that, The method includes: Provide a first circuit board and a second circuit board; Multiple conductive bumps are formed on the second circuit board, the conductive bumps defining a bump area; After forming the conductive bumps, a plurality of spacers are formed on one of the first and second circuit boards, the spacers being spaced apart from the conductive bumps, wherein the spacers surround the bump region or are located within the bump region, and one or more of the spacers are surface mount devices; and The conductive bumps are coupled to the first circuit board using surface mount technology. The spacer is mounted on one of the first circuit board and the second circuit board and abuts against the other of the first circuit board and the second circuit board, and the arrangement of the spacer can prevent short circuits of the conductive bumps.

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