Impurity removal in doped ald tantalum nitride

Abstract

Methods of forming copper interconnects are described. A doped tantalum nitride layer formed on a copper layer on a substrate has a first dopant amount. The doped tantalum nitride layer is exposed to a plasma containing one or more of helium or neon to form a treated doped tantalum nitride layer having a reduced dopant amount. Apparatus for performing the methods are also described.

Description

Technical Field

[0001] Embodiments of this disclosure generally relate to methods for forming a barrier layer. Specifically, embodiments of this disclosure relate to methods for forming a tantalum nitride barrier layer. Background Technology

[0002] Semiconductor circuit element miniaturization has reached the point where feature sizes below 20nm can be manufactured at commercial scale. As the size of critical dimensions continues to shrink, new challenges arise in process steps such as filling the gaps between circuit elements. As the width between elements continues to shrink, the gaps between them typically become higher and narrower, making the gaps more difficult to fill and the contacts more difficult to secure.

[0003] Ruthenium-doped tantalum nitride is being investigated as a copper barrier material for smaller node applications. However, integrating ruthenium-doped tantalum nitride into smaller features can cause copper / ruthenium corrosion because, for example, electromigration of copper adjacent to ruthenium disrupts the bond.

[0004] Ruthenium (Ru)-doped tantalum nitride (TaN) typically contains a high carbon (C) concentration, which cannot be effectively or easily removed by in-situ H2 / Ar plasma during atomic layer deposition (ALD) tantalum nitride formation. Studies on densification of ALD TaN in a physical vapor deposition (PVD) chamber have shown that Ar plasma treatment can densify ALD TaN films by selectively removing nitrogen (N).

[0005] Therefore, a method is needed to form a barrier layer for contact formation. Summary of the Invention

[0006] One or more embodiments of this disclosure relate to a method of forming interconnects. A doped tantalum nitride layer is formed on a substrate. The doped tantalum nitride layer has a first doping dose, and the dopant comprises one or more of ruthenium, tungsten, or cobalt. The doped tantalum nitride layer is exposed to a plasma comprising one or more of helium or neon to form a treated doped tantalum nitride layer having a second doping dose, the second doping dose being less than the first doping dose.

[0007] Additional embodiments of this disclosure relate to a clustering tool comprising one or more process chambers surrounding a central transfer station. The one or more process chambers are configured to deposit a doped tantalum nitride film, anneal the doped tantalum nitride film, and expose the annealed doped tantalum nitride film to a plasma containing one or more of helium or neon. At least one controller is connected to the one or more process chambers and the central transfer station. The at least one controller has a configuration selected from one or more of the following: a configuration for depositing a tantalum nitride film; a configuration for depositing a doped film; a configuration for annealing a substrate; a configuration for moving a substrate between one or more process chambers and the central transfer station; and a configuration for exposing the substrate to neon plasma.

[0008] Further embodiments of this disclosure relate to a non-transitory computer-readable medium including instructions that, when executed by a controller of a process chamber, cause the process chamber to perform the following operations: depositing a tantalum nitride film onto a substrate; depositing a doped film onto a substrate; annealing the substrate; and exposing the substrate to neon plasma. Attached Figure Description

[0009] To gain a more detailed understanding of the features described above in this disclosure, a more specific description of the disclosure, which has been briefly summarized above, can be obtained by referring to the embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the drawings show only typical embodiments of this disclosure and should therefore not be considered as limiting its scope, as other equivalent embodiments are permissible.

[0010] Figure 1 A schematic representative diagram showing a substrate structure according to one or more embodiments of the present disclosure;

[0011] Figure 2 A flowchart illustrating a method according to one or more embodiments of this disclosure;

[0012] Figures 3A to 3E Drawing in execution Figure 2 A schematic representation of the electronic device used during the method;

[0013] Figure 4 A schematic representative diagram illustrating one or more embodiments of an electronic device according to this disclosure;

[0014] Figure 5A and 5B Illustrations of one or more embodiments according to this disclosure Figure 3B A magnified view of area 5;

[0015] Figure 6 A schematic diagram illustrating a processing tool according to one or more embodiments of this disclosure;

[0016] Figure 7 A schematic diagram illustrating a processing tool according to one or more embodiments of this disclosure; and

[0017] Figure 8 A schematic diagram illustrating a clustering tool according to one or more embodiments of this disclosure. Detailed Implementation

[0018] Before describing several exemplary embodiments of this disclosure, it should be understood that this disclosure is not limited to the details of the construction or processing set forth in the following description. This disclosure can have other embodiments and can be practiced or implemented in various ways.

[0019] As used in this specification and the appended claims, the term "substrate" refers to a surface or a portion of a surface, wherein the process is performed on said surface or a portion of the surface. Those skilled in the art will also understand that, unless the context clearly indicates otherwise, reference to a substrate may refer only to a portion of a substrate. Furthermore, reference to deposition on a substrate may refer to both a bare substrate and a substrate on which one or more films or features are deposited or formed.

[0020] As used herein, “substrate” refers to any substrate or material surface formed on a substrate, on which a film treatment is performed during a manufacturing process. For example, depending on the application, substrate surfaces on which treatment can be performed include materials such as silicon, silicon oxide, strained silicon, silicon-on-insulator (SOI), carbon-doped silicon oxide, amorphous silicon, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other materials (such as metals, metal nitrides, metal alloys, and other conductive materials). Substrates include, but are not limited to, semiconductor wafers. Substrates may be exposed to pretreatment processes such as polishing, etching, reduction, oxidation, hydroxylation, annealing, UV curing, electron beam curing, and / or baking of the substrate surface. In addition to performing film treatments directly on the surface of the substrate itself, any film treatment procedures disclosed herein (as described in more detail below) may also be performed on an underlayer formed on the substrate, and the term “substrate surface” is intended to include such an underlayer as referred to herein. Therefore, for example, when a film / layer or part of a film / layer has been deposited onto the substrate surface, the exposed surface of the newly deposited film / layer becomes the substrate surface.

[0021] One or more embodiments of this disclosure advantageously provide methods for reducing ruthenium (Ru), tungsten (W), cobalt (Co), and / or carbon (C) in doped tantalum nitride (TaN) films. Some embodiments advantageously enhance the barrier properties of films used for copper (Cu) interconnects.

[0022] In some embodiments, helium (He) or neon (Ne) plasma is used to reduce the etching rate of the TaN film. In some embodiments, nitrogen increases the etching selectivity of tantalum. Some embodiments provide better process control by reducing the etching rate and increasing the selectivity of the etching process. In some embodiments, neon plasma treatment removes ruthenium from the TaN film and reduces the likelihood of copper corrosion in the contacts. Some embodiments remove carbon impurities to improve film resistivity. In some embodiments, increasing the tantalum:nitrogen ratio improves barrier density.

[0023] Figure 1 The diagram illustrates the structure used according to one or more implementation methods. Figure 1 The substrate 10 illustrated includes a material 15 (e.g., a dielectric), wherein a structure 20 is formed in the surface 18 of the material 15. The structure 20 has a top 22, a bottom 26, and sides 24, 25. In the illustrated embodiment, the bottom 26 and sides 24, 25 of the structure 20 are defined by the material 15. In some embodiments, the bottom 26 of the structure 20 is defined by a material different from that of the sides 24, 25 (not shown). For example, in some embodiments, the bottom 26 of the structure comprises a conductive material while the sides 24, 25 comprise a dielectric. In some embodiments, the bottom 26 of the structure 20 comprises a dielectric while the sides 24, 25 comprise a conductive material. In some embodiments, the bottom and sides are different materials, and both the bottom and sides are dielectric or conductive materials.

[0024] The width W of structure 20 is defined as the distance between sides 24 and 25. Those skilled in the art will recognize that the illustrated structure is exemplary, and typical structures may not have squared corners. The width of such a structure is measured as the average distance between the sidewalls measured parallel to the surface of the structure. The depth D of the structure is defined as the distance from the top 22 to the bottom 26 of structure 20. The depth-to-width ratio of structure 20 is defined as the ratio of depth D to width W. In some embodiments, the depth-to-width ratio is greater than or equal to 5:1, 10:1, 15:1, 20:1, or 25:1.

[0025] In some embodiments, material 15 comprises a dielectric. Suitable dielectrics include, but are not limited to, silicon oxide (SiO), silicon dioxide (SiO2), silicon nitride (SiN), silicon oxynitride (SiON), aluminum nitride (AlN), aluminum oxide (AlO), or high-k dielectric materials. In some embodiments, the material comprises a hard mask material (e.g., carbon (C)). As used in this specification and the appended claims, unless otherwise specified by the subscript, chemical formulas are representations of elemental identification and are not intended to imply any particular stoichiometric ratio. For example, a titanium nitride (TiN) film may be any suitable combination of titanium and nitrogen atoms, and is not limited to a single relationship.

[0026] Some embodiments of the method include depositing tantalum nitride, doped tantalum nitride, and tantalum nitride films using atomic layer deposition (ALD) or chemical vapor deposition (CVD) processes. One or more embodiments of the method include sequentially depositing ruthenium-doped tantalum nitride, tantalum nitride, and ruthenium-doped tantalum nitride films using ALD or CVD processes. In some embodiments, in-situ plasma is used to reduce film impurities and incorporate the doped layer into the TaN layer, thereby improving barrier and / or adhesion properties.

[0027] In some embodiments, physical vapor deposition (PVD) with high-density plasma and a biasable substrate further improves one or more of the barrier properties, carbon and / or ruthenium content, without damaging the low-k dielectric.

[0028] In some implementations, neon or helium plasma exposure enhances the etching selectivity (atomic selectivity) between tantalum and nitrogen. Some implementations provide methods for controlling damage on beveled surfaces (geometry selectivity). One or more implementations reduce the deposition rate by more than or equal to about 30%, thereby allowing for greater process controllability. In some implementations, an integrated hardware solution with a DC / RF coil process chamber is provided.

[0029] Figure 2 An embodiment of a method 100 for forming copper interconnects according to one or more embodiments of this disclosure is illustrated. Figures 3A to 3E Drawing usage Figure 2 The method 100 processes the electronic device 120. Those skilled in the art will recognize that the illustrated embodiments are merely exemplary embodiments, and the content of this disclosure is not limited to the illustrated process.

[0030] Figure 3A A substrate 125 is illustrated, having a first material 130 and a second material 132 forming a structure 135. The sidewalls 137 of the illustrated structure 135 are defined by the surface 131 of the first material 130, and the bottom 136 of the illustrated structure 135 is defined by the top surface 133 of the second material 132.

[0031] In process 102, substrate 125 and any layers formed thereon are exposed to one or more suitable deposition conditions to form a (ruthenium)-doped tantalum nitride layer 140, such as... Figure 3B As shown in the accompanying drawings, this disclosure describes the ruthenium-doped film. However, the tantalum nitride layer 140 may be doped with ruthenium, tungsten, and / or cobalt. This disclosure is not limited to ruthenium-doped films, and ruthenium may be replaced by tungsten and / or cobalt, or may further include tungsten and / or cobalt. According to one or more embodiments of this disclosure, Figure 5A and 5B Draw Figure 3B An enlarged view of region 5 in the image. Throughout this article, references to “ruthenium” may be replaced with “cobalt” and / or “tungsten”.

[0032] The first material 130 can be any suitable material or combination of materials. In some embodiments, the first material 130 comprises a dielectric. Suitable dielectrics include, but are not limited to: silicon oxide, silicon nitride, silicon oxynitride, low-k dielectrics (e.g., porous or carbon-doped SiO with a k value less than about 5). x In some embodiments, the low-k dielectric comprises one or more of the following: fluorine-doped silicon oxide, organosilicon glass, or porous silicon dioxide. In other embodiments, the dielectric layer is a multilayer structure. For example, in one or more embodiments, the dielectric layer comprises a stack of oxide layers and nitride layers.

[0033] In some embodiments, the doped tantalum nitride layer 140 comprises a multilayer stack. Figure 2 , 3B In the embodiments illustrated in 5A, the doped tantalum nitride layer 140 is formed by a stack of the following: a first tantalum nitride layer 142 formed in process 104, a dopant-containing layer 144 formed in process 106, and a second tantalum nitride layer 146 formed in process 108. The dopant of the dopant-containing layer 144 includes one or more of the following: ruthenium, cobalt, or tungsten. Throughout this specification, references to “ruthenium” may be replaced with “tungsten” and / or “cobalt”. As used herein, dopant refers to ruthenium, cobalt, and / or tungsten. In some embodiments, forming the doped tantalum nitride layer comprises forming a stack of tantalum nitride and a dopant-containing layer by atomic layer deposition.

[0034] In some embodiments, the first tantalum nitride layer 142 is formed to a first layer thickness T1 (e.g., using any suitable deposition technique) Figure 5A (As shown). In an exemplary embodiment, a tantalum nitride layer 142 is formed to [the target area] by atomic layer deposition. to The thickness of the first layer is within the range specified. In some embodiments, the thickness of the first layer is approximately... In some implementations, the thickness of the first layer is greater than or equal to or and less than or equal to or

[0035] In some embodiments, atomic layer deposition of TaN involves sequential exposure to a tantalum precursor and a nitrogen reactant. The tantalum precursor can be any suitable tantalum species, including but not limited to penta(dimethylamino)tantalum (PDMAT), and the nitrogen reactant comprises ammonia. Those skilled in the art will recognize that the reaction with PDMAT and NH3 represents only one possible ALD reaction and should not be considered as a limitation on the scope of this disclosure.

[0036] Depending on, for example, the reactive species used, the temperature during the formation of the tantalum nitride layer 142 can be any suitable temperature. In some embodiments, the substrate can be maintained at a temperature in the range of 200°C to 350°C, or in the range of 225°C to 300°C, or in the range of 250°C to 275°C.

[0037] The doped layer 144 formed by process 106 can be any suitable material. In some embodiments, the doped layer 144 comprises one or more of the following: metallic ruthenium, metallic tungsten, or metallic cobalt. In some embodiments, the ruthenium-containing layer 144 is substantially composed of one or more of the following: metallic ruthenium, metallic tungsten, or metallic cobalt. As used in this manner, the term "substantially composed of" means that, on an atomic basis, the referred layer consists of 95%, 98%, 99%, or 99.5% or more of the referred species.

[0038] In some embodiments, the dopant layer 144 comprises tantalum nitride doped with one or more of ruthenium, tungsten, or cobalt. In some embodiments, tantalum nitride doped with one or more of ruthenium, tungsten, or cobalt is formed by flash CVD. In some embodiments, the dopant layer 144 is a thin conformal film deposited by CVD.

[0039] In some embodiments, the dopant layer 144 has in to Within the range, or about to approximately Pre-processing thickness TR within the range (see [reference]) Figure 5A In some embodiments, the doped layer 144 is amorphous. In some embodiments, the doped layer 144 is substantially amorphous. As used in this manner, the term "substantially amorphous" means that more than 90%, 95%, or 98% of the volume of the doped layer 144 is amorphous. In some embodiments, the doped layer 144 has a nanocrystalline structure.

[0040] In some embodiments, the dopant layer is formed while the substrate is maintained at the same process temperature as during the formation of the first tantalum nitride layer 142.

[0041] In some embodiments, the second tantalum nitride layer 146 deposited by process 108 is formed using the same process as the first tantalum nitride layer 142. In some embodiments, the second tantalum nitride layer 146 is formed using a different process than the first tantalum nitride layer 142. In some embodiments, the second tantalum nitride layer 146 is formed using PDMAT and ALD of ammonia. In some embodiments, the substrate can be maintained at the following temperatures to form the second tantalum nitride layer 146: in the range of 200°C to 350°C, or in the range of 225°C to 300°C, or in the range of 250°C to 275°C.

[0042] The thickness T2 of the second tantalum nitride layer 146 (see [reference]). Figure 5A The second thickness of the second tantalum nitride layer 146 can be any suitable thickness. In some embodiments, the second thickness of the second tantalum nitride layer 146 is less than, equal to, or greater than the first thickness of the first tantalum nitride layer 142. In some embodiments, the second thickness of the second tantalum nitride layer 146 is within... to Within the range, or to Within the range, or approximately In some embodiments, the second thickness is greater than or equal to or and less than or equal to or

[0043] In some embodiments, the total thickness T of the tantalum nitride doped layer 140 is... F (See also) Figure 5A (greater than) or In an exemplary embodiment, the thickness of the (Ru, W, and / or Co)-doped TaN layer 140 is approximately to Within the range, or to Within the range.

[0044] In some embodiments, the doped tantalum nitride layer 140 comprises at least one tantalum nitride layer and at least one dopant-containing layer. In some embodiments, the doped tantalum nitride layer 140 is deposited as a monolayer. For example, in some embodiments, the tantalum nitride layer 140 is formed by ALD or CVD, and a dopant precursor is added to the reaction.

[0045] In some embodiments, after forming the stack of doped tantalum nitride layers 140, the substrate is annealed in process 110. For example... Figure 3CAs shown, the stack of a first tantalum nitride layer 142, a doped layer 144, and a second tantalum nitride layer 146 is annealed to form an annealed doped tantalum nitride layer 150. For illustrative purposes, doped atoms 152 are marked with dots in the figure.

[0046] The laminate can be annealed using any suitable technique known to those skilled in the art. In some embodiments, annealing is performed at a temperature greater than or equal to 300°C, 400°C, 500°C, 600°C, 700°C, 800°C, 900°C, or 1000°C. In some embodiments, annealing is performed in an atmosphere containing one or more of the following: an inert gas (e.g., molecular nitrogen (N2), argon (Ar)), a reducing gas (e.g., molecular hydrogen (H2) or ammonia (NH3)), or an oxidizing agent (e.g., molecular oxygen (O2), ozone (O3), or peroxide). Annealing can be performed for any suitable duration. In some embodiments, the film is annealed for a predetermined time ranging from about 15 seconds to about 90 minutes, or from about 1 minute to about 60 minutes. In some embodiments, annealing the deposited film increases the film density, reduces the film resistivity, and / or improves the film purity.

[0047] In some implementations, such as Figure 3A As shown, structure 135 in the first material 130 has a bottom 136 and at least one sidewall 137. In some embodiments, structure 135 is a circular through-hole having a cylindrical sidewall 137. In some embodiments, structure 135 is a trench having two or more sidewalls 137. In the illustrated exemplary embodiment, the doped tantalum nitride film 150 is a conformal film formed on the sidewalls and bottom of the structure. Used in this manner, the thickness of the "conformal film" varies with the average thickness by no more than 0.5%, 1%, 5%, 10%, or 15%. In some embodiments, each layer of the stack before annealing is a conformal film. In some embodiments, the first tantalum nitride layer 142 and the second tantalum nitride layer 146 are conformal films.

[0048] Please see again Figure 2 In method 100, process 112 involves exposing an annealed doped tantalum nitride layer 150 to plasma to form a treated doped tantalum nitride layer 154. In some embodiments, the annealed doped tantalum nitride layer 150 is an annealed ruthenium-doped tantalum nitride layer, an annealed tungsten-doped tantalum nitride layer, and / or an annealed cobalt-doped tantalum nitride layer. In some embodiments, the plasma contains one or more of helium or neon. In some embodiments, the plasma contains neon. In some embodiments, the plasma contains helium.

[0049] Plasma exposure process 112 produces a treated doped tantalum nitride layer 154 having a reduced amount of dopant atoms 152 compared to a doped tantalum nitride layer 150. In some embodiments, plasma exposure process 112 produces a treated ruthenium-doped tantalum nitride layer having a reduced amount of ruthenium atoms compared to a ruthenium-doped tantalum nitride layer. In some embodiments, plasma exposure process 112 produces a treated tungsten-doped tantalum nitride layer having a reduced amount of tungsten atoms compared to a tungsten-doped tantalum nitride layer. In some embodiments, plasma exposure process 112 produces a treated cobalt-doped tantalum nitride layer having a reduced amount of cobalt atoms compared to a cobalt-doped tantalum nitride layer.

[0050] The plasma exposure process 112 causes the doping level to decrease from a first doping dose before plasma exposure to a second doping dose less than the first doping dose after plasma exposure. In some embodiments, the plasma exposure process 112 causes the ruthenium doping level to decrease from a first ruthenium amount before plasma exposure to a second ruthenium amount less than the first ruthenium amount after plasma exposure. In some embodiments, the plasma exposure process 112 causes the tungsten doping level to decrease from a first tungsten amount before plasma exposure to a second tungsten amount less than the first tungsten amount after plasma exposure. In some embodiments, the plasma exposure process 112 causes the cobalt doping level to decrease from a first cobalt amount before plasma exposure to a second cobalt amount less than the first cobalt amount after plasma exposure.

[0051] In some implementations, such as Figure 5A and 5B As shown, the tantalum nitride layer 140 is not annealed, or maintains a laminated structural appearance with different layers. While maintaining the laminated structural appearance, the adjacent edges of the individual layers may become blurred together. In the illustrated embodiment, the tantalum nitride layer 140 is exposed to a plasma containing one or more of helium or neon to form a treated tantalum nitride layer 154a with a stratiform layer structure.

[0052] like Figure 5B As shown, the thickness T of the doped tantalum nitride layer 140 in some embodiments F Change to the processed thickness T FT Thickness T F To the processed thickness T FT The reduction depends on a variety of factors, including but not limited to: the length of the plasma exposure, the power of the plasma exposure, the method of depositing each layer, and the composition of each layer. In some embodiments, the processed thickness T FT Less than the thickness T before plasma exposure F90%, 80%, 70%, or 60%.

[0053] The thickness of each layer may be affected by varying degrees of plasma exposure. In some embodiments, plasma exposure alters the thickness of the dopant-containing layer 144 without substantially altering the thickness of other layers. If used in this manner, if the thickness change is less than ±5% of the pre-plasma thickness, the film thickness is substantially unchanged. In some embodiments, the thickness T1 of the first tantalum nitride layer 142 is reduced to the treated thickness T. 1T The thickness T2 of the second tantalum nitride layer 146 is reduced to the processed thickness T. 2T And the thickness T of the dopant layer 144 R Reduced to the processed thickness T RT In some embodiments, one or more of the following occurs: the thickness T1 of the first tantalum nitride layer 142 is reduced to the treated thickness T. 1T The thickness T2 of the second tantalum nitride layer 146 is reduced to the processed thickness T. 2T or the thickness T of the doped layer 144 R Reduced to the processed thickness T RT In some embodiments, the thickness T of the dopant layer 144 is... R greater than or equal to or And reduced to less than or The processed thickness T RT In some embodiments, the thickness T of the dopant layer 144 is... R greater than or And reduced to less than or The processed thickness T RT .

[0054] exist Figure 5A and 5B In the illustrated embodiment, plasma exposure process 112 produces a treated doped tantalum nitride layer 154a having a reduced amount of dopant atoms compared to doped tantalum nitride layer 150. Plasma exposure process 112 results in a reduction in doping level from a first doping dose before plasma exposure to a second doping dose after plasma exposure that is less than the first doping dose.

[0055] In some embodiments, the concentration of the dopant in the tantalum nitride layer 140 is in the range of 0.5 to 50% by weight, or 1 to 45% by weight, or 2 to 40% by weight, or 3 to 35% by weight, or 4 to 30% by weight, or 5 to 25% by weight of the total weight of the tantalum nitride layer 140. In some embodiments, the weight percentage of the dopant in the tantalum nitride layer 140 is reduced to an amount greater than or equal to 0.5%, 1%, 2%, 3%, 4%, 5%, 6%, 7%, 8%, 9%, or 10% and less than or equal to 50%, 45%, 40%, 35%, 30%, 25%, 20%, or 15%.

[0056] In one or more embodiments, after plasma exposure, the concentration of dopant in the treated doped tantalum nitride layers 154, 154a is reduced to an amount in the range of 0.05 to 20% by weight, or 0.1 to 15% by weight, or 0.2 to 10% by weight, or 0.3 to 8% by weight, or 0.4 to 6% by weight, or 0.5 to 5% by weight, of the total weight of the treated doped tantalum nitride layers 154, 154a. In some embodiments, the weight percentage of dopant in the treated doped tantalum nitride layers 154, 154a is reduced to an amount greater than or equal to 0.05%, 0.1%, 0.2%, 0.3%, 0.4%, 0.5%, 0.6%, 0.7%, 0.8%, 0.9%, 1.0%, 1.5%, 2.0%, 2.5%, 3.0%, 3.5%, 4.0%, 4.5%, or 5.0% and less than or equal to 20%, 17.5%, 15%, 12.5%, 10%, 9%, 8%, 7%, 6%, or 5%.

[0057] The resistivity of the doped tantalum nitride layer 154 is less than that of both thermal ALD TaN (undoped) and doped thermal ALD TaN (without helium or neon plasma exposure). In some embodiments, the resistivity of the doped tantalum nitride layer 150 is greater than or equal to 1000 μΩ-cm, 1100 μΩ-cm, 1200 μΩ-cm, 1300 μΩ-cm, 1400 μΩ-cm, 1500 μΩ-cm, or 1600 μΩ-cm. In some embodiments, the resistivity of the treated doped tantalum nitride layer 154 is less than or equal to 1000 μΩ-cm, 900 μΩ-cm, 800 μΩ-cm, 700 μΩ-cm, 600 μΩ-cm, or 500 μΩ-cm. In some embodiments, helium and / or neon plasma exposure reduces the resistivity of the doped tantalum nitride layer 150 to less than 60%, 50%, 40%, or 30% of the amount before plasma treatment. For example, in an exemplary process, the resistivity of the doped tantalum nitride film 150 is reduced from about 1700 μΩ-cm to about 500 μΩ-cm by exposure to neon plasma.

[0058] Some embodiments of the doped tantalum nitride film have a pre-plasma carbon content and a post-plasma carbon content. In some embodiments, exposure to helium or neon plasma reduces the pre-plasma carbon content to the post-plasma carbon content. In some embodiments, the pre-plasma carbon content of the doped tantalum nitride film 150 is greater than 0.8% on an atomic basis. In some embodiments, the post-plasma carbon content of the doped tantalum nitride film 154 is less than 0.6%, 0.5%, or 0.4% on an atomic basis. In some embodiments, exposure to helium or neon plasma reduces the carbon content in the doped tantalum nitride film by greater than or equal to 25%, 30%, 35%, 40%, 45%, or 50%.

[0059] The plasma can be any suitable plasma. In some embodiments, the helium or neon plasma is an inductively coupled plasma (ICP), which is generated by an ICP coil. The ICP coil can be operated at a lower pressure to produce a higher plasma density. In some embodiments, the plasma density of the inductively coupled plasma is greater than or equal to about 10. 11 cm -3 10 12 cm -3 Or 10 13 cm -3The plasma generated by the ICP coil has a frequency of 2 MHz. In some embodiments, RF source power between about 500 watts and about 25 kW can be supplied at frequencies between about 400 kHz and about 60 MHz. RF bias power up to about 3000 watts can be applied to the substrate support at frequencies of 13.56 MHz or 2 MHz. In some embodiments, RF source power between about 100 watts and about 3000 watts can be supplied to the gas mixture at frequencies between about 400 kHz and about 60 MHz. In some cases, dual-frequency or tri-frequency modulation of ion energy can be used. DC bias power between about 1 kW and about 10 kW can be applied to the collimator in pulse mode. Alternatively, DC bias power can be applied to the collimator in continuous mode. In some embodiments, the plasma pressure is in the range of 0.1 millitorr to 100 millitorr. In some embodiments, the substrate is maintained at a temperature in the range of -20°C to 400°C.

[0060] Please see again Figure 2 Method 100, in some implementations, such as Figure 3E As shown, in process 114, a metal film 156 is deposited on the treated tantalum nitride layer 154 to fill the structure. In some embodiments, the metal film 156 is a metal contact. In some embodiments, the metal film 156 comprises one or more of, or is substantially composed of, one or more of: copper (Cu), cobalt (Co), or copper doped with one or more of manganese (Mn), tungsten (W), or aluminum (Al).

[0061] The metal film 156 may be deposited using any suitable technique known to those skilled in the art. In some embodiments, the metal film 156 is deposited by atomic layer deposition, chemical vapor deposition, or physical vapor deposition.

[0062] Figure 4 Another electronic device 120 is shown according to one or more embodiments of the present disclosure. Figure 4 Structure 135 is bounded by a first material 130 on its sides and by a second material 132 at its bottom. In some embodiments, the first material 130 comprises a dielectric, and the second material 132 comprises a conductive material. In some embodiments, the conductive material comprises a copper layer. In some embodiments, the first material 130 comprises a low-k dielectric material.

[0063] In some embodiments, a tantalum nitride film 150 is deposited as a conformal film with a first doping dose. In the illustrated embodiment, during the plasma exposure process 112, a bias voltage is applied to the substrate 125 to form a directional plasma. The bias voltage on the substrate 125 causes ions in the neon plasma to move toward the substrate surface, resulting in a different removal pattern of the dopant atoms 152 compared to that observed when no bias voltage is applied to the substrate.

[0064] In some implementations, such as Figure 4 As shown, directional plasma removes the dopant 152 from the tantalum nitride on the bottom 157 of structure 135, leaving substantially all the dopant in the tantalum nitride on the sidewalls 158. As used in this manner, the term "substantially all" means that more than or equal to about 85%, 90%, 95% or more of the original dopant atoms remain in the sidewalls of the tantalum nitride film below the top surface of the first material 130. In the illustrated embodiment, the dopant is also removed from the top 155 of the conformal tantalum nitride film.

[0065] Method 100 can be implemented using various hardware arrangements. In some embodiments, the deposition of the tantalum nitride film, plasma exposure, and annealing occur in the same process chamber. In some embodiments, deposition, annealing, and plasma exposure occur in different process chambers.

[0066] Figure 6 A schematic cross-sectional view depicting an illustrative process chamber 200 (e.g., a PVD chamber) according to some embodiments of this disclosure is shown. Examples of suitable PVD chambers include those available from Applied Materials, Inc., Santa Clara, California. II and III. Other PVD process chambers are also available. However, the methods disclosed herein can also be used in process chambers provided by other manufacturers. In one embodiment, process chamber 200 is capable of depositing, for example, metals, metal nitrides, metal fluorides, metal carbides, etc., on substrate 218.

[0067] The process chamber 200 has a chamber body 205, which includes sidewalls 202, a bottom 203, and a cover assembly 204. The sidewalls 202, bottom 203, and cover assembly 204 completely enclose the internal volume 206. A substrate support 208 is disposed in the lower portion of the internal volume 206 of the process chamber 200, opposite to the target material 214. A substrate transfer port 209 is formed in the sidewall 202 for transferring substrates in and out of the internal volume 206.

[0068] Gas source 210 is coupled to process chamber 200 to supply process gas to internal volume 206. In one embodiment, the process gas may include inert gas, non-reactive gas, and reactive gas, etc. Examples of process gases that can be supplied by gas source 210 include, but are not limited to: argon (Ar), helium (He), neon (Ne), nitrogen (N2), oxygen (O2), hydrogen (H2), and H2O, etc.

[0069] Pump 212 is coupled to process chamber 200 and communicates with internal volume 206 to control the pressure in internal volume 206. In one embodiment, the pressure in process chamber 200 can be maintained at a pressure greater than zero to about 10 millitorrs or less. In another embodiment, the pressure in process chamber 200 can be maintained at about 3 millitorrs.

[0070] A backplate 213 supports the target 214 in the upper portion of the internal volume 206. The backplate 213 can be electrically isolated from the sidewall 202 by an isolator 215. The target 214 typically provides a source of material to be deposited on the substrate 218. The target 214 can be made of a material containing titanium (Ti), tantalum (Ta), niobium (Nb), tungsten (W), cobalt (Co), nickel (Ni), copper (Cu), aluminum (Al), manganese (Mn), alloys of the foregoing, combinations of the foregoing, or similar materials. In the exemplary embodiment described herein, the target 214 can be made of cobalt (Co).

[0071] The target 214 may be coupled to a source component 216, which includes a power supply 217 for use by the target 214. In some embodiments, the power supply 217 may be an RF generator. In some embodiments, the power supply 217 may also be a DC power source. In some embodiments, the power supply 217 may include both DC and RF power sources.

[0072] An additional RF power source 280 can also be coupled to the process chamber 200 via the substrate support 208 to provide bias power between the target 214 and the substrate support 208. In one embodiment, the RF power source 280 can supply power at a frequency between about 1 MHz and about 100 MHz (e.g., about 13.56 MHz) to the substrate support 208 to bias the substrate 218.

[0073] As indicated by arrow 282, the substrate support 208 is movable between a raised position and a lowered position. In the lowered position, the support surface 211 of the substrate support 208 may be aligned with or just below the substrate transfer port 209 to facilitate the entry and exit of the substrate 218 into and from the process chamber 200. The support surface 211 may have an edge deposition ring 236, which is sized to receive the substrate 218 while protecting the substrate support 208 from plasma and deposited material. The substrate support 208 may be moved to a raised position closer to the target 214 for processing of the substrate 218 within the process chamber 200. When the substrate support 208 is in the raised position, a cover ring 226 may engage the edge deposition ring 236. The cover ring 226 prevents deposited material from bridging between the substrate 218 and the substrate support 208. When the substrate support 208 is in the lowered position, the cover ring 226 is suspended above the substrate support 208 and the substrate 218 placed thereon to allow substrate transfer.

[0074] During the transfer of a substrate to / from process chamber 200, a robot blade (not shown) having a substrate 218 thereon extends through substrate transfer port 209. A lifting pin (not shown) extends through support surface 211 of substrate support 208 to lift substrate 218 from support surface 211 of substrate support 208, thereby creating space for the robot blade to pass between substrate 218 and substrate support 208. The robot can then transport substrate 218 into or out of process chamber 200 through substrate transfer port 209. The raising and lowering of substrate support 208 and / or lifting pin can be controlled by controller 298.

[0075] During sputtering deposition, the temperature of the substrate 218 can be controlled using a thermal controller 238 disposed in the substrate support 208. The substrate 218 can be heated to a desired temperature for processing, as needed. In some embodiments, optional heating can be used to raise the substrate and / or film temperature to approximately 200 to approximately 400°C. In other embodiments, the substrate can be processed at room temperature (approximately 15°C to approximately 30°C). In other embodiments, the temperature is in the range of approximately 15°C to approximately 400°C. After processing, the substrate 218 can be rapidly cooled using the thermal controller 238 disposed in the substrate support 208. The thermal controller 238 controls the temperature of the substrate 218 and can be used to change the temperature of the substrate 218 from a first temperature to a second temperature within approximately a few seconds to approximately one minute.

[0076] The inner shield 220 may be located within the internal volume 206 between the target 214 and the substrate support 208. The inner shield 220 may be formed of aluminum, stainless steel, or other materials. In one embodiment, the inner shield 220 is formed of stainless steel. An outer shield 222 may be formed between the inner shield 220 and the sidewall 202. The outer shield 222 may be formed of aluminum, stainless steel, or other materials. The outer shield 222 may extend through the inner shield 220 and is configured to support the cover ring 226 when the substrate support 208 is in the lowered position.

[0077] In one embodiment, the inner shield 220 includes a radial flange 223, the inner diameter of which is larger than the outer diameter of the inner shield 220. The radial flange 223 extends from the inner shield 220 at an angle greater than about 90 degrees (90°) relative to the inner diameter surface of the inner shield 220. The radial flange 223 may be a circular ridge extending from the surface of the inner shield 220 and is generally adapted to mate with a recess formed in a cover ring 226 on the substrate support 208. The recess may be a circular groove formed in the cover ring 226, which centers the cover ring 226 relative to the longitudinal axis of the substrate support 208.

[0078] In some embodiments, the process chamber 200 may include an induction coil 242. The induction coil 242 of the process chamber 200 may have one or more turns. The induction coil 242 may be located directly inside the inner shield 220 and above the substrate support 208. The induction coil 242 may be positioned closer to the substrate support 208 than the target 214. The induction coil 242 may be formed of a material with a composition similar to or equal to that of the target 214 (e.g., cobalt, for example) to serve as a secondary sputtering target. The induction coil 242 is supported from the inner shield 220 by a plurality of coil spacers 240. The coil spacers 240 electrically isolate the induction coil 242 from the inner shield 220 and other chamber components and protect it from sputtering to avoid short circuits or the generation of undesirable plasma excitation sources.

[0079] Induction coil 242 may be coupled to power source 250. Power source 250 may have electrical leads passing through sidewall 202, outer shield 222, inner shield 220, and coil spacer 240 of process chamber 200. The electrical leads are connected to an electrical hub 244 on induction coil 242 to supply power to induction coil 242. Electrical hub 244 may have multiple isolated electrical connections for supplying power to induction coil 242. Furthermore, electrical hub 244 may be configured to interface with and support induction coil 242 at coil spacer 240. In one embodiment, power source 250 applies current to induction coil 242 to induce an RF field within process chamber 200 and couple power to plasma to increase plasma density, i.e., concentration of reactive ions. In some embodiments, induction coil 242 is operated at an RF power frequency less than that of RF power source 280. In one embodiment, the RF power frequency supplied to induction coil 242 is approximately 2 MHz. In other embodiments, the RF power frequency can be operated in the range of about 1.8 MHz to about 2.2 MHz. In other embodiments, the RF power frequency range can be from about 0.1 MHz to 99 MHz. In some embodiments, the induction coil 242 can be fabricated from a material such as a metallic material that can be sputtered onto a substrate. The power source 250 can then apply DC power to the induction coil 242 to sputter the induction coil 242 while coupling RF power to the plasma.

[0080] A controller (not shown) is coupled to process chamber 200. The controller includes a central processing unit (CPU), memory, and supporting circuitry. The controller is used to control the process sequence, regulate the gas flow from gas source 210 into process chamber 200, and control the ion bombardment of target 214 and induction coil 242. In one embodiment, the controller regulates a first RF power level of a first power source (e.g., RF power source 280), a second RF power level of a second power source (e.g., power source 250), a first DC power level of a second power source (e.g., power source 250), and a second DC power level of a third power source (e.g., power source 217) while simultaneously sputtering the target and / or induction coil and simultaneously regulating the etching gas flow into the internal volume 206 of process chamber 200. Other aspects of the controller are described below.

[0081] Figure 7A processing tool 300 according to one or more embodiments is illustrated. In one or more embodiments, the processing tool 300 includes a process chamber 301. The process chamber includes a cover 302 and at least one sidewall 304. In one or more embodiments, the cover 302 and at least one sidewall 304 define an internal volume 305 of the process chamber 301. In one or more embodiments, the processing tool 300 includes a remote plasma unit 306 located within the internal volume 305 of the process chamber 301. In one or more embodiments, a direct plasma unit 308 is located within the internal volume 305 of the process chamber 301. In one or more embodiments, one of the remote plasma units 306 generates remote plasma, and the direct plasma unit 308 generates direct plasma. In one or more embodiments, the generation of remote plasma and the generation of direct plasma occur sequentially. In some embodiments, the generation of remote plasma occurs first, followed by the generation of direct plasma. In other embodiments, the generation of direct plasma occurs first, followed by the generation of remote plasma. In one or more embodiments, the generation of remote plasma occurs simultaneously with the generation of direct plasma.

[0082] In one or more embodiments, an ion filter 312 separates a remote plasma unit 306 and a direct plasma unit 308. In one or more embodiments, the ion filter 312 is used to filter ions from plasma effluent during transport from the remote plasma unit 306 to the substrate processing region 315. In one or more embodiments, the ion filter 312 functions to reduce or eliminate ionic charged species traveling from the remote plasma unit 306 to the substrate 330. In one or more embodiments, uncharged neutral and free radical species can pass through at least one aperture 318 in the ion filter 312 to react at the substrate 330. It should be noted that complete elimination of ionic charged species in the reaction region 315 surrounding the substrate 330 is not always the desired goal. In one or more embodiments, ionic species are required to reach the substrate 330 for etching and / or deposition processes. In these cases, the ion filter 312 helps to control the concentration of ionic species in the reaction region 315 to a level that aids in the processing / cleaning and / or deposition processes. In one or more embodiments, the ion filter 312 includes a nozzle.

[0083] In one or more embodiments, the processing tool includes at least one electrode located within a process chamber. In one or more embodiments, the at least one electrode is located within an internal volume 305 of the process chamber 301. Figure 6 In the illustrated embodiment, at least one electrode 316 is positioned and electrically connected to the base 314.

[0084] In one or more embodiments, the process chamber 301 includes a base 314. In one or more embodiments, the base 314 is configured to support a semiconductor substrate 330 within a processing region 315. In one or more embodiments, the base 314 may have a heat exchange channel (not shown) through which a heat exchange fluid flows to control the temperature of the substrate 330. In one or more embodiments, the substrate 330 can be cooled or heated to maintain a relatively low temperature, such as from about -20°C to about 400°C, or from about 0°C to about 400°C. In one or more embodiments, the heat exchange fluid comprises one or more of ethylene glycol or water. In other embodiments, the base 314 is resistively heated to achieve a relatively high temperature, such as from about 100°C to about 1100°C, or from about 200°C to about 750°C, using an embedded resistance heater element (not shown). In one or more embodiments, the base 314 is configured to rotate. In one or more embodiments, the base 314 includes electrodes 316 located within the base 314, and is powered by an RF generator 350 and matched by an RF matcher 340. In one or more embodiments, the base 314 is made of a metallic material and is itself an electrode. The electrodes 316 can be polarized to bias a substrate or substrate support and form directional plasma.

[0085] In one or more embodiments, at least one power source, such as an RF generator 350, is electrically connected to the process chamber 301 via an RF matching unit 340.

[0086] In one or more embodiments, two RF generators are electrically connected to the process chamber 301. In such embodiments, a first RF generator 350 is electrically connected to a base electrode 316, and a second RF generator 355 is electrically connected to an inductively coupled plasma (ICP) coil 370.

[0087] In one or more embodiments, a radio frequency (RF) powered remote plasma unit 306 and a direct plasma unit 308 are used to generate plasma. In one or more embodiments, alternating current (AC) power is rectified and switched to supply current to an RF amplifier. The RF amplifier operates at a reference frequency (e.g., 13.56 MHz), driving current through an output matching network and then through a power measurement circuit to the output of the power supply. The output matching is typically designed to connect to a generator optimized to drive a specific impedance (e.g., 50 ohms, for example) to have the same characteristic impedance as commonly used coaxial cables in industry. Power flows through the matched cable section, is measured by a matching controller, and is converted by a load matcher. The load matcher is typically a motorized automatic tuner, thus introducing a predetermined time delay before the system is properly configured. After passing through the load matcher, the power is then directed into a plasma excitation circuit that drives two electrodes in a evacuated process chamber. Process gas is introduced into the evacuated process chamber, and plasma is generated when driven by the circuit. Because the matching network or load matcher is dynamic, the response time of the matching network is typically on the order of one second or more.

[0088] In some embodiments, the plasma power is in the range of about 10 W to about 1000 W, including from about 200 W to about 600 W. In some embodiments, the plasma power is less than or equal to about 1000 W, or less than or equal to about 6500 W.

[0089] The plasma frequency can be any suitable frequency. In some embodiments, the plasma has a frequency in the range of about 200 kHz to 30 MHz. In some embodiments, the plasma frequency is less than or equal to about 20 MHz, less than or equal to about 10 MHz, less than or equal to about 5 MHz, less than or equal to about 1000 kHz, or less than or equal to about 500 kHz. In some embodiments, the plasma frequency is greater than or equal to about 210 kHz, greater than or equal to about 250 kHz, greater than or equal to about 600 kHz, greater than or equal to about 750 MHz, greater than or equal to about 1200 kHz, greater than or equal to about 2 MHz, greater than or equal to about 4 MHz, greater than or equal to about 7 MHz, greater than or equal to about 12 MHz, greater than or equal to about 15 MHz, or greater than or equal to about 25 MHz. In one or more embodiments, the plasma has a frequency of about 13.56 MHz, or about 350 kHz, or about 400 kHz, or about 27 MHz, or about 40 MHz, or about 60 MHz.

[0090] In one or more embodiments, a controller 320 may be provided and coupled to various components of the processing tool 300 to control the operation of said components. The controller 320 may be a single controller controlling the entire processing tool 300, or it may be multiple controllers controlling individual parts of the processing tool 300. For example, the processing tool 300 may include independent controllers for each of the process chamber 301, the remote plasma unit 306, the direct plasma unit 308, and the power source (e.g., the RF generator 350).

[0091] In some embodiments, the process chamber 301 further includes a controller 320. In one or more embodiments, the controller 320 controls the ignition of plasma via a remote plasma unit 306 and / or a direct plasma unit 308 within the process chamber 301.

[0092] In some embodiments, controller 320 may include a central processing unit (CPU) 322, memory 324, input / output (I / O) 326, and support circuitry 328. Controller 320 may directly control processing tool 300 or be controlled via a computer (or controller) associated with a particular process chamber and / or support system components.

[0093] The controller 320 may be any form of general-purpose computer processor that can be used in industrial settings to control various chambers and subprocessors. The memory 324 or computer-readable medium of the controller 320 may be one or more readily available memories, such as non-transitory memory (e.g., random access memory (RAM)), read-only memory (ROM), floppy disk, hard disk, optical storage media (e.g., optical disc or digital video disc), flash memory, or any other form of digital storage (local or remote). The memory 324 may hold an instruction set that can be operated by the processor (CPU 322) to control the parameters and components of the processing tool 300.

[0094] Support circuitry 328 is coupled to CPU 322 for conventionally supporting the processor. This circuitry includes cache, power supply, clock circuitry, input / output circuitry, subsystems, etc. One or more processes can be stored in memory 324 as software programs that, when executed or called by the processor, cause the processor to control the operation of processing tool 300 or individual processing units (e.g., remote plasma unit 306 and direct plasma unit 308) in the manner described herein. Software programs can also be stored and / or executed by a second CPU (not shown) located remotely to the hardware controlled by CPU 322.

[0095] Some or all of the processes and methods disclosed herein can also be executed in hardware. Thus, the processes can be implemented as software and executed using a computer system, implemented as hardware (e.g., application-specific integrated circuits or other types of hardware implementations), or implemented as a combination of software and hardware. When executed by a processor, the software program transforms a general-purpose computer into a dedicated computer (controller) that controls the operation of the control chamber to perform the processing.

[0096] In some embodiments, the controller 320 has one or more configurations to perform various processes or subprocesses to perform the method. The controller 320 may be connected to and configured to operate intermediate components to perform the functions of the method. For example, the controller 320 may be connected to and configured to control one or more of the following: a remote plasma unit 306, a direct plasma unit 308, a base 314, at least one electrode 316, an ICP coil 370, or other components.

[0097] Additional embodiments of this disclosure relate to a processing system having one or more process chambers. In one or more embodiments, the process chamber includes those shown in Figure 5 or... Figure 6 Processing tools.

[0098] Additional implementations of this disclosure relate to, for example... Figure 7 The processing tool shown is used to form a memory device and is used in the methods described herein. The clustering tool 900 includes at least one central transfer station 921, 931 having a plurality of sides. Robots 925, 935 are disposed within the central transfer stations 921, 931 and configured to move robot blades and wafers to each of the plurality of sides.

[0099] The cluster tool 900 includes multiple process chambers 902, 904, 906, 908, 910, 912, 914, 916, and 918, also referred to as processing stations, connected to a central transfer station. Each process chamber provides an independent processing area isolated from adjacent processing stations. Process chambers can be any suitable chamber, including, but not limited to: pre-cleaning chambers, buffer chambers, transfer spaces(s), wafer orienter / degassing chambers, cryogenic cooling chambers, deposition chambers, annealing chambers, etching chambers, selective etching chambers, etc. The specific arrangement of process chambers and components may vary depending on the cluster tool and should not be considered as limiting the scope of this disclosure.

[0100] exist Figure 8In the illustrated embodiment, the factory interface 950 is connected to the front of the cluster tool 900. The factory interface 950 includes a loading chamber 954 and an unloading chamber 956 located on the front side 951 of the factory interface 950. Although the loading chamber 954 is shown on the left and the unloading chamber 956 is shown on the right, those skilled in the art will understand that this represents only one possible configuration.

[0101] The size and shape of the loading chamber 954 and the unloading chamber 956 may vary depending on, for example, the substrate being processed in the cluster tool 900. In the illustrated embodiment, the dimensions of the loading chamber 954 and the unloading chamber 956 are set to hold a wafer cassette in which multiple wafers are disposed.

[0102] Robot 952 is located within factory interface 950 and can move between loading chamber 954 and unloading chamber 956. Robot 952 is capable of transferring wafers from a cassette in loading chamber 954 to a loading locking chamber 960 via factory interface 950. Robot 952 is also capable of transferring wafers from loading locking chamber 962 to a cassette in unloading chamber 956 via factory interface 950. As those skilled in the art will understand, factory interface 950 may have more than one robot 952. For example, factory interface 950 may have a first robot that transfers wafers between loading chamber 954 and loading locking chamber 960, and a second robot that transfers wafers between loading locking chamber 962 and unloading chamber 956.

[0103] The illustrated clustering tool 900 has a first block 920 and a second block 930. The first block 920 is connected to the factory interface 950 via loading locking chambers 960, 962. The first block 920 includes a first transfer chamber 921 in which at least one robot 925 is located. The robot 925 is also referred to as a robotic wafer transport mechanism. The first transfer chamber 921 is centered relative to the loading locking chambers 960, 962, process chambers 902, 904, 916, 918, and buffer chambers 922, 924. In some embodiments, the robot 925 is a multi-armed robot capable of moving more than one wafer at a time independently. In some embodiments, the first transfer chamber 921 includes more than one robotic wafer transport mechanism. The robot 925 in the first transfer chamber 921 is configured to move wafers between chambers surrounding the first transfer chamber 921. Each wafer is mounted on a wafer transport blade located at the distal end of the first robotic mechanism.

[0104] After the wafer is processed in the first block 920, it can be transported to the second block 930 via a transit chamber. For example, chambers 922 and 924 can be unidirectional or bidirectional transit chambers. Transit chambers 922 and 924 can be used, for example, to cryogenically cool the wafer before processing in the second block 930, or to allow the wafer to be cooled or post-processed before being moved back to the first block 920.

[0105] The system controller 990 communicates with the first robot 925, the second robot 935, the first plurality of process chambers 902, 904, 916, 918, and the second plurality of process chambers 906, 908, 910, 912, 914. The system controller 990 can be any suitable component that controls the process chambers and robots. For example, the system controller 990 can be a computer including a central processing unit (CPU), memory, suitable circuitry, and storage.

[0106] Therefore, one or more embodiments of this disclosure relate to clustering tools comprising one or more process chambers surrounding a central transfer station. In some embodiments, the one or more process chambers are configured to deposit a ruthenium-doped tantalum nitride film, anneal the ruthenium-doped tantalum nitride film, and expose the annealed tantalum nitride film to neon plasma. At least one controller is connected to one or more process chambers and the central transfer station. In some embodiments, the at least one controller has a configuration selected from one or more of the following: a configuration for depositing a tantalum nitride film; a configuration for depositing a ruthenium-containing film; a configuration for annealing a substrate; a configuration for moving a substrate between one or more process chambers and the central transfer station; and a configuration for exposing the substrate to neon plasma.

[0107] Typically, the process can be stored as a software program in the memory of the system controller 990, which, when executed by the processor, causes the process chamber to perform the process described herein. The software program can also be stored and / or executed by a second processor (not shown) located at a remote end of the processor-controlled hardware. Some or all of the methods described herein can also be executed in hardware. Thus, the process can be implemented as software and executed using a computer system, implemented as hardware (e.g., an application-specific integrated circuit or other type of hardware implementation), or implemented as a combination of software and hardware. When executed by the processor, the software program transforms a general-purpose computer into a dedicated computer (controller) that controls the operation of the chamber to perform the processing.

[0108] Additional embodiments of this disclosure relate to a non-transitory computer-readable medium including instructions that, when executed by a controller of a process chamber, cause the process chamber to perform the following operations: depositing a tantalum nitride film onto a substrate; depositing a ruthenium-containing film onto a substrate; annealing the substrate; and exposing the substrate to neon plasma.

[0109] One or more embodiments relate to a non-transitory computer-readable medium comprising instructions that, when executed by a controller of a process chamber, cause the process chamber to perform the following operations: exposing a substrate comprising a surface structure (the surface structure having a metal bottom, dielectric sidewalls, and a dielectric field) to a dual plasma treatment within the process chamber to remove chemical residues and / or impurities from the metal bottom, dielectric sidewalls, and / or dielectric field, and / or repair surface defects in the dielectric sidewalls and / or dielectric field; wherein the dual plasma treatment comprises direct plasma and subsequent remote plasma.

[0110] Spatially related terms such as “below,” “under,” “down,” “above,” and “above” may be used herein to facilitate the description of the relationship between one element or feature shown in the figures and one or more other elements or features. It is understood that, in addition to the orientation depicted in the figures, spatially related terms are intended to cover different orientations of the device in use or operation. For example, if the device in the figures is flipped, an element described as “below” or “under” other elements or features will therefore be oriented “above” other elements or features. Thus, the exemplary term “below” can encompass both above and below orientations. The device may be oriented in other ways (rotated 90 degrees or in other directions), and the spatially related descriptions used herein shall apply accordingly.

[0111] Throughout this specification, the references to "one embodiment," "some embodiments," "one or more embodiments," or "an embodiment" mean that a specific feature, structure, material, or characteristic described in connection with that embodiment is included in at least one embodiment of this disclosure. Therefore, the use of terms such as "in one or more embodiments," "in some embodiments," "in one embodiment," or "in one embodiment" throughout this specification does not necessarily refer to the same embodiment of this disclosure. Furthermore, in one or more embodiments, specific features, structures, materials, or characteristics can be combined in any manner.

[0112] Although the disclosure herein has been described with reference to specific embodiments, those skilled in the art will understand that these embodiments are merely illustrative of the principles and applications of the disclosure. Those skilled in the art will appreciate that various modifications and variations can be made to the methods and apparatus of the disclosure without departing from the spirit and scope of the disclosure. Therefore, the disclosure is intended to include modifications and variations within the scope of the appended claims and their equivalents.

Claims

1. A method for forming an interconnect, the method comprising: A tantalum nitride doped layer is formed on a substrate, the tantalum nitride doped layer having a first doping dose, the dopant comprising one or more of ruthenium, tungsten, or cobalt; and The doped tantalum nitride layer is exposed to plasma to form a treated doped tantalum nitride layer, the plasma containing one or more of helium or neon, the treated doped tantalum nitride layer having a resistivity of less than 600 µΩ-cm and a second doping dose less than the first doping dose.

2. The method of claim 1, wherein the first doping dose is in the range of 0.5 to 50% by weight of the doped tantalum nitride layer.

3. The method of claim 2, wherein the second doping dose is reduced from the first doping dose and is in the range of 0.05 to 20% by weight of the treated doped tantalum nitride layer.

4. The method of claim 1, wherein the step of forming the doped tantalum nitride layer comprises: forming a stack of tantalum nitride layer and dopant layer by atomic layer deposition, and then annealing the stack.

5. The method of claim 1, wherein the doped tantalum nitride layer has a resistivity greater than 1200 µΩ-cm.

6. The method of claim 1, wherein, On an atomic basis, the doped tantalum nitride layer has a carbon content of greater than 0.8%.

7. The method of claim 6, wherein, On an atomic basis, the treated doped tantalum nitride layer has a carbon content of less than 0.6%.

8. The method of claim 1, wherein the plasma is an inductively coupled plasma generated by an ICP coil.

9. The method of claim 8, wherein the plasma generated by the ICP coil has a frequency of 2 MHz.

10. The method of claim 1, wherein the substrate is biased to generate directional plasma.

11. The method of claim 1, further comprising: depositing metal contacts on the treated doped tantalum nitride layer.

12. The method of claim 11, wherein the metal contact comprises one or more of the following: copper, cobalt, or copper doped with one or more of manganese, tungsten, or aluminum.

13. The method of claim 1, wherein the substrate has a surface in which a structure is formed, the structure extending into the substrate by a distance and having sidewalls and a bottom, the bottom comprising a copper layer.

14. The method of claim 13, wherein the sidewalls of the structure comprise a low-k dielectric material.

15. The method of claim 14, wherein the low-k dielectric material comprises one or more of fluorine-doped silicon oxide, organosilicon glass, or porous silicon dioxide.

16. The method of claim 15, wherein the doped tantalum nitride layer is a conformal film formed on the sidewalls and bottom of the structure.

17. The method of claim 16, wherein the substrate is biased to form a directional plasma that removes the dopant from the tantalum nitride on the bottom of the structure and leaves substantially all the dopant in the tantalum nitride on the sidewalls.

18. A clustering tool, comprising: One or more process chambers surrounding a central transfer station are configured to deposit a doped tantalum nitride film, anneal the doped tantalum nitride film, and expose the annealed doped tantalum nitride film to a plasma containing one or more of helium or neon to form a treated doped tantalum nitride film having a resistivity of less than 600 µΩ-cm. as well as At least one controller is connected to the one or more process chambers and the central transfer station, the at least one controller having one or more configurations selected from: a configuration for depositing tantalum nitride films; The configuration includes: depositing a doped film; annealing a substrate; moving the substrate between one or more process chambers and a central transfer station; and exposing the substrate to neon plasma to form the treated doped tantalum nitride film having a resistivity of less than 600 µΩ-cm.

19. A non-transitory computer-readable medium comprising instructions that, when executed by a controller of a process chamber, cause the process chamber to perform the following operations: Tantalum nitride film is deposited on the substrate; A doped film is deposited on the substrate to form a doped tantalum nitride film; Anneal the substrate; as well as The substrate is exposed to neon plasma to form a treated doped tantalum nitride film with a resistivity of less than 600 µΩ-cm.

Images