Semiconductor device

Abstract

A semiconductor device includes at least one semiconductor element having a switching function, a conduction member that becomes a current path switched by the semiconductor element and is composed of a first raw material, and a coating layer that covers at least a portion of the conduction member and is composed of a second raw material. The second raw material satisfies at least one of the following three conditions: (a) the magnetic permeability is higher than that of the first raw material; (b) the resistivity is higher than that of the first raw material; and (c) the dielectric loss tangent is greater than 0.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a semiconductor device provided with a semiconductor element. BACKGROUND

[0002] Patent Document 1 discloses a conventional semiconductor device. The semiconductor device described in Patent Document 1 is provided with a semiconductor element, an island pressure point, a lead wire, a plurality of joining materials, a connection plate, and a sealing resin. In the semiconductor device, the semiconductor element is, for example, a transistor such as a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor).

[0003] PRIOR ART DOCUMENTS

[0004] PATENT DOCUMENT

[0005] Patent Document 1: Japanese Patent Application Publication No. 2011-204863 SUMMARY

[0006] PROBLEMS TO BE SOLVED BY THE INVENTION

[0007] When the semiconductor device is energized, a main circuit current that is switched by the semiconductor element flows through the island pressure point and the lead wire. The higher the switching speed, the more likely it is that ringing occurs in the main circuit current, which may, for example, cause electromagnetic interference noise that adversely affects the operation of peripheral devices.

[0008] In view of the above problem, the present disclosure aims to provide a semiconductor device that can suppress ringing.

[0009] MEANS FOR SOLVING THE PROBLEMS

[0010] The semiconductor device according to the present disclosure is provided with at least one semiconductor element having a switching function, a conduction member that becomes a current path switched by the semiconductor element and is composed of a first raw material, and a cladding layer that covers at least a part of the conduction member and is composed of a second raw material. In addition, the second raw material satisfies at least one of the following three conditions, i.e., (a) the magnetic permeability is higher than that of the first raw material, (b) the electrical resistivity is higher than that of the first raw material, and (c) the dielectric loss tangent is greater than 0.

[0011] Preferably, the second raw material is a magnetic conductive body whose magnetic permeability is higher than that of the first raw material and whose electrical resistivity is higher than that of the first raw material.

[0012] Preferably, the dielectric loss tangent of the second raw material is greater than 0.

[0013] Preferably, the second raw material has a higher magnetic permeability and a dielectric loss tangent greater than 0 than the first raw material.

[0014] Preferably, the second raw material has a higher resistivity and a dielectric loss tangent greater than 0 than the first raw material.

[0015] Preferably, the cladding layer has a thickness of 1 μm to 5 μm.

[0016] Preferably, the second raw material has a relative magnetic permeability of 10 or more.

[0017] Preferably, the second raw material has a resistivity of twice or more the resistivity of the first raw material.

[0018] Preferably, the second raw material has a dielectric loss tangent of 0.01 or more.

[0019] Preferably, the semiconductor device of the present disclosure further includes a capacitor having a first terminal and a second terminal for electrical connection. In addition, the at least one semiconductor element is a plurality of semiconductor elements that constitute a half-bridge including at least one set of upper arms and lower arms, and the plurality of semiconductor elements include a first semiconductor element included in the upper arm and a second semiconductor element included in the lower arm. The conduction member includes: a first metal layer connected to a drain electrode of the first semiconductor element; a first power lead connected to the first metal layer; and a second power lead connected to a source electrode of the second semiconductor element. The first terminal of the capacitor is connected to the first power lead, and the second terminal of the capacitor is connected to the second power lead. The cladding layer includes a first portion covering the first power lead and a second portion covering the second power lead.

[0020] Preferably, the first power lead includes a portion that constitutes a path between the first semiconductor element and the capacitor, and this portion of the first power lead is not covered by the first portion.

[0021] Preferably, the second power lead includes a portion that constitutes a path between the second semiconductor element and the capacitor, and this portion of the second power lead is not covered by the second portion.

[0022] Preferably, the cladding layer includes a third portion covering the first metal layer.

[0023] Preferably, the conduction member includes: a second metal layer connected to a drain electrode of the second semiconductor element; and a third power lead connected to the second metal layer, and the second metal layer and the third power lead are not covered by the cladding layer.

[0024] Preferably, the conduction member includes an intermediate conductor connected to the source electrode of the first semiconductor element and the second metal layer, the intermediate conductor not being covered by the covering layer.

[0025] Preferably, the conduction member includes a first spacer pad interposed between the first metal layer and the first power conductor, the covering layer including a fourth portion covering the first spacer pad.

[0026] Preferably, the conduction member includes a conductor interposed between the source electrode of the second semiconductor element and the second power conductor.

[0027] Preferably, the semiconductor element is any one of a SiC MOSFET, a SiC IGBT, a Si MOSFET, a Si IGBT, and a GaN HEMT.

[0028] Effects of the Invention

[0029] According to the present disclosure, for a semiconductor device, ringing can be suppressed, and a snubber circuit can be simplified and reliability can be improved. BRIEF DESCRIPTION OF DRAWINGS

[0030] Figure 1 is a perspective view showing a semiconductor device of a first embodiment.

[0031] Figure 2 is a perspective view showing a main part of a semiconductor device of the first embodiment.

[0032] Figure 3 is a plan view showing a semiconductor device of the first embodiment.

[0033] Figure 4 is a plan view showing a semiconductor device of the first embodiment. Figure 3 in which a sealing resin is shown by a virtual line.

[0034] Figure 5 is a partially enlarged plan view showing a part of Figure 4

[0035] Figure 6 is a front view showing a semiconductor device of the first embodiment.

[0036] Figure 7 is a bottom view showing a semiconductor device of the first embodiment.

[0037] Figure 8 is a left side view showing a semiconductor device of the first embodiment.

[0038] Figure 9 is a right side view showing a semiconductor device of the first embodiment.

[0039] ​Figure 10 It is along Figure 4 A cross-sectional view of the X-ray.

[0040] Figure 11 It is along Figure 10 A cross-sectional view along line XI-XI.

[0041] Figure 12 This is a cross-sectional view showing a first modified example of the semiconductor device according to the first embodiment.

[0042] Figure 13 This is a cross-sectional view showing a second modified example of the semiconductor device according to the first embodiment.

[0043] Figure 14 This is a perspective view showing the main parts of the semiconductor device according to the second embodiment.

[0044] Figure 15 This is a top view showing the semiconductor device according to the second embodiment.

[0045] Figure 16 It is along Figure 15 A cross-sectional view of the XVI-XVI line.

[0046] Figure 17 This is a perspective view showing the main parts of the semiconductor device according to the third embodiment.

[0047] Figure 18 This is a top view showing the semiconductor device according to the third embodiment.

[0048] Figure 19 It is along Figure 18 A cross-sectional view of the XIX-XIX line.

[0049] Figure 20 This is a top view showing the semiconductor device according to the fourth embodiment.

[0050] Figure 21 It is along Figure 20 A cross-sectional view of the XXI-XXI line. Detailed Implementation

[0051] Preferred embodiments of the semiconductor device of this disclosure are described below with reference to the accompanying drawings.

[0052] Figures 1-11A semiconductor device of a first embodiment is shown. The semiconductor device Al of the first embodiment includes a plurality of semiconductor elements 10, a support substrate 20, a plurality of wires, a plurality of intermediate wires 40, a plurality of lead members 50, a plurality of conductive blocks 60, an encapsulating resin 70, a capacitor 81, and a coating layer 90. The plurality of wires includes a first power wire 31, a second power wire 32, a third power wire 33, a pair of gate wires 34A, 34B, a pair of drive source wires 35A, 35B, and a plurality of dummy wires 36. The plurality of conductive blocks 60 includes a plurality of first blocks 61 and a plurality of second blocks 62.

[0053] Figure 1 is a perspective view showing the semiconductor device Al. Figure 2 is a view in which the encapsulating resin 70 is omitted in the perspective view of Figure 1 Figure 2 is a view in which the plurality of lead members 50 is omitted in Figure 3 Figure 4 is a plan view showing the semiconductor device Al. Figure 3 is a view in which the encapsulating resin 70 is shown by a broken line (double-dot chain line) in the plan view of Figure 5 is a partially enlarged view of a portion of Figure 4 Figure 6 is a front view showing the semiconductor device Al. Figure 7 is a bottom view showing the semiconductor device Al. Figure 8 is a left side view showing the semiconductor device Al. Figure 9 is a right side view showing the semiconductor device Al. Figure 10 is a sectional view along the X-X line of Figure 4 Figure 11 is a sectional view along the XI-XI line of Figure 10 In Figures 1-8 , a plurality of discrete points are depicted in the coating layer 90 for ease of understanding.

[0054] In the following description, three directions (x direction, y direction, and z direction) orthogonal to each other are appropriately referred to. The z direction corresponds to a thickness direction of the semiconductor device Al. The x direction corresponds to a left-right direction of a plan view (see Figure 3 and Figure 4 ) of the semiconductor device Al. The y direction corresponds to an up-down direction of the plan view (see Figure 3 and Figure 4 ) of the semiconductor device Al. As needed, one side of the x direction is set as an x1 direction, and the other side of the x direction is set as an x2 direction. Similarly, one side of the y direction is set as a y1 direction, the other side of the y direction is set as a y2 direction, one side of the z direction is set as a z1 direction, and the other side of the z direction is set as a z2 direction.

[0055] ​​​​The plurality of semiconductor elements 10 each have a function of switching a main circuit current, and the specific structure thereof is not particularly limited. As specific examples of the semiconductor elements 10, for example, SiC (silicon carbide) MOSFET, SiC IGBT, Si MOSFET, Si IGBT (Insulated Gate Bipolar Transistor), and GaN (gallium nitride) HEMT (High Electron Mobility Transistor) can be given. Each semiconductor element 10 is rectangular when viewed from the z direction (also referred to as "plan view"), but the present disclosure is not limited thereto.

[0056] As shown in Figure 5 and Figure 10 , the plurality of semiconductor elements 10 each have an element front surface 101 and an element back surface 102. In each semiconductor element 10, the element front surface 101 and the element back surface 102 are separated in the z direction, and face opposite sides to each other. In the present embodiment, the element front surface 101 faces the z2 direction, and the element back surface 102 faces the z1 direction.

[0057] As shown in Figure 5 and Figure 10 , the plurality of semiconductor elements 10 each have a front surface electrode 11, a back surface electrode 12, and an insulating film 13.

[0058] As shown in Figure 5 , the front surface electrode 11 is provided to the element front surface 101. As shown in Figure 5 , the front surface electrode 11 includes a source electrode 111, a gate electrode 112, and a drive source electrode 113. In the present embodiment, the source electrode 111 is an electrode through which a source current flows. In the present embodiment, the gate electrode 112 is applied with a gate voltage for driving each semiconductor element 10. The drive source electrode 113 is an electrode that becomes a reference potential of the gate voltage. The source electrode 111 is larger than the gate electrode 112 and the drive source electrode 113. The gate electrode 112 and the drive source electrode 113 are substantially the same size. In the present embodiment, although a case where the source electrode 111 is constituted by one region is shown, the source electrode 111 can be divided into a plurality of regions.

[0059] As shown in Figure 10 , the back surface electrode 12 is provided to the element back surface 102. The back surface electrode 12 is formed over the entire element back surface 102. In the present embodiment, the back surface electrode 12 is an electrode through which a drain current flows, and is also referred to as a drain electrode 12 in the following description.

[0060] As shown in Figure 5The insulating film 13 is provided on the element main surface 101. The insulating film 13 has electrical insulating properties. The insulating film 13 surrounds the main surface electrode 11 as viewed in plan. The insulating film 13 insulates the source electrode 111 from the gate electrode 112. The insulating film 13 is, for example, configured by sequentially stacking a SiO2 (silicon dioxide) layer, a Si3N4 (silicon nitride) layer, and a polybenzoxazole layer on the element main surface 101, the polybenzoxazole layer being a surface layer. In the insulating film 13, a polyimide layer can be used instead of the polybenzoxazole layer. The structure of the insulating film 13 is not limited to the above.

[0061] The plurality of semiconductor elements 10 includes a plurality of first semiconductor elements 10A and a plurality of second semiconductor elements 10B. In this embodiment, the semiconductor device Al constitutes a switching circuit of a half-bridge type. The plurality of first semiconductor elements 10A constitutes an upper arm circuit in the switching circuit, and the plurality of second semiconductor elements 10B constitutes a lower arm circuit in the switching circuit. As Figure 4 As shown, the semiconductor device Al includes four first semiconductor elements 10A and four second semiconductor elements 10B. The number of semiconductor elements 10 is not limited to this configuration, and can be freely set in accordance with the performance required of the semiconductor device Al.

[0062] As Figure 2 , Figure 4 , Figure 5 and Figure 10 As shown, the plurality of first semiconductor elements 10A are each mounted on the support substrate 20 (conductive substrate 22A). In this embodiment, the plurality of first semiconductor elements 10A are arranged in the y direction and separated from one another. When each first semiconductor element 10A is mounted on the conductive substrate 22A, the element back surface 102 faces the conductive substrate 22A. Each first semiconductor element 10A is, for example, conductively joined to the support substrate 20 (conductive substrate 22A) via an element joining material (not shown) having electrical conductivity. As the element joining material, for example, solder, sintered silver, silver paste, or the like can be given.

[0063] As Figure 2 , Figure 4 , Figure 5 and Figure 10As shown, the plurality of second semiconductor elements 10B are each mounted on the support substrate 20 (the conductive substrate 22B). In the present embodiment, the plurality of second semiconductor elements 10B are arranged in the y direction and separated from each other. When each second semiconductor element 10B is mounted on the conductive substrate 22B, the element back surface 102 faces the conductive substrate 22B. Each second semiconductor element 10B is, for example, anisotropically bonded to the support substrate 20 (the conductive substrate 22B) by an element bonding material (not shown) having conductivity. In the present embodiment, the plurality of first semiconductor elements 10A overlap the plurality of second semiconductor elements 10B as viewed in the x direction. It can not be the case that the plurality of first semiconductor elements 10A overlap the plurality of second semiconductor elements 10B as viewed in the x direction.

[0064] The support substrate 20 is a support member that supports the plurality of semiconductor elements 10. The support substrate 20 includes: an insulating substrate 21; two conductive substrates 22A, 22B; a pair of insulating layers 23A, 23B; a pair of gate layers 24A, 24B; a pair of drive source layers 25A, 25B; and a first spacer 26A and a second spacer 26B.

[0065] The insulating substrate 21 is a plate-shaped member having electrical insulation. The insulating substrate 21 supports the two conductive substrates 22A, 22B. In the present embodiment, the insulating substrate 21 is composed of two insulating substrates 21A, 21B each having a flat plate shape. The structure of the insulating substrate 21 is not limited to the above, and may, for example, be a single flat plate without being divided into the two insulating substrates 21A, 21B. The constituent material of each of the insulating substrates 21A, 21B is, for example, ceramic excellent in thermal conductivity. As such ceramic, for example, AlN (aluminum nitride), SiN (silicon nitride), Al2O3 (aluminum oxide), or the like can be given.

[0066] As viewed in plan, the insulating substrates 21A, 21B each have a rectangular shape. The insulating substrate 21A supports the conductive substrate 22A, and the insulating substrate 21B supports the conductive substrate 22B. The insulating substrates 21A, 21B are separated from each other. In the present embodiment, as shown in Figs. 1 and 2, the insulating substrate 21A and the insulating substrate 21B are separated and arranged side by side in the x direction. Figure 2 , Figure 4 and Figure 10

[0067] As shown in Figs. 1 and 2, the insulating substrate 21A and the insulating substrate 21B are separated and arranged side by side in the x direction. Figure 10 ​As shown, the insulating substrate 21A has a main surface 211A and a back surface 212A. The main surface 211A and the back surface 212A are separated in the z-direction and face opposite sides. The main surface 211A faces the z2 direction, and the back surface 212A faces the z1 direction. The main surface 211A is opposite to the conductive substrate 22A, and the back surface 212A is exposed from the sealing resin 70. Unlike the example shown, another conductive substrate may also be bonded to the back surface 212A of the insulating substrate 21A. In this case, the back surface of the conductive substrate is exposed from the sealing resin 70.

[0068] like Figure 10 As shown, the insulating substrate 21B has a main surface 211B and a back surface 212B. The main surface 211B and the back surface 212B are separated in the z-direction and face opposite sides. The main surface 211B faces the z2 direction, and the back surface 212B faces the z1 direction. The main surface 211B is opposite to the conductive substrate 22B, and the back surface 212B is exposed from the sealing resin 70. Unlike the example shown, another conductive substrate may also be bonded to the back surface 212B of the insulating substrate 21B. In this case, the back surface of the conductive substrate is exposed from the sealing resin 70.

[0069] The conductive substrates 22A and 22B are each plate-shaped components with conductivity. In this embodiment, as... Figure 10 As shown, each conductive substrate 22A and 22B is a composite substrate comprising a graphite substrate 220m and a copper film 220n formed on both sides of the graphite substrate 220m in the z-direction. The constituent materials of the conductive substrates 22A and 22B are not limited to this; they can also be Cu or a Cu alloy. The surfaces of each conductive substrate 22A and 22B can be covered with a silver plating layer. The conductive substrates 22A and 22B, together with multiple conductive lines (a first power line 31, a second power line 32, a third power line 33, a pair of gate lines 34A and 34B, a pair of drive source lines 35A and 35B, and multiple dummy lines 36), constitute a conductive path to the multiple semiconductor elements 10. The conductive substrates 22A and 22B are separated from each other. Figure 4 and Figure 10 As shown, conductive substrate 22A and conductive substrate 22B are separated and side-by-side in the x-direction. As... Figure 4 As shown, conductive substrates 22A and 22B are rectangular in top view. The z-direction dimension of conductive substrates 22A and 22B is approximately 1.0 to 3.5 mm. In this embodiment, the z-direction dimension of the graphite substrate 220m is approximately 0.5 to 2.5 mm, and the z-direction dimension of each pair of copper films 220n is approximately 0.25 to 0.5 mm. These z-direction dimensions are not limited to those described above. The conductive substrate 22A... Figure 10 The copper film 220n on the upper side of the diagram is an example of the "first metal layer," and the conductive substrate 22B is... Figure 10The copper film 220n on the upper side of the diagram is an example of a "second metal layer". The conductive substrate 22A... Figure 10 The copper film 220n and the conductive substrate 22B on the upper side of the diagram. Figure 10 The copper film 220n on the upper side of the middle image is an example of a "conductive component". It constitutes the conductive substrate 22A. Figure 10 The copper film 220n and the conductive substrate 22B on the upper side of the diagram. Figure 10 The raw material of the copper film 220n on the upper side of the diagram is an example of "first raw material".

[0070] like Figure 4 As shown, the conductive substrate 22A is bonded to the insulating substrate 21A via a substrate bonding material 220A. The substrate bonding material 220A can be, for example, a conductive bonding material such as silver paste, solder, or sintered metal, or it can be an insulating bonding material. Figure 10 and Figure 10 As shown, conductive substrate 22A is located in the x1 direction closer to conductive substrate 22B than conductive substrate 22B. Viewed from the x direction, conductive substrate 22A overlaps with conductive substrate 22B entirely.

[0071] like Figure 10 As shown, the conductive substrate 22A has a main surface 221A and a back surface 222A. The main surface 221A and the back surface 222A are separated in the z-direction and face opposite sides to each other. The main surface 221A faces the z2 direction, and the back surface 222A faces the z1 direction. A plurality of first semiconductor elements 10A are mounted on the main surface 221A. An insulating layer 23A is bonded to the main surface 221A.

[0072] like Figure 10 As shown, the conductive substrate 22B is bonded to the insulating substrate 21B via a substrate bonding material 220B. The substrate bonding material 220B can be a conductive bonding material such as silver paste, solder, or sintered metal, or it can be an insulating bonding material.

[0073] like Figure 4 As shown, the conductive substrate 22B has a main surface 221B and a back surface 222B. The main surface 221B and the back surface 222B are separated in the z-direction and face opposite sides to each other. The main surface 221B faces the z2 direction, and the back surface 222B faces the z1 direction. A plurality of second semiconductor elements 10B are mounted on the main surface 221B. An insulating layer 23B and one end of a plurality of intermediate wires 40 are respectively bonded to the main surface 221B.

[0074] A pair of insulating layers 23A and 23B are electrically insulating, and their constituent materials are, for example, glass epoxy resin or ceramic. Figure 4 As shown, a pair of insulating layers 23A and 23B each have a band-like shape extending in the y-direction. Figure 10 and Figure 4As shown, the insulating layer 23A is joined to the main surface 221A of the conductive substrate 22A. The insulating layer 23A is located in the x1 direction from the plurality of first semiconductor elements 10A. It can also be configured on the x2 direction side from the plurality of first semiconductor elements 10A. As shown in FIG. 1, the insulating layer 23A is configured on the x1 direction side from the plurality of first semiconductor elements 10A. Figure 10 and Figure 4 As shown, the insulating layer 23B is joined to the main surface 221B of the conductive substrate 22B. The insulating layer 23B is located in the x2 direction from the plurality of second semiconductor elements 10B. It can also be configured on the x1 direction side from the plurality of second semiconductor elements 10B.

[0075] The pair of gate layers 24A, 24B are conductive, and their constituent material is, for example, Cu or a Cu alloy. As shown in FIG. 1, the pair of gate layers 24A, 24B include a belt-shaped portion extending in the y direction, and a hook-shaped portion protruding from the belt-shaped portion. The shape of the pair of gate layers 24A, 24B is not limited to Figure 4 As shown, for example, the pair of gate layers 24A, 24B can be configured only from the belt-shaped portion without the hook-shaped portion. As shown in FIG. 1, the pair of gate layers 24A, 24B are configured only from the belt-shaped portion without the hook-shaped portion. Figure 4 As shown, for example, the pair of gate layers 24A, 24B can be configured only from the belt-shaped portion without the hook-shaped portion. As shown in FIG. 1, the pair of gate layers 24A, 24B are configured only from the belt-shaped portion without the hook-shaped portion. Figure 10 and Figure 4 As shown, the gate layer 24A is disposed on the insulating layer 23A. The gate layer 24A is in conduction with the gate electrode 112 of each first semiconductor element 10A via the lead member 50 (the gate lead 51 described later). As shown in FIG. 1, the gate layer 24A is in conduction with the gate electrode 112 of each first semiconductor element 10A via the gate lead 51. Figure 10 and Figure 4 As shown, the gate layer 24B is disposed on the insulating layer 23B. The gate layer 24B is in conduction with the gate electrode 112 of each second semiconductor element 10B via the lead member 50 (the gate lead 51 described later).

[0076] The pair of drive source layers 25A, 25B are conductive, and their constituent material is, for example, Cu or a Cu alloy. As shown in FIG. 1, the pair of drive source layers 25A, 25B include a belt-shaped portion extending in the y direction, and a hook-shaped portion protruding from the belt-shaped portion. The shape of the pair of drive source layers 25A, 25B is not limited to Figure 4 As shown, for example, the pair of drive source layers 25A, 25B can be configured only from the belt-shaped portion without the hook-shaped portion. As shown in FIG. 1, the pair of drive source layers 25A, 25B are configured only from the belt-shaped portion without the hook-shaped portion. Figure 4 As shown, for example, the pair of drive source layers 25A, 25B can be configured only from the belt-shaped portion without the hook-shaped portion. As shown in FIG. 1, the pair of drive source layers 25A, 25B are configured only from the belt-shaped portion without the hook-shaped portion. Figure 10 and Figure 4As shown, the driving source layer 25A is disposed together with the gate layer 24A on the insulating layer 23A. Viewed from above, the driving source layer 25A is located on the insulating layer 23A adjacent to, but separated from, the gate layer 24A. In this embodiment, the driving source layer 25A is configured to be closer to the plurality of first semiconductor elements 10A in the x-direction than the gate layer 24A. Therefore, the driving source layer 25A is located on the x2 direction side of the gate layer 24A. The configuration of the gate layer 24A and the driving source layer 25A in the x-direction can also be reversed as described above. The driving source layer 25A is connected to the driving source electrode 113 of each first semiconductor element 10A via the lead member 50 (driving source lead 52). Figure 10 and Figure 10 As shown, the driving source layer 25B is disposed together with the gate layer 24B on the insulating layer 23B. Viewed from above, the driving source layer 25B is located on the insulating layer 23B adjacent to, but separated from, the gate layer 24B. In this embodiment, the driving source layer 25B is configured to be closer to the plurality of second semiconductor elements 10B than the gate layer 24B. Therefore, the driving source layer 25B is located on the x1 direction side of the gate layer 24B. The configuration of the gate layer 24B and the driving source layer 25B in the x direction can also be reversed as described above. The driving source layer 25B is connected to the driving source electrode 113 of each second semiconductor element 10B via the lead member 50 (driving source lead 52).

[0077] The first spacer 26A and the second spacer 26B are conductive, and their constituent materials are, for example, Cu or a Cu alloy. The constituent materials of the first spacer 26A and the second spacer 26B are not limited to those described above; for example, they can be CuMo (copper-molybdenum) composite materials, CIC (Copper-Inver-Copper) composite materials, etc. The constituent materials of the first spacer 26A and the second spacer 26B can be different from each other. The first spacer 26A and the second spacer 26B are examples of "conductive components," and the raw materials constituting the first spacer 26A and the second spacer 26B are examples of "first raw materials."

[0078] like Figure 4 As shown, the first spacer 26A is located between the conductive substrate 22A and the first power wire 31. Figure 10 As shown, viewed from above, the first spacer 26A is a rectangle extending in the y-direction. The first spacer 26A is electrically bonded to the conductive substrate 22A. Viewed from above, the first spacer 26A is located near the edge of the conductive substrate 22A in the x1 direction. The first spacer 26A is provided so that the first power conductor 31 is located in substantially the same position as the second power conductor 32 in the z-direction. Alternatively, the first spacer 26A may be absent, and the first power conductor 31 may be directly bonded to the conductive substrate 22A. The shape of the first spacer 26A is not particularly limited.

[0079] like Figure 4 As shown, the second spacer 26B is located between the conductive substrate 22B and the third power wire 33. (As indicated...) Figures 1-4 As shown, viewed from above, the second spacer 26B is a rectangle extending in the y-direction. The second spacer 26B is electrically bonded to the conductive substrate 22B. Viewed from above, the second spacer 26B is located near the edge of the conductive substrate 22B in the x2 direction. The second spacer 26B is provided so that the third power conductor 33 is located in substantially the same position as the second power conductor 32 in the z-direction. Alternatively, the second spacer 26B may be absent, and the third power conductor 33 may be directly bonded to the conductive substrate 22B. The shape of the second spacer 26B is not particularly limited.

[0080] Each of the multiple wires (first power wire 31, second power wire 32, third power wire 33, a pair of gate wires 34A and 34B, a pair of drive source wires 35A and 35B, and multiple dummy wires 36) includes a portion located inside the encapsulating resin 70 and a portion located outside the encapsulating resin 70. That is, each wire includes a portion covered by the encapsulating resin 70 and a portion exposed from the encapsulating resin 70. Each wire is used when mounting the semiconductor device A1 onto a circuit board of an electronic device or the like.

[0081] The first power conductor 31 and the second power conductor 32 are each made of metal plates. The metal plates are made of Cu or Cu alloys. The materials of the first power conductor 31 and the second power conductor 32 are not limited to these; for example, they could also be made of aluminum. In this embodiment, both the first power conductor 31 and the second power conductor 32 have a z-direction dimension of approximately 0.8 mm, but this disclosure is not limited to this. Figure 7 and Figure 4 As shown, both the first power wire 31 and the second power wire 32 are located in the semiconductor device A1 in the x1 direction. For example, a power supply voltage is applied between the first power wire 31 and the second power wire 32. The first power wire 31 is the positive terminal (P terminal), and the second power wire 32 is the negative terminal (N terminal). The first power wire 31 and the second power wire 32 are separate from each other. The second power wire 32 is separate from the conductive substrate 22A. The first power wire 31 and the second power wire 32 are examples of "conductive components," and the raw materials constituting the first power wire 31 and the second power wire 32 are examples of "first raw materials."

[0082] like Figure 2 As shown, the first power wire 31 has a pad portion 311 and a terminal portion 312.

[0083] The pad portion 311 is a portion of the first power lead 31 that is covered with the sealing resin 70. The pad portion 311 is in conduction with the conductive substrate 22A via the first spacer 26A. As shown in Figure 4 , Figure 10 and Figure 3 , the pad portion 311 is in conduction with the first spacer 26A. The method of conduction joining is not limited in any way, and may be, for example, laser joining, joining with a conduction joining material, or the like.

[0084] The terminal portion 312 is a portion of the first power lead 31 that is exposed from the sealing resin 70. As shown in Figure 4 , Figure 6 , Figure 7 , Figure 10 and Figure 4 , the terminal portion 312 extends from the sealing resin 70 in the x1 direction.

[0085] As shown in Figure 4 , the second power lead 32 has a pad portion 321 and a terminal portion 322.

[0086] The pad portion 321 is a portion of the second power lead 32 that is covered with the sealing resin 70. The pad portion 321 includes a link portion 321a, a plurality of extension portions 321b, and a connection portion 321c.

[0087] The link portion 321a is in the shape of a band that extends in the y direction. The link portion 321a connects the plurality of extension portions 321b.

[0088] The plurality of extension portions 321b are each in the shape of a band that extends from the link portion 321a toward the x2 direction. In the present embodiment, each extension portion 321b extends from the link portion 321a in the x direction until it overlaps each second semiconductor element 10B in plan view. Each extension portion 321b extends across from the conductive substrate 22A to the conductive substrate 22B in plan view. The leading end portion of each extension portion 321b overlaps the second block 62 in plan view. The plurality of extension portions 321b are arranged in the y direction and separated from one another in plan view. Each extension portion 321b is in conduction with the source electrode 111 (source electrode) of the second semiconductor element 10B via the plurality of conductive blocks 60. As shown in Figure 10 and Figure 4 , the leading end portion of each extension portion 321b is in conduction with the second block 62. The method of conduction joining is not limited in any way, and may be, for example, laser joining, joining with a conduction joining material, or the like.

[0089] The connection portion 321c is a portion that connects the link portion 321a and the terminal portion 322. In the present embodiment, as shown in Figure 1 , the connection portion 321c extends in the x1 direction from the end edge of the link portion 321a on the y2 direction side and on the x1 direction side in plan view.

[0090] The terminal portion 322 is a portion of the second power lead 32 that is exposed from the sealing resin 70. As shown in Figure 3 , Figure 4 , Figure 7 and Figure 3 , the terminal portion 322 extends from the sealing resin 70 in the x1 direction. The terminal portion 322 is rectangular in plan view. As shown in Figure 4 , Figure 7 and Figures 1-4 , the terminal portion 322 is located on the y2 direction side of the terminal portion 312 of the first power lead 31 in plan view. In the present embodiment, the shape of the terminal portion 322 is the same as that of the terminal portion 312, but the present disclosure is not limited thereto.

[0091] The third power lead 33 is a metal plate. The constituent material of this metal plate is, for example, Cu or a Cu alloy. In addition, the constituent material of the third power lead 33 is not limited thereto, and can be, for example, aluminum. As shown in Figure 6 , Figure 7 , Figure 10 and Figure 4 , the third power lead 33 is located close to the x2 direction in the semiconductor device Al. Alternating-current power (voltage) that has been subjected to power conversion by the plurality of semiconductor elements 10 is output from this third power lead 33.

[0092] As shown in Figure 10 and Figure 2 , the third power lead 33 includes a pad portion 331 and a terminal portion 332.

[0093] The pad portion 331 is a portion of the third power lead 33 that is covered by the sealing resin 70. The pad portion 331 is in conduction with the conductive substrate 22B via the second spacer 26B. As shown in Figure 4 , Figure 10 and Figure 3 , the pad portion 331 is in conduction with the second spacer 26B. The method of conduction joining is not limited in any way, and can be, for example, laser joining, joining using a conductive joining material, or the like.

[0094] The terminal portion 332 is a portion of the third power lead 33 that is exposed from the sealing resin 70. As shown in Figure 4 , Figure 6 , Figure 7 , Figure 10 and Figures 1-7 , the terminal portion 332 extends from the sealing resin 70 in the x2 direction.

[0095] As shown in Figure 5As shown in FIG. 1, a pair of gate lines 34A, 34B is adjacent to each of the conductive substrates 22A, 22B in the y direction. The gate line 34A is applied with a gate voltage for driving the plurality of first semiconductor elements 10A. The gate line 34B is applied with a gate voltage for driving the plurality of second semiconductor elements 10B.

[0096] As shown in FIG. 1, a pair of gate lines 34A, 34B is adjacent to each of the conductive substrates 22A, 22B in the y direction. The gate line 34A is applied with a gate voltage for driving the plurality of first semiconductor elements 10A. The gate line 34B is applied with a gate voltage for driving the plurality of second semiconductor elements 10B. Figures 1-7 As shown in FIG. 1, a pair of gate lines 34A, 34B is adjacent to each of the conductive substrates 22A, 22B in the y direction. The gate line 34A is applied with a gate voltage for driving the plurality of first semiconductor elements 10A. The gate line 34B is applied with a gate voltage for driving the plurality of second semiconductor elements 10B.

[0097] As shown in FIG. 1, a pair of gate lines 34A, 34B is adjacent to each of the conductive substrates 22A, 22B in the y direction. The gate line 34A is applied with a gate voltage for driving the plurality of first semiconductor elements 10A. The gate line 34B is applied with a gate voltage for driving the plurality of second semiconductor elements 10B. Figure 5 As shown in FIG. 1, a pair of gate lines 34A, 34B is adjacent to each of the conductive substrates 22A, 22B in the y direction. The gate line 34A is applied with a gate voltage for driving the plurality of first semiconductor elements 10A. The gate line 34B is applied with a gate voltage for driving the plurality of second semiconductor elements 10B.

[0098] As shown in FIG. 1, a pair of gate lines 34A, 34B is adjacent to each of the conductive substrates 22A, 22B in the y direction. The gate line 34A is applied with a gate voltage for driving the plurality of first semiconductor elements 10A. The gate line 34B is applied with a gate voltage for driving the plurality of second semiconductor elements 10B. Figures 1-7 As shown in FIG. 1, a pair of gate lines 34A, 34B is adjacent to each of the conductive substrates 22A, 22B in the y direction. The gate line 34A is applied with a gate voltage for driving the plurality of first semiconductor elements 10A. The gate line 34B is applied with a gate voltage for driving the plurality of second semiconductor elements 10B.

[0099] As shown in FIG. 1, a pair of gate lines 34A, 34B is adjacent to each of the conductive substrates 22A, 22B in the y direction. The gate line 34A is applied with a gate voltage for driving the plurality of first semiconductor elements 10A. The gate line 34B is applied with a gate voltage for driving the plurality of second semiconductor elements 10B. Figure 5 As shown in FIG. 1, a pair of gate lines 34A, 34B is adjacent to each of the conductive substrates 22A, 22B in the y direction. The gate line 34A is applied with a gate voltage for driving the plurality of first semiconductor elements 10A. The gate line 34B is applied with a gate voltage for driving the plurality of second semiconductor elements 10B.

[0100] As shown in FIG. 1, a pair of gate lines 34A, 34B is adjacent to each of the conductive substrates 22A, 22B in the y direction. The gate line 34A is applied with a gate voltage for driving the plurality of first semiconductor elements 10A. The gate line 34B is applied with a gate voltage for driving the plurality of second semiconductor elements 10B. Figures 1-7As shown, the plurality of dummy wires 36 each have a pad portion 361 and a terminal portion 362. In each dummy wire 36, the pad portion 361 is covered with the sealing resin 70. The plurality of dummy wires 36 are supported by the sealing resin 70. The terminal portion 362 is continuous with the pad portion 361 and is exposed from the sealing resin 70. The terminal portion 362 is L-shaped as viewed in the x direction. In the present embodiment, the terminal portion 362 protrudes from a face of the sealing resin 70 facing the yl direction (resin side face 733).

[0101] In the present embodiment, each gate wire 34A, 34B, each drive source wire 35A, 35B, and each dummy wire 36 are substantially the same shape. And these are arranged along the x direction as shown. Figure 4 In the semiconductor device Al, each wire (the first power wire 31, the second power wire 32, the third power wire 33, the pair of gate wires 34A, 34B, the pair of drive source wires 35A, 35B, and the plurality of dummy wires 36) is formed of the same wire frame.

[0102] The plurality of intermediate wires 40 connect each first semiconductor element 10A with the conductive substrate 22B. The constituent material of each intermediate wire 40 is, for example, Cu or a Cu alloy. The constituent material of each intermediate wire 40 is not limited thereto, and can be a clad material such as CIC, aluminum, or the like. Each intermediate wire 40 is a flat plate-shaped connection member. As shown, Figure 10 As shown, each intermediate wire 40 is rectangular as viewed in plan view and extends in the x direction. As viewed in plan view, each intermediate wire 40 overlaps each extension portion 321b of the second power wire 32. The intermediate wire 40 is an example of a "conductive member", and the raw material constituting the intermediate wire 40 is an example of a "first raw material".

[0103] As shown, Figure 10 Each intermediate wire 40 includes a first joint portion 41, a second joint portion 42, and a communication portion 43.

[0104] As shown, Figure 10 The first joint portion 41 is a portion that is joined with the first block 61. In the present embodiment, the first joint portion 41 is conductively joined with the first block 61. The method of conductive joining is not particularly limited, and can be, for example, laser joining, joining using a conductive joining material, or the like.

[0105] As shown, Figure 4 The second joint portion 42 is a portion that is joined with the conductive substrate 22B. In the present embodiment, the second joint portion 42 is conductively joined with the conductive substrate 22B. The method of conductive joining is not particularly limited, and can be, for example, laser joining, joining using a conductive joining material, or the like.

[0106] The connecting portion 43 is the part that connects the first joint portion 41 and the second joint portion 42. The dimension of the connecting portion 43 in the z-direction is the same as that of the first joint portion 41 and the second joint portion 42. In this embodiment, a portion of the connecting portion 43 is bent in the z-direction. Due to the bending of the connecting portion 43, the first joint portion 41 and the second joint portion 42, which are located at different positions in the z-direction, are connected.

[0107] Each of the multiple lead components 50 is a lead (bonding lead). Each lead component 50 is conductive and its constituent material is, for example, any one of aluminum, gold, or Cu. In this embodiment, as... Figure 5 and Figure 5 As shown, the plurality of lead components 50 include: a plurality of gate leads 51, a plurality of drive source leads 52, a pair of first connection leads 53 and a pair of second connection leads 54.

[0108] like Figure 5 As shown, one end (first end) of each of the plurality of gate leads 51 is connected to the gate electrode 112 of each semiconductor element 10, and the other end (second end) is connected to either of a pair of gate layers 24A, 24B. The plurality of gate leads 51 include: leads for connecting the gate electrode 112 of each first semiconductor element 10A to the gate layer 24A; and leads for connecting the gate electrode 112 of each second semiconductor element 10B to the gate layer 24B.

[0109] like Figure 5 As shown, one end of each of the plurality of driving source leads 52 is connected to the driving source electrode 113 of each semiconductor element 10, and the other end is connected to either of a pair of driving source layers 25A, 25B. The plurality of driving source leads 52 include: leads for connecting the driving source electrode 113 of each first semiconductor element 10A to the driving source layer 25A; and leads for connecting the driving source electrode 113 of each second semiconductor element 10B to the driving source layer 25B.

[0110] like Figure 5 As shown, regarding a pair of first connection leads 53, one connects the gate layer 24A to the gate conductor 34A, and the other connects the gate layer 24B to the gate conductor 34B. One end of the first connection lead 53 of one party is bonded to the gate layer 24A, and the other end is bonded to the pad portion 341 of the gate conductor 34A. One end of the first connection lead 53 of the other party is bonded to the gate layer 24B, and the other end is bonded to the pad portion 341 of the gate conductor 34B.

[0111] like Figure 4As shown, with respect to a pair of the second connection leads 54, one of which connects the drive source electrode layer 25A with the drive source electrode lead 35A, and the other of which connects the drive source electrode layer 25B with the drive source electrode lead 35B. One of the second connection leads 54 is joined at one end to the drive source electrode layer 25A, and at the other end to the pad portion 351 of the drive source electrode lead 35A. The other of the second connection leads 54 is joined at one end to the drive source electrode layer 25B, and at the other end to the pad portion 351 of the drive source electrode lead 35B.

[0112] The plurality of conductive blocks 60 have electrical conductivity. The plurality of conductive blocks 60 are each joined to a corresponding one of the semiconductor elements 10. The z-direction dimension of each conductive block 60 is in the order of 0.1 to 2.0 mm, but the present disclosure is not limited to this. The plurality of conductive blocks 60 include a plurality of first blocks 61 and a plurality of second blocks 62.

[0113] The plurality of first blocks 61 are each joined one by one on any one of the plurality of first semiconductor elements 10A. Each first block 61 is conductively joined to each first semiconductor element 10A using solder or the like. Each first block 61 opposes the element main face 101 of each first semiconductor element 10A. In the present embodiment, each first block 61 is a columnar body as shown in Figure 4 and has a rectangular shape in plan view. The plan view shape of each first block 61 is not limited to this, and can be circular, elliptical, or polygonal. The first blocks 61 are composed of Cu or a Cu alloy, for example.

[0114] The plurality of second blocks 62 are each joined one by one on any one of the plurality of second semiconductor elements 10B. Each second block 62 is conductively joined to each second semiconductor element 10B using solder or the like. Each second block 62 opposes the element main face 101 of each second semiconductor element 10B. The z-direction dimension of each second block 62 is not particularly limited, and in the present embodiment is in the order of 1.83 mm, for example. In the present embodiment, each second block 62 is a columnar body as shown in Figure 10 and Figure 4 and has a rectangular shape in plan view. The plan view shape of each second block 62 is not limited to this, and can be circular, elliptical, or polygonal. The second blocks 62 are composed of Cu or a Cu alloy, for example.

[0115] The z-direction dimension of each first block 61 is smaller than the z-direction dimension of each second block 62. In the present embodiment, the z-direction dimension of each second block 62 is in the order of 1.83 mm as described above, and thus the z-direction dimension of each first block 61 is smaller than this value. As a result, each extension portion 321b of the second power lead 32 can be disposed above each intermediate lead 40.

[0116] The capacitor 81 is a plate-type capacitor with a first end and a second end. The first end is mounted on the pad portion 311 of the first power conductor 31, and the second end is mounted on the connection portion 321a of the second power conductor 32. The capacitor 81 is connected to each of the power conductors 31 and 32, for example, using a conductive bonding material. By electrically connecting the capacitor 81 to the first power conductor 31 and the second power conductor 32, the power supply voltage (input voltage) applied between the first power conductor 31 and the second power conductor 32 can be stabilized. The capacitor 81 is sometimes referred to as a DC connection capacitor. Alternatively, a structure without a capacitor 81 may be used, unlike this embodiment.

[0117] like Figure 10 and Figure 1 As shown, the sealing resin 70 covers a plurality of semiconductor elements 10, a portion of the support substrate 20, a portion of a plurality of conductive lines (a first power conductive line 31, a second power conductive line 32, a third power conductive line 33, a pair of gate conductive lines 34A, 34B, a pair of drive source conductive lines 35A, 35B, and a plurality of dummy conductive lines 36), a plurality of intermediate conductive lines 40, a plurality of lead components 50, and a plurality of conductive blocks 60. The constituent material of the sealing resin 70 is, for example, epoxy resin. Figure 3 , Figures 6-10 and Figure 6 As shown, the sealing resin 70 has a resin main surface 71, a resin back surface 72, and multiple resin side surfaces 731 to 734.

[0118] like Figures 8-10 and Figure 7 As shown, the resin main surface 71 and the resin back surface 72 are separated in the z-direction and face opposite directions. The resin main surface 71 faces the z2 direction, and the resin back surface 72 faces the z1 direction. Figure 3 As shown, viewed from above, the resin back surface 72 is a frame-like structure surrounding the back surfaces 212A and 212B of the insulating substrate 21A and the insulating substrate 21B, respectively. Each back surface 212A, 212B protrudes from the resin back surface 72. Figures 6-10 and Figures 1-11 As shown, multiple resin side surfaces 731-734 are each connected to both the resin main surface 71 and the resin back surface 72 and are held by them in the z-direction. In this embodiment, resin side surfaces 731 and 732 are separated in the x-direction and face opposite directions. Resin side surface 731 faces the x1 direction, and resin side surface 732 faces the x2 direction. Resin side surfaces 733 and 734 are separated in the y-direction and face opposite directions. Resin side surface 733 faces the y1 direction, and resin side surface 734 faces the y2 direction.

[0119] The coating layer 90 is a layer covering at least a portion of the "conductive component" and is made of a second material. This second material satisfies at least one of the following three conditions: (1) its permeability is higher than that of the first material constituting the "conductive component." (2) its resistivity is higher than that of the first material. (3) its dielectric loss tangent is greater than 0 (greater than the dielectric loss tangent of an ideal dielectric). For example, the first material is Cu. In this case, magnetic metals such as Ni, Co, and Fe can be cited as examples of second materials with higher permeability than the first material. Metals such as Ni, W, and Mo, conductive polymers, and transparent conductive films can be cited as examples of second materials with higher resistivity than the first material. A dielectric material can be cited as an example of a second material with a dielectric loss tangent greater than 0. Furthermore, when the permeability of the second material is higher than that of the first material, the relative permeability of the second material is preferably, for example, 10 or higher. When the resistivity of the second material is higher than that of the first material, the resistivity of the second material is preferably, for example, more than twice the resistivity of the first material. Regarding condition (3) above, the dielectric loss tangent of the second raw material is preferably 0.01 or higher. The thickness of the cladding layer 90 is not particularly limited, for example, it is 1 μm to 5 μm. When the cladding layer 90 is made of metal, the cladding layer 90 is formed, for example, by a plating of a magnetic material or the like.

[0120] The cladding layer 90 can be a magnetic metal in which the permeability of the second material is higher than that of the first material, and the resistivity of the second material is also higher than that of the first material. Alternatively, the cladding layer 90 can have a structure where the permeability of the second material is higher than that of the first material, and the dielectric loss tangent of the second material is greater than 0. Another option is a structure where the resistivity of the second material is higher than that of the first material, and the dielectric loss tangent of the second material is greater than 0. Finally, the cladding layer 90 can have a structure where the permeability of the second material is higher than that of the first material, the resistivity of the second material is higher than that of the first material, and the dielectric loss tangent of the second material is greater than 0.

[0121] like Figure 11 As shown, in this embodiment, the covering layer 90 has a first portion 91 and a second portion 92. The first portion 91 covers at least a portion of the first power conductor 31. In this embodiment, the first portion 91 completely covers the first power conductor 31. Figures 12-21As shown, when the first power conductor 31 functions as a path of the main circuit current, the entire cross section of the first power conductor 31 is covered with the first portion 91. The second portion 92 covers at least a portion of the second power conductor 32. In the present embodiment, the second portion 92 covers the entire second power conductor 32. As with the first portion 91, when the second power conductor 32 functions as a path of the main circuit current, the entire cross section of the second power conductor 32 is covered with the second portion 92.

[0122] Next, the effects of the semiconductor device Al will be described.

[0123] Generally, when an alternating current flows through a conductor, the current density is higher closer to the surface of the conductor (this is called the skin effect). The higher the frequency of the alternating current, the more pronounced the skin effect. In the present embodiment, the covering layer 90 is provided on the conduction member that constitutes the path of the main circuit current in the semiconductor device Al. More specifically, the covering layer 90 is provided at a portion where the density of the alternating current is high due to the skin effect. When the permeability of the second raw material that constitutes the covering layer 90 is higher than the permeability of the first raw material (Cu or the like) that constitutes the conduction member (the first power conductor 31, the second power conductor 32, etc.), the influence of the skin effect is more pronounced, and the alternating current resistance of the current path increases. Thus, the alternating current flowing in the covering layer 90 is attenuated, and ringing can be suppressed. On the other hand, with respect to the low-frequency component of the current, the skin effect is relatively unlikely to occur. Therefore, the low-frequency component of the current is not unduly attenuated by the covering layer 90. In addition, since ringing can be suppressed, the snubber circuit provided in the semiconductor device Al can be simplified, and the reliability of the semiconductor device Al itself can be improved.

[0124] In addition, when the resistivity of the second raw material that constitutes the covering layer 90 is higher than the resistivity of the first raw material (Cu or the like) that constitutes the conduction member (the first power conductor 31, the second power conductor 32, etc.), the alternating current flowing in the covering layer 90 can also be attenuated, and ringing can be suppressed. As described above, the low-frequency component of the current is not unduly attenuated by the covering layer 90.

[0125] In addition, when the dielectric loss tangent of the second raw material that constitutes the covering layer 90 is greater than 0 (greater than the dielectric loss tangent of an ideal dielectric), the energy of the alternating current flowing in the covering layer 90 can be consumed as dielectric loss, and ringing can be suppressed.

[0126] The effects obtained by the above-described correlations of the permeability, the resistivity, and the dielectric loss tangent of the second raw material can be achieved independently of one another. Therefore, not limited to a structure that satisfies only one of the correlations of the permeability, the resistivity, and the dielectric loss tangent of the second raw material, a structure that satisfies any two of them, or a structure that satisfies all three of them, ringing can be more effectively suppressed.

[0127] Figure 12 Embodiments of the present disclosure are shown. In these drawings, the same or similar elements are marked with the same reference numerals.

[0128] Figure 13 A first modification of the semiconductor device Al is shown. In the semiconductor device Al 1 of this modification, the structure of the covering layer 90 is different from that of the above-described example. If the first portion 91, which is a part of the covering layer 90, is taken as an example, in this modification, in the cross section in which the main circuit current flows, the first portion 91 does not cover the entire periphery of the cross section of the first power lead 31, but covers only a part thereof. More specifically, the first portion 91 covers only three sides (the upper side and the two side sides) of the rectangular cross section of the first power lead 31, and does not cover the remaining side (the bottom side) (i.e., the bottom side is exposed from the first portion 91). Further, each of the three sides (the upper side and the two side sides) is completely covered by the first portion 91.

[0129] Figure 12 A second modification of the semiconductor device Al is shown. If the first portion 91, which is a part of the covering layer 90, is taken as an example, in this modification, in the cross section in which the main circuit current flows, the first portion 91 is formed on the entire periphery of the cross section of the first power lead 31, and each side (the upper side, the two side sides, and the bottom side) is partially exposed from (or, in other words, partially covered by) the first portion 91. In the illustrated example, the first portion 91 has a plurality of gap portions that are arranged separately from each other along the entire periphery of the rectangular cross section. Further, the plurality of gap portions include one or more gap portions corresponding to each side of the cross section. As such a first portion 91 (covering layer 90), for example, a structure in which a plurality of small holes or slits are formed can be used. Alternatively, the first portion 91 (covering layer 90) can be configured as a collection of a plurality of small regions that are separate from each other.

[0130] Ringing can also be suppressed by the semiconductor devices Al 1 and Al 2. From these modifications, it is understood that the specific structure of the covering layer 90 is not particularly limited. Even if the covering layer 90 covers a part of the conduction member (structure (a) or (b)), Figure 13 Figures 14-16 ), the effect of suppressing ringing can be obtained depending on the position or size of the region in which the covering layer 90 is provided, and the like.

[0131] Figures 17-19 A semiconductor device of a second embodiment of the present disclosure is shown. In the semiconductor device A2 of this embodiment, the structure of the covering layer 90 is different from that of the covering layer 90 of the above-described semiconductor device Al.

[0132] ​In the second embodiment, the first portion 91 covers a portion of the first power conductor 31, and the second portion 92 covers a portion of the second power conductor 32. More specifically, the first portion 91 does not cover a portion of the first power conductor 31 that forms a path of the first semiconductor element 10A and the capacitor 81. That is, the first portion 91 covers the terminal portion 312 of the first power conductor 31, and does not cover the pad portion 311.

[0133] In addition, the second portion 92 does not cover a portion of the second power conductor 32 that forms a path of the second semiconductor element 10B and the capacitor 81. That is, the second portion 92 covers the connection portion 321c of the terminal portion 322 and the pad portion 321 of the second power conductor 32, and does not cover the connection portion 321a and the plurality of extension portions 321b.

[0134] With the second embodiment, ringing can also be suppressed. For a portion of the first power conductor 31 and the second power conductor 32 that forms a path through which only the charge-discharge current of the capacitor 81 flows, the resistance is equivalent to the ESR of the capacitor 81. That is, the path is a path through which the charge-discharge current of the capacitor 81 is rapidly passed, and thus it is not preferable for the AC resistance to be too high. For this reason, it is preferable for the first portion 91 and the second portion 92 to cover a portion of the first power conductor 31 and the second power conductor 32, respectively, as with the above-described structure, for rapid charge-discharge on the capacitor 81.

[0135] Figure 20 A semiconductor device of a third embodiment of the present disclosure is shown. In the semiconductor device A3 of the present embodiment, the structure of the covering layer 90 is different from that of the covering layer 90 of the semiconductor devices A1 and A2 described above.

[0136] In the third embodiment, the covering layer 90 includes a first portion 91, a second portion 92, a third portion 93, a fourth portion 94, a fifth portion 95, and a sixth portion 96. The first portion 91 and the second portion 92 are the same structure as the first portion 91 and the second portion 92 in the semiconductor device A1.

[0137] The third portion 93 covers the copper film 220n of the conductive substrate 22A that is the first metal layer. The fourth portion 94 covers the first spacer 26A. The fifth portion 95 covers the copper film 220n of the conductive substrate 22B that is the second metal layer. The sixth portion 96 covers the plurality of intermediate conductors 40. In the illustrated example, the third portion 93 covers a portion of the copper film 220n other than the bonding surface with the graphite substrate 220m. The fifth portion 95 covers a portion of the copper film 220n other than the bonding surface with the graphite substrate 220m.

[0138] The ringing can also be suppressed by the third embodiment. In addition, it can be understood from the present embodiment that the cladding layer 90 can be appropriately changed in the placement position according to the required ringing suppression degree and the structure of the semiconductor device.

[0139] Figure 21 and ​ A semiconductor device of a fourth embodiment of the present disclosure is shown. In the semiconductor device A4 of the present embodiment, the structures of the first power lead 31 and the second power lead 32 are different from those of the above-described embodiments.

[0140] In the fourth embodiment, the terminal portion 312 of the first power lead 31 and the terminal portion 322 of the second power lead 32 overlap each other as viewed in the z direction. The terminal portion 312 is covered by the first portion 91, and the terminal portion 322 is covered by the second portion 92. The insulator 89 is provided between the terminal portion 312 and the terminal portion 322. The insulator 89 serves to insulate the terminal portion 312 and the terminal portion 322 from each other when a predetermined voltage is applied between them.

[0141] In the fourth embodiment, the second raw material constituting the cladding layer 90 is composed of a material having a dielectric loss tangent greater than 0 (greater than that of an ideal dielectric), for example, a dielectric loss tangent of 0.01 or more. With the cladding layer 90 of this structure, a portion having a static capacitance, i.e., a portion having an electrical structure similar to that of a capacitor, is realized by the terminal portion 312 and the terminal portion 322 and the cladding layer 90 and the insulator 89 interposed therebetween.

[0142] With the fourth embodiment, the ringing can also be suppressed. In addition, the static capacitance constituted by the terminal portion 312 and the terminal portion 322 and the cladding layer 90 and the insulator 89 interposed therebetween can obtain a superposition effect with the capacitor 81, further improving the stabilization effect of the power supply voltage (input voltage) applied between the first power lead 31 and the second power lead 32.

[0143] The semiconductor device of the present disclosure is not limited to the above-described embodiments and modified examples. The specific structures of the respective portions of the semiconductor device of the present disclosure can be freely designed in various ways.

[0144] The semiconductor device of the present disclosure includes the embodiments described in the following appendix.

[0145] Appendix 1.

[0146] The semiconductor device has:

[0147] at least one semiconductor element having a switching function;

[0148] a conduction member that becomes a current path switched by the semiconductor element and is composed of a first raw material; and

[0149] a cladding layer covering at least a part of the conductive member and composed of a second material,

[0150] the second material satisfies at least one of the following three conditions:

[0151] (a) magnetic permeability is higher than that of the first material;

[0152] (b) electrical resistivity is higher than that of the first material; and

[0153] (c) dielectric loss tangent is greater than 0.

[0154] Appendix 2.

[0155] the semiconductor device described in Appendix 1,

[0156] the second material is a magnetic conductor having magnetic permeability higher than that of the first material and electrical resistivity higher than that of the first material.

[0157] Appendix 3.

[0158] the semiconductor device described in Appendix 2,

[0159] the second material has dielectric loss tangent greater than 0.

[0160] Appendix 4.

[0161] the semiconductor device described in Appendix 1,

[0162] the second material has magnetic permeability higher than that of the first material and dielectric loss tangent greater than 0.

[0163] Appendix 5.

[0164] the semiconductor device described in Appendix 1,

[0165] the second material has electrical resistivity higher than that of the first material and dielectric loss tangent greater than 0.

[0166] Appendix 6.

[0167] the semiconductor device described in any one of Appendices 1 to 5,

[0168] the cladding layer has a thickness of 1 μm to 5 μm.

[0169] Appendix 7.

[0170] the semiconductor device described in any one of Appendices 1 to 6,

[0171] the second material has relative magnetic permeability of 10 or more.

[0172] APPENDIX 8

[0173] the semiconductor device according to any one of

[0174] the second raw material has a resistivity that is two times or more the resistivity of the first raw material.

[0175] APPENDIX 9

[0176] the semiconductor device according to any one of

[0177] the second raw material has a dielectric loss tangent of 0.01 or more.

[0178] APPENDIX 10

[0179] the semiconductor device according to any one of

[0180] further comprising a capacitor having a first terminal and a second terminal for electrical connection,

[0181] the at least one semiconductor element is a plurality of semiconductor elements that constitute a half-bridge including at least one set of an upper arm and a lower arm,

[0182] the plurality of semiconductor elements include a first semiconductor element included in the upper arm and a second semiconductor element included in the lower arm,

[0183] the conduction member includes a first metal layer connected to a drain electrode of the first semiconductor element, a first power lead connected to the first metal layer, and a second power lead connected to a source electrode of the second semiconductor element,

[0184] the first terminal of the capacitor is connected to the first power lead, and the second terminal of the capacitor is connected to the second power lead,

[0185] the covering layer includes a first portion covering the first power lead and a second portion covering the second power lead.

[0186] APPENDIX 11

[0187] the semiconductor device according to

[0188] the first power lead includes a portion that constitutes a path of the first semiconductor element and the capacitor, and this portion of the first power lead is not covered by the first portion.

[0189] APPENDIX 12

[0190] the semiconductor device according to

[0191] The second power lead includes a portion that constitutes a path of the second semiconductor element and the capacitor, the portion of the second power lead not being covered by the second portion.

[0192] Appendix 13.

[0193] The semiconductor device according to any one of Appendices 10 to 12,

[0194] The cladding layer includes a third portion that covers the first metal layer.

[0195] Appendix 14.

[0196] The semiconductor device according to any one of Appendices 10 to 13,

[0197] The conduction member includes a second metal layer connected to a drain electrode of the second semiconductor element, and a third power lead connected to the second metal layer,

[0198] The second metal layer and the third power lead are not covered by the cladding layer.

[0199] Appendix 15.

[0200] The semiconductor device according to Appendix 14,

[0201] The conduction member includes an intermediate lead connected to a source electrode of the first semiconductor element and the second metal layer, the intermediate lead not being covered by the cladding layer.

[0202] Appendix 16.

[0203] The semiconductor device according to any one of Appendices 10 to 15,

[0204] The conduction member includes a first spacer pad interposed between the first metal layer and the first power lead,

[0205] The cladding layer includes a fourth portion that covers the first spacer pad.

[0206] Appendix 17.

[0207] The semiconductor device according to any one of Appendices 10 to 16,

[0208] The conduction member includes a conductor interposed between a source electrode of the second semiconductor element and the second power lead.

[0209] Appendix 18.

[0210] The semiconductor device according to any one of Appendices 1 to 17,

[0211] The semiconductor element is any one of a SiC MOSFET, a SiC IGBT, a Si MOSFET, a Si IGBT, and a GaN HEMT.

[0212] Explanation of symbols

[0213] A1, A11, A12, A2, A3, A4 - semiconductor device; 10 - semiconductor element; 10A - first semiconductor element; 10B - second semiconductor element; 11 - main surface electrode; 12 - drain electrode (back surface electrode); 13 - insulating film; 20 - support substrate; 21, 21A, 21B - insulating substrate; 22A, 22B - conductive substrate; 23A, 23B - insulating layer; 24A, 24B - gate layer; 25A, 25B - drive source layer; 26A - first spacer; 31 - first power lead wire; 32 - second power lead wire; 33 - third power lead wire; 34A, 34B - gate lead wire; 35A, 35B - drive source lead wire; 36 - dummy lead wire; 40 - intermediate lead wire; 41 - first bonding portion; 42 - second bonding portion; 43 - communication portion; 50 - lead member; 51 - gate lead; 52 - drive source lead; 53 - first connection lead; 54 - second connection lead; 60 - conductive block; 61 - first block; 62 - second block; 70 - encapsulation resin; 71 - resin main surface; 72 - resin back surface; 81 - capacitor; 89 - insulator; 90 - cladding layer; 91 - first portion; 92 - second portion; 93 - third portion; 94 - fourth portion; 95 - fifth portion; 96 - sixth portion; 101 - element main surface; 102 - element back surface; 111 - source electrode; 112 - gate electrode; 113 - drive source electrode; 211A, 211B - main surface; 212A, 212B - back surface; 220A, 220B - substrate bonding material; 220m - graphite substrate; 220n - copper film; 221A, 221B - main surface; 222A, 222B - back surface; 260A - spacer bonding material; 260B - spacer bonding material; 311, 321, 331, 341, 351, 361 - pad portion; 312, 322, 332, 342, 352, 362 - terminal portion; 321a - link portion; 321b - extension portion; 321c - connection portion; 731, 732, 733, 734 - resin side surface.

Claims

1. A semiconductor device, characterized in that, have: At least one semiconductor element having a switching function; The conducting component, which becomes the current path switched by the semiconductor element, is made of a first raw material; A covering layer that covers at least a portion of the conductive component and is made of a second raw material; as well as A gate wire, to which a voltage is applied to drive the semiconductor element. The second raw material satisfies at least one of the following three conditions: (a) The magnetic permeability is higher than that of the first raw material; (b) The resistivity is higher than that of the first raw material; and (c) The dielectric loss tangent is greater than 0. The dielectric loss tangent of the second raw material is greater than 0. The gate wire includes a portion extending along the thickness direction of the semiconductor element.

2. The semiconductor device according to claim 1, characterized in that, The second raw material is a magnetic conductor with higher permeability and higher resistivity than the first raw material.

3. The semiconductor device according to claim 1, characterized in that, The second raw material has a higher magnetic permeability than the first raw material and a dielectric loss tangent greater than 0.

4. The semiconductor device according to claim 1, characterized in that, The resistivity of the second raw material is higher than that of the first raw material, and the dielectric loss tangent is greater than 0.

5. The semiconductor device according to claim 1, characterized in that, The thickness of the coating layer is 1μm to 5μm.

6. The semiconductor device according to claim 1, characterized in that, The relative magnetic permeability of the second raw material is 10 or higher.

7. The semiconductor device according to claim 1, characterized in that, The resistivity of the second raw material is more than twice that of the first raw material.

8. The semiconductor device according to claim 1, characterized in that, The dielectric loss tangent of the second raw material is 0.01 or higher.

9. The semiconductor device according to any one of claims 1 to 8, characterized in that, It also includes a capacitor, which has a first terminal and a second terminal for electrical connection. The at least one semiconductor element is a plurality of semiconductor elements constituting a half-bridge, the half-bridge comprising at least one set of upper arms and lower arms. The plurality of semiconductor elements includes a first semiconductor element contained in the upper arm and a second semiconductor element contained in the lower arm. The conductive component includes: a first metal layer connected to the drain electrode of the first semiconductor element; and a first power wire connected to the first metal layer. And a second power wire, which is connected to the source electrode of the second semiconductor element. The first end of the capacitor is connected to the first power wire, and the second end of the capacitor is connected to the second power wire. The covering layer comprises a first portion covering the first power conductor and a second portion covering the second power conductor.

10. The semiconductor device according to claim 9, characterized in that, The first power conductor includes a portion that forms the path between the first semiconductor element and the capacitor, and this portion of the first power conductor is not covered by the first portion.

11. The semiconductor device according to claim 9, characterized in that, The second power conductor includes a portion that forms the path between the second semiconductor element and the capacitor, and this portion of the second power conductor is not covered by the second portion.

12. The semiconductor device according to claim 9, characterized in that, The cladding layer includes a third portion that covers the first metal layer.

13. The semiconductor device according to claim 9, characterized in that, The conductive component includes: a second metal layer connected to the drain electrode of the second semiconductor element; and a third power wire connected to the second metal layer. The second metal layer and the third power conductor are not covered by the cladding layer.

14. The semiconductor device according to claim 13, characterized in that, The conductive component includes an intermediate wire connected to the source electrode of the first semiconductor element and the second metal layer, the intermediate wire being not covered by the cladding layer.

15. The semiconductor device according to claim 9, characterized in that, The conductive component includes a first spacer between the first metal layer and the first power wire. The covering layer includes a fourth portion that covers the first septum.

16. The semiconductor device according to claim 9, characterized in that, The conducting component includes a conductor located between the source electrode of the second semiconductor element and the second power wire.

17. The semiconductor device according to any one of claims 1 to 8, characterized in that, The semiconductor device is any one of SiC MOSET, SiCIGBT, SiMOSFET, SiIGBT, and GaN HEMT.

18. The semiconductor device according to any one of claims 1 to 8, characterized in that, The semiconductor element also includes an encapsulating resin covering a portion of the conducting component and a portion of the gate wire. The gate wire is L-shaped, protruding from a surface in a direction orthogonal to the thickness direction of the sealing resin.

19. The semiconductor device according to claim 18, characterized in that, The gate wire is supported by the sealing resin.

Images