Pulsed laser diode driver

Abstract

A pulsed laser diode driver includes an inductor having a first terminal configured to receive a source voltage. A source capacitor has a first terminal connected to the first terminal of the inductor to provide the source voltage. A bypass switch has a drain node connected to a second terminal of the inductor and a first terminal of a bypass capacitor. A laser diode has an anode connected to the second terminal of the inductor and the drain node of the bypass switch. A laser diode switch has a drain node connected to a cathode of the laser diode. The laser diode switch and the bypass switch control current through the inductor to generate a high current pulse through the laser diode that corresponds to a peak current of a resonant waveform formed at the anode of the laser diode.

Description

[0001] Related applications

[0002] This application claims priority to U.S. non-provisional application No. 62 / 994,470, filed March 25, 2020, and U.S. provisional application No. 63 / 127,794, filed December 18, 2020, all of which are incorporated herein by reference for all purposes. Background Technology

[0003] Laser-based ranging systems (such as lidar) typically use pulsed laser diode driver circuits to generate short, high-current pulses, which are passed through the laser diode to emit a corresponding laser pulse. The reflected laser pulse is received by the lidar system and used to determine the distance between the lidar system and the reflecting point. The spatial resolution of the lidar system is partly determined by the width of the laser pulse. Therefore, it is generally desirable to generate light pulses with a width of about 5 ns or less. However, the parasitic inductance of the pulsed laser diode driver circuit and the laser diode must typically be overcome to achieve the desired short pulse width. For example, many laser diodes have at least one junction wire that can contribute 1 nH of inductance, thereby limiting the slew rate of the current pulse unless a very high voltage is present. Therefore, some conventional pulsed laser diode driver circuits use high source voltages, typically greater than 40V to 100V, to achieve the desired pulse width. Switching devices such as GaN field-effect transistors (FETs) are commonly used in conventional pulsed laser diode driver circuits because they can withstand such high voltages. However, pulsed laser diode driver circuits using GaN technology may be more expensive and / or may be difficult to integrate with silicon-based architectures. Summary of the Invention

[0004] In some embodiments, the pulsed laser diode driver includes a first inductor having a first terminal and a second terminal. The first terminal of the first inductor is configured to receive a first source voltage based on a DC input voltage. A first source capacitor has a first terminal directly electrically connected to the first terminal of the first inductor to provide the first source voltage, and a second terminal electrically coupled to ground. A first bypass switch has a drain node directly electrically connected to the second terminal of the first inductor and a source node directly electrically connected to ground. The first bypass capacitor has a first terminal directly electrically connected to the drain node of the first bypass switch. A first laser diode has an anode and a cathode. The anode of the first laser diode is directly electrically connected to the second terminal of the first inductor and the drain node of the first bypass switch. The first laser diode switch has a drain node directly electrically connected to the cathode of the first laser diode and a source node directly electrically connected to ground. The first laser diode switch and the first bypass switch are configured to control the current through the first inductor to generate a high-current pulse through the first laser diode, the high-current pulse corresponding to the peak current of a resonant waveform formed at the anode of the first laser diode.

[0005] In some embodiments, the pulsed laser diode driver includes an inductor having a first terminal and a second terminal. The first terminal of the inductor is configured to receive a source voltage. The source capacitor has a first capacitor terminal directly electrically connected to the first terminal of the inductor to provide the source voltage and a second capacitor terminal electrically coupled to a bias voltage node. The source switch has a first terminal directly electrically connected to a DC input voltage terminal and a second terminal directly electrically connected to the first capacitor terminal. When the source switch is enabled, the source switch is operable to charge the source capacitor. The bypass switch has a drain node directly electrically connected to the second terminal of the inductor and a source node directly electrically connected to the bias voltage node. The laser diode switch has a drain node directly electrically connected to the second terminal of the inductor and the drain node of the bypass switch. The laser diode has an anode directly electrically connected to the source node of the laser diode switch and a cathode directly electrically connected to the bias voltage node. The bypass capacitor has: i) a first terminal directly connected to the second terminal of the inductor and a second terminal directly connected to the bias voltage node; ii) a first terminal directly connected to the anode of the laser diode and a second terminal directly connected to the bias voltage node; iii) a first terminal directly connected to the second terminal of the inductor and a second terminal directly connected to the second capacitor terminal of the source capacitor; or iv) a first terminal directly connected to the anode of the laser diode and a second terminal directly connected to the second capacitor terminal of the source capacitor. The laser diode switch and the bypass switch are configured to control the current through the inductor to generate a high-current pulse through the laser diode, the high-current pulse corresponding to the peak current of the resonant waveform formed at the anode of the laser diode.

[0006] In some embodiments, the pulsed laser driver includes an inductor having a first terminal and a second terminal, the first terminal being configured to receive a source voltage. A source capacitor has a first capacitor terminal directly electrically connected to the first terminal of the inductor to provide a source voltage and a second capacitor terminal electrically coupled to a bias voltage node. A source switch has a first terminal directly electrically connected to a DC input voltage terminal and a second terminal directly electrically connected to the first capacitor terminal. When the source switch is enabled, the source switch is operable to charge the source capacitor. A bypass switch has a drain node directly electrically connected to the second terminal of the inductor and a source node directly electrically connected to the bias voltage node. A laser diode has an anode and a cathode, the anode being directly electrically connected to the second terminal of the inductor and the drain node of the bypass switch. A laser diode switch has a drain node directly electrically connected to the cathode of the laser diode and a source node directly electrically connected to the bias voltage node. The bypass capacitor has: i) a first terminal directly electrically connected to the second terminal of the inductor and a second terminal directly electrically connected to the bias voltage node; ii) a first terminal directly electrically connected to the second terminal of the inductor and a second terminal directly electrically connected to the second capacitor terminal of the source capacitor; or iii) a first terminal directly electrically connected to the anode of the laser diode and a second terminal directly electrically connected to the cathode of the laser diode. The laser diode switch and the bypass switch are configured to control the current through the inductor to generate a high-current pulse through the laser diode, the high-current pulse corresponding to the peak current of the resonant waveform formed at the anode of the laser diode.

[0007] In some embodiments, the pulsed laser diode driver includes multiple inductors, each inductor having a first terminal and a second terminal, the first terminal of each inductor being configured to receive a corresponding source voltage. The pulsed laser diode driver includes multiple source capacitors, each corresponding to a corresponding inductor and having a first capacitor terminal directly electrically connected to the first terminal of the corresponding inductor to provide a source voltage and a second capacitor terminal electrically coupled to a bias voltage node. The pulsed laser diode driver includes multiple bypass switches, each corresponding to a corresponding inductor and having a drain node directly electrically connected to the second terminal of the corresponding inductor and a source node directly electrically connected to the bias voltage node. The pulsed laser diode driver includes multiple laser diodes, each corresponding to a corresponding inductor and a corresponding bypass switch and having an anode and a cathode, the anode being directly electrically connected to the second terminal of the corresponding inductor and the drain node of the corresponding bypass switch. The laser diode switch has a drain node directly electrically connected to the cathode of each of the laser diodes and a source node directly electrically connected to the bias voltage node. The pulsed laser diode driver includes multiple bypass capacitors, each corresponding to a corresponding inductor and having a first terminal directly electrically connected to a second terminal of the corresponding inductor and a second terminal directly electrically connected to a bias voltage node. The laser diode switch and the multiple bypass switches are configured to control a corresponding current through each of the inductors to generate a corresponding high-current pulse through each of the laser diodes, each of the high-current pulses corresponding to the peak current of a resonant waveform formed at the anode of the corresponding laser diode. Attached Figure Description

[0008] Figures 1A to 1C This is a simplified circuit diagram of a pulsed laser diode driver with a first general topology according to some implementation schemes.

[0009] Figures 2A to 2D The diagram illustrates the relationship between [various implementation schemes] and [other schemes]. Figure 1A The diagram shows a simplified graph of the signals related to the operation of the pulsed laser diode driver.

[0010] Figure 3 It is based on some implementation plans for use Figures 1A to 1C This is part of an exemplary switching sequence of operation of a pulsed laser diode driver.

[0011] Figures 4A to 4D This is a simplified circuit diagram of a pulsed laser diode driver with a second general topology according to some implementation schemes.

[0012] Figures 5A to 5D This is a simplified circuit diagram of a pulsed laser diode driver with a third general topology according to some implementation schemes.

[0013] Figures 6A to 6D This is a simplified circuit diagram of a pulsed laser diode driver with a fourth general topology according to some implementation schemes.

[0014] Figures 7A to 7E This is a simplified circuit diagram of a pulsed laser diode driver based on a fifth general topology according to some implementation schemes.

[0015] Figures 8A to 8B This is a simplified circuit diagram of a pulsed laser diode driver based on a sixth general topology according to some implementation schemes.

[0016] Figures 9A to 9B This is a simplified circuit diagram of a pulsed laser diode driver based on a seventh general topology according to some implementation schemes.

[0017] Figures 10A to 10B This is a simplified circuit diagram of a pulsed laser diode driver with an eighth general topology according to some implementation schemes.

[0018] Figures 11 to 12 The diagram illustrates the relationship between [various implementation schemes] and [other schemes]. Figure 10B The diagram shows a simplified graph of the signals related to the operation of the pulsed laser diode driver.

[0019] Figures 13A to 13I This is a simplified circuit diagram of a high repetition rate pulsed laser diode driver according to some implementation schemes.

[0020] Figure 14 The diagram illustrates the relationship between [various implementation schemes] and [other schemes]. Figure 13I The diagram shows a simplified graph of the signals related to the operation of the pulsed laser diode driver.

[0021] Figure 15 A simplified circuit diagram of a pulsed laser diode driver according to a ninth general topology based on some embodiments is shown.

[0022] Figures 16A to 16B The diagram illustrates the relationship between [various implementation schemes] and [other schemes]. Figure 15 The diagram shows a simplified graph of the signals related to the operation of the pulsed laser diode driver.

[0023] Figure 17 , Figure 18 , Figure 19 and Figure 20 This is a simplified circuit diagram of a pulsed laser diode driver with an adjustable DC input voltage, according to some implementation schemes.

[0024] Figures 21A to 21B Is with Figure 17 , Figure 18 , Figure 19 and Figure 20 The diagram shows a simplified graph of the signals related to the operation of the pulsed laser diode driver. Detailed Implementation

[0025] According to some implementations, compared to conventional solutions that rely on fixed and often unavoidable parasitic capacitances and inductances in the circuitry, the pulsed laser diode driver circuit disclosed herein (“pulsed laser diode driver”) uses a tunable resonant circuit to generate high-current (e.g., 40 amps) ultrashort pulses (e.g., 1 to 5 ns) from the laser diode to emit laser pulses. The tunable resonant circuit provides easily tunable parameters that control the pulse width, peak current, charging time, recovery time, decay time, and other tunable parameters of the pulsed laser diode driver. Implementations of a switching sequence for driving the pulsed laser diode driver disclosed herein are operable to generate a resonant waveform at the anode of the laser diode to produce high-current pulses through the laser diode, the voltage level of which is advantageously sufficient to support the high-current pulses, rather than exceeding the voltage level required to generate them.

[0026] Therefore, implementations of such pulsed laser diode drivers can advantageously use low input voltages (e.g., 6V, 9V, 15V, etc.) to generate high-current pulses, thereby enabling the use of silicon-based switches instead of GaN-based switches used in many conventional solutions. Thus, any pulsed laser diode driver disclosed herein can be integrated into a single semiconductor die. Implementations of the pulsed laser diode drivers disclosed herein advantageously use discrete inductors (e.g., vias or surface mount components) intentionally added to the pulsed laser diode driver to generate resonant waveforms, rather than relying on parasitic inductance of the pulsed laser diode driver (e.g., the laser diode, bonding wires, or inter-circuit connections). Therefore, the laser driver implementations disclosed herein are easily tuned and have a reproducible architecture. In contrast, conventional pulsed laser diode drivers typically use various techniques to overcome the effects of parasitic inductance in both the pulsed laser diode driver and the laser diode itself, and thus teach against intentionally adding additional inductance to the pulsed laser diode driver. Compared to conventional solutions that only have source capacitors or only consider the untunable parasitic capacitance of the pulsed laser diode driver, the pulsed laser diode driver disclosed herein advantageously includes bypass capacitors in addition to such intentionally added inductors. Designers can use these bypass capacitors to easily tune the desired pulse width emitted by the laser diode. Again, conventional solutions teach against adding additional capacitance to the pulsed laser diode driver. Because conventional solutions rely on the parasitic capacitance and inductance of conventional laser drivers, modifying parameters such as pulse width may require a redesign or re-layout of the conventional solution. By comparison, parameters such as pulse width of the pulsed laser diode driver disclosed herein can be tuned simply by changing component values.

[0027] Multichannel laser diodes are conventionally manufactured on a single monolithic substrate housed within a laser diode package. Conventionally, a single pin of the laser diode package is connected to the cathodes of all laser diodes as a group (i.e., the "common cathode"), while the anode of each laser diode is individually connected to a corresponding pin of the laser diode package. Applying a pulse independently to each laser diode conventionally requires a switch in the anode current path of the laser diode to select which laser diode to trigger. However, when the laser diode current path is enabled, the N-type switch conventionally requires a bootstrap circuit to horizontally shift the gate drive of the switch. Such a bootstrap circuit increases the complexity and cost of the pulsed laser diode driver design. Therefore, this document discloses an embodiment of a multichannel pulsed laser diode driver circuit for advantageously and independently driving laser diodes in a common cathode multichannel laser diode package using an N-type switch without any bootstrap circuitry.

[0028] The repetition rate of each of the multi-channel laser diode drivers and the pulsed laser diode drivers described herein is limited by the charging time of the source capacitor for each channel, as described below. The pulsed laser diode drivers described herein generate narrow (e.g., 1 to 5 nanoseconds) high-current pulses (e.g., 40 amps) through the driven laser diode. Therefore, the transient power of the driven laser diode is very high (e.g., approximately several hundred watts). For many applications (e.g., lidar), the duty cycle of the pulse is typically 0.01% or less to limit the total power dissipated in the laser diode, resulting in an upper limit on the repetition rate. In conventional pulsed laser diode driver applications, a resistor is used to charge the source capacitor during each cycle. In such conventional solutions, the RC time constant of the charging circuit is generally not a problem because the duty cycle is very low. However, for applications requiring higher laser pulse repetition rates, the RC time constant of conventional charging circuits creates an undesirable limitation. Therefore, in any embodiment disclosed herein, each source resistor of a given laser diode driver can advantageously be replaced by an actively controlled source switch that rapidly charges the associated source capacitor.

[0029] Typical resonant driver designs require damping resistors to minimize ringing duration. However, the added damping resistor dissipates power, reducing the overall power efficiency of the design. Therefore, in some embodiments, a pulsed laser diode driver is disclosed that advantageously switches the damping resistor into the resonant circuit during multiple portions of a switching sequence where the damping resistor critically damps the ringing, and switches the damping resistor out of the resonant circuit during multiple portions of a switching sequence where the damping resistor does not provide a positive benefit to the resonant circuit. This increases the overall power efficiency of the pulsed laser diode driver compared to a driver where the entire switching sequence includes a damping resistor.

[0030] For some applications, the amplitude of the high-current pulses delivered by a pulsed laser diode driver (such as any of the drivers disclosed herein) may need to be adjusted between pulses. Therefore, in some embodiments, any pulsed laser diode driver disclosed herein may be advantageously configured to adjust the amplitude of the high-current pulses delivered to one or more laser diodes pulse by pulse.

[0031] Figures 1A to 1C This is a simplified circuit diagram of pulsed laser diode drivers 101 to 103 according to some embodiments, for driving a laser diode using a low-side switch in a first general topology. Pulsed laser diode drivers 101 to 103 typically each include a source resistor R. S Source capacitor C S(That is, a physical component that does not represent the parasitic capacitance of another component), damping resistor R Damp Inductor L S (That is, the physical component that does not represent the parasitic inductance of another component), bypass capacitor C BP (That is, the physical component that does not represent the parasitic capacitance of another component), laser diode D L Bypass switch M BP and laser diode switch M DL Laser diode switch M DL Configured as a low-side switch. Also shown are controller 120, nodes 110 and 112, and laser diode D. L parasitic inductance L DL DC input voltage V in Source capacitor C S Source voltage V at the location s Through inductor L S current i LS Through laser diode D L current i DL Bypass switch gate driver signal GATE BP and laser diode switching gate driver signal GATE DL .

[0032] The topology of pulsed laser diode drivers 101 to 103 relative to bypass capacitor C BP The arrangement varies. In each topology of pulsed laser diode drivers 101 to 103, the source resistor R... S The first terminal is configured to be directly electrically connected to the DC input voltage V. in Source capacitor C S The first terminal is directly electrically connected to the source resistor R. S The second terminal, and the source capacitor C S The second terminal is directly electrically connected to the damping resistor R. Damp The first terminal. Damping resistor R Damp The second terminal is directly electrically connected to a bias voltage node (such as ground). Therefore, the source capacitor C S The second terminal of the inductor is electrically coupled to the bias voltage node. S The first terminal is directly electrically connected to the source resistor R. S The second terminal and source capacitor C S The first terminal. Bypass switch M BP The drain node is directly connected to the inductor L. S The second terminal, and the bypass switch M BP The source node is directly electrically connected to the bias voltage node. Laser diode DL The anode is directly electrically connected to the inductor L S The second terminal, and the laser diode D L The cathode is directly electrically connected to the laser diode switch M. DL The drain node. Laser diode switch M DL The source node is directly electrically connected to the bias voltage node.

[0033] Bypass switch M BP Configured to receive the bypass switch gate driver signal GATE at the gate node. BP Bypass switch gate driver signal GATE BP Operable based on the bypass switch gate driver signal GATE BP The voltage level is used to turn the bypass switch M on or off. BP Similarly, the laser diode switch M DL Configured to receive the laser diode switching gate driver signal GATE at the gate node. DL The laser diode switching gate driver signal GATE DL Operable based on laser diode switching gate driver signal GATE DL The voltage level is used to turn the laser diode switch M on or off. DL In some embodiments, the pulsed laser diode driver circuit disclosed herein includes one or more bootstrap circuits or other horizontal shift circuits to drive one or more high-side switches. Bypass switch M BP and laser diode switch M DL Either or both of these can be implemented as an N-type switch or a P-type switch. In some implementations, the bypass switch M BP and laser diode switch M DL Implemented as a silicon-based or silicon carbide-based field-effect transistor (FET). Described herein as two or more components having directly electrically connected terminals, with a DC current path between the respective terminals of the two or more components. For example, the first and second components are not directly electrically connected by a capacitor or inductor connected in series between the first and second components.

[0034] As in Figure 1A As shown in the simplified circuit diagram of the pulsed laser diode driver 101, in some embodiments, the bypass capacitor C BP The first terminal is directly electrically connected to the inductor L S The second terminal and laser diode D L The anode. In such implementations, the bypass capacitor C... BP The second terminal is directly electrically connected to the bias voltage node. For example, in... Figure 1BAs shown in the simplified circuit diagram of the pulsed laser diode driver 102, in some embodiments, the bypass capacitor C BP The first terminal is directly electrically connected to the inductor L S The second terminal and laser diode D L The anode. Bypass capacitor C BP The second terminal is directly electrically connected to the source capacitor C. S The second terminal and damping resistor R Damp The first terminal. As in Figure 1C As shown in the simplified circuit diagram of the pulsed laser diode driver 103, in some embodiments, the bypass capacitor C BP The first terminal is directly electrically connected to the inductor L S The second terminal and laser diode D L The anode. In such implementations, the bypass capacitor C... BP The second terminal is directly electrically connected to the laser diode switch M. DL Drain terminal and laser diode D L The cathode.

[0035] In some implementations, pulsed laser diode drivers 101 to 103 are configured to receive a DC input voltage V. in The DC input voltage ranges from approximately 10V to 20V, which is advantageously lower than the input voltage used by many conventional pulsed laser diode drivers. Inductor L S This refers to the physical components added to the pulsed laser diode drivers 101 to 103 (i.e., the opposite of the representation of parasitic inductance caused by components such as connecting wires or interconnects). Similarly, the bypass capacitor C BP This refers to the physical components added to the pulsed laser diode drivers 101 to 103 (i.e., the opposite of the representation of parasitic capacitance). One advantage of using physical inductors and capacitors instead of parasitic inductors is that the inductor L can be easily modified by the designer or even the end user. S and bypass capacitor C BP The value of [value]. In contrast, conventional designs that rely on parasitic reactance may require redesign and / or relocation to change operating parameters.

[0036] As disclosed herein, the DC input voltage V can be advantageously selected (“tuned”). in Inductor L S Inductance, source capacitor C S Capacitors and damping resistors R Damp The resistor and bypass capacitor C BPThe value of the capacitor is determined to achieve the desired operation (e.g., charging time, pulse width, pulse voltage, pulse current) of the pulsed laser diode drivers 101 to 103. For example, this can be achieved by adjusting the bypass capacitor C. BP The capacitance value is used to tune the current flowing through the laser diode D. L current i DL The pulse width. Flowing through laser diode D L current i DL The peak current level of the pulse can be adjusted by adjusting the supply capacitor C. S Source voltage V s To tune. The tunable source capacitor C S The capacitance value is used to adjust the timing delay of the current pulse and the voltage across the laser diode D. L current i DL The upper limit range of the damping resistor R. Damp The resistance value depends on the supply capacitor C. S The capacitance value can be tuned within a range of values, such that at lower resistances, the lower frequency resonance of the pulsed laser diode driver disclosed herein is insufficiently damped (e.g., at approximately R0). Damp =0.1 ohms) or critically damped (e.g., at approximately R). Damp =0.4 ohms). Damping resistor R Damp Operable to prevent the current that generates the resonant waveform from becoming negative, thereby enabling the bypass switch M. BP Or laser diode switch M DL The body diode. Although for the critical damping case, through the laser diode D L current i DL The resulting maximum current level is relatively low, but this can be mitigated by increasing the DC input voltage V. in The voltage level allows for easy adjustment of the current level. In other implementations, a damping resistor R... Damp Complete removal by design (i.e., source capacitor C) S The second terminal is directly electrically connected to the bias voltage node. In other embodiments, the damping resistor R Damp The resistance value is set to zero ohms.

[0037] In some implementations, the DC input voltage V in The voltage is approximately 15V, and the inductor L S The inductance is approximately 6nH, and the source capacitor C S The capacitance is approximately 100nF, and the damping resistor R Damp The resistance is approximately 0.1 ohms, and the bypass capacitor C BP The capacitance is approximately 1 nF. In some implementations, the controller 120 receives capacitance from the damping resistor R. DampThe voltage at the first terminal is used to provide voltage across the damping resistor R. Damp The current indication.

[0038] In some or all of the embodiments disclosed herein, in order to generate D through a laser diode (or multiple laser diodes) L A high current pulse of approximately 40A, DC input voltage V in It can be in the range of 10 to 15 volts. In some such implementations, the inductor L S The inductance can be in the range of 5 to 10 nH, and its value determines the amount of flux delay required to generate the desired current. In some such implementations, the inductor L S The inductance is chosen to be an order of magnitude larger than the parasitic inductance of the printed circuit board (PCB) in which the pulsed laser diode driver is implemented. In some implementations, the damping resistor R... S The resistance is in the range of 100 to 200 milliohms. Bypass capacitor C BP The capacitance is determined by the laser diode D. L The pulse width of the high-current pulse is [specified], and in some embodiments, the capacitance ranges from 1 to 5 nF. In some such embodiments, the supply capacitor C [is used]. S The capacitance ranges from 25 to 100 nF, depending on the capacitance through the laser diode D. L The peak current of the required or desired high-current pulse. Supply capacitor C S The smaller the value, the better the laser diode D is. L The required DC input voltage V for the high current pulse or the desired peak current. in The higher the value, the better. In some such implementations, the selection can still transmit through the laser diode D. L The capacitor C supplies the required or desired peak current for the high-current pulse. S The minimum capacitance value is because all the remaining energy after a high-current pulse is shunted to ground and wasted, thereby reducing the power efficiency of the pulsed laser diode driver.

[0039] Controller 120 may be integrated with any embodiment of the pulsed laser diode driver disclosed herein, or it may be external circuitry or a module to any embodiment of the pulsed laser diode driver disclosed herein. Controller 120 is operable to generate circuitry sufficient to control one or more laser diode switches M. DL and one or more bypass switches M BPOne or more gate drive signals at voltage levels. Additionally, controller 120 is operable to sense voltage and / or current at either of nodes 110 and 112, as well as at nodes similar to or identical to nodes 110 and 112 as described herein, or at other nodes of the pulsed laser diode driver disclosed herein. Controller 120 may include one or more timing circuits, lookup tables, processors, memory, or other modules to control the pulsed laser diode driver disclosed herein. Regarding Figures 2A to 2D Simplified curves 201 to 207 and Figure 3 The exemplary switching sequence 300 shown details the operation of pulsed laser diode drivers 101 to 103.

[0040] Figures 2A to 2D The diagram illustrates the relationship between [various implementation schemes] and [other schemes]. Figure 1A Simplified graphs 201 to 207 show signals related to the operation of the pulsed laser diode driver 101. However, the signals related to the operation of pulsed laser diode drivers 101 to 103, 401 to 404, 501 to 504, 601 to 604, 701 to 705, 801 to 802, and 901 to 902 are similar to or the same as those shown in simplified graphs 201 to 207.

[0041] Simplified graph 201 shows the bypass switch gate driver signal GATE. BP Voltage curve of 220, laser diode gate switch driver signal GATE DL The voltage curve of 221, through inductor L S The current i of 222 LS The current curve, through the laser diode D L The current i of 223 DL The current curve, and the current curve at the source capacitor C. S Source voltage V at the location S The voltage curves for 224 are shown, and all these signals occur within the same duration. Details of these signals are described below. For readability, the bypass switch gate driver signal GATE is shown. BP 220 and laser diode switching gate driver signal GATE DL The voltage curve for the 221 has been horizontally shifted, but it actually represents a low-voltage input. Additionally, the bypass switch gate driver signal GATE... BP 220 and laser diode switching gate driver signal GATE DL The voltage curve of 221 assumes the laser diode switch M DL and bypass switch M BPIt is an NFET device. However, if a PFET device is used instead, the bypass switch gate driver signal GATE is used. BP 220 and laser diode switching gate driver signal GATE DL The polarity reversal of 221.

[0042] When the bypass switch M BP The bypass switch gate driver signal GATE is received at the gate node (e.g., from controller 120). BP When the 220 level is active, enable bypass switch M. BP (That is, it switches to an ON state). Similarly, when the laser diode switch M... DL The laser diode switching gate driver signal GATE is received at the gate node (e.g., from controller 120). DL When level 221 is active, enable laser diode switch M. DL As highlighted in graph 202, when the bypass switch M is activated... BP At that time, the rising current i LS 222 begins to flow through inductor L S Therefore, in the inductor L S A magnetic flux is established at the point. When the current i LS When 222 has reached the desired level (e.g., as determined by controller 120 using sensing current, voltage, and timer circuitry, or as determined by design constraints), then the bypass switch M... BP The bypass switch gate driver signal GATE is received at the gate node (e.g., from controller 120). BP A failure level of 220 disables bypass switch M. BP (That is, switching to the off state). As highlighted in graph 203, when the bypass switch M is disabled... BP At that time, it had already passed through inductor L S Accumulated current i with no other current path LS 222 is redirected through laser diode D L This results in short (e.g., 1ns to 5ns) high current (e.g., >30A) pulses flowing through the laser diode D. L This leads to the laser diode D L A laser pulse is emitted. Energy in the form of magnetic flux has been stored in inductor L. S Therefore, the laser diode D flows through the laser diode. L high current pulse i DL It may be more than the current flowing through the inductor L S current i LS Much larger. The value of the reactive component of the laser diode driver disclosed herein can be advantageously selected to generate high-current pulses.DL The expected current amplitude.

[0043] In the self-laser diode D L After transmission, the bypass switch gate driver signal GATE is used. BP 220 effective level reactivation bypass switch M BP And via the laser diode switching gate driver signal GATE DL The effective level of 221 will change the laser diode switch M DL It remains in the enabled state. As highlighted in graph 204, when stored in the source capacitor C S Source voltage V at the location S When 224 is discharged, bypass switch M BP and laser diode switch M DL Both are advantageously kept in the enabled state. As highlighted in graph 205, although the bypass switch M BP and laser diode switch M DL It remains in the enabled state, but through the laser diode D L current i DL 223 (and importantly, through laser diode D) L parasitic inductance L DL The current decreases to zero. After this, the bypass switch M... BP and laser diode switch M DL Both are bypassed by the gate driver signal GATE. BP 220 and laser diode switching gate driver signal GATE DL Failure level 221 (e.g., from controller 120) is disabled. This is due to the laser diode switch M... DL Through laser diode D L parasitic inductance L DL The current had been reduced to zero before it was disabled, therefore in the laser diode D L High voltage spikes are advantageously not formed at the anode because of the parasitic inductance L DL The current does not change rapidly. Because this advantageously mitigates such high voltage spikes, there is no need to switch the laser diode M... DL The choice of high voltage withstand capability simplifies the design and reduces the cost of the pulsed laser diode driver disclosed herein compared to conventional solutions. Furthermore, by mitigating such high voltage spikes, the pulsed laser diode driver disclosed herein eliminates the need for voltage buffering circuitry typically used in conventional solutions, further simplifying the design and reducing the cost of the pulsed laser diode driver disclosed herein compared to conventional solutions.

[0044] The high-current pulse 223 is the first and maximum peak of the resonant waveform formed by the reactive components of the pulsed laser diode driver circuit. These reactive components include the source capacitor C. S Inductor L S Laser diode D L parasitic inductance L DL and bypass capacitor C BP In addition to the advantages mentioned above, the bypass switch M BP This also reduces the subsequent ringing of the resonant waveform after the generation of the high-current pulse 223. As shown in curve 206, if the high-current pulse i is generated... DL The bypass switch gate driver signal GATE was not enabled after 223'. BP If 220' takes effect, then through inductor L S current i LS 222' on, through laser diode D L current i DL 223' on and at the source capacitor C S Source voltage V at the location S Ringing occurs at 224'. As shown in the figure, it occurs through laser diode D. L The high current pulse 223 corresponds to the laser diode D L The current i formed at the anode DL The peak current (e.g., maximum or local maximum amplitude) of the 223' resonant waveform.

[0045] As mentioned earlier, designers can advantageously select or “tune” the source capacitor C. S Inductor L S and bypass capacitor C BP The value of satisfies the desired performance criteria for the pulsed laser diode driver disclosed herein. For example, it can be based on the laser diode D L current i DL The desired pulse width is used to select the bypass capacitor C. BP The capacitance value. Graph 207 shows the capacitance value when the bypass capacitor C... BP The pulse 223 generated when the capacitance is equal to 1nF, and the pulse generated when the bypass capacitor C BP The pulse 223” is generated when the capacitance is equal to 4nF. In use cases where a wider pulse (such as pulse 223”) is desired, the source voltage V can be increased accordingly. S Additionally, in some implementations, the bypass switch gate driver signal GATE is used. BP The width of the failure portion of 220 has been widened to accommodate wider pulses.

[0046] Figure 3 Some implementation schemes are shown and, as referenced Figures 2A to 2C The aforementioned for Figures 1A to 1B This is a portion of an exemplary switching sequence 300 for the operation of the pulsed laser diode drivers 101 to 103 shown. However, the switching sequence 300 is similar to or the same as corresponding switching sequences related to the operation of other embodiments of the pulsed laser diode drivers disclosed herein, including but not limited to pulsed laser diode drivers 401 to 404, 501 to 504, 601 to 604, 701 to 705, 801 to 802, and 901 to 902.

[0047] At pre-charging step 301, bypass switch M BP and laser diode switch M DL Turn off (i.e., not conducting). During pre-charge step 301, the source capacitor C S Through the source resistor R S Charging. At pre-magnetic flux step 302, bypass switch M... BP and laser diode switch M DL The circuit transitions to the ON state, thereby allowing current i LS Flow through inductor L S To store energy in the form of magnetic flux in inductor L S Even at the pre-flux step 302, the two switches (M) DL M BP All are in the ON state, because it is necessary to overcome the laser diode D L The bandgap voltage is used to allow current to flow through the laser diode D. L via bypass switch M BP The bypass path will also carry all current i LS .

[0048] In some implementations, in the bypass switch M BP After being switched to the ON state, the laser diode switch M DL It is switched to the ON state. At pulse generation step 303, the laser diode switch M is... DL While maintaining the ON state, bypass switch M BP It is switched to the off state, thereby generating power through the laser diode D. L High current pulse. When bypass switch M BP When it transitions to the off state, in the laser diode D L The voltage at the anode rises rapidly until the laser diode D... L The bandgap voltage is overcome, and the laser diode D L Until current conduction begins. Due to the bypass capacitor C BP and laser diode D L parasitic inductance L DLThe formed resonant circuit, in laser diode D L The voltage formed at the anode will be advantageously increased to overcome the limitations of laser diode D. L The required voltage for the bandgap voltage, and it will typically be higher than the source voltage V. S .

[0049] At discharge step 304, bypass switch M BP and laser diode switch M DL Maintaining the ON state to draw from the source capacitor C S The charge at the point is reduced, thereby decreasing the charge through the parasitic inductance L. DL current i DL In the laser diode switch M DL When switched to the off state, it advantageously eliminates the laser diode D. L The high voltage spike at the anode. At step 305, the bypass switch M... BP and laser diode switch M DL The circuit transitions to the off state, thus returning to the pre-charge state at step 301. This is because at the end of discharge step 304, the source capacitor C... S Source voltage V at the location S Completely discharged, therefore through laser diode D L The current is very small. Therefore, when switch M is switched at step 305... DL M BP When transitioning to the off state, advantageously, there is almost no overshoot, thereby preventing damage to the laser diode D. L and switch M DL M BP Damage. In some implementations, the time interval between the overall pulse signal and the bypass signal is selected such that at step 305, switch M... DL M BP Before transitioning to the off state, the source capacitor C S It was completely discharged.

[0050] Other topologies of pulsed laser drivers that have the same or similar advantages as pulsed laser diode drivers 101 to 103 and have similar operation are disclosed below. The exemplary topologies disclosed herein are not an exhaustive list of possible topologies that have the same or similar advantages as pulsed laser diode drivers 101 to 103 and similar operation. For example, those skilled in the art will understand that some modifications can be made while still adhering to the general operating principles disclosed herein. Such modifications include arranging bypass capacitor C. BP Component values ​​and the addition of series components that provide a DC current path.

[0051] Figures 4A to 4DThis is a simplified circuit diagram of pulsed laser diode drivers 401 to 404 according to some embodiments of a second general topology configured to drive two or more laser diodes in a common anode arrangement. Pulsed laser diode drivers 401 to 404 typically each include a source resistor R. S Source capacitor C S Damping resistor R Damp Inductor L S Bypass capacitor C BP Two or more laser diodes D L 1 To D L n and bypass switch M BP Pulsed laser diode drivers 401 to 402 each contain two or more laser diode switches M. DL 1 To M DL n The pulsed laser diode drivers 403 to 404 contain a single laser diode switch M. DL 1 .

[0052] The controller 120, nodes 410 and 412, and laser diode D are also shown. L 1 To D L n The corresponding parasitic inductance L DL 1 To L DL n DC input voltage V in Source capacitor C S Source voltage V at the location S Through inductor L S current i LS Through laser diode D L 1 To D L n The corresponding current i DL 1 to i DL n and bypass switch gate driver signal GATE BP The pulsed laser diode drivers 401 to 402 each utilize the corresponding laser diode switching gate driver signal GATE. DL 1 To GATE DL n The pulsed laser diode drivers 403 to 404 use a single laser diode to switch the gate driver signal GATE. DL1 The electrical connections of pulsed laser diode drivers 401 to 404 are similar to or the same as those described for pulsed laser diode drivers 101 to 103. The topology of pulsed laser diode drivers 401 to 404 relative to the bypass capacitor C... BP The arrangement changes accordingly.

[0053] As in Figure 4A Pulsed laser diode driver 401 and Figure 4D As shown in the simplified circuit diagram of the pulsed laser diode driver 404, in some embodiments, the bypass capacitor C BP The first terminal is directly electrically connected to the inductor L S The second terminal and laser diode D L 1 To D L n The anode. In such implementations, the bypass capacitor C... BP The second terminal is directly electrically connected to the bias voltage node. For example, in... Figures 4B to 4C As shown in the simplified circuit diagram of the pulsed laser diode drivers 402 to 403, in some embodiments, the bypass capacitor C BP The first terminal is directly electrically connected to the inductor L S The second terminal and laser diode D L 1 -D L n The corresponding anode. In such embodiments, the bypass capacitor C BP The second terminal is directly electrically connected to the source capacitor C. S The second terminal and damping resistor R Damp The first terminal. In some implementations, the DC input voltage V in Inductor L S Inductance, source capacitor C S Capacitors and damping resistors R Damp The resistor and bypass capacitor C BP The capacitance value is similar to or the same as the corresponding value described in reference pulsed laser diode drivers 101 to 103. However, the DC input voltage V can be advantageously selected. in Inductor L S Inductance, source capacitor C S Capacitors and damping resistors R Damp The resistor and bypass capacitor C BPThe capacitance value is determined to achieve the desired operation of the pulsed laser diode drivers 401 to 404 (e.g., charging time, pulse width, pulse voltage, pulse current level). The operation of the pulsed laser diode drivers 401 to 404 is similar to or the same as the operation of the pulsed laser diode drivers 101 to 103, as per [reference to...]. Figures 2A to 2D Simplified curves 201 to 206 and Figure 3 The exemplary switching sequence 300 shown is described in detail.

[0054] In some implementations, controller 120 is configured to determine how many laser diodes D are present. L 1 To D L n Simultaneously activated and adjusted DC input voltage V according to the determination of the required current supply. in The voltage level (e.g., using a digitally adjustable voltage source controlled by a digital control signal from controller 120 (described below)).

[0055] Figures 5A to 5D This is a simplified circuit diagram of pulsed laser diode drivers 501 to 504 according to a third general topology of some embodiments, which is configured to drive the laser diode using a high-side switch. Pulsed laser diode drivers 501 to 504 typically each include a source resistor R. S Source capacitor C S Damping resistor R Damp Inductor L S Bypass capacitor C BP Laser diode D L Bypass switch M BP and laser diode switch M DL Laser diode switch M DL It has been configured as a high-side switch.

[0056] The controller 120, nodes 510 and 512, and laser diode D are also shown. L parasitic inductance L DL DC input voltage V in Source capacitor C S Source voltage V at the location S Through inductor L S current i LS Through laser diode D L current i DL Bypass switch gate driver signal GATE BP and laser diode switching gate driver signal GATE DLMost of the electrical connections of the pulsed laser diode drivers 501 to 504 are similar to or the same as those described for pulsed laser diode drivers 101 to 103. However, unlike the low-side configuration of the pulsed laser diode drivers 101 to 103, the laser diode switch M... DL The drain node is directly connected to the inductor L. S The second terminal and bypass switch M BP The drain node. Laser diode switch M DL The source node is directly electrically connected to the laser diode D. L The anode, and the laser diode D L The cathode is directly electrically connected to the bias voltage node. The topology of the pulsed laser diode drivers 501 to 504 relative to the bypass capacitor C... BP The arrangement changes accordingly.

[0057] As in Figure 5A As shown in the simplified circuit diagram of the pulsed laser diode driver 501, in some embodiments, the bypass capacitor C BP The first terminal is directly electrically connected to the inductor L S The second terminal and laser diode switch M DL The drain node. In such implementations, the bypass capacitor C... BP The second terminal is directly electrically connected to the bias voltage node. For example, in... Figure 5B As shown in the simplified circuit diagram of the pulsed laser diode driver 502, in some embodiments, the bypass capacitor C BP The first terminal is directly electrically connected to the laser diode switch M. DL Source node and laser diode D L The anode. In such implementations, the bypass capacitor C... BP The second terminal is directly electrically connected to the bias voltage node. For example, in... Figure 5C As shown in the simplified circuit diagram of the pulsed laser diode driver 503, in some embodiments, the bypass capacitor C BP The first terminal is directly electrically connected to the inductor L S Second terminal, bypass switch M BP Drain node and laser diode switch M DL The drain node. In such implementations, the bypass capacitor C... BP The second terminal is directly electrically connected to the source capacitor C. S The second terminal and damping resistor R Damp The first terminal. As in Figure 5D As shown in the simplified circuit diagram of the pulsed laser diode driver 504, in some embodiments, the bypass capacitor C BPThe first terminal is directly electrically connected to the laser diode switch M. DL Source node and laser diode D L The anode. In such implementations, the bypass capacitor C... BP The second terminal is directly electrically connected to the source capacitor C. S The second terminal and damping resistor R Damp The first terminal.

[0058] Figures 6A to 6D This is a simplified circuit diagram of pulsed laser diode drivers 601 to 604 according to some embodiments of a fourth general topology, which is configured to drive two or more laser diodes using a high-side switch in a common cathode configuration. Pulsed laser diode drivers 601 to 604 typically each include a source resistor R. S Source capacitor C S Damping resistor R Damp Inductor L S Bypass capacitor C BP Bypass switch M BP Two or more laser diodes D L 1 To D L n and two or more corresponding laser diode switches M DL 1 To M DL n .

[0059] The controller 120, nodes 610, 612, 614, and laser diode D are also shown. L 1 To D L n The corresponding parasitic inductance L DL 1 To L DL n DC input voltage V in Source capacitor C S Source voltage V at the location S Through inductor L S current i LS Through laser diode D L 1 To D L n The corresponding current i DL 1 to i DL n Bypass switch gate driver signal GATE BP and laser diode switch M DL1 To M DL n The corresponding laser diode switch gate driver signal GATE DL 1 To GATE DL n .

[0060] Most of the electrical connections of the pulsed laser diode drivers 601 to 604 are similar to or the same as those described for pulsed laser diode drivers 501 to 504. However, regarding the bypass capacitor C... BP The topologies of the pulsed laser diode drivers 601 to 604 are different from each other.

[0061] As in Figure 6A As shown in the simplified circuit diagram of the pulsed laser diode driver 601, in some embodiments, the bypass capacitor C BP The first terminal is directly electrically connected to the inductor L S The second terminal and the laser diode switch M DL 1 To M DL n and bypass switch M BP The corresponding drain node. In this type of implementation, the bypass capacitor C BP The second terminal is directly electrically connected to the bias voltage node. For example, in... Figure 6B As shown in the simplified circuit diagram of the pulsed laser diode driver 602, in some embodiments, the bypass capacitor C BP The first terminal is directly electrically connected to the laser diode switch (M is shown). DL n The source node of either of the two and coupled to the laser diode switch (shown as D) L n The anode of the laser diode. In such implementations, the bypass capacitor C BP The second terminal is directly electrically connected to the bias voltage node. In some implementations, multiple bypass capacitors C are used. BP Each of the bypass capacitors is connected across the corresponding laser diode. For example, in Figure 6C As shown in the simplified circuit diagram of the pulsed laser diode driver 603, in some embodiments, the bypass capacitor C BP The first terminal is directly electrically connected to the inductor L S The second terminal and the laser diode switch M DL 1 To M DL n and bypass switch M BPThe corresponding drain node. In this type of implementation, the bypass capacitor C BP The second terminal is directly electrically connected to the source capacitor C. S The second terminal and damping resistor R Damp The first terminal. As in Figure 6D As shown in the simplified circuit diagram of the pulsed laser diode driver 604, in some embodiments, the bypass capacitor C BP The first terminal is directly electrically connected to the laser diode switch (M is shown). DL 1 The source node of either of them and coupled to the laser diode switch (shown as D) L 1 The anode of the laser diode. In such implementations, the bypass capacitor C BP The second terminal is directly electrically connected to the source capacitor C. S The second terminal and damping resistor R Damp The first terminal. In some implementations, multiple bypass capacitors C are used. BP The bypass capacitor C BP Each of them has a first terminal directly electrically connected to the corresponding anode of each laser diode and directly electrically connected to the source capacitor C. S The second terminal and damping resistor R S The second terminal of the first terminal.

[0062] In some implementations, controller 120 is operable to determine how many laser diodes D are present. L 1 To D L n Simultaneously activated and adjusted DC input voltage V according to the determination of the required current supply. in The voltage level (e.g., using a digitally adjustable voltage source controlled by a digital control signal from controller 120 (described below)).

[0063] Figures 7A to 7E This is a simplified circuit diagram of pulsed laser diode drivers 701 to 705 according to some embodiments of a fifth general topology configured to drive the laser diode using a half-bridge configuration. Pulsed laser diode drivers 701 to 704 typically each include a source resistor R. S Source capacitor C S Damping resistor R Damp Inductor L S Bypass capacitor C BP Bypass switch M BP Laser diode D L and laser diode switch MDL The pulsed laser diode driver 705 also includes two or more laser diodes D. L 1 To D L n Instead of a single laser diode D L The two or more laser diodes D L 1 To D L n Each of them has a corresponding parasitic inductance L DL 1 To L DL n and the corresponding current representation i DL 1 to i DL n However, the pulsed laser diode driver 705 lacks support for two or more laser diodes D. L 1 To D L n Independent control.

[0064] The controller 120, nodes 710 and 712, and laser diode D are also shown. L parasitic inductance L DL DC input voltage V in Source capacitor C S Source voltage V at the location S Through inductor L S current i LS Through laser diode D L current i DL Through two or more laser diodes D L 1 To D L n current i DL 1 to i DL n Bypass switch gate driver signal GATE BP and laser diode switch M DL laser diode switch gate driver signal GATE DL .

[0065] Most of the electrical connections of the pulsed laser diode drivers 701 to 704 are similar to or the same as those described for pulsed laser diode drivers 501 to 503. However, unlike the high-side configuration of the pulsed laser diode drivers 501 to 503, the bypass switch M... BP The drain node is directly electrically connected to the laser diode switch M.DL Source node and laser diode D L The anode. Bypass switch M BP The source node is directly electrically connected to the bias voltage node. Therefore, as shown in the simplified circuit diagrams of pulsed laser diode drivers 701 to 704, the bypass switch M can be used to bypass the bias voltage node. BP and laser diode switch M DL A half-bridge configuration to drive the laser diode D L The topology of pulsed laser diode drivers 701 to 704 relative to the bypass capacitor C BP The arrangement changes accordingly.

[0066] As in Figure 7A As shown in the simplified circuit diagram of the pulsed laser diode driver 701, in some embodiments, the bypass capacitor C BP The first terminal is directly electrically connected to the inductor L S The second terminal and laser diode switch M DL The drain node. In such implementations, the bypass capacitor C... BP The second terminal is electrically connected to the bias voltage node. For example, in... Figure 7B As shown in the simplified circuit diagram of the pulsed laser diode driver 702, in some embodiments, the bypass capacitor C BP The first terminal is directly electrically connected to the laser diode switch M. DL The source node and bypass switch M BP Drain node and laser diode D L The anode. In such implementations, the bypass capacitor C... BP The second terminal is directly electrically connected to the bias voltage node. For example, in... Figure 7C As shown in the simplified circuit diagram of the pulsed laser diode driver 703, in some embodiments, the bypass capacitor C BP The first terminal is directly electrically connected to the inductor L S The second terminal and laser diode switch M DL The drain node. In such implementations, the bypass capacitor C... BP The second terminal is directly electrically connected to the source capacitor C. S The second terminal and damping resistor R Damp The first terminal. As in Figure 7D As shown in the simplified circuit diagram of the pulsed laser diode driver 704, in some embodiments, the bypass capacitor C BP The first terminal is directly electrically connected to the laser diode switch M. DL The source node and bypass switch M BP Drain node and laser diode D LThe anode. In such implementations, the bypass capacitor C... BP The second terminal is directly electrically connected to the source capacitor C. S The second terminal and damping resistor R Damp The first terminal.

[0067] like Figure 7E As shown in the simplified circuit diagram of the pulsed laser diode driver 705, two or more laser diodes D L 1 To D L n It can be simultaneously controlled by bypass switch M BP and laser diode switch M DL The half-bridge configuration is driven. In the example shown, the bypass capacitor C... BP The first terminal is directly electrically connected to the inductor L S The second terminal, and the bypass capacitor C BP The second terminal is directly electrically connected to the source capacitor C. S The second terminal and damping resistor R Damp The first terminal. However, a bypass capacitor C can be used. BP Other configurations, such as reference Figures 7A to 7D The configuration described.

[0068] Figures 8A to 8B This is a simplified circuit diagram of pulsed laser diode drivers 801 to 802 according to a sixth general topology of some embodiments, which is configured to drive the laser diode using a high-side switch. Pulsed laser diode drivers 801 to 802 typically include a source resistor R. S Source capacitor C S Damping resistor R Damp Inductor L S Bypass capacitor C BP Laser diode D L Bypass switch M BP and laser diode switch M DL The controller 120, nodes 810 and 812, and laser diode D are also shown. L The corresponding parasitic inductance L DL DC input voltage V in Source capacitor C S Source voltage V at the location S Through inductor L S current i LS Through laser diode D L current i DL Bypass switch gate driver signal GATE BPand laser diode switching gate driver signal GATE DL The electrical connections of the pulsed laser diode driver 801 are similar to or the same as those described for the pulsed laser diode driver 101. The difference between pulsed laser diode drivers 801 and 802 is that the laser diode switch M... DL The drain node is directly electrically connected to the source resistor R. S The second terminal and source capacitor C S The first terminal. Laser diode switch M DL The source node is directly electrically connected to the inductor L S The first terminal. Laser diode D L The anode is directly electrically connected to the inductor L S The second terminal, and the laser diode D L The cathode is directly electrically connected to the bias voltage node. As shown in the figure, the pulsed laser diode drivers 801 to 802 are advantageously configured such that the laser diode switch M... DL Electrically connected to inductor L S With source capacitor C S Between. Therefore, when the bypass switch M is disabled. BP To generate through laser diode D L During high current pulses, the laser diode switch M DL The drain node does not receive in the inductor L S The high voltage spike formed at the second terminal.

[0069] Pulsed laser diode drivers 801 to 802 in bypass capacitor C BP The layouts differ. For example... Figure 8A As shown, in some implementations, the bypass capacitor C BP The first terminal is directly electrically connected to the inductor L S The second terminal, laser diode D L Anode and bypass switch M BP The drain node. In such implementations, the bypass capacitor C... BP The second terminal is directly electrically connected to the bias voltage node. For example... Figure 8B As shown, in some implementations, the bypass capacitor C BP The first terminal is directly electrically connected to the inductor L S The second terminal, laser diode D L Anode and bypass switch M BP The drain node. In such implementations, the bypass capacitor C... BP The second terminal is directly electrically connected to the source capacitor C. S The second terminal and damping resistor R Damp The first terminal.

[0070] In other embodiments, the inductor L in any of the pulsed laser diode drivers 801 to 802 can be interchanged. S and laser diode switch M DL The corresponding position of the inductor L makes the inductor L S The first terminal is directly electrically connected to the source capacitor C. S The first terminal, and the laser diode switch M DL The drain terminal is directly connected to the inductor L. S The second terminal.

[0071] Figures 9A to 9B This is a simplified circuit diagram of pulsed laser diode drivers 901 to 902 according to some embodiments of a seventh general topology configured to drive the laser diode using only a bypass switch. Pulsed laser diode drivers 901 to 902 typically include a source resistor R. S Source capacitor C S Damping resistor R Damp Inductor L S Bypass capacitor C BP Laser diode D L and bypass switch M BP Nodes 910 and 912, and laser diode D are also shown. L The corresponding parasitic inductance L DL DC input voltage V in Source capacitor C S Source voltage V at the location S Through inductor L S current i LS Through laser diode D L current i DL and bypass switch gate driver signal GATE BP The electrical connections of pulsed laser diode drivers 901 to 902 are similar to or the same as those described for pulsed laser diode driver 101. The difference between pulsed laser diode drivers 901 and 902 is the elimination of the laser diode switch M. DL Laser diode D L The anode is directly electrically connected to the inductor L S The second terminal, and the laser diode D L The cathode is directly electrically connected to the bias voltage node. In this type of implementation, the DC input voltage V in The voltage level is limited to no more than the laser diode D. L The forward bias voltage level of the laser diode D, thus temporarily disabling the current through the bypass switch. LIt remains in the off state (i.e., not conducting) until the inductor L S A voltage higher than the forward bias voltage is formed at the second terminal.

[0072] Pulsed laser diode drivers 901 to 902 in bypass capacitor C BP The layouts differ. For example... Figure 9A As shown, in some implementations, the bypass capacitor C BP The first terminal is directly electrically connected to the inductor L S The second terminal, laser diode D L Anode and bypass switch M BP The drain node. In such implementations, the bypass capacitor C... BP The second terminal is directly electrically connected to the bias voltage node. For example... Figure 9B As shown, in some implementations, the bypass capacitor C BP The first terminal is directly electrically connected to the inductor L S The second terminal, laser diode D L Anode and bypass switch M BP The drain node. In such implementations, the bypass capacitor C... BP The second terminal is directly electrically connected to the source capacitor C. S The second terminal and damping resistor R Damp The first terminal.

[0073] The embodiments of the pulsed laser diode driver disclosed herein are also operable to provide current pulses to a device other than a laser diode. For example, the embodiments of the pulsed laser diode driver disclosed herein are operable to provide current pulses to a light-emitting diode (i.e., a non-laser LED). Additionally, the embodiments of the pulsed laser diode driver disclosed herein are operable to provide current pulses to another circuit or device that does not have a laser diode, said circuit or device being configured to receive current pulses for a purpose other than emitting light.

[0074] In some embodiments, two or more examples of the laser diode drivers disclosed herein are configured to drive a corresponding laser diode. For example, four instances of the pulsed laser diode driver 802 can be used to drive a laser diode package containing four laser diodes. In such embodiments, each laser diode in the laser diode package is driven by an instance of the pulsed laser diode driver 802.

[0075] Figures 10A to 10B This is a simplified circuit diagram of a pulsed laser diode driver 1002 / 1004 according to an eighth general topology configured for individual control of multiple laser diodes in multiple channels, according to some implementation schemes. Figure 10A The multichannel pulsed laser diode driver 1002 shown is configured to independently drive n laser diodes, where n is a number in the range from 2 to 128 or greater. The multichannel pulsed laser diode driver 1002 is operable to emit pulses from any individual laser diode of the multichannel pulsed laser diode driver 1002 individually or in combination with one or more other pulses emitted from other laser diodes of the multichannel pulsed laser diode driver 1002. The multichannel pulsed laser diode driver 1002 typically includes n source resistors Rs coupled as shown. 1 To Rs n n source capacitors C S 1 To C S n Optional damping resistor R Damp n inductors Ls 1 To Ls n n bypass switches M BP 1 To M BP n n bypass capacitors C BP 1 To C BP n n laser diodes D L 1 To D L n and laser diode switch M DL The controller 120 and laser diode D discussed above are also shown. L 1 To D L n The corresponding parasitic inductance L DL 1 To L DL n Inductor Ls 1 To Ls n The corresponding current i LS 1 to i LS n Laser diode D L 1 To D L n The corresponding current i DL 1 to i DL n and DC input voltage V in In some implementations, the damping resistor R Damp Used for current measurement purposes, and can be achieved by connecting the source capacitor CS 1 To C S n Each of them is connected to ground to omit the connection. In some implementations, bypass switch M BP 1 To M BP n and laser diode switch M DL Each is an N-type FET switch, and due to their respective low-side configuration, they advantageously do not require bootstrap circuitry to drive the respective gates of the switches.

[0076] Source resistor Rs 1 Source capacitor C S 1 Inductor Ls 1 Bypass switch M BP 1 Bypass capacitor C BP 1 and laser diode D L 1 Associated with the first channel of the multi-channel pulsed laser diode driver 1002. Similarly, the source resistor Rs n Source capacitor C S n Inductor Ls n Bypass switch M BP n Bypass capacitor C BP n and laser diode D L n Associated with the nth channel of the multi-channel pulsed laser diode driver 1002, where n is a number greater than one (e.g., two, three, four, eight, 16, 32, 64, 128, etc.). This is achieved by combining control of the laser diode switch M. DL The switching timing is used to control (e.g., via controller 120) the bypass switch M. BP 1 To M BP n The individual switching timings (i.e., on / off durations) are used to advantageously and independently control the laser diode D. L 1 To D L n Each of the following. Operation and reference for each channel of the multi-channel pulsed laser diode driver 1002. Figure 1A The pulsed laser diode driver 101 described herein Figure 3 The operation of the switching sequence 300 shown is similar or identical. Due to the bypass switch M... BP 1 To M BPn Each of them and the laser diode switch M DL Configured as a low-side switch (i.e., the source node of each of the aforementioned switches is directly electrically connected to ground), a bootstrap circuit is not required to horizontally shift the gate control signal of the switch, thereby advantageously simplifying the design and reducing the cost of the multichannel pulsed laser diode driver 1002 compared to laser diode driver circuits that require a bootstrap circuit.

[0077] Figure 10B An exemplary embodiment of a four-channel (i.e., n=4) multi-channel pulsed laser diode driver 1004 is shown. The multi-channel pulsed laser diode driver 1004 is operable to independently drive four laser diodes. That is, the multi-channel pulsed laser diode driver 1004 is operable to emit pulses from any individual laser diode of the multi-channel pulsed laser diode driver 1004 individually or in combination with one or more other pulses emitted from other laser diodes of the multi-channel pulsed laser diode driver 1004. The multi-channel pulsed laser diode driver 1004 typically includes four source resistors Rs directly electrically connected as shown. 1 To Rs 4 Four source capacitors Cs 1 To Cs 4 Optional damping resistor R Damp Four inductors Ls 1 To Ls 4 Four bypass switches M BP 1 To M BP 4 Four bypass capacitors C BP 1 To C BP 4 Four laser diodes D L 1 To D L 4 and laser diode switch M DL The controller 120 and the laser diode D are also shown. L 1 To D L 4 The corresponding parasitic inductance L DL 1 To L DL 4 DC input voltage V in Nodes 1011 to 1014 and nodes 1021 to 1024. In some implementations, the damping resistor R Damp Used for current measurement purposes, and can be achieved by connecting the source capacitor C S 1To C S 4 Each of them is connected to ground to omit the connection. In some implementations, the bypass capacitor C BP 1 To C BP 4 Connected to laser diode D L 1 To D L 4 The cathode. In some implementations, the bypass switch M BP 1 To M BP 4 and laser diode switch M DL Each is an N-type FET switch, and as described above, advantageously, no bootstrap circuit is required to drive the respective gate of the switch.

[0078] Source resistor Rs 1 Source capacitor C S 1 Inductor Ls 1 Bypass switch M BP 1 Bypass capacitor C BP 1 and laser diode D L 1 Associated with the first channel of the multi-channel pulsed laser diode driver 1004; source resistor Rs 2 Source capacitor C S 2 Inductor Ls 2 Bypass switch M BP 2 Bypass capacitor C BP 2 and laser diode D L 2 Associated with the second channel of the multi-channel pulsed laser diode driver 1004; source resistor Rs 3 Source capacitor C S 3 Inductor Ls 3 Bypass switch M BP 3 Bypass capacitor C BP 3 and laser diode D L 3 Associated with the third channel of the multi-channel pulsed laser diode driver 1004, and the source resistor Rs 4 Source capacitor C S 4 Inductor Ls 4Bypass switch M BP 4 Bypass capacitor C BP 4 and laser diode D L 4 Associated with the fourth channel of the multi-channel pulsed laser diode driver 1004. Laser diode switch M DL Associated with each of the channels in the multi-channel pulsed laser diode driver 1004.

[0079] As described above, each channel of the multi-channel pulsed laser diode driver 1004 has an associated source resistor, source capacitor, inductor, bypass switch, bypass capacitor, and laser diode. This is achieved by combining the control of the laser diode switch M... DL The switching timing is used to control (e.g., via controller 120) the bypass switch M. BP 1 To M BP 4 The individual switching timings (i.e., on / off durations) are used to advantageously and independently control the laser diode D. L 1 To D L 4 Each of them.

[0080] Operation and reference of each channel of the multi-channel pulsed laser diode driver 1004 Figure 1A The pulsed laser diode driver 101 described herein Figure 3 The operation of the switching sequence 300 shown is similar or identical. A channel of the multi-channel pulsed laser diode driver 1004 is selected for output by turning off the bypass switch of said channel (e.g., via controller 120), while the laser diode switch M... DL Disconnecting the DC input voltage V in The source capacitor of the channel is charged to a desired voltage level to store energy in the source capacitor (e.g., Figure 3 Step 301). After the desired voltage level is reached at the source capacitor, the bypass switch of the selected channel is turned on (e.g., via controller 120), causing current to accumulate in the inductor of the channel between the bypass switch of the channel and the source capacitor of the channel (e.g., Figure 3 Step 302). If the bypass switch of the channel is subsequently turned off within a short period of time and the laser diode switch M... DL When switched on, the inductor current of the channel will resonate with the anode capacitance of the laser diode in the channel, thereby generating a voltage across the laser diode that is higher than the DC input voltage V. in The voltage will force the resulting current to flow through the laser diode in the channel (e.g., Figure 3 Step 303) is to emit a laser pulse. In some implementations, a similar process can be performed. Figure 3 The discharge sequence in step 304 allows the bypass switch and laser diode switch M of the channel to be switched on subsequently. DL Both. By sequentially selecting each channel of the multi-channel laser diode driver 1004, pulses can be applied independently to the laser diodes of said channels. Deselecting a channel of the multi-channel pulsed laser diode driver 1004 allows pulses to be applied via... Figure 3 Each of steps 301 to 305 shown keeps the bypass switch of the channel on (e.g., via controller 120) to output, thereby preventing the DC input voltage V from being released. in The source capacitor of the channel is charged.

[0081] Figure 11 Figure 1102 shows a simplified exemplary waveform 1102 of a signal related to the operation of a multichannel pulsed laser diode driver 1004 according to some embodiments. Extended regions of interest 1104, 1106, 1108, and 1110 of Figure 1101 and waveform 1102 are also shown.

[0082] As shown in Figure 1101, Figure 11 The simplified waveform 1102 contains the laser diode switching gate driver signal Gate over a duration of 20 μs. DL First bypass switch gate driver signal Gate BP 1 Second bypass switch gate driver signal Gate BP 2 Third bypass switch gate driver signal Gate BP 3 and the fourth bypass switch gate driver signal Gate BP 4 . refer to Figure 10B Laser diode switch gate driver signal Gate DL Operable to control laser diode switch M DL First bypass switch gate driver signal Gate BP 1 Operable to control bypass switch M BP 1 Second bypass switch gate driver signal Gate BP 2 Operable to control bypass switch M BP 2 Third bypass switch gate driver signal Gate BP 3 Operable to control bypass switch MBP 3 And the fourth bypass switch gate driver signal Gate BP 4 Operable to control bypass switch M BP 4 .

[0083] Each of the extended regions of interest, 1104, 1106, 1108, and 1110, illustrates: a pre-flux interval for a selected channel during which the inductor current of the channel's inductor gradually increases; an extremely short pulse interval during which the current through the inductor of the channel is guided through a laser diode of the channel; and according to reference... Figure 3 The discharge intervals of steps 301 to 305 are described above. Based on the above description, region 1104 of interest shows the first channel (i.e., the laser diode D) for the multi-channel laser diode driver 1004. L 1 The pulse generation of the laser diode 1004 is shown in region 1106, which illustrates the second channel (i.e., the laser diode D) for the multi-channel laser diode driver 1004. L 2 The pulse generation of the laser diode 1004 is shown in region 1108, which illustrates the third channel (i.e., the laser diode D) for the multi-channel laser diode driver 1004. L 3 The pulse generation of the multi-channel laser diode driver 1004 is shown in region 1110, which illustrates the fourth channel (i.e., the laser diode D) of the multi-channel laser diode driver 1004. L 2 The pulse is generated.

[0084] Figure 12 The output was related to Figure 10B Additional simplified exemplary waveform 1202 for signals related to the operation of the multi-channel pulsed laser diode driver 1004. The simplified exemplary waveform includes waveforms 1211 to 1214, which illustrate the laser diode D at nodes 1011 to 1014. L 1 To D L 4 The corresponding anode voltage; and waveforms 1221 to 1224, which show the source capacitor C at nodes 1021 to 1024. S 1 To C S 4 The corresponding voltage. Waveforms 1231 to 1234 are also shown, which show when the corresponding channel of the multi-channel pulsed laser diode driver 1004 is enabled.

[0085] As shown in the figure, when the first channel of the multi-channel pulsed laser diode driver 1004 is enabled (as shown by waveform 1231), the laser diode D... L 1 The anode voltage 1211 at node 1011 is combined with the source capacitor C. S 1 The voltage rises at node 1021. This occurs when the laser diode switch M is enabled. DL And temporarily disable bypass switch M BP 1 At that time, current flows through laser diode D L 1 This is how laser pulses are emitted, as described above. Similarly, when the second channel of the multi-channel pulsed laser diode driver 1004 is enabled (as shown by waveform 1232), the laser diode D... L 2 The anode voltage 1212 at node 1012 is combined with the source capacitor C. S 2 The voltage rises at node 1022. This occurs when the laser diode switch M is enabled. DL And temporarily disable bypass switch M BP 2 At that time, current flows through laser diode D L 2 This allows laser pulses to be emitted as described above. The operation of the third and fourth channels of the multi-channel laser diode driver 1004 is similar.

[0086] The repetition rate of the multi-channel pulsed laser diode driver 1004 and each of the aforementioned pulsed laser diode drivers is limited by the charging time of the source capacitor for each channel. The aforementioned pulsed laser diode driver generates narrow (e.g., 1 to 5 nanoseconds) high-current pulses (e.g., 40 amps) via a driven laser diode. Therefore, the transient power of the driven laser diode is very high (e.g., approximately several hundred watts). However, for many applications (e.g., lidar), the duty cycle of the pulse is typically 0.01% or less to limit the total power dissipated in the laser diode, resulting in an upper limit on the repetition rate. In conventional laser diode driver applications, a resistor is used during each cycle to charge the charge storage (i.e., source) capacitor. In such conventional solutions, the RC time constant of such charging circuitry is generally not a problem because the duty cycle is very low. However, for applications requiring high laser pulse repetition rates, the RC time constant of conventional charging circuitry creates an undesirable limitation. In any embodiment disclosed herein, each source resistor of a given pulsed laser diode driver can advantageously be replaced by an actively controlled source switch that rapidly charges the associated source capacitor. The activation of the source switch is synchronized with the switching of one or more bypass switches and one or more laser diode switches of a given pulse laser diode driver, such that the source switch is enabled before the laser diode pulse generation interval. Figures 13A to 13I An example of a laser diode driver as previously described is provided, wherein the corresponding source resistor R S The active controlled source switch M S Instead, for the corresponding source capacitor C S Fast charging is achieved. In some implementations, the actively controlled source switch is advantageously implemented as a P-type switch that does not require a bootstrap circuit. Figures 13A to 13I The corresponding active controlled source switch M shown S Only during the pre-charge step (i.e., as referenced) Figure 3 During step 301) and therefore before the pre-flux step (i.e., as referenced) Figure 3 The process is initiated before step 302.

[0087] Figure 13A A first exemplary embodiment of a pulsed laser diode driver 1301 is shown, the pulsed laser diode driver 1301 having the above reference Figure 1A The pulsed laser diode driver 101 describes all components, signals, and nodes. Except... Figure 1A The source resistor R S In addition, the source resistor is in Figure 13A The gate control signal GATE has been advantageously controlled by the controller 120 (e.g., via the controller 120). S Source switch MS Replace with the source capacitor C S Perform fast charging. In other exemplary embodiments (not shown), Figure 1B The corresponding source resistor Rs of the pulsed laser diode driver 102 and Figure 1C The pulsed laser diode driver 103 is similarly replaced by a corresponding actively controlled source switch to control the corresponding source capacitor C of the laser diode drivers 102 / 103. S Perform fast charging.

[0088] Figure 13B A second exemplary embodiment of a pulsed laser diode driver 1302 is shown, the pulsed laser diode driver 1302 having the above reference Figure 4A The pulsed laser diode driver 401 describes all components, signals, and nodes. Except... Figure 4A In addition to the source resistor Rs, the source resistor is in Figure 13B The gate control signal GATE has been advantageously controlled by the controller 120 (e.g., via the controller 120). S Source switch M S Replace with the source capacitor C S Perform fast charging. In other exemplary embodiments (not shown), Figure 4B The corresponding source resistor Rs of the pulsed laser diode driver 402 Figure 4C Pulsed laser diode driver 403 and Figure 4D The pulsed laser diode driver 404 is similarly replaced by a corresponding actively controlled source switch to control the corresponding source capacitor C of the laser diode drivers 402 / 403 / 404. S Perform fast charging.

[0089] Figure 13C A third exemplary embodiment of a pulsed laser diode driver 1303 is shown, the pulsed laser diode driver 1303 having the above-mentioned reference. Figure 5A The pulsed laser diode driver 501 describes all components, signals, and nodes. Except... Figure 5A In addition to the source resistor Rs, the source resistor is in Figure 13C The gate control signal GATE has been advantageously controlled by the controller 120 (e.g., via the controller 120). S Source switch M S Replace with the source capacitor C S Perform fast charging. In other exemplary embodiments (not shown), Figure 5B The corresponding source resistor Rs of the pulsed laser diode driver 502 Figure 5C Pulsed laser diode driver 503 and Figure 5D The pulsed laser diode driver 504 is similarly replaced by a corresponding actively controlled source switch to control the corresponding source capacitor C of the laser diode drivers 502 / 503 / 504. S Perform fast charging.

[0090] Figure 13D A fourth exemplary embodiment of a pulsed laser diode driver 1304 is shown, the pulsed laser diode driver 1304 having the above reference. Figure 6A The pulsed laser diode driver 601 describes all components, signals, and nodes. Except... Figure 6A In addition to the source resistor Rs, the source resistor is in Figure 13D The gate control signal GATE has been advantageously controlled by the controller 120 (e.g., via the controller 120). S Source switch M S Replace with the source capacitor C S Perform fast charging. In other exemplary embodiments (not shown), Figure 6B The corresponding source resistor Rs of the pulsed laser diode driver 602 Figure 6C Pulsed laser diode driver 603 and Figure 6D The pulsed laser diode driver 604 is similarly replaced by a corresponding actively controlled source switch to control the corresponding source capacitor C of the laser diode drivers 602 / 603 / 604. S Perform fast charging.

[0091] Figure 13E A fifth exemplary embodiment of a pulsed laser diode driver 1305 is shown, the pulsed laser diode driver 1305 having the above reference Figure 7A The pulsed laser diode driver 701 describes all components, signals, and nodes. Except... Figure 7A In addition to the source resistor Rs, the source resistor is in Figure 13E The gate control signal GATE has been advantageously controlled by the controller 120 (e.g., via the controller 120). S Source switch M S Replace with the source capacitor C S Perform fast charging. In other exemplary embodiments (not shown), Figure 7B The corresponding source resistor Rs of the pulsed laser diode driver 702 Figure 7C 703 pulsed laser diode driver Figure 7D Pulsed laser diode driver 704 and Figure 7EThe pulsed laser diode driver 705 is similarly replaced by a corresponding actively controlled source switch to control the corresponding source capacitor C of the laser diode drivers 702 / 703 / 704 / 705. S Perform fast charging.

[0092] Figure 13F A sixth exemplary embodiment of a pulsed laser diode driver 1306 is shown, the pulsed laser diode driver 1306 having the above reference Figure 8A The pulsed laser diode driver 801 describes all components, signals, and nodes. Except... Figure 8A In addition to the source resistor Rs, the source resistor is in Figure 13F The gate control signal GATE has been advantageously controlled by the controller 120 (e.g., via the controller 120). S Source switch M S Replace with the source capacitor C S Perform fast charging. In other exemplary embodiments (not shown), Figure 8B The source resistor Rs of the pulsed laser diode driver 802 is similarly replaced by a corresponding actively controlled source switch to control the source capacitor C of the pulsed laser diode driver 802. S Perform fast charging.

[0093] Figure 13G A seventh exemplary embodiment of a pulsed laser diode driver 1307 is shown, the pulsed laser diode driver 1307 having the above reference Figure 9A The pulsed laser diode driver 901 describes all components, signals, and nodes. Except... Figure 9A In addition to the source resistor Rs, the source resistor is in Figure 13G The gate control signal GATE has been advantageously controlled by the controller 120 (e.g., via the controller 120). S Source switch M S Replace with the source capacitor C S Perform fast charging. In other exemplary embodiments (not shown), Figure 9B Similarly, the source resistor Rs of the laser diode driver 902 is replaced by a corresponding actively controlled source switch to control the source capacitor C of the laser diode driver 902. S Perform fast charging.

[0094] Figure 13H An eighth exemplary embodiment of a pulsed laser diode driver 1308 is shown, the pulsed laser diode driver 1308 having the above reference. Figure 10A The multi-channel pulsed laser diode driver 1002 describes all components, signals, and nodes. Except... Figure 10AThe source resistor R S 1 To R S n In addition, the source resistor is in Figure 13H The gate control signal GATE is already advantageously controlled by the corresponding active control (e.g., via controller 120). S 1 To GATE S n Source switch M S 1 To M S n Replace with the source capacitor C S 1 To C S n Perform fast charging.

[0095] Figure 13I A ninth exemplary embodiment of a pulsed laser diode driver 1309 is shown, the pulsed laser diode driver 1309 having the above reference Figure 10B The multi-channel pulsed laser diode driver 1004 describes all components, signals, and nodes. Except... Figure 10B The source resistor R S 1 To R S 4 In addition, the source resistor is in Figure 13I The gate control signal GATE is already advantageously controlled by the corresponding active control (e.g., via controller 120). S 1 To GATE S 4 Source switch M S 1 To M S 4 Replace with the source capacitor C S 1 To C S 4 Perform fast charging.

[0096] Figure 14 The diagram illustrates the relationship between [various implementation schemes] and [other schemes]. Figure 13I A simplified exemplary waveform 1402 is provided for signals related to the operation of the multi-channel pulsed laser diode driver 1309. The simplified exemplary waveform 1402 includes waveforms 1421 to 1424, which illustrate the operation of the multi-channel pulsed laser diode driver 1309. Figure 13I The cross-source capacitor C at nodes 1021 to 1024 S 1 To C S 4The corresponding voltages are also shown. Waveforms 1431 to 1434 are also shown, indicating when the corresponding channel of the multi-channel pulsed laser diode driver 1309 is activated, the frequency signal 1441, and the high-current pulses 1451 to 1455. As shown, the multi-channel pulsed laser diode driver 1309 is operable to emit high-current pulses 1451 to 1455 to drive the corresponding laser diode D. L 1 To D L 4 It emits a pulse every 10μs. Figures 13A to 13I The example shown is only configured to advantageously use the source switch (i.e., M). S ) to the source capacitor (i.e., C) S Example of selecting a pulsed laser diode driver circuit for fast charging. In some embodiments, any of the pulsed laser diode drivers 101 to 103, 401 to 404, 501 to 504, 601 to 604, 701 to 705, 801 to 802, 901 to 902, and 1002 to 1004 are configured to use a source switch (i.e., M...). S ) Replace the source resistor (i.e., R) S ) to the source capacitor (i.e., C S It can be used for fast charging.

[0097] Figure 15 A simplified circuit diagram of a pulsed laser diode driver 1501 according to a ninth general topology based on some embodiments is shown. The pulsed laser diode driver 1501 typically includes a source switch M. S Source capacitor C S Damping resistor R Damp Inductor L S Bypass capacitor C BP Laser diode D L Bypass switch M BP and flux switch M FLUX Magnetic flux switch M FLUX Configured as a low-side switch. Also shown are controller 120, node 110, and laser diode D. L parasitic inductance L DL DC input voltage V in Source capacitor C S Source voltage V at the location s Through inductor L S current i LS Through laser diode D L current i DL Bypass switch gate driver signal GATE BP and flux switch gate driver signal GATEFLUX .

[0098] like Figure 15 As shown, source switch M S The first terminal is directly electrically connected to the DC input voltage V. in In other embodiments (not shown), the source switch M S Source resistor R can be used S Replacement. Source switch M S The second terminal is directly electrically connected to the source capacitor C. S The first terminal. Source capacitor C S The second terminal is directly electrically connected to the bias voltage node (such as ground). Source switch M S The second terminal is directly electrically connected to the laser diode D. L Cathode, damping resistor R Damp First terminal, bypass capacitor C BP First terminal and inductor L S The first terminal. Damping resistor R Damp The second terminal is directly electrically connected to the flux switch M. FLUX The first terminal, and the flux switch M FLUX The second terminal is directly electrically connected to a bias voltage node (such as ground). Laser diode D L The anode is directly electrically connected to the bypass capacitor C. BP The second terminal, inductor L S The second terminal and bypass switch M BP The first terminal. Bypass switch M BP The second terminal is directly electrically connected to the bias voltage node (such as ground).

[0099] Bypass switch M BP Configured to receive the bypass switch gate driver signal GATE at the gate node. BP (For example, controller 120), bypass switch gate driver signal GATE BP Operable based on the bypass switch gate driver signal GATE BP The voltage level is used to turn the bypass switch M on or off. BP Source switch M S Configured to receive the source switch gate driver signal GATE at the gate node. S (For example, from controller 120), source switch gate driver signal GATE S Operable based on source-switched gate driver signal GATE S The voltage level connects or disconnects the source switch M S Similarly, the flux switch M FLUXConfigured to receive the flux-switched gate driver signal GATE at the gate node. FLUX (For example, controller 120), flux switch gate driver signal GATE FLUX Operable based on the flux-switched gate driver signal GATE FLUX The voltage level switches the magnetic flux switch M on or off. FLUX Bypass switch M BP Source switch M S and / or flux switch M FLUX Any or all of them can be implemented as an N-type switch or a P-type switch. In some implementations, the bypass switch M BP Source switch M S and / or flux switch M FLUX It is implemented as a silicon-based or silicon carbide-based field-effect transistor (FET).

[0100] In some implementations, the pulsed laser diode driver 1501 is configured to receive a DC input voltage V. in The DC input voltage ranges from approximately 10V to 20V, which is advantageously lower than the input voltage used by many conventional pulsed laser diode drivers. Inductor L S This refers to the physical components added to the pulsed laser diode driver 1501 (i.e., the opposite of the representation of parasitic inductance caused by components such as bonding wires or interconnects). Similarly, the bypass capacitor C BP This refers to the physical components added to the pulsed laser diode driver 1501 (i.e., the opposite of the representation of parasitic capacitance). One advantage of using physical inductors and capacitors instead of parasitic inductors and capacitors is that the inductor L can be easily modified by the designer or even the end user. S and bypass capacitor C BP The value of [value]. In contrast, conventional designs that rely on parasitic reactance may require redesign and / or relocation to change operating parameters.

[0101] As disclosed herein, the DC input voltage V can be advantageously selected (“tuned”). in Inductor L S Inductance, source capacitor C S Capacitors and damping resistors R Damp The resistor and bypass capacitor C BP The value of the capacitor is determined to achieve the desired operation of the pulsed laser diode driver 1501 (e.g., charging time, pulse width, pulse voltage, pulse current). For example, this can be achieved by adjusting the bypass capacitor C. BP The capacitance value is used to tune the current flowing through the laser diode D. L current i DL The pulse width. Flowing through laser diode DL current i DL The peak current level of the pulse can be adjusted by adjusting the supply capacitor C. S Source voltage V s To tune. The tunable source capacitor C S The capacitance value is adjusted to control the timing delay of the high-current pulse and the voltage across the laser diode D. L current i DL The upper limit range of the damping resistor R. Damp The resistance value depends on the supply capacitor C. S The capacitance value can be tuned within a range of values, such that at lower resistances, the lower frequency resonance of the pulsed laser diode driver disclosed herein is insufficiently damped (e.g., at approximately R0). Damp =0.1 ohms) or critically damped (e.g., at approximately R). Damp =0.4 ohms). Damping resistor R Damp Operable to prevent the current that generates the resonant waveform from becoming negative, thereby enabling the bypass switch M. BP Or flux switch M FLUX The body diode. Although for the critical damping case, through the laser diode D L current i DL The resulting maximum current level is relatively low, but this can be mitigated by increasing the DC input voltage V. in The voltage level can be used to easily adjust the current level.

[0102] In some implementations, the DC input voltage V in The voltage is approximately 15V, and the inductor L S The inductance is approximately 6nH, and the source capacitor C S The capacitance is approximately 100nF, and the damping resistor R Damp The resistance is approximately 0.1 ohms, and the bypass capacitor C BP The capacitance is approximately 1 nF. In some implementations, the controller 120 receives capacitance from the damping resistor R. Damp The voltage at the first terminal is used to provide voltage across the damping resistor R. Damp The current indication.

[0103] Typical resonant driver designs usually require a damping resistor to minimize ringing duration. However, compared to a resonant driver without a damping resistor, adding a damping resistor R... Damp This dissipates power, which can reduce the overall power efficiency of the design. Therefore, in some implementations, the pulsed laser diode driver 1501 advantageously allows current to flow through the damping resistor R. Damp During multiple portions of the critically damped ringing switching sequence (e.g., switching sequence 300), the damping resistor R flows.Damp And to prevent current from flowing through the unnecessary damping resistor R Damp During multiple parts of the switching sequence when damping ringing occurs, water flows through the damping resistor R. Damp The pulsed laser diode driver 1501 enables the magnetic flux switch M... FLUX And allow current to pass through the damping resistor R Damp And by disabling the flux switch M FLUX And to prevent current from flowing through the damping resistor R Damp Compared to pulsed laser diode driver circuits that allow current to flow through a damping resistor throughout the entire switching sequence, the current through the damping resistor R... Damp Such dynamic control of the current advantageously increases the overall power efficiency of the pulsed laser diode driver 1501.

[0104] During operation, the source capacitor C S By bypass switch M BP Through inductor L S Discharge. This configuration provides discharge via laser diode D. L The maximum peak current, but requires a series damping resistor R Damp To prevent prolonged ringing of the waveform. The bypass switch M will activate only after the ringing stops and the voltage and current reach zero. BP Only then can it be turned off. Unfortunately, it will only turn off as long as current flows through the damping resistor R. Damp Damping resistor R Damp This will dissipate power. Therefore, the pulsed laser diode driver 1501 switches the sequence (e.g., Figure 3 The initial pre-charge step of the switching sequence 300 (e.g., Figure 3 Step 301), Pre-flux step (e.g., Figure 3 Step 302) and pulse generation step (e.g., Figure 3 During step 303), prevent current from flowing through the damping resistor R. Damp This advantageously provides optimal power efficiency. However, after a high current pulse has been generated (e.g., in...), Figure 3 Step 303), flux switch M FLUX Allow current to flow through the damping resistor R Damp Residual ringing is removed by using the RLC network of the critically damped pulsed laser diode driver 1501.

[0105] In switching sequences (e.g., Figure 3 The pre-charge step of the switching sequence 300 (e.g., Figure 3 Step 301), Pre-flux step (e.g., Figure 3 Step 302) and pulse generation step (e.g., Figure 3Disable flux switch M during step 303) FLUX This results in an undamped LC network. However, after the pulse is generated, the flux switch M is activated. FLUX And the damping resistor R Damp A parallel RLC network is created to critically dampen ringing, thereby providing the pulsed laser diode driver 1501 with maximum power efficiency and fast recovery to begin the next switching sequence.

[0106] For example, Figures 16A to 16B The diagram illustrates the relationship between [various implementation schemes] and [other schemes]. Figure 15 Simplified graphs 1620a-b, 1621a-b, 1622a-b, 1623a-b, 1624a-b, and 1625a-b show the signals related to the operation of the pulsed laser diode driver 1501. Specifically, Figure 16A This shows that when the damping resistor (i.e., the damping resistor R) is... Damp The pulsed laser diode driver 1501 is insufficient to dampen the operation of the pulsed laser diode driver 1501 during ringing. In contrast, Figure 16B This shows that when the damping resistor (i.e., the damping resistor R) is... Damp Operation of the pulsed laser diode driver 1501 during ringing of the critically damped pulsed laser diode driver 1501.

[0107] refer to Figures 16A to 16B The simplified graph shows the bypass switch gate driver signal GATE. BP Voltage curves 1620a-b, flux switch gate driver signal GATE FLUX Voltage curves 1621a-b, through inductor L S current i LS The current curves in Figures 1622a-b, and the current curves through the laser diode D L current i DL Current curves in Figures 1623a-b, at the source capacitor C S Source voltage V at the location S The voltage curves in Figures 1624a-b and the voltage and current curves of the source voltage and current used to establish the scale of the curves are all within the same duration. Details of these signals are described below. For readability, the bypass switch gate driver signal GATE is used. BP Voltage curves 1620a-b and the gate driver signal GATE of the flux switch FLUX The voltage curves in Figures 1621a-b have been horizontally shifted, but they actually represent a low-voltage input. Additionally, the bypass switch gate driver signal GATE... BPVoltage curves 1620a-b and the gate driver signal GATE of the flux switch FLUX The voltage curves in Figure 1621a-b assume a flux switch M. FLUX and bypass switch M BP It is an NFET device. However, if a PFET device is used instead, the bypass switch gate driver signal GATE is used. BP 1620a-b and flux switch gate driver signal GATE FLUX The polarity reversal of 1621a-b.

[0108] exist Figure 16A In the example shown, reference Figure 15 Damping resistor R of pulsed laser diode driver 1501 Damp Use a 10-ohm resistor, where L S =6nH, and C BP =1nF, and L DL The damping is approximately 1 nH. As expected, the damping of waveforms 1622a and 1624a is very insufficient, as shown by long-term oscillations (i.e., "ringing"). As is known in this art, for a parallel RLC circuit, the damping coefficient d is expressed as:

[0109]

[0110] Therefore, if the critical damping waveform is desired, the damping resistor R can be determined by setting the damping coefficient d in Equation 1 to the value d = 1 and using the above value R to solve Equation 1. Damp The optimal resistance R value. Figure 16B In the example shown, the damping resistor R of the pulsed laser diode driver 1501 Damp A resistor value of 0.175 ohms was used. As expected, waveforms 1622b and 1624b were thus critically damped, as shown by the absence of long-term oscillations (i.e., "ringing").

[0111] In some implementations, the damping resistor R can be eliminated by using a weak switch with an on-resistance Rdson. Damp The on-resistance is approximately the desired resistance value determined using Equation 1. In such embodiments, if it is desired to adjust the resistance value, a segmented FET can be used to thereby allow modification of the on-resistance Rdson to match the desired damping resistance.

[0112] Additionally, although it initially appears that the source capacitor C S With laser diode D L A series arrangement will increase the required anode voltage for the laser diode D. L A pulse is applied, but the source capacitor C SThe voltage and current are 90 degrees out of phase with each other. As shown in waveforms 1624a-b, due to the laser diode D... L The current pulses (i.e., 1623a-b) advantageously coincide with the peak current amplitude, thus at the source capacitor C S The voltage at that point was zero due to a 90-degree phase shift. In some implementations, the start of a high-current pulse can be initiated by sensing the source capacitor C. S Source voltage V at the location S The point at which the current is zero should be used to start passing a high-current pulse through the laser diode D. L .

[0113] For some applications, the amplitude of the high-current pulses delivered by a resonant circuit (such as any of the resonant circuits disclosed herein) may need to be adjusted between pulses. Therefore, in some embodiments, any pulsed laser diode driver disclosed herein can advantageously operate to configure the amplitude of the high-current pulses delivered to one or more laser diodes pulse by pulse.

[0114] like Figure 17 , Figure 18 , Figure 19 and Figure 20 As shown, the DC input voltage V in Advantageously provided by an adjustable voltage supply (i.e., a digital-to-analog converter (DAC)). In some implementations, a controller 120 is used to set the output voltage level of the adjustable voltage supply. For example, Figure 17 It shows the relationship with Figure 1A The pulsed laser diode driver 101 shown is the same as the pulsed laser diode driver circuit 1701, except that the DC input voltage V is generated by the DAC 1730. in In addition. Figure 18 It shows the relationship with Figure 13A The pulsed laser diode driver 1301 shown is the same as the pulsed laser diode driver circuit 1801, except that the DC input voltage V is generated by the DAC 1830. in In addition. Figure 19 It shows the relationship with Figure 13H The pulsed laser diode driver 1308 shown is the same pulsed laser diode driver circuit 1901 as the DAC 1930, except that the DC input voltage V is generated by the DAC 1930. in In addition. Figure 20 It shows the relationship with Figure 15 The pulsed laser diode driver 1501 shown is the same as the pulsed laser diode driver circuit 2001, except that the DC input voltage V is generated by the DAC2030. in In addition. Figure 17 , Figure 18 , Figure 19 and Figure 20 The examples shown are merely selection examples of pulsed laser diode driver circuits configured to receive a DC input voltage from an adjustable voltage source (e.g., a DAC or a different adjustable voltage source known in this art). In some embodiments, any of the pulsed laser diode drivers 101 to 103, 401 to 404, 501 to 504, 601 to 604, 701 to 705, 801 to 802, 901 to 902, 1002 to 1004, 1301 to 1309, and / or 1501 are configured to receive a DC input voltage V from an adjustable voltage source such as a DAC. in .

[0115] Due to the advantageous low input voltage requirement of such implementations, adjustable voltage suppliers (such as DACs) are used to convert the DC input voltage V... in The pulsed laser diode driver circuit disclosed herein is possible. In some embodiments, the adjustable voltage supply is timed such that the adjustable voltage supply is applied to the source capacitor C described herein only during the first portion (e.g., the positive portion) of the clock cycle. S Charging. Therefore, it is advantageous to vary the DC input voltage V of the high-current pulses delivered to the laser diode disclosed herein between successive high-current pulses. in And the value of the current amplitude.

[0116] Figures 21A to 21B The diagram illustrates the relationship between [various implementation schemes] and [other schemes]. Figure 17 , Figure 18 , Figure 19 and Figure 20 The simplified curves of the signals related to the operation of the pulsed laser diode driver are shown in Figures 2102a-b, 2104a-b, and 2106a-b.

[0117] Figure 21A Includes high-current pulse 2102a (i.e., through laser diode D) L ), in the source capacitor C S Source voltage V at the location S 2106a and provides DC input voltage V in An example of a linearly varying supply voltage 2106a for a variable input voltage supply (e.g., a DAC). As shown, the current amplitude of the high-current pulse 2102a advantageously varies between pulses.

[0118] Figure 21B Includes high-current pulse 2102b (i.e., through laser diode D) L ), in the source capacitor C S Source voltage V at the location S2106b, and provides DC input voltage V in An example of a stepped supply voltage for a variable input voltage supply source (e.g., a DAC). As shown, the current amplitude of the high-current pulse 2102b advantageously varies between pulses. Although the output voltage of the variable input voltage supply changes quickly, the source capacitor C... S The source voltage level V at the location S The change 2106b is affected by the source capacitor C S The time constant and input switch (e.g., the source switch M mentioned above) S ) or input resistor (e.g., the source resistor R described above). S The on-resistance is limited by the resistance.

[0119] Reference has been made in detail to various embodiments of the invention, one or more examples of which have been shown in the accompanying drawings. Each example has been provided by way of illustration and not as a limitation thereof. In fact, although this specification has been described in detail with respect to specific embodiments of the invention, it should be understood that, upon understanding the foregoing, alternatives, variations and equivalents to these embodiments will readily occur to those skilled in the art. For example, a feature shown or described as part of one embodiment may be used with another embodiment to produce yet another embodiment. Therefore, it is intended that this subject matter cover all such modifications and variations within the scope of the appended claims and their equivalents. These and other modifications and variations can be made to the invention by those skilled in the art without departing from the scope of the invention, the scope of which is more specifically set forth in the appended claims. Furthermore, those skilled in the art should understand that the foregoing description is merely exemplary and is not intended to limit the invention.

Claims

1. A pulsed laser diode driver comprising: a first inductor having a first terminal and a second terminal, the first terminal of the first inductor configured to receive a first source voltage, the first source voltage based on a DC input voltage; a first source capacitor having a first terminal directly electrically connected to the first terminal of the first inductor to provide the first source voltage and a second terminal electrically coupled to ground; a first bypass switch having a drain node directly electrically connected to the second terminal of the first inductor and a source node directly electrically connected to ground; a first bypass capacitor having a first terminal directly electrically connected to the drain node of the first bypass switch; a first laser diode having an anode and a cathode, the anode of the first laser diode directly electrically connected to the second terminal of the first inductor and the drain node of the first bypass switch; and a first laser diode switch having a drain node directly electrically connected to the cathode of the first laser diode and a source node directly electrically connected to ground; wherein: the first laser diode switch and the first bypass switch are configured to control current through the first inductor to produce a high current pulse through the first laser diode, the high current pulse corresponding to a peak current of a resonant waveform formed at the anode of the first laser diode.

2. The pulsed laser diode driver of claim 1, wherein: a second terminal of the first bypass capacitor is directly electrically connected to ground.

3. The pulsed laser diode driver of claim 1, wherein: a second terminal of the first bypass capacitor is directly electrically connected to the second terminal of the first source capacitor.

4. The pulsed laser diode driver of claim 1, wherein: a second terminal of the first bypass capacitor is directly electrically connected to the cathode of the first laser diode.

5. The pulsed laser diode driver of claim 1, further comprising: a resistor configured to receive the DC input voltage, the first source voltage received at the first terminal of the first source capacitor via the resistor.

6. The pulsed laser diode driver of claim 1, further comprising: a source switch configured to receive the DC input voltage, the first source voltage received at the first terminal of the first source capacitor via the source switch.

7. The pulsed laser diode driver of claim 1, further comprising: an adjustable voltage supply configured to produce the DC input voltage.

8. The pulsed laser diode driver of claim 7, wherein: the adjustable voltage supply comprises a digital-to-analog converter (DAC).

9. The pulsed laser diode driver of claim 7, wherein: the adjustable voltage supply is configured to adjust the DC input voltage between successive high current pulses through the first laser diode.

10. The pulsed laser diode driver of claim 1, further comprising: ​ a second laser diode having an anode and a cathode, the anode of the second laser diode directly electrically connected to the second terminal of the second inductor and the drain node of the second bypass switch, the cathode of the second laser diode directly electrically connected to the drain node of the first laser diode switch; 11. The pulsed laser diode driver of claim 1, further comprising: a second inductor having a first terminal and a second terminal, the first terminal of the second inductor configured to receive a second source voltage, the second source voltage based on the DC input voltage; a second source capacitor having a first terminal directly electrically connected to the first terminal of the second inductor to provide the second source voltage and a second terminal electrically coupled to ground; a second bypass switch having a drain node directly electrically connected to the second terminal of the second inductor and a source node directly electrically connected to ground; a second bypass capacitor having a first terminal directly electrically connected to the drain node of the second bypass switch; and a second laser diode having an anode and a cathode, the anode of the second laser diode directly electrically connected to the second terminal of the second inductor and the drain node of the second bypass switch, the cathode of the second laser diode directly electrically connected to the drain node of the first laser diode switch; wherein: the first laser diode switch and the second bypass switch are configured to control current through the second inductor to generate a high current pulse through the second laser diode, the high current pulse corresponding to a peak current of a resonant waveform formed at the anode of the second laser diode.

12. The pulsed laser diode driver of claim 1, wherein: the second terminal of the first source capacitor is electrically coupled to ground via a damping resistor.

13. The pulsed laser diode driver of claim 1, wherein: the second terminal of the first source capacitor is electrically coupled to ground via a direct electrical connection to ground.

14. The pulsed laser diode driver of claim 1, wherein: the first laser diode switch is a silicon-based field effect transistor.

15. A pulsed laser diode driver, comprising: an inductor having a first terminal and a second terminal, the first terminal of the inductor configured to receive a source voltage; a source capacitor having a first capacitor terminal directly electrically connected to the first terminal of the inductor to provide the source voltage and a second capacitor terminal electrically coupled to a bias voltage node; a source switch having a first terminal directly electrically connected to a DC input voltage terminal and a second terminal directly electrically connected to the first capacitor terminal, the source switch operable to charge the source capacitor when the source switch is enabled; a bypass switch having a drain node directly electrically connected to the second terminal of the inductor and a source node directly electrically connected to the bias voltage node; a laser diode switch having a drain node directly electrically connected to the second terminal of the inductor and the drain node of the bypass switch; a laser diode having an anode directly electrically connected to a source node of the laser diode switch and a cathode directly electrically connected to the bias voltage node; and a bypass capacitor having: i) a first terminal directly electrically connected to the second terminal of the inductor and a second terminal directly electrically connected to the bias voltage node, ii) a first terminal directly electrically connected to the anode of the laser diode and a second terminal directly electrically connected to the bias voltage node, iii) a first terminal directly electrically connected to the second terminal of the inductor and a second terminal directly electrically connected to the second capacitor terminal of the source capacitor, or iv) a first terminal directly electrically connected to the anode of the laser diode and a second terminal directly electrically connected to the second capacitor terminal of the source capacitor; wherein: the laser diode switch and the bypass switch are configured to control current through the inductor to produce a high current pulse through the laser diode, the high current pulse corresponding to a peak current of a resonant waveform formed at the anode of the laser diode.

16. The pulsed laser diode driver of claim 15, further comprising: an adjustable voltage supply configured to provide a DC input voltage to the DC input voltage terminal.

17. A pulsed laser diode driver, comprising: an inductor having a first terminal and a second terminal, the first terminal configured to receive a source voltage; a source capacitor having a first capacitor terminal directly electrically connected to the first terminal of the inductor to provide the source voltage and a second capacitor terminal electrically coupled to a bias voltage node; a source switch having a first terminal directly electrically connected to a DC input voltage terminal and a second terminal directly electrically connected to the first capacitor terminal, the source switch operable to charge the source capacitor when the source switch is enabled; a bypass switch having a drain node directly electrically connected to the second terminal of the inductor and a source node directly electrically connected to the bias voltage node; a laser diode having an anode and a cathode, the anode directly electrically connected to the second terminal of the inductor and the drain node of the bypass switch; a laser diode switch having a drain node directly electrically connected to the cathode of the laser diode and a source node directly electrically connected to the bias voltage node; and a bypass capacitor having: i) a first terminal directly electrically connected to the second terminal of the inductor and a second terminal directly electrically connected to the bias voltage node, ii) a first terminal directly electrically connected to the second terminal of the inductor and a second terminal directly electrically connected to the second capacitor terminal of the source capacitor, or iii) a first terminal directly electrically connected to the anode of the laser diode and a second terminal directly electrically connected to the cathode of the laser diode; wherein: The laser diode switch and the bypass switch are configured to control current through the inductor to generate a high current pulse through the laser diode that corresponds to a peak current of a resonant waveform formed at the anode of the laser diode.

18. The pulsed laser diode driver of claim 17, further comprising: an adjustable voltage supply configured to provide a DC input voltage to the DC input voltage terminal.

19. A pulsed laser diode driver, comprising: a plurality of inductors, each inductor having a first terminal and a second terminal, the first terminal of each inductor configured to receive a respective source voltage; a plurality of source capacitors, each source capacitor corresponding to a respective inductor and having a first capacitor terminal directly electrically connected to the first terminal of the respective inductor to provide the respective source voltage and a second capacitor terminal electrically coupled to a bias voltage node; a plurality of bypass switches, each bypass switch corresponding to a respective inductor and having a drain node directly electrically connected to the second terminal of the respective inductor and a source node directly electrically connected to the bias voltage node; a plurality of laser diodes, each laser diode corresponding to a respective inductor and a respective bypass switch and having an anode and a cathode, the anode directly electrically connected to the second terminal of the respective inductor and the drain node of the respective bypass switch; a laser diode switch having a drain node directly electrically connected to the cathode of each of the laser diodes and a source node directly electrically connected to the bias voltage node; and a plurality of bypass capacitors, each bypass capacitor corresponding to a respective inductor and having a first terminal directly electrically connected to the second terminal of the respective inductor and a second terminal directly electrically connected to the bias voltage node; wherein, the laser diode switch and the plurality of bypass switches are configured to control respective currents through each of the inductors to generate respective high current pulses through each of the laser diodes, each of the high current pulses corresponding to a peak current of a resonant waveform formed at the anode of the respective laser diode.

20. The pulsed laser diode driver of claim 19, further comprising: a plurality of source switches configured to receive a DC input voltage and provide the respective source voltages to the plurality of source capacitors.

21. A pulsed laser diode driver, comprising: an inductor having a first terminal and a second terminal, the first terminal configured to receive a source voltage; a source capacitor having a first capacitor terminal directly electrically connected to the first terminal of the inductor to provide the source voltage and a second capacitor terminal electrically coupled to a bias voltage node; a first laser diode switch having a drain node directly electrically connected to the second terminal of the inductor; and a second laser diode switch having a source node directly electrically connected to the bias voltage node. a first laser diode having an anode and a cathode, the anode of the first laser diode being directly electrically connected to a source node of the first laser diode switch and the cathode of the first laser diode being directly electrically connected to the bias voltage node; a bypass switch having a drain node and a source node, the drain node of the bypass switch being directly electrically connected to the drain node of the first laser diode switch and the source node of the bypass switch being directly electrically connected to the bias voltage node; and a bypass capacitor having a first terminal directly electrically connected to the drain node of the bypass switch; wherein: the first laser diode switch and the bypass switch are configured to control current through the inductor to produce a high current pulse through the first laser diode, the high current pulse corresponding to a peak current of a resonant waveform formed at the anode of the first laser diode.

22. The pulsed laser diode driver of claim 21, wherein: a second terminal of the bypass capacitor is directly electrically connected to the bias voltage node.

23. The pulsed laser diode driver of claim 21, wherein: a second terminal of the bypass capacitor is directly electrically connected to the second terminal of the source capacitor.

24. The pulsed laser diode driver of claim 21, further comprising: a resistor configured to receive a DC input voltage, the source voltage being received at the first terminal of the source capacitor via the resistor.

25. The pulsed laser diode driver of claim 21, further comprising: a source switch configured to receive a DC input voltage, the source voltage being received at the first terminal of the source capacitor via the source switch.

26. The pulsed laser diode driver of claim 21, further comprising: a second laser diode switch having a drain node directly electrically connected to a second terminal of the inductor; and a second laser diode having an anode and a cathode, the anode of the second laser diode being directly electrically connected to a source node of the second laser diode switch and the cathode of the second laser diode being directly electrically connected to the cathode of the bias voltage node.

27. The pulsed laser diode driver of claim 21, wherein: the second terminal of the source capacitor is electrically coupled to the bias voltage node via a damping resistor.

28. The pulsed laser diode driver of claim 21, wherein: the second terminal of the source capacitor is electrically coupled to the bias voltage node via a direct electrical connection to the bias voltage node.

29. The pulsed laser diode driver of claim 21, wherein: the first laser diode switch is a silicon-based field effect transistor.

30. A pulsed laser diode driver, comprising: an inductor having a first terminal and a second terminal, the first terminal being configured to receive a source voltage; a source capacitor having a first terminal and a second terminal, the first terminal of the source capacitor being directly electrically connected to the first terminal of the inductor and the second terminal of the source capacitor being directly electrically connected to a source node of the first laser diode switch; a source capacitor having a first capacitor terminal directly electrically connected to the first terminal of the inductor to provide the source voltage and a second capacitor terminal electrically coupled to a bias voltage node; a first laser diode switch having a drain node directly electrically connected to a second terminal of the inductor; a first laser diode having an anode and a cathode, the anode of the first laser diode directly electrically connected to a source node of the first laser diode switch and the cathode of the first laser diode directly electrically connected to the bias voltage node; a bypass switch having a drain node and a source node, the drain node of the bypass switch directly electrically connected to the drain node of the first laser diode switch and the source node of the bypass switch directly electrically connected to the bias voltage node; and a bypass capacitor having a first terminal directly electrically connected to the anode of the first laser diode; wherein: the first laser diode switch and the bypass switch are configured to control current through the inductor to produce a high current pulse through the first laser diode, the high current pulse corresponding to a peak current of a resonant waveform formed at the anode of the first laser diode.

31. The pulsed laser diode driver of claim 30, wherein: a second terminal of the bypass capacitor is directly electrically connected to the bias voltage node.

32. The pulsed laser diode driver of claim 30, wherein: a second terminal of the bypass capacitor is directly electrically connected to the second terminal of the source capacitor.

33. The pulsed laser diode driver of claim 30, further comprising: a resistor configured to receive a DC input voltage, the source voltage received at the first terminal of the source capacitor via the resistor.

34. The pulsed laser diode driver of claim 30, further comprising: a source switch configured to receive a DC input voltage, the source voltage received at the first terminal of the source capacitor via the source switch.

35. The pulsed laser diode driver of claim 30, further comprising: a second laser diode switch having a drain node directly electrically connected to a second terminal of the inductor; and a second laser diode having an anode and a cathode, the anode of the second laser diode directly electrically connected to a source node of the second laser diode switch and the cathode of the second laser diode directly electrically connected to the bias voltage node.

36. The pulsed laser diode driver of claim 30, wherein: the second terminal of the source capacitor is electrically coupled to the bias voltage node via a damping resistor.

37. The pulsed laser diode driver of claim 30, wherein: the second terminal of the source capacitor is electrically coupled to the bias voltage node via a direct electrical connection to the bias voltage node.

38. The pulsed laser diode driver of claim 30, wherein: the first laser diode switch is a silicon-based field effect transistor. ​ ​ 39. A pulsed laser diode driver comprising: an inductor having a first terminal and a second terminal, the first terminal configured to receive a source voltage; a source capacitor having a first capacitor terminal directly electrically connected to the first terminal of the inductor to provide the source voltage and a second capacitor terminal electrically coupled to a bias voltage node; a damping resistor having a first terminal directly electrically connected to the first terminal of the inductor; a flux switch having a drain node directly electrically connected to a second terminal of the damping resistor and a source node directly electrically connected to the bias voltage node; a laser diode having a cathode directly electrically connected to a first terminal of the inductor and an anode directly electrically connected to a second terminal of the inductor; a bypass switch having a drain node directly electrically connected to the anode of the laser diode and a source node directly electrically connected to the bias voltage node; and a bypass capacitor having a first terminal directly electrically connected to the first terminal of the inductor and a second terminal directly electrically connected to the second terminal of the inductor; wherein: the flux switch and the bypass switch are configured to control current through the inductor to generate a high current pulse through the laser diode, the high current pulse corresponding to a peak current of a resonant waveform formed at the anode of the laser diode.

40. The pulsed laser diode driver of claim 39, further comprising: a source switch configured to receive a DC input voltage, the source voltage received at the first terminal of the source capacitor via the source switch.

41. A pulsed laser diode driver comprising: an inductor having a first terminal and a second terminal, the first terminal configured to receive a source voltage; a source capacitor having a first capacitor terminal directly electrically connected to the first terminal of the inductor to provide the source voltage and a second capacitor terminal electrically coupled to a bias voltage node; a laser diode switch having a drain node directly electrically connected to the second terminal of the inductor; a first laser diode having an anode directly electrically connected to a source node of the laser diode switch and a cathode directly electrically connected to the bias voltage node; a bypass switch having a drain node directly electrically connected to the source node of the laser diode switch and a source node directly electrically connected to the bias voltage node; and a bypass capacitor having a first terminal directly electrically connected to the drain node of the laser diode switch; wherein: the laser diode switch and the bypass switch are configured to control current through the inductor to generate a high current pulse through the first laser diode, the high current pulse corresponding to a peak current of a resonant waveform formed at the anode of the first laser diode.

42. The pulsed laser diode driver of claim 41, wherein: ​ ​ a second terminal of the bypass capacitor is directly electrically connected to the bias voltage node.

43. The pulsed laser diode driver of claim 41, wherein: a second terminal of the bypass capacitor is directly electrically connected to the second terminal of the source capacitor.

44. The pulsed laser diode driver of claim 41, further comprising: a resistor configured to receive a DC input voltage, the source voltage being received at the first terminal of the source capacitor via the resistor.

45. The pulsed laser diode driver of claim 41, wherein: the second terminal of the source capacitor is electrically coupled to the bias voltage node via a damping resistor.

46. The pulsed laser diode driver of claim 41, wherein: the second terminal of the source capacitor is electrically coupled to the bias voltage node via a direct electrical connection to the bias voltage node.

47. The pulsed laser diode driver of claim 41, wherein: the laser diode switch is a silicon-based field effect transistor.

48. The pulsed laser diode driver of claim 41, further comprising: a source switch configured to receive a DC input voltage, the source voltage being received at the first terminal of the source capacitor via the source switch.

49. The pulsed laser diode driver of claim 41, further comprising: a second laser diode having an anode directly electrically connected to a source node of the laser diode switch and a cathode directly electrically connected to the bias voltage node.

50. A pulsed laser diode driver, comprising: an inductor having a first terminal and a second terminal, the first terminal configured to receive a source voltage; a source capacitor having a first capacitor terminal directly electrically connected to the first terminal of the inductor to provide the source voltage and a second capacitor terminal electrically coupled to a bias voltage node; a laser diode switch having a drain node directly electrically connected to the second terminal of the inductor; a first laser diode having an anode directly electrically connected to a source node of the laser diode switch and a cathode directly electrically connected to the bias voltage node; a bypass switch having a drain node and a source node, the drain node of the bypass switch directly electrically connected to the source node of the laser diode switch and the source node of the bypass switch directly electrically connected to the bias voltage node; and a bypass capacitor having a first terminal directly electrically connected to the drain node of the bypass switch; wherein: the laser diode switch and the bypass switch are configured to control a current through the inductor to produce a high current pulse through the first laser diode, the high current pulse corresponding to a peak current of a resonant waveform formed at the anode of the first laser diode.

51. The pulsed laser diode driver of claim 50, wherein: a second terminal of the bypass capacitor is directly electrically connected to the bias voltage node. ​ 52. The pulsed laser diode driver of claim 50, wherein: a second terminal of the bypass capacitor is directly electrically connected to the second terminal of the source capacitor.

53. The pulsed laser diode driver of claim 50, further comprising: a resistor configured to receive a DC input voltage, the source voltage being received at the first terminal of the source capacitor via the resistor.

54. The pulsed laser diode driver of claim 50, wherein: the second terminal of the source capacitor is electrically coupled to the bias voltage node via a damping resistor.

55. The pulsed laser diode driver of claim 50, wherein: the second terminal of the source capacitor is electrically coupled to the bias voltage node via a direct electrical connection to the bias voltage node.

56. The pulsed laser diode driver of claim 50, wherein: the laser diode switch is a silicon-based field effect transistor.

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