Capacitor components

Abstract

The present invention provides a capacitor assembly, which comprises: a porous body, a first electrode layer, a dielectric layer, and a second electrode layer, wherein the first electrode layer covers the surface of the pores of the porous body, the dielectric layer covers the first electrode layer, and the second electrode layer fills the pores of the porous body and covers the dielectric layer.

Description

[0001] This application is a divisional application of the invention patent application "Capacitor Assembly" with application date of September 17, 2018 and application number 201811085958.X. Technical Field

[0002] The present disclosure relates to a capacitor assembly. Background Art

[0003] Capacitors can be mounted on printed circuit boards of various types of electronic products such as image devices including liquid crystal displays (LCDs) and plasma display panels (PDPs), computers, smart phones, mobile phones, etc., for charging or discharging. In recent years, as portable IT products such as smart phones and wearable devices have become thinner, there is an increasing demand for thinner passive components to reduce the overall thickness of the package.

[0004] According to this trend, the need for thin film capacitors capable of achieving reduced thickness is increasing, and thin film capacitors can be realized by using thin film technology. In addition, unlike existing multilayer ceramic capacitors, such thin film capacitors have the advantage of low ESL. Therefore, the application of thin film capacitors to decoupling capacitors of application processors (APs) has recently been studied. In order to apply thin film capacitors to decoupling capacitors of APs, thin film capacitors have been manufactured in the form of pad side capacitors (LSCs).

[0005] Meanwhile, trench capacitors have been developed to increase the capacity of capacitors in a limited space, which is a method of forming a capacitor structure after forming a trench in a silicon substrate. Trench capacitors are suitable for increasing the capacity by increasing the surface area of ​​the electrode layer. However, such trench capacitors not only require complex semiconductor processing technology, but also have difficulty in forming multiple dielectrics in such trenches when considering the dielectric thickness that satisfies the withstand voltage condition. As a result, it may be difficult to realize a trench capacitor with ultra-high capacity. Summary of the invention

[0006] An aspect of the present disclosure may provide a capacitor component that can achieve ultra-high capacity by increasing the surface areas of an electrode layer and a dielectric layer and is efficiently manufactured by minimizing the number of semiconductor processes.

[0007] According to one aspect of the present disclosure, a capacitor component may include: a porous body; a first electrode layer covering surfaces of pores of the porous body; a dielectric layer covering the first electrode layer; and a second electrode layer filling the pores of the porous body and covering the dielectric layer.

[0008] The pores of the porous body may extend through the porous body.

[0009] The pores of the porous body may be cylindrical in shape.

[0010] The pores of the porous body may be arranged in an array.

[0011] The capacitor assembly may further include a first common electrode layer connected to an exposed region of the first electrode layer exposed through the dielectric layer.

[0012] The capacitor assembly may further include an insulating layer formed between the first common electrode layer and the second electrode layer.

[0013] The first electrode layer may cover the entire surface of the porous body.

[0014] The capacitor assembly may further include a metal layer connected to an exposed region of the porous body exposed by the first electrode layer.

[0015] The metal layer may contact one of an upper surface and a lower surface of the porous body and a side surface of the porous body.

[0016] The porous body may be an anodized piece of the material forming the metal layer.

[0017] The first electrode layer and the dielectric layer may extend to a region between the metal layer and the second electrode layer.

[0018] A roughness may be formed in a region of the metal layer corresponding to the region where the first electrode layer and the dielectric layer extend, and the first electrode layer and the dielectric layer are formed along the roughness of the metal layer.

[0019] The capacitor assembly may include a plurality of stacked units stacked on each other, each stacked unit including the porous body, the first electrode layer, the dielectric layer, the second electrode layer, and the metal layer.

[0020] Each stacked unit may further include an insulating layer covering one side surface of the metal layer.

[0021] The insulating layer of one stacking unit among the plurality of stacking units may be disposed at a position opposite to an insulating layer of another stacking unit adjacent to the one stacking unit.

[0022] The capacitor assembly may further include first and second external electrodes covering side surfaces of the plurality of stacked units.

[0023] The second electrode layer may include a conductive polymer.

[0024] The second electrode layer may be a plated layer.

[0025] According to another aspect of the present disclosure, a capacitor assembly may include: a main body having a plurality of holes, wherein the thickness of an upper portion of a wall of the main body located between two adjacent holes among the plurality of holes is less than the thickness of a lower portion of the wall of the main body located between the two adjacent holes; a first electrode layer covering a surface of the main body; a dielectric layer covering the first electrode layer; and a second electrode layer filling the plurality of holes in the main body, wherein the dielectric layer is disposed between the first electrode layer and the second electrode layer to insulate the first electrode layer and the second electrode layer from each other. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The above and other aspects, features and advantages of the present disclosure will be more clearly understood through the following detailed description taken in conjunction with the accompanying drawings, in which:

[0027] Figure 1 is a cross-sectional view schematically illustrating a capacitor assembly according to an exemplary embodiment of the present disclosure;

[0028] Figures 2 to 11 is shown for manufacturing Figure 1 An example of a method of manufacturing a capacitor assembly;

[0029] Fig.12 is a cross-sectional view schematically illustrating a capacitor assembly according to another exemplary embodiment of the present disclosure; and

[0030] Figures 13 to 21 is shown for manufacturing Fig.12 An illustration of an example of a method of a capacitor assembly. DETAILED DESCRIPTION

[0031] Hereinafter, exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings.

[0032] Figure 1 is a cross-sectional view schematically illustrating a capacitor assembly according to an exemplary embodiment of the present disclosure. Figures 2 to 11 is shown for manufacturing Figure 1 An illustration of an example of a method of a capacitor assembly.

[0033] Reference Figure 1 , the capacitor assembly 100 according to an exemplary embodiment of the present disclosure may have a structure including a porous body 111, a first electrode layer 112, a dielectric layer 113, and a second electrode layer 114, and may further include a first common electrode layer 115 connected to the first electrode layer 112 on the first electrode layer 112. In this case, an insulating layer 116 may be provided between the first common electrode layer 115 and the second electrode layer 114 to electrically insulate the first common electrode layer 115 and the second electrode layer 114 from each other.

[0034] The porous body 111 includes pores to have a large surface area. In this case, the pores may be formed to penetrate the porous body 111 in the thickness direction. The thickness of the upper portion of the wall of the porous body 111 located between two adjacent pores may be smaller than the thickness of the lower portion of the wall of the porous body 111 located between two adjacent pores. For example, the pores may be cylindrical in shape. The pores of the porous body 111 may be arranged in an array, and a specific example of the shape may be referred to. Fig. 6A and Figure 6B The shape of the hole H1 shown in ( Fig. 6A is a cross-sectional view, Figure 6B 221 (which will be described below).

[0035] In the case of the present embodiment, the porous body 111 can be an anodic oxidant obtained by anodizing a metal. In the case of valve metals such as aluminum (Al), zirconium (Zr), titanium (Ti) and tungsten (W), if a voltage is applied to an electrolyte, ion migration will occur at the interface between the metal and the electrolyte, so that an anodic oxide layer can be formed on the metal surface. In the anodizing process, a large number of pores are formed on the oxide layer, thereby greatly increasing the surface area. In the anodizing process, the size, density, etc. of the pores can be adjusted by appropriately setting the process conditions such as the applied voltage and the electrolyte during the anodizing process, and the pores can become deeper as oxidation occurs continuously. Thus, a porous body 111 having a pore with a diameter of about tens to hundreds of nanometers (nm) can be achieved.

[0036] The first electrode layer 112 may cover the surface of the pores of the porous body 111 and constitute a part of the electrode portion of the capacitor. The first electrode layer 112 may be formed using a metal having excellent conductivity such as Ag, Cu, Pt, and Ni, and may be efficiently formed on the surface of the pores in the form of micropores by using a process such as atomic layer deposition (ALD). In this case, as Figure 1 As shown, the first electrode layer 112 may have a form covering the entire surface of the pores of the porous body 111 .

[0037] The dielectric layer 113 may have a form of covering the first electrode layer 112, and may be formed using materials such as aluminum oxide (Al2O3), SiO2, Sn3N4, ZrO2, CaTiO3, SrTiO3, (Ba, Sr)TiO3, and BaTiO3. In this case, the dielectric layer 113 may be formed using a variety of materials to increase insulation performance. In this embodiment, as shown in FIG. Figure 1As shown, a portion of the first electrode layer 112 may be exposed without being covered by the dielectric layer 113 , and the first electrode layer 112 may be configured to be connected to the first common electrode layer 115 through the exposed region of the first electrode layer 112 .

[0038] The second electrode layer 114 may fill the pores of the porous body 111 while covering the dielectric layer 113. The second electrode layer 114 may constitute an electrode portion of the capacitor portion, and may fill the pores to have a large surface area, thereby increasing the capacity of the capacitor assembly 100. In the case of the present embodiment, the second electrode layer 114 may include a conductive polymer. For example, the conductive polymer may be implemented by dispersing conductive particles in a polymer. When the second electrode layer 114 is formed using a conductive polymer, the conductive polymer may be applied to the pores of the porous body 111 in a fluid state. In this case, the conductive polymer may effectively fill the micropores of the porous body 111 using a capillary effect. When the second electrode layer 114 is formed by atomic layer deposition using a material such as a metal, the processing time is long and the second electrode layer 114 may not be effectively formed in the micropores. In the present embodiment, the second electrode layer 114 may be formed in such a way that the conductive polymer penetrates into the micropores to increase the filling effect of the second electrode layer 114, thereby ensuring sufficient capacitance. In addition, as described above, when the pores have a shape that penetrates the porous body 111, the second electrode layer 114 can be more easily formed and the unfilled area can be reduced. However, a method other than the method of using a conductive polymer can be used as a method of effectively filling the micropores. For example, a plating process can be used. In this case, the second electrode layer 114 can be a plated layer including a material such as Cu.

[0039] The first common electrode layer 115 may be connected to the first electrode layer 112 and may be formed by applying a conductive paste including, for example, metal. The insulating layer 116 disposed between the first common electrode layer 115 and the second electrode layer 114 may be formed using materials such as SiO2, TiO2, and Al2O3.

[0040] In the following, reference will be made to Figures 2 to 11 An example of a process for manufacturing a capacitor assembly having the above-described structure is described. The structural features of the capacitor assembly can be more clearly understood through the description of the manufacturing process to be described later.

[0041] First, if Figure 2 As shown, a metal layer 121 is formed on an anode substrate 120, which constitutes an anode for anodizing. The metal layer 121 can be made of, for example, aluminum (Al), zirconium (Zr), titanium (Ti) and tungsten (W), which are valve metals suitable for anodizing. However, the metal layer 121 itself can serve as an anode. In this case, the anode substrate 120 is not required.

[0042] Next, if Figure 3 As shown, the porous body 111 is formed by anodizing. The porous body 111 is formed by a metal oxide layer. As the anodizing process proceeds, the pores of the porous body 111 are enlarged and formed deeper. When the anodizing process is completed, the applied voltage is reduced. In this case, as Figure 4 As shown, a plurality of micropores may be formed on the bottom surface of the porous body 111. After anodizing, as shown in FIG. Figure 5 As shown, the porous body 111 is immersed in an acid solution 130 such as a phosphoric acid solution to further expand the pores and etch a plurality of micropores. Fig. 6A and Figure 6B The porous body 111 shown has a plurality of pores H1. After the porous body 111 is obtained, the anode substrate 120 may be separated from the porous body 111. However, the above-mentioned anodizing process is only an example of forming the porous body 111, and the method of forming the pores may be replaced by other suitable processes.

[0043] Next, if Figure 7 As shown, the first electrode layer 112 and the dielectric layer 113 may be sequentially formed on the surface of the porous body 111, specifically, the first electrode layer 112 and the dielectric layer 113 may be sequentially formed on the surface of the pores. As an example, the first electrode layer 112 may completely surround the porous body 111. The process may be effectively performed using atomic layer deposition as described above. However, atomic layer deposition is not necessarily used, and therefore, other deposition processes may be used as needed.

[0044] Next, if Figure 8 As shown, the second electrode layer 114 is formed in a form of filling the pores of the porous body 111. The second electrode layer 114 may include a conductive polymer, and when the second electrode layer 114 in a state of having fluidity is applied to the porous body 111, the second electrode layer 114 may fill the micropores using a capillary effect. In this case, the conductive polymer having fluidity may effectively penetrate the pores opened above and below the porous body 111. However, as described above, in addition to the method using the conductive polymer, the second electrode layer 114 may also be formed using a plating process.

[0045] Next, if Fig. 9 As shown, the insulating layer 116 may be formed to close the pores of the porous body 111, and may be formed by depositing or coating SiO2 or the like. In this case, in order to more easily handle the porous body 111, the carrier 131 may be attached to the lower side of the second electrode layer 114. Next, the upper end of the insulating layer 116 is etched to contact with the porous body 111. Fig.10 The first electrode layer 112 is exposed as shown. Fig.11As shown, a first common electrode layer 115 may be formed on the porous body 111 to be connected to the first electrode layer 112. The first common electrode layer 115 may be obtained by applying a conductive paste and curing the conductive paste. Next, the carrier 131 may be removed to obtain a porous body 111 having a conductive paste. Figure 1 A capacitor assembly 100 is shown in the form shown.

[0046] Fig.12 is a cross-sectional view schematically illustrating a capacitor assembly according to another exemplary embodiment of the present disclosure. Figures 13 to 21 is shown for manufacturing Fig.12 An illustration of an example of a method of a capacitor assembly.

[0047] Reference Fig.12 The capacitor assembly 200 according to the exemplary embodiment of the present disclosure may have a structure including a porous body 211, a first electrode layer 212, a dielectric layer 213, a second electrode layer 214, and a metal layer 221, and has a form in which the porous body 211, the first electrode layer 212, the dielectric layer 213, the second electrode layer 214, and the metal layer 221 are stacked as a stacking unit 210 into a plurality of stacking units 210. An insulating layer 222 may be formed on an upper surface of the metal layer 221 in each stacking unit 210, and an insulating layer 223 may also be provided on the top and bottom of the plurality of stacking units 210. As described above, according to the present embodiment, a higher capacity may be effectively ensured by a structure in which a plurality of porous capacitors are stacked.

[0048] The thickness of the upper part of the wall of the porous body 211 between two adjacent holes may be less than the thickness of the lower part of the wall of the porous body 211 between two adjacent holes. Unlike the above-described exemplary embodiment, a portion of the porous body 211 may be exposed without being covered by the first electrode layer 212, and the metal layer 221 may be connected to the exposed area of ​​the porous body 211. Specifically, the metal layer 221 may be in contact with one of the upper and lower surfaces of the porous body 211 and the side surface of the porous body 211. This form may be obtained by anodizing a portion of the metal layer 221. In other words, the porous body 211 may be an anodized piece of a material corresponding to the valve metal that forms the metal layer 221, and the metal layer 221 may be a retained area that is not anodized. As in the present embodiment, when a portion of the metal layer 221 is not anodized, the metal layer 221 may be used as an electrode layer.

[0049] The shapes of the first electrode layer 212 and the dielectric layer 213 may be partially changed at the position where the metal layer 221 and the porous body 211 remain independently. Fig.12As shown, the first electrode layer 212 and the dielectric layer 213 may extend to the penetration region of the second electrode layer 214 (i.e., the region between the metal layer 221 and the second electrode layer 214). In this case, a rough portion may be formed in the metal layer 221 in a region corresponding to the region where the first electrode layer 212 and the dielectric layer 213 extend, and the rough portion may be formed during the process of reducing the magnitude of the voltage applied during the above-mentioned anodizing process. The first electrode layer 212 and the dielectric layer 213 may be formed along the rough portion of the metal layer 221 to further increase the surface area.

[0050] The first and second external electrodes 215 and 216 may cover side surfaces of the plurality of stacked units 210 and may be electrically connected to the first electrode layer 212, the second electrode layer 214, and the metal layer 221 of each stacked unit 210. The stacked unit 210 may include an insulating layer 231 covering one side surface of the metal layer 221. In this case, as shown in FIG. Fig.12 As shown, the insulating layer 222 of each stacked unit 210 may be disposed at a position opposite to the insulating layer 222 of another adjacent stacked unit 210 , so that the connection method of the metal layer 221 and the first and second external electrodes 215 and 216 may be appropriately adjusted.

[0051] In the following, reference will be made to Figures 13 to 21 Describe the manufacturing Fig.12 The structural features of the capacitor assembly can be more clearly understood through the description of the manufacturing process to be described later.

[0052] First, if Fig.13 As shown, a metal layer 221 is formed on an anode substrate 220, which constitutes an anode for anodizing. The metal layer 221 can be made of, for example, aluminum (Al), zirconium (Zr), titanium (Ti) and tungsten (W) as valve metals suitable for anodizing. However, the metal layer 221 itself can be used as an anode. In this case, the anode substrate 220 is not required.

[0053] Next, if Fig.14A and Fig. 14B As shown ( Fig.14A is a cross-sectional view, Fig. 14B 2 is a perspective view), the insulating layer 222 in the form of a pattern may be formed on the metal layer 221, and may be cut along the patterned line in units of each device in a subsequent process. However, in some cases, the insulating layer 222 may be omitted. Fig.14A and Fig. 14B steps.

[0054] Next, if Fig.15As shown, the porous body 211 is formed using anodizing treatment, and the porous body 211 can be formed using a metal oxide layer. As the anodizing treatment proceeds, the pores of the porous body 211 are enlarged and formed deeper. When the anodizing treatment step is completed, the applied voltage is reduced. In this case, as Fig.16 As shown, a plurality of micropores may be formed on the bottom surface of the porous body 211. After anodizing, as shown in FIG. Fig.17 As shown, the porous body 211 is immersed in an acid solution 230 to further expand the pores and etch a plurality of micropores. Fig.18 The porous body 211 having a plurality of pores H2 is shown. In this process, the surface of the metal layer 221 may be exposed. In this case, the roughness may remain on the surface of the metal layer 221. In addition, since the lower portion of the metal layer 221 is retained, the pores H2 of the porous body 211 may be implemented in a closed form in the lower direction.

[0055] Next, if Fig.19 As shown, the first electrode layer 212 and the dielectric layer 213 may be sequentially formed on the surface of the porous body 211, specifically, the first electrode layer 212 and the dielectric layer 213 may be sequentially formed on the surface of the pores and the surface of the metal layer 221. The process may be effectively performed by using atomic layer deposition as described above. However, atomic layer deposition is not necessarily used, and therefore, other deposition processes may be used as needed.

[0056] Next, if Fig. 20 As shown, a second electrode layer 214 is formed in a form that fills the pores of the porous body 211. The second electrode layer 214 may include a conductive polymer, and when the second electrode layer 214 in a fluid state is applied to the porous body 211, the second electrode layer 214 may fill the micropores using a capillary effect. However, as described above, in addition to the method using the conductive polymer, the second electrode layer 214 may also be formed using a plating process.

[0057] Next, in the unit of the device, an insulating layer 231 is formed on one of the cut surfaces of the metal layer 221 cut along the insulating layer 222 having a pattern form. Thereafter, a unit device (i.e., the above-mentioned stacking unit 210) can be obtained by stacking the unit devices (i.e., the above-mentioned stacking unit 210) so that the positions of the insulating layers 231 cross each other. Fig.21 In this case, when stacking the stacking units 210, the cut surface of the metal layer 221 can be used for alignment. Thereafter, the first external electrode 215 and the second external electrode 216 can be formed on the surface of the stacking structure of the plurality of stacking units 210 to obtain Fig.12The capacitor assembly 200 shown in FIG. The first external electrode 215 and the second external electrode 216 may be formed by performing at least one of a process such as a coating process of a conductive paste, a coating process of a conductive polymer, and a plating process.

[0058] As explained above, according to the exemplary embodiments of the present disclosure, the surface areas of the electrode layer and the dielectric layer can be increased to realize a capacitor component with increased capacitance. In addition, the capacitor component can be efficiently manufactured by minimizing the number of semiconductor processes.

[0059] While exemplary embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations may be made without departing from the scope of the present invention as defined by the appended claims.

Claims

1. A capacitor assembly, comprising: porous body; a first electrode layer covering the surfaces of the pores of the porous body; a dielectric layer, covering the first electrode layer; as well as a second electrode layer filling the pores of the porous body and covering the dielectric layer, Wherein, the first electrode layer covers the upper surface, the lower surface and the side surface of the porous body.

2. The capacitor assembly according to claim 1, wherein: The pores of the porous body extend through the porous body.

3. The capacitor assembly according to claim 2, wherein: The pores of the porous body are cylindrical in shape.

4. The capacitor assembly according to claim 2, wherein: The pores of the porous body are arranged in an array.

5. The capacitor assembly of claim 1 , further comprising: A first common electrode layer is connected to an exposed region of the first electrode layer exposed through the dielectric layer.

6. The capacitor assembly according to claim 5, further comprising: An insulating layer is formed between the first common electrode layer and the second electrode layer.

7. The capacitor assembly according to claim 1, wherein: The first electrode layer covers the entire surface of the porous body.

8. The capacitor assembly according to claim 1, wherein: The second electrode layer includes a conductive polymer.

9. The capacitor assembly according to claim 1, wherein: The second electrode layer is a plating layer.

10. A capacitor assembly, comprising a plurality of stacked units stacked on top of each other, each stacked unit comprising: porous body; a first electrode layer covering the surfaces of the pores of the porous body; a dielectric layer, covering the first electrode layer; a second electrode layer filling the pores of the porous body and covering the dielectric layer; as well as a metal layer connected to the exposed area of ​​the porous body exposed by the first electrode layer, Wherein, the metal layer contacts the lower surface of the porous body and the side surface of the porous body.

11. The capacitor assembly according to claim 10, wherein: The porous body is an anodized piece of the material forming the metal layer.

12. The capacitor assembly according to claim 10, wherein: The first electrode layer and the dielectric layer extend to a region between the metal layer and the second electrode layer.

13. The capacitor assembly of claim 12, wherein: A roughness is formed in a region of the metal layer corresponding to the region where the first electrode layer and the dielectric layer extend, and the first electrode layer and the dielectric layer are formed along the roughness of the metal layer.

14. The capacitor assembly of claim 10, wherein: The metal layer of one of the two adjacent stacking units contacts the second electrode layer of the other stacking unit.

15. The capacitor assembly of claim 10, wherein: Each stacked unit further includes an insulating layer covering one side surface of the metal layer.

16. The capacitor assembly of claim 15, wherein: The insulating layer of one stacking unit among the plurality of stacking units is disposed at a position opposite to an insulating layer of another stacking unit adjacent to the one stacking unit.

17. The capacitor assembly of claim 10, further comprising: The first external electrode and the second external electrode cover side surfaces of the plurality of stacked units.

18. The capacitor assembly of claim 10, wherein: The second electrode layer includes a conductive polymer.

19. The capacitor assembly of claim 10, wherein: The second electrode layer is a plating layer.

20. A capacitor assembly comprising: a body having a plurality of holes, wherein an upper portion of a wall of the body located between two adjacent holes of the plurality of holes has a thickness smaller than a lower portion of the wall of the body located between the two adjacent holes; A first electrode layer, covering the surface of the main body; a dielectric layer, covering the first electrode layer; as well as a second electrode layer filling the plurality of holes in the body, The dielectric layer is disposed between the first electrode layer and the second electrode layer so that the first electrode layer and the second electrode layer are insulated from each other, and Wherein, the first electrode layer covers the upper surface, the lower surface and the side surface of the main body.

21. The capacitor assembly of claim 20, wherein: The wall of the body includes a metal oxide layer.

22. The capacitor assembly of claim 21, wherein: The body also includes a base supporting the wall, and The base of the body is made of metal.

23. The capacitor assembly of claim 22, wherein: The substrate contacts the first electrode layer.

24. The capacitor assembly of claim 20, wherein: The first electrode layer completely surrounds the body.

25. The capacitor assembly of claim 20, wherein: The second electrode layer includes a conductive polymer.

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