A de-embedding method in gallium arsenide-based integrated circuit technology

Abstract

The present invention discloses a de-embedding method for a gallium arsenide (GaAs)-based integrated circuit (IC) process. The method comprises the following steps: constructing through-, reflection-, and line calibration components; obtaining the S parameters of the DUT and the calibration component; solving for eight errors introduced by the lead and pad structures; and de-embedding the DUT's S parameters based on the eight errors. The eight errors introduced by the lead and pad structures are solved using the S parameters of the through-, reflection-, and line calibration components through scattering parameter cascading, signal flow analysis, and matrix identity. Finally, de-embedding the DUT's S parameters is completed based on the scattering parameter cascading principle. This method can eliminate the impact of the lead and pad structures on the original circuit performance during GaAs-based radio frequency integrated circuit (RFIC) measurement, and has the advantages of good de-embedding effect, reduced calibration component requirements, and low computational resource usage.

Description

Technical Field

[0001] The present invention belongs to the field of radio frequency microwave measurement, and in particular relates to a de-embedding method under a gallium arsenide-based integrated circuit process. Technical Background

[0002] Modern wireless communication systems are developing toward higher frequencies, higher speeds, and smaller form factors, and correspondingly, RF components are also moving toward higher integration. Due to the smaller size and higher operating frequencies of RF integrated circuits, the wire leads and pad structures introduced during measurement often significantly impact device performance during RF microwave measurements. De-embedding methods for on-chip RF integrated circuit measurements are highly practical.

[0003] RF integrated devices are manufactured using complex semiconductor processes, resulting in physical dimensions at the micron level. The associated measurement is wafer probing, where the semiconductor wafer housing the device is mounted on an RF probe station and observed and operated under a microscope using a micron-scale RF probe connected to a vector network analyzer.

[0004] Pre-wafer calibration is divided into off-chip calibration and on-chip de-embedding. Off-chip calibration involves using standard components supplied with the vector analyzer to calibrate the measurement reference plane from the vector analyzer port to the RF probe tip. On-chip de-embedding involves using custom calibration components to translate the measurement reference plane from the RF probe tip to the ideal position on the device under test.

[0005] Reference 1 (JV Butler, D. Rytting, M. F. Iskander, R. Pollard and M. Vanden Bossche, "16-term error model and calibration procedure for on wafer network analysis measurements (MMICs)," in IEEE Trans. Microwave Symposium Digest, vol. 3, no. 12, pp. 1125-1127, Dec. 1991) proposes a 16-term error model for on-wafer measurement calibration. Because crosstalk on both sides of the DUT is taken into account, eight of the error terms are used to track leakage errors. For systems without signal leakage, this greatly simplifies the error model while ensuring that de-embedding accuracy remains unchanged.

[0006] In Reference 2 (C.Liu, A.Wu, C.Li and N.Ridler, "A New SOLT Calibration Method for Leaky On-Wafer Measurements Using a 10-Term Error Model," in IEEE Transactions on Microwave Theory and Techniques, vol. 66, no. 8, pp. 3894-3900, Aug. 2018.), a de-embedding method for the 10-term error model is proposed. Since only the crosstalk between RF probes is considered, this is a simplification of the 16-term error model and is highly dependent on the accuracy of the matching calibration components.

[0007] In a system without leakage crosstalk, while maintaining de-embedding accuracy, the error model can be further simplified to an eight-term error model. De-embedding is achieved using a set of through, reflect, and line calibration components. The eight-term error network on both sides of the DUT is solved using matrix identities and signal flow analysis based on the calibration component scattering parameters. Finally, de-embedding correction of the DUT's scattering parameters is achieved using the scattering parameter cascade principle. Summary of the Invention

[0008] The present invention aims to provide a de-embedding method for gallium arsenide-based integrated circuit technology. The method de-embedding eliminates the influence of lead and pad structures introduced during on-chip measurement of radio frequency integrated circuits on the measurement results of scattering parameters of the device under test. The method uses the scattering parameters of direct, reflected, and line calibration components to determine the eight interference errors introduced by the lead and pad structures through a de-embedding algorithm. The de-embedding is then completed based on the cascade principle of the scattering parameters.

[0009] The technical solution for achieving the purpose of the present invention is as follows: In a first aspect, the present invention provides a de-embedding method in a gallium arsenide-based integrated circuit process, comprising the following steps:

[0010] Step 1: Construct through, reflection, and line calibration components based on the lead and pad structure of the device under test;

[0011] Step 2: Obtain the S parameters of the test piece and the calibration piece;

[0012] Step 3: Solve the eight errors introduced by the lead and pad structure;

[0013] Step 4: De-embedding the S parameters of the DUT is completed based on the eight errors.

[0014] In a second aspect, the present application further provides a computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the method described in the first aspect when executing the program.

[0015] In a third aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method described in the first aspect above.

[0016] Compared with the prior art, the present invention has the following beneficial effects:

[0017] (1) The de-embedding algorithm proposed in the present invention is derived from black box theory analysis and focuses only on the port scattering parameter matrix of the error network introduced by the pads and transmission lines. Therefore, there is no need for complex modeling of the error network and the operation is simple.

[0018] (2) The through, reflective, and line calibration components used in the present invention do not require high-precision standard components such as matching calibration components, and thus have better de-embedding accuracy and repeatability.

[0019] (3) The present invention further simplifies the error model to an eight-term error model for a system without leakage crosstalk. While ensuring the de-embedding accuracy, the de-embedding algorithm is simpler and the de-embedding program has lower time complexity. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a flow chart for implementing the present invention.

[0021] Figure 2 Schematic diagram of the structure of the inductor DUT used for de-embedding demonstration of the present invention.

[0022] Figure 3 This is a schematic diagram of the lead and pad structure required for measuring the DUT in the de-embedding demonstration of the present invention, which is the error network part that should be eliminated by de-embedding.

[0023] Figure 4(a) is a schematic diagram of the through calibration component structure, Figure 4(b) is a schematic diagram of the reflection calibration component structure, and Figure 4(c) is a schematic diagram of the line calibration component structure.

[0024] Figure 5(a) is a schematic diagram of the T parameter matrix of the cascaded through components, Figure 5(b) is a schematic diagram of the T parameter matrix of the cascaded line calibration components, and Figure 5(c) is a schematic diagram of the normalized voltage at the reflection calibration component port.

[0025] Figure 6(a) shows S 11 The real part de-embedding result diagram, where Figure 6(b) is S 11 Imaginary part de-embedding result diagram.

[0026] Figure 7(a) shows S 21The real part de-embedding result diagram, where Figure 7(b) is S 21 Imaginary part de-embedding result diagram.

[0027] Figure 8(a) shows S 11 Phase de-embedding results, Figure 8(b) is S 21 Phase de-embedding result diagram. DETAILED DESCRIPTION

[0028] like Figure 1 As shown, the present invention proposes a de-embedding method under a gallium arsenide-based integrated circuit process, comprising: constructing through, reflection, and line calibration components based on the lead and pad structures of the device under test; obtaining the S parameters of the device under test and the calibration components; importing the S parameters of the device under test and the calibration components into a computer de-embedding program; solving eight errors introduced by the lead and pad structures; and completing the de-embedding of the S parameters of the device under test based on the calculated eight errors.

[0029] This method aims to address the impact of the lead and pad structures introduced during two-port RF integrated circuit measurement on the performance of the original circuit. A set of through, reflective, and line calibration components are used to de-embed the measurement results to restore the original performance of the RF integrated circuit.

[0030] The construction of the calibration component involves the following steps: directly connecting the leads and pad structures introduced on both sides of the DUT to form a through calibration component; placing the leads and pad structures introduced on both sides of the DUT horizontally and maintaining a certain distance between them to achieve open-circuit terminations to form a reflection calibration component; placing the leads and pad structures introduced on both sides of the DUT horizontally and connecting a transmission line of equal width in the middle to form a line calibration component. To avoid phase ambiguity in the de-embedding results, the phase delay caused by the transmission line length must not exceed 160°.

[0031] Obtain the S parameters of the DUT and calibration components and import them into the computer de-embedding program to convert the S parameters of the DUT and calibration components into T parameters for the subsequent solution of the eight errors of the error network; specifically:

[0032] Convert the S parameter matrix of the thru calibration component and the line calibration component into a cascaded T parameter matrix;

[0033] According to the T parameter cascade principle, the T parameter matrix of the through component is equal to the cascade of the T parameter matrices of the error networks on both sides of the DUT, and the T parameter matrix of the line calibration component is equal to the cascade of the T parameter matrices of the middle and extended lines of the error networks on both sides of the DUT. Based on the identity relationship between these two matrices, the error terms e1 and e2 of the error networks on both sides of the DUT are solved.

[0034] Based on the identity that the through-component T parameter matrix is equal to the cascade of the T parameter matrices of the error networks on both sides of the DUT, the error terms e3, e4, e5, and e6 of the error networks on both sides of the DUT are solved by substituting the error terms e1 and e2 and eliminating the elements.

[0035] According to the calculation rules of the cascaded T parameter matrix of the two ports of the reflection calibration component, the normalized voltage wave of port 1 is equal to the cascaded T parameter matrix of the reflector network multiplied by the normalized voltage wave of port 2. The expressions of the scattering parameters of the reflection calibration component port, the terminal reflectivity, and the cascaded T parameters of the reflector with respect to the port normalized voltage wave are obtained. After elimination and simplification, the error terms e7 and e8 of the error network on both sides of the device under test are obtained.

[0036] The solution to the eight errors is as follows: Let the T parameter error matrix T introduced by the left and right pads and leads of the test piece be A 、T B for T A 、T B That is the error matrix required, where a, b, c, d, e, f, x 22 、y 22 The unknowns in the T parameter error matrix introduced by the left and right pads and leads of the device under test are the eight errors required to be obtained; the S parameter matrices of the through calibration component and the line calibration component are converted into the cascaded T parameter matrix T t and T l ,have Where T t and T l is the cascade T parameter matrix of the through piece and the line calibration piece, is the measured known quantity, and the line calibration piece cascade T parameter matrix T l It is composed of the T parameter matrix cascade of the left and right error networks and the middle extension line. According to the transmission line theory is the T parameter matrix of the extended line of the line calibration piece, where γ is the transmission line propagation constant, l is the transmission line length, Subsequent calculations can be done by elimination and do not require knowledge; It is the inverse of the T parameter matrix of the line calibration piece and the T parameter matrix of the straight calibration piece, which is a measured known quantity; the return loss at the input port of the reflector is S R11 、S R22 All are known quantities.

[0037] According to T t =T A *T B 、 Substitute the matrix equation into the elimination equation to get That is:

[0038]

[0039] According to the above matrix identity and through elimination We get the system of equations for the error terms e1 and e2:

[0040]

[0041] in e2=b,T L is the T parameter matrix of the extension line of the linear calibration piece, which does not need to be known; the error terms e1 and e2 are the solutions to the above equations.

[0042] According to T t =T A *T B The through-piece cascade relationship has the following matrix equation:

[0043]

[0044] According to the above matrix identity, the following four error terms are solved:

[0045]

[0046]

[0047] The relationship between the two-port cascade T parameter matrix of the reflection calibration component and the port normalized voltage wave is:

[0048]

[0049]

[0050] where a ij 、b ij is the normalized voltage wave at the reflection calibration port, i is the input port number of the reflection calibration component, and j is the port number of the single-side reflection component. The reflection coefficient at the open circuit end of the reflection component is Γ R , which does not need to be known. By eliminating variables and simplifying, we can get the error term as follows:

[0051]

[0052] The S parameters of the DUT are de-embedded according to the eight errors. Specifically, the S parameter matrix of the DUT is converted into a T parameter matrix for subsequent calculation and processing; the T parameter matrix after de-embedding of the DUT is obtained by correcting the T parameter cascade relationship, which is equal to the T parameter matrix of the DUT without de-embedding multiplied by the error term e 1～ The inverse matrix of the T parameter matrix of the error network on both sides of the DUT determined by e8; the T parameter matrix obtained after de-embedding the DUT is converted into an S parameter matrix output.

[0053] After solving the eight errors e1 to e8, according to the scattering parameter cascade principle, the T parameter matrix of the DUT after de-embedding is expressed as follows:

[0054]

[0055] Where T de-embed is the T parameter matrix obtained after de-embedding the DUT, T A 、T B is the cascade T parameter error matrix introduced by the left and right pads and leads of the DUT, T dut is the T parameter matrix of the DUT without de-embedding.

[0056] Finally, the de-embedded T parameter matrix of the DUT is converted into an S parameter matrix for output, thus completing the de-embedding of the S parameters of the DUT.

[0057] The present invention will be further described below with reference to the accompanying drawings and examples.

[0058] Example

[0059] like Figure 1 As shown, the present invention provides a de-embedding method for a gallium arsenide-based integrated circuit process, which is implemented in four steps: constructing through, reflection and line calibration component structures; obtaining the S parameters of the device under test and the calibration component; solving the eight errors introduced by the pads and leads; and completing the de-embedding of the S parameters of the device under test based on the eight errors.

[0060] The construction of the calibration piece is divided into three steps: directly connecting the leads and pad structures introduced on both sides of the device under test to form a straight-through calibration piece; placing the leads and pad structures introduced on both sides of the device under test horizontally and maintaining a certain distance to achieve open-circuit terminals to form a reflection calibration piece; placing the leads and pad structures introduced on both sides of the device under test horizontally and connecting a section of equal-width transmission line in the middle to form a line calibration piece. In order to avoid phase ambiguity in the de-embedding result, the phase delay caused by the transmission line length is required to be less than 160°. The frequency range corresponding to the phase is the frequency range applicable to de-embedding, and its specific length is determined by electromagnetic simulation software.

[0061] Input the S parameters of the DUT and the calibration part into the computer, and then convert the S parameter matrix of the DUT into the T parameter matrix T dut , through the S parameter matrix into the T parameter matrix T t , the S parameters of the line calibration piece are converted into the T parameter matrix T parameter matrix T l , for subsequent de-embedding procedures to process.

[0062] Figures 5(a), 5(b), and 5(c) show the T parameter error network cascade diagram and the port normalized voltage wave diagram of the through, line, and reflection calibration components. t =T A *T B 、T l =T A *T L *T BThe matrix identity relationship and the relationship between the two-port cascade T parameter matrix of the reflection calibration component and the port normalized voltage wave are further analyzed and solved to obtain the eight errors of the error network on both sides of the device under test. The specific result expression is as follows:

[0063]

[0064]

[0065]

[0066]

[0067]

[0068]

[0069]

[0070]

[0071] Where T t 、T l is the T parameter matrix of the through piece and line calibration piece, T L is the T parameter matrix of the extension line of the line calibration piece, which does not need to be known, S R11 、S R22 is the return loss at the two ports of the reflector.

[0072] The T parameter matrix of the error network on both sides of the DUT determined by the eight errors where x 22 y 22 =e3.

[0073] According to the cascade relationship between the error network to be determined and its structure in the DUT, the T parameter matrix of the DUT is de-embedded. The T parameter matrix of the DUT after de-embedding is T de-embed The expression is as follows:

[0074]

[0075] Where T A 、T B is the cascade T parameter error matrix introduced by the left and right pads and leads of the DUT, which is determined by the eight errors. dut is the T parameter matrix of the DUT without de-embedding.

[0076] Finally, the de-embedded T parameters are converted into S parameter outputs, and the de-embedded result diagram is drawn to complete the de-embedding of the scattering parameters of the DUT.

[0077] like Figure 2 The figure shows the inductor DUT to be de-embedded. It is a planar spiral inductor fabricated using a GaAs-based integrated circuit process. The metal layer on its substrate is a three-layer composite structure of metal and compound. The GaAs substrate 1 is 100µm thick, the ground pad 2 is 80µm x 75µm, the spacing 3 between the ground pad and the signal pad is 50µm, and the signal pad 4 is 65µm x 75µm. A ground post 5 connects the ground pad to the signal ground beneath the GaAs substrate. To demonstrate a general de-embedding method, the inductor 6 to be tested has random dimensions, and the signal trace 7 has random length.

[0078] like Figure 3 The figure shows the pads and leads required for measuring the inductor to be measured. These are the structures that affect the measurement results and are eliminated during de-embedding. The GaAs substrate 1 is 100µm thick, the ground pad 2 is 80µm x 75µm, the spacing 3 between the ground pad and the signal pad is 50µm, the signal pad 4 is 65µm x 75µm, and the signal lead 5 is 150µm long and 10µm wide, matching the width of the inductor to be measured. A ground post 6 connects the ground pad to the signal ground beneath the GaAs substrate.

[0079] like Figure 4(a) to Figure 4(c) The following figure shows the calibration component structure, determined by the pad and lead structure required for the inductance measurement. Figure 4(a) shows a through-type calibration component. The GaAs substrate 1 is 100 μm thick, the ground pad 2 is 80 × 75 μm, the spacing 3 between the ground pad and the signal pad is 50 μm, the signal pad 4 is 65 × 75 μm, the signal lead 5 is 300 μm long and 10 μm wide, and the ground post 6 connects the ground pad to the signal ground below the GaAs substrate. Figure 4(b) shows a reflection calibration component. The substrate, pad, and ground post structures are identical to those of the through-type component. The open-ended lead 7 is 150 μm long and 10 μm wide. Figure 4(c) shows a line calibration component. The substrate, pad, and ground post structures are identical to those of the through-type component. The connecting wire 8 is 800 μm long and 10 μm wide.

[0080] Figure 5(a) is a schematic diagram of the cascade T parameter matrix of the through-element. The scattering parameter matrix at both ends of the through-element is measured, which is composed of the error network T A 、T B Cascade structure; Figure 5 (b) is a schematic diagram of the line calibration piece cascade T parameter matrix, measuring the scattering parameter matrix at both ends of the line calibration piece, which is composed of the error network T A 、T B The parameter matrix of the extended line T of the line calibration piece is cascaded; Figure 5(c) is a schematic diagram of the normalized voltage at the port of the reflection calibration piece, and the return loss S at both ends of the reflection calibration piece is measured. R11 、S R22 .

[0081] After the structures of the DUT and calibration pieces are prepared and their scattering parameters are obtained, they are imported into the computer and de-embedded using the de-embedding algorithm described above. Finally, the de-embedding result graph is output.

[0082] Figure 6(a) to Figure 6(b) For S 11 The de-embedding results of the parameters are shown in Figure 6(a). 11 The real part de-embedding result diagram, where Figure 6(b) is S 11 Imaginary part de-embedding result diagram.

[0083] Figure 7(a) to Figure 7(b) For S 21 The de-embedding results of the parameters, where Figure 7(a) is S 21 The real part de-embedding result diagram, where Figure 7(b) is S 21 Imaginary part de-embedding result diagram.

[0084] Figure 8(a) to Figure 8(b) The de-embedding result of the phase is shown in Figure 8(a). 11 Phase de-embedding results, Figure 8(b) is S 21 Phase de-embedding result diagram.

[0085] In the figure, the expected curve represents the scattering parameters of the inductor under test, excluding the leads and pad structures. The dut curve represents the scattering parameters of the DUT before de-embedding. The de-embedded curve represents the scattering parameters after de-embedding. The de-embedding results show that within the 5-30 GHz frequency band, the de-embedding error remains within 5%, demonstrating excellent de-embedding of the DUT's scattering parameters.

[0086] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be determined by the appended claims.

Claims

1. A de-embedding method in a gallium arsenide-based integrated circuit process, characterized in that: The steps include: Step 1: Construct through, reflection, and line calibration components based on the lead and pad structure of the device under test; Step 2: Obtain the S parameters of the test piece and the calibration piece; Step 3: Solve the eight errors introduced by the lead and pad structure, including: Step 3-1, converting the S parameter matrices of the through calibration component and the line calibration component into a cascaded T parameter matrix; Step 3-2: According to the T parameter cascade principle, the through-component T parameter matrix is equal to the cascade of the T parameter matrices of the error networks on both sides of the DUT, and the line calibration component T parameter matrix is equal to the cascade of the T parameter matrices of the error networks on both sides of the DUT and the extended line T parameter matrix. Based on the identity relationship between these two matrices, solve the error terms e1 and e2 of the error networks on both sides of the DUT for the simultaneous equations. Assume that the T parameter error matrix T introduced by the left and right pads and leads of the DUT is A 、T B , a, b, c, d, e, f, x 22 、y 22 The unknowns of the T parameter error matrix introduced by the left and right pads and leads of the device under test, that is, the eight errors required to be obtained; the S parameter matrix of the through calibration component and the line calibration component is converted into the cascaded T parameter matrix T t and T l ,have Where T t and T l is the cascaded T parameter matrix of the through component and the line calibration component, It is the inverse of the T parameter matrix of the line calibration piece and the T parameter matrix of the straight calibration piece. The return loss at the input port of the reflector is S R11 、S R22 All are known quantities; According to T t =T A *T B 、T l =T A *T L *T B Substituting the matrix equation relationship into elimination, we get: According to the above matrix identity relationship, we can get the equation system about the error terms e1 and e2: in e2=b,T L is the T parameter matrix of the extended line of the linear calibration piece, and the error terms e1 and e2 are the solutions to the above equations; Step 3-3: Based on the identity that the T parameter matrix of the through component is equal to the cascade of the T parameter matrices of the error networks on both sides of the DUT, by substituting the error terms e1 and e2 and eliminating the elements, the error terms e3, e4, e5, and e6 of the error networks on both sides of the DUT are solved; According to T t =T A *T B The through-piece cascade relationship has the following matrix equation: According to the above matrix identity, the following four error terms are solved: Step 3-4: Based on the calculation rules of the cascaded T parameter matrix of the two ports of the reflection calibration component, the normalized voltage wave of the first port is equal to the cascaded T parameter matrix of the reflector network multiplied by the normalized voltage wave of the second port. The expressions of the scattering parameters of the reflection calibration component port, the terminal reflectivity, and the cascaded T parameters of the reflector with respect to the port normalized voltage wave are obtained. The error terms e7 and e8 of the error network on both sides of the DUT are obtained by elimination and simplification. The relationship between the two-port cascade T parameter matrix of the reflection calibration component and the port normalized voltage wave is: where a ij 、b ij is the normalized voltage wave at the reflection calibration port, i is the input port number of the reflection calibration component, j is the port number of the single-side reflection component; the reflection coefficient at the open circuit end of the reflection component is Γ R , by eliminating variables and simplifying, we can get the error term as follows: Step 4: De-embedding the S parameters of the DUT is completed based on the eight errors.

2. The de-embedding method in a gallium arsenide-based integrated circuit process according to claim 1, characterized in that: Step 1 specifically includes: Step 1-1: directly connect the leads and pad structures introduced on both sides of the DUT to form a through calibration component; Step 1-2: Place the leads and pads on both sides of the DUT horizontally and maintain a certain distance between them to open the terminals, forming a reflection calibration component. Steps 1-3: Place the leads and pads on both sides of the DUT horizontally and connect a transmission line of equal width in the middle to form a line calibration component. The phase delay caused by the transmission line length must not exceed 160°.

3. The de-embedding method in a gallium arsenide-based integrated circuit process according to claim 1, characterized in that: Step 4 specifically includes: Step 4-1, convert the S parameter matrix of the device under test into a T parameter matrix for subsequent calculation and processing; Step 4-2: The T parameter matrix after de-embedding of the DUT is obtained by correcting the T parameter cascade relationship. The T parameter matrix of the DUT without de-embedding is equal to the T parameter matrix of the DUT without de-embedding multiplied by the error term e. 1～ The inverse matrix of the error network T parameter matrix on both sides of the DUT determined by e8; Step 4-3: Convert the T parameter matrix obtained after de-embedding the DUT into an S parameter matrix for output.

4. The de-embedding method in a gallium arsenide-based integrated circuit process according to claim 3, characterized in that: After solving the eight errors e1 to e8, according to the scattering parameter cascade principle, the T parameter matrix of the DUT after de-embedding is expressed as follows: Where T de-embed is the T parameter matrix obtained after de-embedding the DUT, T A 、T B is the cascade T parameter error matrix introduced by the left and right pads and leads of the DUT, T dut is the T parameter matrix of the DUT without de-embedding.

5. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the program, the steps of the method according to any one of claims 1 to 4 are implemented.

6. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the steps of the method according to any one of claims 1 to 4 are implemented.

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