Methods, systems, electronic devices, and storage media for automatically populating data

By directly filling the FIFO register with data and writing it to the terminal device through the terminal controller, the problem of long data filling time in the direct memory access system is solved, and more efficient data transmission is achieved.

CN115391248BActive Publication Date: 2025-10-31GUANGZHOU ARTINCHIP TECH CO LTD
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Patent Information

Application Number
CN202211134792.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-19
Publication Date
2025-10-31
Estimated Expiration
2042-09-19

AI Technical Summary

Technical Problem

In existing technologies, the data filling process in direct memory access systems is time-consuming and inefficient, mainly due to the inconvenience of data transmission caused by multiple read and write operations.

Method used

The terminal controller directly fills the target data into the FIFO register and reads the data from the FIFO register before writing it to the terminal device, eliminating the need for the source controller to read data from the source device and transmit it through the bus matrix, thus simplifying the data flow.

Benefits of technology

It shortens data filling time, improves data transmission efficiency, reduces bus usage, and enhances data transmission efficiency.

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Abstract

This invention provides a method, system, electronic device, and storage medium for automatically filling data. The method includes: a terminal controller responding to a data filling request from a terminal device by sending target data to a FIFO register; the terminal controller reading the target data from the FIFO register; and the terminal controller storing the target data in a target storage space, wherein the target storage space is the storage space in the terminal device where the target data is stored. This invention solves the problems of long data filling time and inconvenience, improving data transmission efficiency.
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Description

Technical Field

[0001] This invention relates to the field of integrated circuit design technology, and in particular to a method, system, electronic device, and storage medium for automatically filling in data. Background Technology

[0002] `memset` is an initialization function in the C / C++ language for computers. Its function is to fill a block of memory with a given value. This function is typically used to initialize newly allocated memory. In current technology, Direct Memory Access (DMA) is commonly used to implement the `memset` function, which fills a specified location with a given value. This data transfer first requires the source controller in the DMA system to obtain data from the source device via the bus matrix, then write the data to a FIFO buffer. Finally, the terminal controller reads the data from the FIFO buffer and writes the read data to the specified location in the terminal device via the bus matrix. Although DMA technology can replace the CPU in performing data transfer, the current data flow involves multiple read and write operations, resulting in long processing times and low efficiency. Summary of the Invention

[0003] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of the claims.

[0004] This invention provides a method, system, electronic device, and storage medium for automatically filling data, which can solve the problems of long data filling time and inconvenience, and improve the efficiency of data transmission.

[0005] In a first aspect, embodiments of the present invention provide a method for automatically filling data, applied to a direct memory access system, the direct memory access system including a terminal controller and a FIFO register, the method for automatically filling data including:

[0006] In response to a data filling request from a terminal device, the terminal controller sends the target data to the FIFO register;

[0007] The terminal controller reads the target data from the FIFO register;

[0008] The terminal controller stores the target data in the target storage space, wherein the target storage space is the storage space in the terminal device that stores the target data.

[0009] In a second aspect, embodiments of the present invention provide a terminal controller applied to a direct memory access system, the direct memory access system further including a FIFO register, and the terminal controller comprising:

[0010] The first processing module is used to send target data to the FIFO register in response to a data filling request from the terminal device;

[0011] The second processing module is used to read the target data from the FIFO register;

[0012] The third processing module is used to store the target data in a target storage space, wherein the target storage space is the storage space in the terminal device that stores the target data.

[0013] Thirdly, embodiments of the present invention provide an electronic device, the electronic device including a processor, a memory, and one or more programs, the one or more programs being stored in the memory and configured to be executed by the processor, the programs being executed by the processor to implement the automatic data filling method of the first aspect described above.

[0014] Fourthly, embodiments of the present invention provide a computer-readable storage medium storing instructions that, when executed on a computer, cause the computer to perform the method of automatically filling in data described in the first aspect.

[0015] The embodiments of the present invention include at least the following beneficial effects: By automatically filling the specified data into the FIFO register of the direct memory access system through the terminal controller of the direct memory access system, and then reading the specified data from the FIFO register and writing the data into the terminal device, the step of the source controller of the direct memory access system reading the specified data from the source device and then transmitting the data to the FIFO buffer through the bus matrix can be eliminated. This shortens the data flow of the direct memory access system in moving the specified data to the terminal device, thereby solving the problems of long time consumption and inconvenience in data filling process and improving the efficiency of data transmission. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of a SoC (System-on-a-Chip) application of an automatic data filling method according to an embodiment of the present invention.

[0017] Figure 2 This is a flowchart of a method for automatically filling in data according to an embodiment of the present invention.

[0018] Figure 3 This is a schematic diagram of the structure of a terminal controller according to an embodiment of the present invention.

[0019] Figure 4 This is a structural diagram of an electronic device according to an embodiment of the present invention. Detailed Implementation

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] It should be understood that if the description of orientation, such as up, down, front, back, left, right, etc., is used in the specification, claims and above drawings, the orientation or positional relationship indicated is based on the orientation or positional relationship shown in the drawings, it is only for the purpose of facilitating the description of the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention.

[0022] It should be noted that "at least one" means one or more, "more than one" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the number itself, while "above," "below," and "within" are understood to include the number itself. If it is described that "first" and "second" are only used to distinguish technical features, and should not be construed as indicating or implying relative importance, or implicitly indicating the number of technical features indicated, or implicitly indicating the order of the technical features indicated.

[0023] Terminology Explanation:

[0024] SoC: SoC is an abbreviation for System on Chip, also known as a system-on-a-chip. It means that it is a product, an integrated circuit with a specific purpose, which contains a complete system and all the embedded software.

[0025] DDR: DDR is an abbreviation for Double Data Rate SDRAM, which is a type of memory.

[0026] Reference Figure 1 The above is an example diagram of a SoC (System-on-a-Chip) application of an automatic data filling method provided in an embodiment of the present invention, such as... Figure 1As shown, the SoC 100 includes a Direct Memory Access (DMA) system 101, a source device 102, a bus matrix 103, and a terminal device 104. The DMA system 101 may include a source controller 105, a FIFO buffer 106, a multiplexer (MUX) 107, a terminal controller 108, and a FIFO register 109. The source controller 105 can communicate with the FIFO buffer 106, the multiplexer 107 can communicate with the FIFO buffer 106, the terminal controller 108, and the FIFO register 109 respectively, and the terminal controller 108 can communicate with the FIFO register. The source controller 105 can access the source device 102 through the bus matrix 103, and the terminal controller 108 can access the terminal device 104 through the bus matrix 103.

[0027] Reference Figure 2 This is a flowchart of a method for automatically filling data according to an embodiment of the present invention. This method is applied to a direct memory access system, which may include a terminal controller and a FIFO register. The method for automatically filling data may include, but is not limited to:

[0028] Step S201: In response to a data filling request from a terminal device, the terminal controller sends the target data to the FIFO register.

[0029] Specifically, the terminal device can be either an external device or internal storage. The terminal device can complete the data filling work of a specified storage space in the terminal device by initiating a data filling request to the direct memory access system. For example, if the terminal device is internal storage, it can perform the task of data initialization for newly allocated memory space in internal storage; if the terminal device is an external device, it can perform the task of data initialization for free storage space in the external device.

[0030] The target data is obtained after the CPU starts the direct memory access system and configures the DMA register. The terminal controller in the direct memory access system responds to the data filling request sent by the terminal device, sends the set target data and temporarily stores it in the FIFO register of the direct memory access system.

[0031] Step S202: The terminal controller reads the target data from the FIFO register.

[0032] Specifically, the terminal controller reads the target data stored in the FIFO register through step S201.

[0033] In some embodiments, the direct memory access system further includes a data selector, and step S202 described above may include, but is not limited to:

[0034] The terminal controller receives target data output by the data selector, which is used to select the data input to the data selector and output the target data whose source address is located in the FIFO register.

[0035] Specifically, in Figure 1 Based on the Direct Memory Access System 100, the data selector (MUX) 107 can receive two data streams, one from the FIFO buffer 106 and the other from the FIFO register 109. In this embodiment, the data selector (MUX) 107 selects and outputs the data whose source address is located in the FIFO register, which is the target data.

[0036] Step S203: The terminal controller stores the target data in the target storage space, where the target storage space is the storage space in the terminal device that stores the target data.

[0037] Specifically, the terminal controller in the direct memory access system can read the target data from the FIFO register in step S202, and then send the target data to the terminal device and store the target data in the target storage space in the terminal device. The target storage space can be the storage space corresponding to the newly requested physical address in the internal memory, or it can be a pre-set specified storage area in the external device.

[0038] In some embodiments, step S203 may include, but is not limited to:

[0039] The terminal controller stores the target data to the target storage space via a bus matrix.

[0040] Furthermore, the aforementioned terminal controller stores the target data to the target storage space via a bus matrix, which may include, but is not limited to:

[0041] The terminal controller sends the target data and the destination address of the target data to the bus matrix, so that the bus matrix stores the target data in the target storage space corresponding to the destination address according to the destination address.

[0042] Combination Figure 1 Further explanation of the embodiments of the present invention:

[0043] In the prior art, the process of filling data into the terminal device 104 via the Direct Memory Access system 101 is as follows: The DMA system is started; the source controller 105 accesses the source device 102 (which can be memory) via the bus matrix 103 and reads specified data from the source device 102; the source controller 105 writes the specified data into the FIFO buffer 106; the terminal controller 108 reads the specified data from the FIFO buffer 106 via the data selector (MUX) 107; the terminal controller 108 accesses the terminal device 104 (which can be an external device or memory) via the bus matrix 103 and writes the specified data into a specified location on the terminal device 104. During the above process of filling data into the terminal device 104, the data stream can be... Figure 1 The letters in the text represent, that is

[0044] Compared to existing technologies, the process of filling data into the terminal device 104 via the Direct Memory Access system 101 in this embodiment of the invention is as follows: The DMA system is started, and the terminal controller 108 automatically fills the target data into the FIFO register 109; the terminal controller 108 reads the target data from the FIFO register 109 through the data selector (MUX) 107; the terminal controller 108 accesses the terminal device 104 through the bus matrix 103 and writes the target data to a specified location on the terminal device 104. The terminal device 104 can be an external device or memory. During the above process of filling data into the terminal device 104, the data stream can be... Figure 1 The letters in the text represent, that is This invention shortens the data flow in existing technologies, reduces multiple read / write operations, and eliminates the need for the source controller 105 to read data from the source device 102. Furthermore, it reduces the number of bus operations. For example, if 1024 words (each word occupies 4 bytes and all words contain identical data) need to be transmitted, existing technologies require the CPU to pre-write the words into the source device's 1024-word space, occupying the bus 1024 times. Then, the DMA starts, performing 1024 reads and 1024 writes, requiring 1024 reads and 1024 writes in total, for a total of 2048 operations. In this embodiment, the CPU only needs to pre-write the words into the DMA's FIFO register once, occupying the bus only once. Then, the DMA starts, performing 1024 writes. During this process, reading does not require bus access, only writing requires 1024 operations.

[0045] The embodiments of the present invention will be further explained with reference to specific examples:

[0046] Example 1:

[0047] When initializing video memory, display data is typically stored in DDR. However, data loss occurs when DDR loses power. During the fast boot process, if initialization is not performed, the DDR data may become unpredictable, resulting in screen flickering. In this situation, the following steps can be used to initialize DDR data while saving transfer time:

[0048] A. Configure the DMA controller and start DMA;

[0049] B. The terminal controller fills the set color data (e.g., red 0x00FF0000) into the FIFO register;

[0050] C. According to Figure 1 The data stream shown Write color data to the terminal device;

[0051] D. The DMA automatically repeats the data stream from step C until the software-specified DDR is fully initialized.

[0052] Example 2:

[0053] When quickly displaying a certain color, the following steps can be used to initialize the DDR data while saving transmission time:

[0054] A. Configure the DMA controller and start DMA;

[0055] B. The terminal controller fills the set color data (e.g., red 0x00FF0000) into the FIFO register;

[0056] C. According to Figure 1 The data stream shown Write color data to the terminal device;

[0057] D. The DMA automatically repeats the data stream from step C until the software-specified DDR is fully initialized.

[0058] E. The monitor reads data from the specified memory and displays it.

[0059] Example 3:

[0060] When initializing large memory blocks, a 32-bit initialization method can be used to quickly initialize the memory. In this case, the following steps can be used to initialize the large memory while saving transfer time:

[0061] A. Configure the DMA controller and start DMA;

[0062] B. The terminal controller fills the 32-bit software settings into the FIFO register;

[0063] C. According to Figure 1 The data stream shown Write 32-bit data to the terminal device;

[0064] D. DMA automatically repeats the data stream from step C until the software-specified memory is fully initialized.

[0065] The embodiments of the present invention include at least the following beneficial effects: By automatically filling the specified data into the FIFO register of the direct memory access system through the terminal controller of the direct memory access system, and then reading the specified data from the FIFO register and writing the specified data into the terminal device, the step of the source controller of the direct memory access system reading the specified data from the source device and then transmitting the data to the FIFO buffer through the bus matrix can be eliminated. This shortens the data flow of the direct memory access system in moving the specified data to the terminal device, thereby solving the problems of long time consumption and inconvenience in the data filling process and improving the efficiency of data transmission.

[0066] Reference Figure 3 This invention provides a terminal controller applied to a direct memory access system, which further includes a FIFO register. The terminal controller includes:

[0067] The first processing module 301 is used to send target data to the FIFO register in response to a data filling request from the terminal device.

[0068] The second processing module 302 is used to read target data from the FIFO register.

[0069] The third processing module 303 is used to store the target data into the target storage space, wherein the target storage space is the storage space in the terminal device that stores the target data.

[0070] In some embodiments, the direct memory access system described above may further include a data selector, and the terminal controller may further include:

[0071] The fourth processing module is used to receive the target data output by the data selector, wherein the data selector is used to select the data input to the data selector and output the target data whose source address is located in the FIFO register.

[0072] The fifth processing module is used to store the target data to the target storage space via a bus matrix.

[0073] This invention provides an electronic device, such as... Figure 4As shown, the electronic device includes a memory 401 and a processor 402; the memory 401 is used to store one or more computer programs; the processor 402 is used to implement the method for automatically filling data provided in the first aspect of the present invention when executing the program stored in the memory 401.

[0074] This invention provides a computer-readable storage medium storing instructions that, when executed on a computer, cause the computer to perform a method for automatically filling in data provided in this invention.

[0075] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present invention are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital substation (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., a solid-state disk (SSD)).

[0076] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0077] The various embodiments in this specification are described in a related manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the embodiments for electronic devices and computer-readable storage media are basically similar to the method embodiments, so the descriptions are relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0078] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. A method for automatically filling data, applied to a direct memory access system, the direct memory access system comprising a FIFO cache, a data selector, a terminal controller, and a FIFO register, wherein the FIFO cache can communicate with the data selector, characterized in that, The method for automatically filling in data includes: In response to a data filling request from a terminal device, the terminal controller sends the target data to the FIFO register; The terminal controller reads the target data from the FIFO register, including: the terminal controller receives the target data output by the data selector, wherein the data selector is used to select the data input to the data selector and output the target data whose source address is located in the FIFO register, and the data input to the data selector includes data from the FIFO buffer and data from the FIFO register; The terminal controller stores the target data in the target storage space, wherein the target storage space is the storage space in the terminal device that stores the target data.

2. The method for automatically filling in data according to claim 1, characterized in that, The terminal controller stores the target data in the target storage space, including: The terminal controller stores the target data in the target storage space via a bus matrix.

3. The method for automatically filling in data according to claim 2, characterized in that, The terminal controller stores the target data to the target storage space via a bus matrix, including: The terminal controller sends the target data and the destination address of the target data to the bus matrix, so that the bus matrix stores the target data in the target storage space corresponding to the destination address according to the destination address.

4. The method for automatically filling in data according to claim 1, characterized in that, The terminal controller stores the target data in a target storage space, wherein the target storage space is the storage space in the terminal device that stores the target data, including: The terminal controller stores the target data in a target storage space, wherein the target storage space is the storage space in the terminal device that stores the target data, and the terminal device is one of an external device and an internal memory.

5. A terminal controller applied to a direct memory access system, the direct memory access system further comprising a FIFO register, a data selector, and a FIFO buffer, the FIFO buffer being communicable with the data selector, characterized in that, The terminal controller includes: The first processing module is used to send target data to the FIFO register in response to a data filling request from the terminal device; The second processing module is used to read the target data from the FIFO register; The third processing module is used to store the target data in a target storage space, wherein the target storage space is the storage space in the terminal device that stores the target data; The fourth processing module is used to receive the target data output by the data selector, wherein the data selector is used to select the data input to the data selector and output the target data whose source address is located in the FIFO register, and the data input to the data selector includes data from the FIFO buffer and data from the FIFO register.

6. The terminal controller according to claim 5, applied to a direct memory access system, characterized in that, The terminal controller also includes: The fifth processing module is used to store the target data to the target storage space via a bus matrix.

7. An electronic device comprising a processor, a memory, and one or more programs stored in the memory and configured to be executed by the processor, the programs comprising a method for performing automatic data filling as described in any one of claims 1-4.

8. A computer-readable storage medium, characterized in that, The system stores processor-executable program instructions for performing the method of automatically filling in data as described in any one of claims 1-4.

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