Fully vertical GaN power diode based on heteroepitaxial substrate and method

Abstract

The present invention relates to a low-cost, high-performance device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate and a preparation method thereof, belonging to the field of semiconductor device technology. The fully vertical GaN power diode is based on a heteroepitaxial substrate, and combines heteroepitaxial, substrate peeling, and bonding processes to realize a large-scale, low-cost fully vertical GaN power diode, which greatly reduces the manufacturing cost of the fully vertical GaN power diode. Different from the traditional vertical GaN power diode preparation process, this patent proposes to etch grooves on the cathode side of the low electric field to achieve device isolation, which can effectively avoid the problem of electric field concentration in the groove near the anode of the traditional vertical GaN power diode, avoid premature breakdown of the device, and thus realize a high-performance fully vertical GaN power diode device.

Description

Technical Field

[0001] The present invention relates to a fully vertical GaN power diode based on a heteroepitaxial substrate and a method thereof, belonging to the technical field of semiconductor devices. Background Art

[0002] Compared with the first-generation semiconductors represented by silicon and the second-generation semiconductors represented by gallium arsenide, the third-generation semiconductors represented by III-V compound semiconductors silicon carbide and gallium nitride have broad application prospects in high-frequency communications, power electronics and other fields due to their excellent properties such as large bandgap, high critical breakdown field strength, high thermal conductivity, and high electron saturation drift rate.

[0003] Gallium nitride power electronic devices can be mainly divided into lateral and vertical structures in terms of structure. Lateral devices are mainly prepared by heteroepitaxial growth on substrates such as silicon, silicon carbide and sapphire. The breakdown voltage of the device is proportional to the spacing between the electrodes, which leads to the need for a larger device size in high-voltage operating scenarios. However, a larger device size will lead to an increase in parasitic elements such as parasitic inductance and capacitance inside the device, which in turn affects the electrical performance of the device. However, vertical devices achieved by homoepitaxial growth can improve the device's voltage resistance by adjusting the thickness and doping concentration of the epitaxial layer without increasing the device size. At the same time, vertical devices are less sensitive to surface trap states, which can effectively alleviate the current collapse effect of the device and thus improve device reliability. Therefore, the industry generally believes that the vertical device structure is the preferred structure for the next generation of power electronic components.

[0004] Power diodes, essential components in modern power electronics systems, play a crucial role. Gallium nitride (GaN) vertical power diodes can be categorized as quasi-vertical and fully vertical, depending on the cathode deposition location. Quasi-vertical devices are typically fabricated on insulating substrates (such as undoped silicon or sapphire). Due to the poor conductivity of the substrate or buffer layer, the n-type conductive layer can only be exposed through etching, resulting in a coplanar electrode structure. This structure exhibits etched steps, which lead to current crowding in the forward conduction mode, resulting in poor current spreading and high on-resistance and power loss. Fully vertical GaN power diodes, typically fabricated on GaN conductive substrates, exhibit excellent current spreading characteristics and are suitable for high-current, high-power applications. However, the small size and high price of GaN substrates have hindered the development of fully vertical GaN power devices. In summary, we propose a method for fabricating large-scale, low-cost fully vertical power electronic devices based on heteroepitaxial substrates, combining heteroepitaxial growth, substrate lift-off, and metal bonding processes.

[0005] Furthermore, fully vertical GaN power diodes currently primarily achieve device isolation on the anode side, but this isolation scheme can generate localized electric field concentration in the anode isolation groove, leading to premature device breakdown. Therefore, we propose a fully vertical GaN power device fabricated on a heteroepitaxial substrate, such as a sapphire substrate, silicon substrate, silicon carbide substrate, zinc oxide substrate, diamond substrate, aluminum nitride substrate, or gallium arsenide substrate. By achieving device isolation near the cathode in a low electric field, this design effectively avoids the problem of premature device breakdown caused by electric field concentration during device isolation near the anode. Summary of the Invention

[0006] In response to the shortcomings of the existing technology, the present invention provides a device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate and a preparation method thereof, which can effectively avoid the problem of local electric field concentration in the groove near the anode of traditional vertical GaN power diodes, which causes premature breakdown of the device.

[0007] Explanation of terms:

[0008] 1. MOCVD method: A new vapor phase epitaxial growth technology developed on the basis of vapor phase epitaxy (VPE) in MOCVD furnace;

[0009] 2. Metal bonding: Use some metal as an intermediate material to bond GaN grown on a sapphire substrate to low-resistance Si.

[0010] The present invention adopts the following technical solutions:

[0011] A device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate. The fully vertical GaN power diode is based on a heteroepitaxial substrate. An isolation groove is etched on the low-electric-field cathode side of the fully vertical GaN power diode. The groove is obtained by etching away the cathode electrode and the heavily doped n-type nitride layer using an ICP dry etching process to expose a lightly doped n-type nitride drift layer.

[0012] Preferably, the fully vertical GaN power diode is a PiN diode or a Schottky diode.

[0013] Preferably, the PiN diode includes, from bottom to top, a cathode electrode, a heavily doped n-type nitride layer (heavily doped n-GaN layer), a lightly doped n-type nitride drift layer (lightly doped n-GaN drift layer), a heavily doped p-type nitride layer (heavily doped p-GaN layer), an anode electrode and a low-resistance Si support layer.

[0014] Preferably, the Schottky diode includes, from bottom to top, a cathode electrode, a heavily doped n-type nitride layer (heavily doped n-GaN layer), a lightly doped n-type nitride drift layer (heavily doped n-GaN layer), an anode Schottky contact electrode and a low-resistance Si support layer.

[0015] Preferably, the heteroepitaxial substrate is a sapphire substrate, a silicon substrate, a silicon carbide substrate, a zinc oxide substrate, a diamond substrate, an aluminum nitride substrate, a gallium arsenide substrate, etc.; the groove is preferably a U-shaped groove, and the size of the U-shaped groove can be designed in the process layout according to actual conditions.

[0016] A method for preparing a device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate, when the fully vertical GaN power diode is a PiN diode, comprises the following steps:

[0017] (1) A heavily doped n-type nitride layer (heavily doped n-GaN layer), a lightly doped n-type nitride drift layer (lightly doped n-GaN drift layer), and a heavily doped p-type nitride layer (heavily doped p-GaN layer) are sequentially grown on a sapphire substrate using the MOCVD method. The sapphire substrate is then pre-thinned to 100 µm and polished.

[0018] (2) After electron beam evaporation of the heavily doped p-type nitride layer (heavily doped p-GaN layer) to form an ohmic contact (i.e., Ni / Au alloy layer), the PiN diode is bonded to the low-resistance Si support layer using metal bonding technology;

[0019] (3) Using a KrF pulsed excimer laser as the laser source, the sapphire substrate is peeled off from the bonded structure using the laser lift-off technique, and then a thin layer of heavily doped n-type nitride layer (heavily doped n-GaN layer) is etched using the ICP dry etching process. Subsequently, metal is evaporated on the heavily doped n-type nitride layer to form an ohmic contact and a cathode electrode.

[0020] (4) The ICP dry etching process is used to etch away part of the cathode electrode and the heavily doped n-type nitride layer (heavily doped n-GaN layer), exposing the lightly doped n-type nitride drift layer (lightly doped n-GaN drift layer) to prevent metal interconnection and achieve the effect of device isolation.

[0021] The lightly doped n-GaN drift layer has a low doping concentration and poor conductivity. By etching away the conductive cathode metal and the heavily doped n-GaN layer between multiple devices and exposing the lightly doped n-GaN drift layer with poor conductivity, the devices can be isolated from each other to achieve electrical isolation.

[0022] A method for preparing a device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate, when the fully vertical GaN power diode is a Schottky diode, comprises the following steps:

[0023] (1) A heavily doped n-type nitride layer (heavily doped n-GaN layer) and a lightly doped n-type nitride drift layer (lightly doped n-GaN drift layer) are grown sequentially on a sapphire substrate using MOCVD. The sapphire substrate is then pre-thinned to 100 µm and polished.

[0024] (2) After the lightly doped n-type nitride drift layer (lightly doped n-GaN drift layer) is electron beam evaporated to form a Schottky contact, the Schottky diode is bonded to the low-resistance Si support layer using metal bonding technology;

[0025] (3) Using a KrF pulsed excimer laser as the laser source, the sapphire substrate is peeled off from the bonded structure using the laser lift-off technique, and then a thin layer of heavily doped n-type nitride layer (heavily doped n-GaN layer) is etched using the ICP dry etching process. Subsequently, metal is evaporated on the heavily doped n-type nitride substrate to form an ohmic contact and a cathode electrode.

[0026] (4) The ICP dry etching process is used to etch away part of the cathode electrode and the heavily doped n-type nitride layer (heavily doped n-GaN layer), exposing the lightly doped n-type nitride drift layer (lightly doped n-GaN drift layer) to prevent metal interconnection and achieve the effect of device isolation.

[0027] Preferably, in step (1), the specific steps of pre-thinning the sapphire substrate to 100 µm include: ① irradiating the sapphire substrate with a femtosecond laser to generate color centers, which can increase the absorption of ultraviolet laser in subsequent steps and improve the efficiency of laser thinning and polishing;

[0028] ② Use ultraviolet laser to scan the surface of the sapphire substrate to destroy the crystal structure of the sapphire, so that the crystal material is separated from the sapphire body to achieve a thinning effect. The crystal surface roughness is small, eliminating the traditional chemical mechanical polishing step of the substrate.

[0029] Preferably, in step (2), the PiN diode is bonded to the low-resistance Si support layer using metal bonding technology, and the specific steps include:

[0030] A. The experiment uses the structure of Si / Ti / Au+Al2O3 / GaN / Ni / Au to complete Si-GaN bonding. Preferably, the thickness of Ti is 10 nm, the thickness of Au is 100 nm, the thickness of Ni is 10 nm, and the thickness of Au is 100 nm.

[0031] B. Bonding conditions: Add a eutectic buffer process in the bonding process, the bonding temperature is 380 ° C, the bonding pressure is 0.3 MPa, and the bonding atmosphere is a vacuum and nitrogen environment.

[0032] Preferably, in step (3), the stripping process is:

[0033] a. Adjust the operating voltage of the KrF pulsed excimer laser to obtain an energy of 380 mJ / cm 2 Laser lift-off experiments were performed using a beam of light;

[0034] b. After laser irradiation, the sample is heated to the melting point of metallic Ga (30°C) to separate the sapphire substrate from the GaN.

[0035] Further preferably, in step (3), the wavelength of the KrF pulsed excimer laser is preferably 248 nm, and the pulse width is 30 ns;

[0036] In step (3), the thickness of the heavily doped n-type nitride layer to be etched is preferably 100 nm.

[0037] This method for fabricating fully vertical GaN power diodes based on heteroepitaxial substrates enables the fabrication of large-scale, low-cost, fully vertical GaN power diodes, enabling their application in high-frequency, high-voltage, and high-power power electronics and integrated systems. In recent years, with increasing energy consumption and growing calls for global environmental protection, renewable green energy sources such as solar, wind, and tidal energy have attracted widespread attention. The development of these new energy technologies has placed more stringent requirements on the performance of power diodes, such as lower fabrication costs and higher breakdown voltages.

[0038] The present invention proposes a device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate and a preparation method thereof, which is applicable to two-terminal devices such as PiN and Schottky power diodes.

[0039] The fabrication method for a fully vertical GaN PiN power diode involves heteroepitaxially growing a GaN PiN structure on a sapphire substrate using MOCVD. Electron beam evaporation is then used to deposit an alloy to form an ohmic contact to the anode, which is then bonded to a low-resistance Si-GaN structure using a metal bonding process. Laser lift-off is then used to remove the previously thinned and polished sapphire substrate, and an alloy is deposited on the heavily doped n-GaN cathode layer using electron beam evaporation to form an ohmic contact to the cathode. This process and technique yields a fully vertical PiN power diode. Part of the cathode metal and the highly conductive n-GaN layer are etched away to expose the less conductive, lightly doped n-GaN layer, achieving device isolation. The etching should be performed on the cathode side of the PiN diode, where the electric field is low (in PiN power diodes, the anode side is a high electric field region, while the cathode side is a low electric field region). This effectively prevents local electric field concentration effects that can lead to premature breakdown.

[0040] The fabrication method for a fully vertical GaN Schottky diode involves heteroepitaxially growing heavily doped n-GaN and lightly doped n-GaN layers on a sapphire substrate using MOCVD. Electron beam evaporation is then used to deposit an alloy to form the anode Schottky contact, which is then bonded together using a metal bonding process to form a low-resistance Si-GaN bonded structure. Laser lift-off is then used to remove the previously thinned and polished sapphire substrate, and an alloy is deposited on the heavily doped n-GaN layer on the cathode side using electron beam evaporation to form an ohmic cathode contact. This process and technique yields a fully vertical Schottky power diode. Part of the cathode metal and the highly conductive n-GaN layer are etched away to expose the less conductive lightly doped n-GaN layer, achieving device isolation. The etching should be performed on the cathode side of the Schottky power diode, where the electric field is low (the anode side is a high electric field region, while the cathode side is a low electric field region). This effectively prevents local electric field concentration effects that can lead to premature breakdown.

[0041] The doping concentration of the heavily doped p-GaN layer mentioned in the present invention is 5×10 18 , the doping concentration of the lightly doped n-GaN drift layer is 1×10 16 The doping concentration of the heavily doped n-GaN layer is 5×10 18 Generally, the lightly doped GaN is 10 15 ~10 16 , heavily doped to 10 18 ~10 19 (Unit: cm -3 ).

[0042] It is worth noting that the fully vertical GaN power diode structure of the present invention can be not only a two-terminal device such as a PiN diode or a Schottky diode, but also a three-terminal device such as a junction field-effect transistor (JFET), a current aperture vertical electron transistor (CAVET) or a metal oxide semiconductor field-effect transistor (MOSFET) structure.

[0043] Any details not provided in the present invention may be referred to the prior art.

[0044] The beneficial effects of the present invention are:

[0045] 1) Because fully vertical power diodes fabricated on traditional n-GaN conductive substrates have problems such as small substrate size and high price, this invention, based on heteroepitaxial substrates, utilizes substrate lift-off technology and metal bonding technology to provide the possibility of realizing large-size, low-cost fully vertical power diodes;

[0046] 2) Current fully vertical GaN power diodes primarily implement device isolation near the anode. The anode side has a high electric field strength, and device isolation results in electric field concentration in the groove near the anode, leading to premature device breakdown. However, in the present invention, the electric field strength is relatively low on the cathode (highly doped n-GaN) side, and device isolation achieved by etching grooves eliminates the aforementioned electric field concentration problem. The present invention uses ICP dry etching to form device isolation on the high-doped n-GaN side, effectively alleviating the problem of electric field concentration in the grooves formed by ICP dry etching at the anode, leading to premature device breakdown. Furthermore, the related processes involved in the present invention are relatively mature, and the process conditions and deposition temperature are also relatively easy to master. This means that the present invention achieves superior technical results with a simple, low-cost preparation process. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 The following is a flow chart of a method for fabricating a device structure of a fully vertical GaN PiN power diode based on a heteroepitaxial substrate, wherein:

[0048] (a) Epitaxial structure of GaN PiN power diode grown on sapphire;

[0049] (b) The PiN diode is bonded to the low-resistance Si support layer using a metal bonding process.

[0050] (c) Laser lift-off was used to remove the sapphire substrate, and the highly doped n-GaN layer (100 nm thick) was etched away using an ICP dry etching process to remove the Ga metal and the high-temperature area.

[0051] (d) forming cathode metal by electron beam evaporation;

[0052] (e) ICP etches away part of the cathode metal and the highly doped n-GaN layer, exposing the low-doped n-GaN drift layer;

[0053] Figure 2 The present invention is a flow chart of a method for fabricating a device structure of a fully vertical GaN power Schottky diode based on a heteroepitaxial substrate, wherein:

[0054] (a) The epitaxial structure of GaN Schottky power diode grown on sapphire substrate;

[0055] (b) The Schottky diode is bonded to the low-resistance Si support layer using a metal bonding process.

[0056] (c) Laser lift-off removes the sapphire substrate, and an ICP dry etch process is used to etch away 100 nm of the highly doped n-GaN layer, removing the Ga metal and the high-temperature area.

[0057] (d) forming cathode metal by electron beam evaporation;

[0058] (e) ICP etches away part of the cathode metal and the highly doped n-GaN layer, exposing the low-doped n-GaN drift layer;

[0059] Figure 3 Schematic diagram of the device structure of a fully vertical GaN power PiN diode based on a heteroepitaxial substrate;

[0060] Figure 4 Schematic diagram of the device structure of a fully vertical GaN power Schottky diode based on a heteroepitaxial substrate;

[0061] Figure 5 The comparison diagram of the reverse breakdown voltage of the PiN diode device etched at the anode and etched at the cathode;

[0062] Figure 6 Figure 2 shows the two-dimensional electric field distribution of a PiN diode with device isolation achieved by etching at the anode and etching at the cathode, respectively, at a reverse bias voltage of 800 V. (a) shows the device with device isolation achieved by etching at the cathode according to the present invention, and (b) shows the device with device isolation achieved by etching at the anode in a conventional manner, along with the electric field intensity markers.

[0063] Among them, 1-groove, 2-cathode electrode, 3-heavily doped n-GaN layer, 4-lightly doped n-GaN drift layer, 5-heavily doped p-GaN layer, 6-low-resistance Si support layer, 7-sapphire substrate, 8-Ni / Au alloy, 9-Ti / Au alloy. DETAILED DESCRIPTION

[0064] In order to make the technical problems, technical solutions and advantages to be solved by the present invention clearer, they will be described in detail below with reference to the accompanying drawings and specific embodiments, but are not limited thereto. Matters not fully described in the present invention shall be based on conventional techniques in the art. Example 1

[0065] A device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate, such as Figure 1-4 As shown, the fully vertical GaN power diode is a PiN diode or a Schottky diode. A groove 1 is etched on the cathode side of the PiN diode or the Schottky diode in the low electric field. The groove 1 is obtained by etching away the cathode electrode and the heavily doped n-type nitride layer using an ICP dry etching process to expose the lightly doped n-type nitride drift layer.

[0066] Groove 1 is a U-shaped groove. Example 2

[0067] A device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate, the structure of which is as shown in Example 1, except that Figure 3As shown, the PiN diode includes, from bottom to top, a cathode electrode 2, a heavily doped n-GaN layer 3, a lightly doped n-GaN drift layer 4, a heavily doped p-GaN layer 5, an anode electrode and a low-resistance Si support layer 6.

[0068] The preparation method of fully vertical GaN PiN diode, such as Figure 1 As shown, the following steps are included:

[0069] (1) A heavily doped n-GaN layer 3, a lightly doped n-GaN drift layer 4, and a heavily doped p-GaN layer 5 are sequentially grown on a sapphire substrate 7 by MOCVD, and the sapphire substrate 7 is then pre-thinned to 100 µm and polished;

[0070] (2) After electron beam evaporation of the heavily doped p-GaN layer 5 to form an ohmic contact (i.e., Ni / Au alloy 8), the PiN diode is bonded to the low-resistance Si support layer 6 using metal bonding technology. Here, the anode metal is Ni / Au alloy 8, and Ti / Au alloy 9 is the metal on the back of the Si used for metal bonding. After bonding, the two alloy layers serve as the anode electrode together;

[0071] (3) Using a KrF pulsed excimer laser as a laser source (wavelength of 248 nm, pulse width of 30 ns), the sapphire substrate 7 is peeled off from the bonding structure using laser lift-off technology. Then, a thin layer (100 nm) of heavily doped n-GaN layer 3 is etched using an ICP dry etching process. Subsequently, metal is evaporated on the heavily doped n-GaN layer 3 to form an ohmic contact, thereby forming a cathode electrode 2.

[0072] (4) The ICP dry etching process is used to etch away part of the cathode electrode 2 and the heavily doped n-GaN layer 3 to form a groove 1, exposing the lightly doped n-GaN drift layer 4 to prevent metal interconnection and achieve the effect of device isolation.

[0073] The lightly doped n-GaN drift layer 4 has a low doping concentration and poor conductivity. By etching away the conductive cathode metal and the heavily doped n-GaN layer between multiple devices, exposing the lightly doped n-GaN drift layer with poor conductivity, the devices can be isolated from each other to achieve electrical isolation. Example 3

[0074] A device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate, the structure of which is as shown in Example 1, except that Figure 4 As shown, the Schottky diode includes, from bottom to top, a cathode electrode 2 , a heavily doped n-GaN layer 3 , a lightly doped n-GaN drift layer 4 , an anode Schottky contact electrode and a low-resistance Si support layer 6 .

[0075] The preparation method of fully vertical GaN Schottky diode, such as Figure 2 As shown, the following steps are included:

[0076] (1) A heavily doped n-GaN substrate 3 and a lightly doped n-GaN drift layer 4 are sequentially grown on a sapphire substrate 7 by MOCVD, and then the sapphire substrate 7 is pre-thinned to 100 µm and polished;

[0077] (2) After the lightly doped n-GaN drift layer 4 is subjected to electron beam evaporation to form a Schottky contact (i.e., Ni / Au alloy 8), the Schottky diode is bonded to the low-resistance Si support layer 6 using metal bonding technology. Here, the anode metal is Ni / Au alloy 8, and Ti / Au alloy 9 is the metal on the back of the Si used for metal bonding. After bonding, the two alloy layers serve as the anode electrode together;

[0078] (3) Using a KrF pulsed excimer laser as a laser source (wavelength of 248 nm, pulse width of 30 ns), the sapphire substrate 7 is peeled off from the bonding structure using laser lift-off technology. Then, a thin layer (100 nm) of heavily doped n-GaN layer 3 is etched using an ICP dry etching process. Subsequently, metal is evaporated on the heavily doped n-GaN layer 3 to form an ohmic contact, thereby forming a cathode electrode 2.

[0079] (4) The ICP dry etching process is used to etch away part of the cathode electrode 2 and the heavily doped n-GaN layer 3 to form a groove 1, exposing the lightly doped n-GaN drift layer 4 to prevent metal interconnection and achieve the effect of device isolation.

[0080] The lightly doped n-GaN drift layer 4 has a low doping concentration and poor conductivity. By etching away the conductive cathode metal and the heavily doped n-GaN layer between multiple devices, exposing the lightly doped n-GaN drift layer with poor conductivity, the devices can be isolated from each other to achieve electrical isolation. Example 4

[0081] A device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate is as shown in Example 2, except that, in step (1), the specific steps of pre-thinning the sapphire substrate 7 to 100 μm include:

[0082] ① Using femtosecond laser to irradiate the sapphire substrate to generate color centers, which can increase the absorption of ultraviolet laser in subsequent steps and improve the efficiency of laser thinning and polishing;

[0083] ② Use ultraviolet laser to scan the surface of the sapphire substrate to destroy the crystal structure of the sapphire, so that the crystal material is separated from the sapphire body to achieve a thinning effect. The crystal surface roughness is small, eliminating the traditional chemical mechanical polishing step of the substrate. Example 5

[0084] A device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate is as shown in Example 2, except that in step (2), the PiN diode is bonded to the low-resistance Si support layer using metal bonding technology. The specific steps include:

[0085] A. The experiment uses the structure of Si / Ti(10nm) / Au(100nm)+Al2O3 / GaN / Ni(10nm) / Au(100nm) to complete Si-GaN bonding;

[0086] B. Bonding conditions: Add a eutectic buffer process in the bonding process, the bonding temperature is 380 ° C, the bonding pressure is 0.3 MPa, and the bonding atmosphere is a nitrogen environment. Example 6

[0087] A device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate is as shown in Example 2, except that in step (3), the stripping process is:

[0088] a. Adjust the operating voltage of the KrF pulsed excimer laser to obtain an energy of 380 mJ / cm 2 Laser lift-off experiments were performed using a beam of light;

[0089] b. After laser irradiation, the sample is heated to the melting point of metallic Ga (30°C) to separate the sapphire substrate from the GaN.

[0090] like Figure 5 The figure shows a comparison of the reverse breakdown voltage of the PiN diode when the device isolation is achieved by etching at the anode and etching at the cathode. The breakdown voltage is approximately 886 V when etching at the anode (heavily doped p-GaN layer), and approximately 2207 V when etching at the cathode (heavily doped n-GaN side).

[0091] like Figure 6 The figure shows the two-dimensional electric field distribution of the device with the PiN diode isolated by etching at the anode and etching at the cathode when the reverse bias voltage is 800 V. It can be seen that the traditional vertical GaN power diode is isolated by etching at the anode. Figure 6 In (b), electric field concentration problems occur in the groove near the anode.

[0092] Combine Figure 5 、 6It can be found that traditional vertical GaN power diodes can only achieve device isolation by etching grooves on the anode side, which will lead to premature breakdown. However, the present invention uses substrate peeling technology and metal bonding process to design a process flow and prepare PiN diodes or Schottky diodes based on heteroepitaxial substrates. Device isolation can be achieved by etching grooves on the cathode side of low electric field, solving the problem of premature device breakdown caused by local electric field concentration effect. Example 7

[0093] An application of the device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate as described in Example 6 in high-frequency, high-voltage and high-power power electronics and integrated systems.

[0094] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as within the scope of protection of the present invention.

Claims

1. A device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate, characterized in that: The fully vertical GaN power diode is based on a heteroepitaxial substrate, and a groove is etched on the cathode side of the fully vertical GaN power diode with a low electric field. The groove is obtained by etching away the cathode electrode and the heavily doped n-type nitride layer using an ICP dry etching process to expose the lightly doped n-type nitride drift layer. Fully vertical GaN power diodes are PiN diodes or Schottky diodes; The PiN diode comprises, from bottom to top, a cathode electrode, a heavily doped n-type nitride layer, a lightly doped n-type nitride drift layer, a heavily doped p-type nitride layer, an anode electrode and a low-resistance Si support layer; The Schottky diode comprises, from bottom to top, a cathode electrode, a heavily doped n-type nitride layer, a lightly doped n-type nitride drift layer, an anode Schottky contact electrode and a low-resistance Si support layer.

2. The device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate according to claim 1, characterized in that: The heteroepitaxial substrate is a sapphire substrate, a silicon substrate, a silicon carbide substrate, a zinc oxide substrate, a diamond substrate, an aluminum nitride substrate or a gallium arsenide substrate; The groove is a U-shaped groove.

3. A method for preparing a device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate according to claim 1, characterized in that: The steps include: (1) A heavily doped n-type nitride layer, a lightly doped n-type nitride drift layer, and a heavily doped p-type nitride layer were sequentially grown on a sapphire substrate using MOCVD. The sapphire substrate was then pre-thinned to 100 µm and polished. (2) After electron beam evaporation of the heavily doped p-type nitride layer to form an ohmic contact anode, the PiN diode is bonded to the low-resistance Si support layer using metal bonding technology; (3) Using a KrF pulsed excimer laser as the laser source, the sapphire substrate is peeled off from the bonded structure using the laser lift-off technique. A thin layer of heavily doped n-type nitride is then etched using the ICP dry etching process. Subsequently, metal is evaporated on the heavily doped n-type nitride layer to form an ohmic contact, forming a cathode electrode. (4) The ICP dry etching process is used to etch away part of the cathode electrode and the heavily doped n-type nitride layer to expose the lightly doped n-type nitride drift layer to prevent metal interconnection and achieve device isolation.

4. A method for preparing a device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate according to claim 1, characterized in that: The steps include: (1) A heavily doped n-type nitride layer and a lightly doped n-type nitride drift layer were grown sequentially on a sapphire substrate using MOCVD, and the sapphire substrate was then pre-thinned to 100 µm and polished. (2) After the lightly doped n-type nitride drift layer is subjected to electron beam evaporation to form a Schottky contact, the Schottky diode is bonded to the low-resistance Si support layer using metal bonding technology; (3) Using a KrF pulsed excimer laser as the laser source, the sapphire substrate is peeled off from the bonded structure using the laser lift-off technique, and then a thin layer of heavily doped n-type nitride layer is etched using the ICP dry etching process. Subsequently, metal is evaporated on the heavily doped n-type nitride layer to form an ohmic contact and a cathode electrode. (4) The ICP dry etching process is used to etch away part of the cathode electrode and the heavily doped n-type nitride layer to expose the lightly doped n-type nitride drift layer to prevent metal interconnection and achieve device isolation.

5. The method for preparing a device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate according to claim 3 or 4, characterized in that: In step (1), the specific steps of pre-thinning the sapphire substrate to 100 µm include: ① Using femtosecond laser to irradiate the sapphire substrate to generate color centers; ②Use ultraviolet laser to scan the surface of sapphire substrate to destroy the crystal structure of sapphire, so that the crystal material is separated from the sapphire body to achieve the effect of thinning; In step (2), the PiN diode is bonded to the low-resistance Si support layer using metal bonding technology. The specific steps include: A. The experiment uses the structure of Si / Ti / Au+Al2O3 / GaN / Ni / Au to complete Si-GaN bonding, with Ti thickness of 10 nm, Au thickness of 100 nm, Ni thickness of 10 nm, and Au thickness of 100 nm. B. Bonding conditions: Add a eutectic buffer process in the bonding process, the bonding temperature is 380 ° C, the bonding pressure is 0.3 MPa, and the bonding atmosphere is a nitrogen environment.

6. The method for preparing a device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate according to claim 3 or 4, characterized in that: In step (3), the stripping process is: a. Adjust the operating voltage of the KrF pulsed excimer laser to obtain an energy of 380 mJ / cm 2 Laser lift-off experiments were performed using a beam of light; b. After laser irradiation, the sample is heated to the melting point of metallic Ga (30°C) to separate the sapphire substrate from the GaN.

7. The method for preparing a device structure of a fully vertical GaN power diode based on a heteroepitaxial substrate according to claim 6, characterized in that: In step (3), the wavelength of the KrF pulsed excimer laser is 248 nm and the pulse width is 30 ns; In step (3), the thickness of the heavily doped n-type nitride layer etched away is 100 nm.

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