A memory page processing method and related device

Abstract

The present application provides a memory page processing method and related equipment, which can reduce CPU overhead and improve deduplication speed. The method of the present application includes: if it is determined that the target memory page at the i-th scan is different from the target memory page at the i-1th scan, then the value of the counter corresponding to the target memory page at the i-th scan is increased by a first value; if it is determined that the target memory page at the i-th scan is the same as the target memory page at the i-1th scan, and the target memory page at the i-1st scan is different from the target memory page at the i-2nd scan, then the value of the counter corresponding to the target memory page at the i-th scan is detected; if it is determined that the value of the counter corresponding to the target memory page at the i-th scan is greater than the first value, then the target memory page at the i-th scan and the duplicate page at the i-th scan are merged; memory pages with different contents correspond to different counters, and memory pages with the same contents correspond to the same counter.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a memory page processing method and related equipment. Background Art

[0002] Memory deduplication technology means that when the computer's central processing unit (CPU) determines that the contents of multiple physical memory pages pointed to by multiple virtual memory pages are the same, it can point multiple virtual memory pages to the same physical memory page, that is, merge multiple physical memory pages with the same content, thereby releasing redundant physical memory pages and achieving the purpose of memory deduplication.

[0003] In the related art, the CPU can effectively increase the available memory by cyclically performing memory deduplication operations. Specifically, when performing the current deduplication on multiple memory pages (i.e., the aforementioned physical memory pages), the CPU can scan a certain memory page to obtain the content of the memory page, and generate a numerical value based on the content of the memory page, and compare the numerical value with each numerical value in the red-black tree (generated based on the content of the remaining scanned memory pages). If there are other numerical values ​​that are the same as the numerical value, it is determined that there are memory pages with the same content as the memory page (i.e., duplicate pages of the memory page), and these memory pages are merged. If not, the numerical value is stored in the red-black tree. Thereafter, the aforementioned operation can also be performed on the remaining memory that has not been scanned, until the current deduplication of all memory pages is completed, and then the next deduplication of all memory pages is performed.

[0004] In each deduplication operation, the CPU compares each memory page with the rest of the memory pages to obtain the duplicate pages of each memory page. If there is no duplicate page for a certain memory page, the CPU's deduplication operations on the memory page are invalid. This situation is quite common in each deduplication operation. Too many invalid deduplication operations will cause excessive CPU overhead and reduce the deduplication speed. Summary of the invention

[0005] The embodiments of the present application provide a memory page processing method and related equipment, which can avoid a large number of invalid deduplication operations, thereby reducing CPU overhead and improving deduplication speed.

[0006] A first aspect of an embodiment of the present application provides a memory page processing method, the method comprising:

[0007] When the CPU performs the i-th deduplication on the target memory page, the CPU may first perform the i-th scan on the target memory page. Then, the CPU may determine whether the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and determine whether the target memory page at the i-1-th scan has the same content as the target memory page at the i-2-th scan.

[0008] If it is determined that the target memory page at the i-th scan has different contents from the target memory page at the i-1-th scan, the CPU can determine that the target memory page has just changed, then the value of the counter corresponding to the target memory page at the i-th scan is increased by the first value, and the processing of the target memory page at the i-th scan is terminated. Among them, memory pages with different contents correspond to different counters, and memory pages with the same contents correspond to the same counter. For example, if the contents of memory page 1 at the 3rd scan are the same as those of memory page 1 at the 2nd scan, then memory page 1 at the 3rd scan and memory page 1 at the 2nd scan correspond to the same counter. For another example, if the contents of memory page 1 at the 3rd scan and memory page 2 at the 3rd scan are the same, then memory page 1 at the 3rd scan and memory page 2 at the 3rd scan correspond to the same counter. For another example, if the contents of memory page 1 at the 3rd scan and memory page 2 at the 2nd scan are the same, then memory page 1 at the 3rd scan and memory page 2 at the 2nd scan correspond to the same counter. For another example, if the contents of memory page 1 at the third scan are different from those of memory page 1 at the second scan, then memory page 1 at the third scan and memory page 1 at the second scan correspond to two different counters. For another example, if the contents of memory page 1 at the third scan and memory page 2 at the third scan are different, then memory page 1 at the third scan and memory page 2 at the third scan correspond to two different counters. For another example, if the contents of memory page 1 at the third scan and memory page 2 at the second scan are different, then memory page 1 at the third scan and memory page 2 at the second scan correspond to two different counters.

[0009] If it is determined that the target memory page at the i-th scan has the same content as the target memory page at the i-1th scan, and the target memory page at the i-1th scan has a different content from the target memory page at the i-2nd scan, the CPU can determine that the target memory page remains unchanged, and then detect the value of the counter corresponding to the target memory page at the i-th scan, so as to determine whether there are other memory pages with the same content as the target memory page at the i-th scan based on the value of the counter. It should be noted that in the process of the CPU performing the i-1th deduplication on the target memory page, since the target memory page at the i-1th scan has a different content from the target memory page at the i-2nd scan, the CPU can determine the counter corresponding to the target memory page at the i-1th scan, and increase the value of the counter corresponding to the target memory page at the i-1th scan by the first value. Then, during the i-th deduplication process of the target memory page by the CPU, since the target memory page during the i-th scan has the same content as the target memory page during the i-1-th scan, the target memory page during the i-th scan and the target memory page during the i-1-th scan correspond to the same counter. At this time, the value of the counter is at least the first value.

[0010] If it is determined that the value of the counter corresponding to the target memory page at the i-th scan is greater than the first value, the CPU can determine that there is a memory page with the same content as the target memory page at the i-th scan (that is, a duplicate page of the target memory page at the i-th scan), and then merge the target memory page at the i-th scan and the duplicate page of the target memory page at the i-th scan.

[0011] It can be seen from the above method that after the target memory page is scanned for the i-th time, when the CPU determines that the target memory page at the i-th scan is in a state that has just changed (that is, the target memory page at the i-th scan has different contents from the target memory page at the i-1-th scan), the value of the counter corresponding to the target memory page at the i-th scan can be increased by the first value. When the CPU determines that the target memory page at the i-th scan is in a state that has just remained unchanged (that is, the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan has different contents from the target memory page at the i-2-th scan), and the value of the counter corresponding to the target memory page at the i-th scan is greater than the first value, it can accurately determine that there are duplicate pages in the target memory page at the i-th scan. Then, the CPU can obtain the duplicate pages of the target memory page at the i-th scan, and merge the target memory page at the i-th scan and the duplicate pages of the target memory page at the i-th scan. It can be seen from this that the CPU can fully filter the memory pages that do not have duplicate pages, and perform effective deduplication operations on the memory pages that have duplicate pages in a targeted manner, thereby avoiding a large number of invalid deduplication operations, reducing CPU overhead, and increasing the deduplication speed.

[0012] In a possible implementation, the method further includes: if it is determined that the value of the counter corresponding to the target memory page at the i-th scan is equal to the first value, then the processing of the target memory page at the i-th scan is terminated. In the aforementioned implementation, after the CPU detects the value of the counter corresponding to the target memory page at the i-th scan, if it is determined that the value of the counter corresponding to the target memory page at the i-th scan is equal to the first value, the CPU considers that there is no duplicate page in the target memory page at the i-th scan. Therefore, the CPU can terminate the processing of the target memory page at the i-th scan, that is, skip the target memory page at the i-th scan.

[0013] In a possible implementation, the method further includes: if it is determined that the target memory page at the i-th scan has the same content as the target memory page at the i-1th scan, and the target memory page at the i-1th scan has the same content as the target memory page at the i-2nd scan, then the processing of the target memory page at the i-th scan is terminated. In the aforementioned implementation, after the CPU detects the numerical value of the unmodified round of the target memory page, if it is determined that the target memory page at the i-th scan has the same content as the target memory page at the i-1th scan, and the target memory page at the i-1th scan has the same content as the target memory page at the i-2nd scan, that is, between the i-th scan and the i-1th scan, and between the i-1th scan and the i-2nd scan, the content of the target memory page has not been modified (it can also be understood that the target memory page is in a state of being unchanged for a long time), so the CPU believes that there is no duplicate page in the target memory page at the i-th scan. Then, the CPU terminates the processing of the target memory page at the i-th scan, that is, skips the target memory page at the i-th scan.

[0014] In a possible implementation, after the target memory page is scanned for the i-th time, the method further includes: the CPU can obtain the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1-th scan, wherein the checksum of the target memory page at the i-th scan is generated based on the target memory page at the i-th scan, and the checksum of the target memory page at the i-1-th scan is generated based on the target memory page at the i-1-th scan. Then, based on the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1-th scan, the CPU can accurately detect whether the content of the target memory page at the i-th scan is the same as that of the target memory page at the i-1-th scan, and whether the content of the target memory page at the i-1-th scan is the same as that of the target memory page at the i-2-th scan.

[0015] In a possible implementation, based on the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1th scan, detecting whether the content of the target memory page at the i-th scan is the same as that of the target memory page at the i-1th scan, and whether the content of the target memory page at the i-1th scan is the same as that of the target memory page at the i-2nd scan includes: if it is determined that the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1th scan are different, the CPU sets the value of the unmodified round of the target memory page to the second value. If it is determined that the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1th scan are the same, the CPU increases the value of the unmodified round of the target memory page by a third value. In this way, the CPU can accurately detect whether the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and whether the target memory page at the i-1-th scan has the same content as the target memory page at the i-2-th scan based on the numerical size of the unmodified round of the target memory page.

[0016] In one possible implementation, if it is determined that the target memory page at the i-th scan is different from the target memory page at the i-1-th scan, it includes: if it is determined that the value of the unmodified round of the target memory page is equal to the second value, the CPU determines that the target memory page at the i-th scan is different from the target memory page at the i-1-th scan, that is, between the i-th scan and the i-1-th scan, the content of the target memory page is modified (it can also be understood that the target memory page has just changed).

[0017] In one possible implementation, if it is determined that the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan has a different content from the target memory page at the i-2-th scan, it includes: if it is determined that the value of the unmodified round of the target memory page is equal to the third value, the CPU determines that the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan has a different content from the target memory page at the i-2-th scan, that is, between the i-th scan and the i-1-th scan, the content of the target memory page is not modified, and between the i-1-th scan and the i-2-th scan, the content of the target memory page is modified (it can also be understood that the target memory page remains unchanged).

[0018] In one possible implementation, if it is determined that the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan has the same content as the target memory page at the i-2-th scan, it includes: if it is determined that the value of the unmodified round of the target memory page is greater than the third value, the CPU determines that the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan has the same content as the target memory page at the i-2-th scan, that is, between the i-th scan and the i-1-th scan, and between the i-1-th scan and the i-2-th scan, the content of the target memory page is not modified (it can also be understood that the target memory page remains unchanged for a long time).

[0019] In a possible implementation, merging the target memory page at the i-th scan and the memory page with the same content as the target memory page at the i-th scan includes: if it is determined that the target memory page at the i-th scan and the first memory page in the queue to be merged correspond to the same process, and the target memory page at the i-th scan and the first memory page in the queue to be merged are located within a preset address range, then the target memory page at the i-th scan is added to the queue to be merged until a new queue to be merged is constructed, and each memory page in the queue to be merged and the memory page with the same content as the memory page are merged; if it is determined that the target memory page at the i-th scan and the first memory page in the queue to be merged correspond to different processes, or the target memory page at the i-th scan and the first memory page are not located within the preset address range, then each memory page in the queue to be merged and the memory page with the same content as the memory page are merged, and a new queue to be merged is constructed with the target memory page at the i-th scan as the first memory page. In the related art, after the CPU determines that a memory page has duplicate pages, it will immediately merge the memory page and the duplicate pages of the memory page. During the merging process, the CPU needs to refresh the translation lookaside buffer (TLB). Therefore, in the related art, if the CPU determines that N memory pages have duplicate pages, it needs to perform N TLB refresh operations. In the present application, after the CPU determines that multiple memory pages have duplicate pages, it can put these memory pages into a queue to be merged. When certain conditions are met, each memory page in the queue to be merged and the duplicate pages of each memory page can be merged together. It can be seen that the present application uses the queue to be merged as a unit to realize batch merging of duplicate pages. During the batch merging process, the CPU only needs to perform a TLB refresh operation once, which can further reduce CPU overhead.

[0020] The second aspect of an embodiment of the present application provides a memory page processing device, which includes: a scanning module, which is used to scan the target memory page for the i-th time; a first processing module, which is used to increase the value of the counter corresponding to the target memory page at the i-th scan by a first value if it is determined that the target memory page at the i-th scan has a different content from the target memory page at the i-1-th scan; a second processing module, which is used to detect the value of the counter corresponding to the target memory page at the i-th scan if it is determined that the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan has a different content from the target memory page at the i-2-th scan; a third processing module, which is used to merge the target memory page at the i-th scan and the remaining memory pages with the same content as the target memory page at the i-th scan if it is determined that the value of the counter corresponding to the target memory page at the i-th scan is greater than the first value; wherein memory pages with different contents correspond to different counters, and memory pages with the same content correspond to the same counter.

[0021] It can be seen from the above device that after the target memory page is scanned for the i-th time, when the CPU determines that the target memory page at the i-th scan is in a state that has just changed (i.e., the target memory page at the i-th scan has a different content from the target memory page at the i-1-th scan), the value of the counter corresponding to the target memory page at the i-th scan can be increased by a first value. When the CPU determines that the target memory page at the i-th scan is in a state that has just remained unchanged (i.e., the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan has a different content from the target memory page at the i-2-th scan), and the value of the counter corresponding to the target memory page at the i-th scan is greater than the first value, it can accurately determine that there are duplicate pages in the target memory page at the i-th scan. Then, the CPU can obtain the duplicate pages of the target memory page at the i-th scan, and merge the target memory page at the i-th scan and the duplicate pages of the target memory page at the i-th scan. It can be seen from this that the CPU can fully filter the memory pages that do not have duplicate pages, and perform effective deduplication operations on the memory pages that have duplicate pages in a targeted manner, thereby avoiding a large number of invalid deduplication operations, reducing CPU overhead, and increasing the deduplication speed.

[0022] In a possible implementation, the device further includes: a fourth processing module, configured to terminate processing of the target memory page during the i-th scan if it is determined that the value of the counter corresponding to the target memory page during the i-th scan is equal to the first value.

[0023] In one possible implementation, the device also includes: a fifth processing module, which is used to end the processing of the target memory page during the i-th scan if it is determined that the target memory page during the i-th scan is the same as the target memory page during the i-1th scan, and the target memory page during the i-1th scan is the same as the target memory page during the i-2th scan.

[0024] In one possible implementation, the device also includes: a detection module, which is used to detect whether the target memory page at the i-th scan has the same content as the target memory page at the i-1th scan, and whether the target memory page at the i-1th scan has the same content as the target memory page at the i-2th scan, based on the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1th scan; wherein the checksum of the target memory page at the i-th scan is generated based on the target memory page at the i-th scan, and the checksum of the target memory page at the i-1th scan is generated based on the target memory page at the i-1th scan.

[0025] In one possible implementation, the detection module is specifically used to: if it is determined that the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1th scan are different, then set the value of the unmodified round of the target memory page to a second value; if it is determined that the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1th scan are the same, then increase the value of the unmodified round of the target memory page by a third value; based on the numerical size of the unmodified round of the target memory page, detect whether the content of the target memory page at the i-th scan is the same as that of the target memory page at the i-1th scan, and whether the content of the target memory page at the i-1th scan is the same as that of the target memory page at the i-2th scan.

[0026] In one possible implementation, the first processing module is specifically used to determine that the content of the target memory page at the i-th scan is different from that of the target memory page at the i-1-th scan if the value of the unmodified round of the target memory page is determined to be equal to the second value, and increase the value of the counter corresponding to the target memory page at the i-th scan by the first value.

[0027] In one possible implementation, the second processing module is specifically used to determine that if the value of the unmodified round of the target memory page is determined to be equal to the third value, then determine that the target memory page at the i-th scan is the same as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan is different from the target memory page at the i-2-th scan, and detect the value of the counter corresponding to the target memory page at the i-th scan.

[0028] In one possible implementation, the fifth processing module is specifically used to determine that the target memory page at the i-th scan is the same as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan is the same as the target memory page at the i-2-th scan, if the value of the unmodified round of the target memory page is determined to be greater than the third value, and end the processing of the target memory page at the i-th scan.

[0029] In a possible implementation, the third processing module is specifically used to: if it is determined that the value of the counter corresponding to the target memory page at the i-th scan is greater than the first value, then detect whether the target memory page at the i-th scan and the first memory page in the queue to be merged correspond to the same process, and whether the target memory page at the i-th scan and the first memory page in the queue to be merged are located within a preset address range; if it is determined that the target memory page at the i-th scan and the first memory page in the queue to be merged correspond to the same process, and the target memory page at the i-th scan and the first memory page in the queue to be merged are located within a preset address range , then the target memory page at the i-th scan is added to the queue to be merged until a new queue to be merged is constructed, and each memory page in the queue to be merged and the memory page with the same content as the memory page are merged; if it is determined that the target memory page at the i-th scan and the first memory page in the queue to be merged correspond to different processes, or the target memory page at the i-th scan and the first memory page are not within the preset address range, then each memory page in the queue to be merged and the memory page with the same content as the memory page are merged, and a new queue to be merged is constructed with the target memory page at the i-th scan as the first memory page.

[0030] A third aspect of an embodiment of the present application provides an electronic device, which includes a memory and a processor; the memory stores code, and the processor is configured to execute the code. When the code is executed, the electronic device executes the method described in the first aspect or any possible implementation method of the first aspect.

[0031] A fourth aspect of an embodiment of the present application provides a computer-readable storage medium, which includes computer-readable instructions. When the computer-readable instructions are executed on a computer, the computer executes the method described in the first aspect or any possible implementation of the first aspect.

[0032] A fifth aspect of an embodiment of the present application provides a computer program product, which includes computer-readable instructions. When the computer-readable instructions are executed on a computer, the computer executes the method described in the first aspect or any possible implementation of the first aspect.

[0033] In an embodiment of the present application, after the target memory page is scanned for the i-th time, when the CPU determines that the target memory page at the i-th scan is in a state that has just changed (i.e., the target memory page at the i-th scan has a different content from the target memory page at the i-1-th scan), the value of the counter corresponding to the target memory page at the i-th scan may be increased by a first value. When the CPU determines that the target memory page at the i-th scan is in a state that has just remained unchanged (i.e., the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan has a different content from the target memory page at the i-2-th scan), and the value of the counter corresponding to the target memory page at the i-th scan is greater than the first value, it can accurately determine that there are duplicate pages in the target memory page at the i-th scan. Then, the CPU can obtain the duplicate pages of the target memory page at the i-th scan, and merge the target memory page at the i-th scan and the duplicate pages of the target memory page at the i-th scan. It can be seen from this that the CPU can fully filter the memory pages that do not have duplicate pages, and perform effective deduplication operations on the memory pages that have duplicate pages in a targeted manner, thereby avoiding a large number of invalid deduplication operations, reducing CPU overhead, and increasing the deduplication speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 A schematic diagram of a cloud scenario provided in an embodiment of the present application;

[0035] Figure 2 A flowchart of a memory page processing method provided in an embodiment of the present application;

[0036] Figure 3 A schematic diagram of a counter provided in an embodiment of the present application;

[0037] Figure 4 A schematic diagram of the comparison results provided by the embodiment of the present application;

[0038] Figure 5 Another schematic diagram of the comparison results provided by the embodiment of the present application;

[0039] Figure 6 A structural schematic diagram of a memory page processing device provided in an embodiment of the present application;

[0040] Figure 7 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0041] The embodiments of the present application provide a memory page processing method and related equipment, which can avoid a large number of invalid deduplication operations, thereby reducing CPU overhead and improving deduplication speed.

[0042] The terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and need not be used to describe a specific order or sequential order. It should be understood that the terms used in this way can be interchangeable under appropriate circumstances, which is only to describe the distinction mode adopted by the objects of the same attributes when describing in the embodiments of the present application. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, so that the process, method, system, product or equipment comprising a series of units need not be limited to those units, but may include other units that are not clearly listed or inherent to these processes, methods, products or equipment.

[0043] The embodiments of the present application can be applied in a cloud scenario. In this scenario, a physical server is used as a host, which is usually deployed with multiple virtual machines (VMs) or multiple containers (docker). For ease of explanation, the following will take a virtual machine as an example for schematic illustration. Figure 1 As shown ( Figure 1 A schematic diagram of a cloud scenario provided in an embodiment of the present application) shows that multiple virtual machines on a physical server often run the same or similar operating systems and applications, resulting in a large amount of duplicate data between these virtual machines. These duplicate data are stored in physical memory, so many physical memory pages with the same content will be generated. Therefore, memory deduplication technology came into being.

[0044] Generally, each virtual machine can be allocated a certain number of virtual memory pages, and each virtual machine can access the corresponding physical memory page through the virtual memory page allocated to the virtual machine, thereby obtaining the data stored in the physical memory page. It can be seen that when the CPU of the physical server determines that the contents of multiple physical memory pages pointed to by multiple virtual memory pages (that is, the data stored in the physical memory page) are the same, multiple virtual memory pages can be pointed to the same physical memory page, that is, multiple physical memory pages with the same content are merged, thereby releasing redundant physical memory pages and achieving the purpose of memory deduplication.

[0045] In the related art, the CPU can effectively increase the available memory by cyclically performing memory deduplication operations. For the convenience of explanation, the physical memory pages are referred to as memory pages below, and no further description will be given later. Specifically, when multiple memory pages are deduplicated for the current time, a certain memory page can be scanned to obtain the content of the memory page, and a numerical value is generated based on the content of the memory page, and the numerical value is compared with each numerical value in the red-black tree (generated based on the content of the remaining scanned memory pages). If there are other numerical values ​​that are the same as the numerical value, it is determined that there are memory pages with the same content as the memory page, and these memory pages are merged. If not, the numerical value is stored in the red-black tree. Thereafter, the aforementioned operation can also be performed on the remaining memory that has not been scanned until the current deduplication of all memory pages is completed, and then the next deduplication of all memory pages is performed.

[0046] It can be seen that in each deduplication, the CPU will compare each memory page with the remaining memory pages to obtain the duplicate pages of each memory page. If there is no duplicate page for a certain memory page, the CPU's deduplication operations on the memory page are all invalid operations. This situation is quite common in each deduplication. Too many invalid deduplication operations will cause excessive CPU overhead and reduce the deduplication speed. In order to solve this problem, an embodiment of the present application provides a memory page processing method. Figure 2 A flowchart of a memory page processing method provided in an embodiment of the present application, the method comprising:

[0047] 201. Scan the target memory page for the i-th time.

[0048] In this embodiment, the CPU may perform multiple deduplication cycles on multiple memory pages. Among all memory pages, the CPU may perform the i-th deduplication on each memory page in turn until the i-th deduplication of all memory pages is completed. For the convenience of explanation, in the i-th deduplication of all memory pages, the current memory page is referred to as the target memory page, and the target memory page can be the first memory page among all memory pages, or the second memory page among all memory pages, or the last memory page among all memory pages, and so on, without limitation here.

[0049] In the process of performing the i-th deduplication on the target memory page, the target memory page may be first scanned for the i-th time to obtain the content of the target memory page at the i-th scan, that is, the data stored in the target memory page at the i-th scan.

[0050] 202. Detect whether the target memory page during the i-th scan has the same content as the target memory page during the i-1-th scan, and whether the target memory page during the i-1-th scan has the same content as the target memory page during the i-2-th scan.

[0051] After obtaining the content of the target memory page at the i-th scan, the CPU can compare whether the content of the target memory page at the i-th scan and the content of the target memory page at the i-1th scan are the same, and compare whether the content of the target memory page at the i-1th scan and the content of the target memory page at the i-2nd scan are the same. For ease of explanation, in this embodiment, "whether the content of the target memory page at the i-th scan and the content of the target memory page at the i-1th scan are the same" can be understood as "whether the target memory page at the i-th scan is the same as the target memory page at the i-1th scan", and for example, "the content of the target memory page at the i-1th scan and the content of the target memory page at the i-2nd scan are the same" can be understood as "the target memory page at the i-1th scan is the same as the target memory page at the i-2nd scan", and so on. The same is true for other similar descriptions, which will not be repeated later.

[0052] Specifically, the CPU can perform calculations based on the target memory page at the i-th scan to obtain the checksum of the target memory page at the i-th scan. For example, after the CPU performs the i-th scan on the target memory page, it can obtain the data stored in the target memory page at the i-th scan, and perform a hash calculation on the first 64 bytes of data among these data to obtain the checksum of the target memory page at the i-th scan.

[0053] After calculating the checksum of the target memory page at the i-th scan, the CPU can also obtain the stored checksum of the target memory page at the i-1-th scan. It should be noted that the checksum of the target memory page at the i-1-th scan is calculated by the CPU based on the target memory page at the i-1-th scan.

[0054] It is understandable that the checksum of the target memory page at the i-th scan can be used to indicate the target memory page at the i-th scan. Similarly, the checksum of the target memory page at the i-1-th scan can be used to indicate the target memory page at the i-1-th scan. Then, the CPU can determine whether the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and whether the target memory page at the i-1-th scan has the same content as the target memory page at the i-2-th scan based on the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1-th scan.

[0055] Furthermore, in all memory pages, each memory page is provided with an unmodified round (cleancircles), which is used to indicate the number of times the content of the memory page has not been modified. When the value of the unmodified round of the memory page is different, it indicates that the number of times the content of the memory page has not been modified is different. The CPU can compare the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1-th scan. If it is determined that the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1-th scan are different, it means that the content of the target memory page has just been modified between the i-1-th scan and the i-th scan, and the CPU sets the value of the unmodified round of the target memory page to a second value (for example, the second value can be 0). If it is determined that the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1-th scan are the same, it means that the content of the target memory page has not been modified between the i-1-th scan and the i-th scan, and the CPU increases the value of the unmodified round of the target memory page by a third value (for example, the third value can be 1).

[0056] After processing the numerical value of the unmodified round of the target memory page, the CPU can detect the numerical size of the unmodified round of the target memory page, and determine whether the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and whether the target memory page at the i-1-th scan has the same content as the target memory page at the i-2-th scan, based on the numerical size of the unmodified round of the target memory page.

[0057] 203. If it is determined that the target memory page during the i-th scan has different contents from the target memory page during the i-1-th scan, the value of the counter corresponding to the target memory page during the i-th scan is increased by a first value, and the processing of the target memory page during the i-1-th scan is terminated.

[0058] In this embodiment, a counter array of a certain length is provided, and the length of the counter array can be 2 bits, or 4 bits, etc., which is not limited here. Specifically, the counter array includes multiple counters, and the initial values ​​of all counters are the same preset value (for example, the preset value can be 0). Different counters have different index values, and the index values ​​can be obtained by the CPU calculating the memory page. Since different index values ​​can be obtained by calculating different memory pages, and the same index value can be obtained by calculating the same memory page, different memory pages can correspond to different counters, and the same memory page can correspond to the same counter. It should be noted that the two memory pages used for comparison here to determine whether they are the same may include: (1) a memory page during two scans; (2) two memory pages among all memory pages during the same scan; (3) a memory page during a certain scan, and another memory page during another scan.

[0059] For example, if the content of memory page 1 at the third scan is the same as that of memory page 1 at the second scan, then the index value (hash value) obtained by hash calculation based on memory page 1 at the third scan is the same as the index value obtained by hash calculation based on memory page 1 at the second scan. Therefore, memory page 1 at the third scan and memory page 1 at the second scan correspond to the same counter.

[0060] For another example, if the contents of memory page 1 at the third scan and memory page 2 at the third scan are the same, then the index value obtained by hash calculation based on memory page 1 at the third scan is the same as the index value obtained by hash calculation based on memory page 2 at the third scan, so memory page 1 at the third scan and memory page 2 at the third scan correspond to the same counter.

[0061] For another example, if the contents of memory page 1 at the third scan and memory page 2 at the second scan are the same, then the index value obtained by hash calculation based on memory page 1 at the third scan is the same as the index value obtained by hash calculation based on memory page 2 at the second scan, so memory page 1 at the third scan and memory page 2 at the second scan correspond to the same counter.

[0062] For another example, if the contents of memory page 1 at the third scan are different from those of memory page 1 at the second scan, then the index value obtained by hash calculation based on memory page 1 at the third scan is different from the index value obtained by hash calculation based on memory page 1 at the second scan. Therefore, memory page 1 at the third scan and memory page 1 at the second scan correspond to two counters with different contents.

[0063] For another example, if the contents of memory page 1 at the third scan and memory page 2 at the third scan are different, then the index value obtained by hash calculation based on memory page 1 at the third scan is different from the index value obtained by hash calculation based on memory page 2 at the third scan. Therefore, memory page 1 at the third scan and memory page 2 at the third scan correspond to two counters with different contents.

[0064] For another example, if the contents of memory page 1 at the third scan and memory page 2 at the second scan are different, then the index value obtained by hash calculation based on memory page 1 at the third scan is different from the index value obtained by hash calculation based on memory page 2 at the second scan. Therefore, memory page 1 at the third scan and memory page 2 at the second scan correspond to two counters with different contents.

[0065] After the CPU detects the numerical value of the unmodified round of the target memory page, if it is determined that the numerical value of the unmodified round of the target memory page is equal to the second numerical value, the CPU determines that the target memory page at the i-th scan is different from the target memory page at the i-1-th scan, that is, between the i-th scan and the i-1-th scan, the content of the target memory page is modified (it can also be understood that the target memory page has just changed). Then, the CPU can determine the counter corresponding to the target memory page at the i-th scan, and increase the numerical value of the counter corresponding to the target memory page at the i-th scan by the first numerical value (for example, the first numerical value can be 1), and end the processing of the target memory page at the i-th scan, that is, skip the target memory page at the i-th scan.

[0066] 204. If it is determined that the target memory page during the i-th scan has the same content as the target memory page during the i-1-th scan, and the target memory page during the i-1-th scan has different content from the target memory page during the i-2-th scan, then detect the value of the counter corresponding to the target memory page during the i-th scan.

[0067] After the CPU detects the numerical value of the unmodified round of the target memory page, if it is determined that the numerical value of the unmodified round of the target memory page is equal to the third numerical value, the CPU determines that the target memory page at the i-th scan has the same content as the target memory page at the i-1th scan, and the target memory page at the i-1th scan is different from the target memory page at the i-2nd scan, that is, between the i-th scan and the i-1th scan, the content of the target memory page is not modified, and between the i-1th scan and the i-2nd scan, the content of the target memory page is modified (it can also be understood that the target memory page has just remained unchanged). Then, the CPU can determine the counter corresponding to the target memory page at the i-th scan, and detect the numerical value of the counter corresponding to the target memory page at the i-th scan.

[0068] It should be noted that, during the CPU's i-1th deduplication of the target memory page, since the target memory page at the i-1th scan has different contents from the target memory page at the i-2nd scan, the CPU may determine the counter corresponding to the target memory page at the i-1th scan, and increase the value of the counter corresponding to the target memory page at the i-1th scan by the first value. It can be seen that during the CPU's i-th deduplication of the target memory page, since the target memory page at the i-th scan has the same content as the target memory page at the i-1th scan, the target memory page at the i-th scan and the target memory page at the i-1th scan correspond to the same counter, and at this time, the value of the counter is at least the first value.

[0069] Then, based on the value of the counter corresponding to the target memory page at the i-th scan, the CPU can determine whether there is a memory page with the same content as the target memory page at the i-th scan among all the memory pages, that is, whether there is a duplicate page in the target memory page at the i-th scan.

[0070] 205. If it is determined that the value of the counter corresponding to the target memory page during the i-th scan is greater than the first value, the target memory page during the i-th scan and the memory page with the same content as the target memory page during the i-th scan are merged.

[0071] After the CPU detects the value of the counter corresponding to the target memory page during the i-th scan, if it is determined that the value of the counter corresponding to the target memory page during the i-th scan is greater than the first value, the CPU considers that there is a duplicate page in the target memory page during the i-th scan. Therefore, the CPU can compare the target memory page during the i-th scan with the remaining memory pages except the target memory page during the i-th scan, thereby obtaining a memory page with the same content as the target memory page during the i-th scan.

[0072] Thereafter, the CPU may merge the target memory page at the i-th scan and the memory page having the same content as the target memory page at the i-th scan (ie, a duplicate page of the target memory page at the i-th scan).

[0073] Specifically, the CPU can merge memory pages in the following ways:

[0074] (1) The CPU write-protects the target memory page at the i-th scan and the duplicate page of the target memory page at the i-th scan. If the content of the target memory page at the i-th scan and / or the duplicate page of the target memory page at the i-th scan is modified, the protection disappears and the CPU no longer merges this part of the memory pages. If the content of the target memory page at the i-th scan and / or the duplicate page of the target memory page at the i-th scan is not modified, the protection always exists and the CPU can merge this part of the memory pages.

[0075] (2) The CPU obtains a queue to be merged, which contains multiple memory pages to be merged, i.e., the memory pages to be merged determined by the CPU when performing the i-th deduplication. These memory pages are usually memory pages used by the same process, and the last memory page and the first memory page are within a preset address range (for example, the address range can be 64KB). Then, the CPU can determine whether the target memory page during the i-th scan meets the following conditions:

[0076] Whether the target memory page during the i-th scan and the first memory page in the queue to be merged correspond to the same process, and whether the target memory page during the i-th scan and the first memory page in the queue to be merged are within a preset address range.

[0077] If the target memory page during the i-th scan meets the condition, the target memory page during the i-th scan is placed in the queue to be merged as the last memory page in the queue to be merged, and the duplicate pages of the target memory page during the i-th scan are not placed in the queue to be merged (the same is true for the remaining memory pages to be merged when the CPU performs the i-th deduplication, which will not be repeated here), until a memory page to be merged that does not meet the condition appears (the CPU can build a new queue to be merged based on the memory page), then each memory page in the queue to be merged and the duplicate pages of the memory page are merged.

[0078] If the target memory page during the i-th scan does not meet the condition, each memory page in the queue to be merged and the duplicate pages of the memory page are merged, and a new queue to be merged is constructed with the target memory page during the i-th scan as the first memory page.

[0079] 206. If it is determined that the value of the counter corresponding to the target memory page during the i-th scan is equal to the first value, then the processing of the target memory page during the i-th scan is terminated.

[0080] After the CPU detects the value of the counter corresponding to the target memory page during the i-th scan, if it is determined that the value of the counter corresponding to the target memory page during the i-th scan is equal to the first value, the CPU considers that there is no duplicate page in the target memory page during the i-th scan. Therefore, the CPU can end the processing of the target memory page during the i-th scan, that is, skip the target memory page during the i-th scan.

[0081] 207. If it is determined that the target memory page during the i-th scan has the same content as the target memory page during the i-1-th scan, and the target memory page during the i-1-th scan has the same content as the target memory page during the i-2-th scan, then the processing of the target memory page during the i-th scan is terminated.

[0082] After the CPU detects the numerical value of the unmodified round of the target memory page, if it is determined that the numerical value of the unmodified round of the target memory page is greater than the third numerical value, the CPU determines that the target memory page at the i-th scan has the same content as the target memory page at the i-1th scan, and the target memory page at the i-1th scan has the same content as the target memory page at the i-2nd scan, that is, between the i-th scan and the i-1th scan, and between the i-1th scan and the i-2nd scan, the content of the target memory page has not been modified (it can also be understood that the target memory page remains unchanged for a long time), so the CPU believes that there is no duplicate page in the target memory page at the i-th scan. Then, the CPU ends the processing of the target memory page at the i-th scan, that is, skips the target memory page at the i-th scan.

[0083] After completing steps 201 to 207, it is equivalent to completing the i-th deduplication of the target memory page. Then the i-th deduplication of the next memory page can be performed until the i-th deduplication of all memory pages is completed, and then the i+1-th deduplication of all memory pages is performed, thereby effectively increasing the available memory.

[0084] To facilitate understanding of the above process, a specific application example is further described below. In this application example, assume that there are N memory pages, namely, memory page 1, memory page 2, memory page 3, ..., memory page N, and the CPU can perform M deduplication processing on these N memory pages. This application example includes:

[0085] (1) Assume that the CPU is currently performing the third deduplication of memory page 1. In the process of performing the third deduplication of memory page 1, the CPU can first perform the third scan on memory page 1 to obtain the content of memory page 1 at the third scan, and based on the content, generate the checksum of memory page 1 at the third scan. Then, determine whether the checksum of memory page 1 at the third scan is the same as the checksum of memory page 1 at the second scan, and process the value of the unmodified round of memory page 1 based on the result.

[0086] (1.1) If the CPU determines that the checksum of memory page 1 at the third scan is different from the checksum of the memory page at the second scan, the value of the unmodified round of memory page 1 is set to 0. It should be noted that in the process of performing the first deduplication on memory page 1, the checksum of memory page 1 at the first scan and the checksum of the memory page at the 0th scan (which can be considered to be 0) must be different, so when performing the first deduplication on memory page 1, the value of the unmodified round of memory page 1 will also be set to 0.

[0087] (1.2) If it is determined that the checksum of memory page 1 at the third scan is the same as the checksum of the memory page at the second scan, then the value of the unmodified round of memory page 1 is increased by 1. Based on (1.1) and (1.2), it can be seen that during the third deduplication process of memory page 1, if the value of the unmodified round of memory page 1 is equal to 0, it means that memory page 1 has been modified between the third scan and the second scan. If the value of the unmodified round of memory page 1 is equal to 1, it means that memory page 1 has not been modified between the third scan and the second scan, and has been modified between the second scan and the first scan. If the value of the unmodified round of memory page 1 is equal to 2, it means that memory page 1 has not been modified between the third scan and the second scan, and between the second scan and the first scan.

[0088] (2) After completing (1), the numerical value of the unmodified round of memory page 1 can be detected and corresponding processing can be performed.

[0089] (2.1) If it is determined that the value of the unmodified round of memory page 1 is 0, the CPU can determine that the content of memory page 1 has been modified between the third scan and the second scan, that is, memory page 1 has just changed. Therefore, the CPU can determine the counter corresponding to memory page 1 at the third scan, increase the value of the counter by 1, and skip memory page 1 at the third scan.

[0090] (2.2) If it is determined that the value of the unmodified round of memory page 1 is 1, the CPU can determine that the content of memory page 1 has not been modified between the third scan and the second scan, and the content of memory page 1 has been modified between the second scan and the first scan, that is, memory page 1 has remained unchanged, so the CPU can determine the counter corresponding to memory page 1 at the third scan and detect the value of the counter. In this way, the CPU can determine whether there are other memory pages with the same content as memory page 1 based on the value of the counter.

[0091] (2.2.1) If the CPU determines that the value of the counter is greater than 1, it means that there are duplicate pages in memory page 1 during the third scan, so the CPU can merge these memory pages. Figure 3 For further introduction. Figure 3 A schematic diagram of a counter provided in an embodiment of the present application, such as Figure 3 As shown, suppose that during the first deduplication process, memory page 2 experiences a situation similar to (2.1), and memory page 2 during the first scan corresponds to counter 1 and counter 6. Then, the CPU can increase the values ​​of counter 1 and counter 6 by 1 (e.g. Figure 3, the values ​​of counter 1 and counter 6 are changed from 0 to 1). Then, since the memory page 1 also experiences a situation similar to (2.1) during the second deduplication process, and the memory page 1 in the second scan becomes the same as the memory page 2 in the first scan, the CPU can increase the values ​​of counter 1 and counter 6 by 1 again (such as Figure 3 , the values ​​of counter 1 and counter 6 are changed from 1 to 2). Then, during the third deduplication of memory page 1, the CPU can determine that the values ​​of counter 1 and counter 6 are both greater than 1, indicating that there is a duplicate page in memory page 1 during the third scan (that is, memory page 2 during the first scan, assuming that memory page 2 during the first scan has not changed in the subsequent process), so the CPU can merge the two memory pages.

[0092] (2.2.2) If the CPU determines that the value of the counter is 1, it means that there is no duplicate page in memory page 1 during the third scan, so the CPU can skip memory page 1 during the third scan.

[0093] (2.3) If it is determined that the value of the unmodified rounds of memory page 1 is greater than 1, the CPU can determine that the content of memory page 1 has not been modified between the third scan and the second scan, and between the second scan and the first scan, that is, memory page 1 remains unchanged for a long time, indicating that there is no duplicate page of memory page 1 in the third scan, so the CPU can skip memory page 1 in the third scan.

[0094] (3) After completing (2), the third deduplication of memory page 6 can be continued until the third deduplication of N memory pages is completed, and then the fourth deduplication of N memory pages is performed.

[0095] In addition, the memory page processing method provided in the embodiment of the present application can be compared with two related technologies. The comparison results are as follows: Figure 4 and Figure 5 As shown ( Figure 4 A schematic diagram of the comparison results provided in the embodiment of the present application, Figure 5 Another schematic diagram of the comparison results provided in the embodiment of the present application). Figure 4 and Figure 5 In the embodiment of the present application, the deduplication processing result provided is curve 1, and the deduplication processing results of the three related technologies are curves 2 and 3 respectively. Figure 4 The horizontal axis is time, and the vertical axis is the number of memory pages for deduplication processing. Figure 5 The horizontal axis is time, and the vertical axis is CPU usage. It can be seen that when deduplication is performed on the same number of memory pages, the embodiment of the present application can be implemented faster, has better performance, and has a greatly reduced CPU overhead.

[0096] In an embodiment of the present application, after the target memory page is scanned for the i-th time, when the CPU determines that the target memory page at the i-th scan is in a state that has just changed (i.e., the target memory page at the i-th scan has a different content from the target memory page at the i-1-th scan), the value of the counter corresponding to the target memory page at the i-th scan may be increased by a first value. When the CPU determines that the target memory page at the i-th scan is in a state that has just remained unchanged (i.e., the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan has a different content from the target memory page at the i-2-th scan), and the value of the counter corresponding to the target memory page at the i-th scan is greater than the first value, it can accurately determine that there are duplicate pages in the target memory page at the i-th scan. Then, the CPU can obtain the duplicate pages of the target memory page at the i-th scan, and merge the target memory page at the i-th scan and the duplicate pages of the target memory page at the i-th scan. It can be seen from this that the CPU can fully filter the memory pages that do not have duplicate pages, and perform effective deduplication operations on the memory pages that have duplicate pages in a targeted manner, thereby avoiding a large number of invalid deduplication operations, reducing CPU overhead, and increasing the deduplication speed.

[0097] Furthermore, in the related art, after the CPU determines that a memory page has duplicate pages, it will immediately merge the memory page and the duplicate pages of the memory page. During the merging process, the CPU needs to perform a refresh operation of the Translation Lookaside Buffer (TLB). Therefore, in the related art, if the CPU determines that N memory pages have duplicate pages, it needs to perform N TLB refresh operations. In an embodiment of the present application, after the CPU determines that multiple memory pages have duplicate pages, it can put these memory pages into a queue to be merged. When certain conditions are met, each memory page in the queue to be merged and the duplicate pages of each memory page can be merged together. It can be seen that the present application uses the queue to be merged as a unit to realize batch merging of duplicate pages. During the batch merging process, the CPU only needs to perform a TLB refresh operation once, which can further reduce CPU overhead.

[0098] The above is a detailed description of the memory page processing method provided in the embodiment of the present application. The following will introduce the memory page processing device provided in the embodiment of the present application. Figure 6 A schematic diagram of a memory page processing device provided in an embodiment of the present application is shown in FIG. Figure 6 As shown, the device comprises:

[0099] Scanning module 601, used for scanning the target memory page for the i-th time;

[0100] The first processing module 602 is used to increase the value of the counter corresponding to the target memory page at the i-th scan by a first value if it is determined that the target memory page at the i-th scan has different contents from the target memory page at the (i-1)-th scan;

[0101] The second processing module 603 is used to detect the value of the counter corresponding to the target memory page at the i-th scan if it is determined that the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan has different content from the target memory page at the i-2-th scan;

[0102] The third processing module 604 is used to merge the target memory page at the i-th scan and the remaining memory pages with the same content as the target memory page at the i-th scan if it is determined that the value of the counter corresponding to the target memory page at the i-th scan is greater than the first value; wherein memory pages with different contents correspond to different counters, and memory pages with the same contents correspond to the same counter.

[0103] In a possible implementation, the device further includes: a fourth processing module, configured to terminate processing of the target memory page during the i-th scan if it is determined that the value of the counter corresponding to the target memory page during the i-th scan is equal to the first value.

[0104] In one possible implementation, the device also includes: a fifth processing module, which is used to end the processing of the target memory page during the i-th scan if it is determined that the target memory page during the i-th scan is the same as the target memory page during the i-1th scan, and the target memory page during the i-1th scan is the same as the target memory page during the i-2th scan.

[0105] In one possible implementation, the device also includes: a detection module, which is used to detect whether the target memory page at the i-th scan has the same content as the target memory page at the i-1th scan, and whether the target memory page at the i-1th scan has the same content as the target memory page at the i-2th scan, based on the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1th scan; wherein the checksum of the target memory page at the i-th scan is generated based on the target memory page at the i-th scan, and the checksum of the target memory page at the i-1th scan is generated based on the target memory page at the i-1th scan.

[0106] In one possible implementation, the detection module is specifically used to: if it is determined that the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1th scan are different, then set the value of the unmodified round of the target memory page to a second value; if it is determined that the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1th scan are the same, then increase the value of the unmodified round of the target memory page by a third value; based on the numerical size of the unmodified round of the target memory page, detect whether the content of the target memory page at the i-th scan is the same as that of the target memory page at the i-1th scan, and whether the content of the target memory page at the i-1th scan is the same as that of the target memory page at the i-2th scan.

[0107] In one possible implementation, the first processing module 602 is specifically used to determine that the content of the target memory page at the i-th scan is different from that of the target memory page at the i-1-th scan if the value of the unmodified round of the target memory page is determined to be equal to the second value, and increase the value of the counter corresponding to the target memory page at the i-th scan by the first value.

[0108] In one possible implementation, the second processing module 603 is specifically used to determine that if the value of the unmodified round of the target memory page is determined to be equal to the third value, then determine that the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan has different content from the target memory page at the i-2-th scan, and detect the value of the counter corresponding to the target memory page at the i-th scan.

[0109] In one possible implementation, the fifth processing module is specifically used to determine that the target memory page at the i-th scan is the same as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan is the same as the target memory page at the i-2-th scan, if the value of the unmodified round of the target memory page is determined to be greater than the third value, and end the processing of the target memory page at the i-th scan.

[0110] In one possible implementation, the third processing module 604 is specifically used to: if it is determined that the value of the counter corresponding to the target memory page at the i-th scan is greater than the first value, then detect whether the target memory page at the i-th scan and the first memory page in the queue to be merged correspond to the same process, and whether the target memory page at the i-th scan and the first memory page in the queue to be merged are located in a preset address range; if it is determined that the target memory page at the i-th scan and the first memory page in the queue to be merged correspond to the same process, and the target memory page at the i-th scan and the first memory page in the queue to be merged are located in the preset address range If the target memory page at the i-th scan is within the queue to be merged, the target memory page at the i-th scan is added to the queue to be merged until a new queue to be merged is constructed, and each memory page in the queue to be merged and the memory page with the same content as the memory page are merged; if it is determined that the target memory page at the i-th scan and the first memory page in the queue to be merged correspond to different processes, or the target memory page at the i-th scan and the first memory page are not within the preset address range, then each memory page in the queue to be merged and the memory page with the same content as the memory page are merged, and a new queue to be merged is constructed with the target memory page at the i-th scan as the first memory page.

[0111] It should be noted that the information interaction, execution process, etc. between the modules / units of the above-mentioned device are based on the same concept as the method embodiment of the present application, and the technical effects they bring are the same as those of the method embodiment of the present application. For specific contents, please refer to the description in the method embodiment shown above in the embodiment of the present application, and will not be repeated here.

[0112] Figure 7 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. Figure 7 As shown, an embodiment of a network device in an embodiment of the present application may include one or more central processors 701 , a memory 702 , an input and output interface 703 , a wired or wireless network interface 704 , and a power supply 705 .

[0113] The memory 702 may be a temporary storage or a permanent storage. Furthermore, the CPU 701 may be configured to communicate with the memory 702 and execute a series of instruction operations in the memory 702 on the electronic device.

[0114] In this embodiment, the CPU 701 may execute the aforementioned Figure 2 The operations performed by the CPU in the illustrated embodiment will not be described in detail here.

[0115] In this embodiment, the specific functional module division in the central processing unit 701 can be the same as the above Figure 6The division method of the scanning module, the first processing module, the second processing module, the third processing module, the fourth processing module, the fifth processing module and the detection module described in is similar and will not be repeated here.

[0116] The embodiment of the present application also relates to a computer storage medium, including computer readable instructions. When the computer readable instructions are executed, the following is implemented: Figure 2 The method described.

[0117] The present application also relates to a computer program product comprising instructions, which, when executed on a computer, causes the computer to execute Figure 2 The method described.

[0118] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0119] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0120] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0121] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0122] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a disk or an optical disk.

Claims

1. A memory page processing method, characterized in that: The method comprises: Scan the target memory page for the i-th time; If it is determined that the target memory page during the i-th scan has different contents from the target memory page during the (i-1)-th scan, then the value of the counter corresponding to the target memory page during the i-th scan is increased by a first value; If it is determined that the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan has different content from the target memory page at the i-2-th scan, then detect the value of the counter corresponding to the target memory page at the i-th scan; if it is determined that the value of the counter corresponding to the target memory page at the i-th scan is greater than the first value, then merge the target memory page at the i-th scan and the memory page with the same content as the target memory page at the i-th scan; Among them, memory pages with different contents correspond to different counters, and memory pages with the same contents correspond to the same counter.

2. The method according to claim 1, characterized in that: The method further comprises: If it is determined that the value of the counter corresponding to the target memory page during the i-th scan is equal to the first value, the processing of the target memory page during the i-th scan is terminated.

3. The method according to claim 1 or 2, characterized in that: The method further comprises: If the target memory page determined during the i-th scan is identical to the target memory page during the i-1-th scan, and the target memory page during the i-1-th scan is identical to the target memory page during the i-2-th scan, then the processing of the target memory page during the i-th scan is terminated.

4. The method according to claim 3, characterized in that: The method further comprises: Based on the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1-th scan, detect whether the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and whether the target memory page at the i-1-th scan has the same content as the target memory page at the i-2-th scan; Among them, the checksum of the target memory page during the i-th scan is generated based on the target memory page during the i-th scan, and the checksum of the target memory page during the i-1-th scan is generated based on the target memory page during the i-1-th scan.

5. The method according to claim 4, characterized in that The step of detecting whether the target memory page at the i-th scan has the same content as the target memory page at the i-1th scan, and whether the target memory page at the i-1th scan has the same content as the target memory page at the i-2th scan based on the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1th scan includes: If it is determined that the checksum of the target memory page during the i-th scan and the checksum of the target memory page during the (i-1)-th scan are different, setting the value of the unmodified round of the target memory page to a second value; If it is determined that the checksum of the target memory page during the i-th scan is the same as the checksum of the target memory page during the (i-1)-th scan, then the value of the unmodified round of the target memory page is increased by a third value; Based on the numerical value of the unmodified round of the target memory page, detecting whether the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and whether the target memory page at the i-1-th scan has the same content as the target memory page at the i-2-th scan; The unmodified round of the target memory page is used to indicate the number of times the content of the target memory page has not been modified.

6. The method according to claim 5, characterized in that If it is determined that the target memory page during the i-th scan has different contents from the target memory page during the i-1-th scan, the process includes: If it is determined that the value of the unmodified round of the target memory page is equal to the second value, it is determined that the content of the target memory page during the i-th scan is different from that of the target memory page during the i-1-th scan.

7. The method according to claim 5, characterized in that If it is determined that the target memory page during the i-th scan has the same content as the target memory page during the i-1-th scan, and the target memory page during the i-1-th scan has different content from the target memory page during the i-2-th scan, the method comprises: If it is determined that the value of the unmodified round of the target memory page is equal to the third value, it is determined that the target memory page during the i-th scan is the same as the target memory page during the i-1-th scan, and the target memory page during the i-1-th scan is different from the target memory page during the i-2-th scan.

8. The method according to any one of claims 5 to 7, characterized in that: If the determination that the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan has the same content as the target memory page at the i-2-th scan includes: If it is determined that the value of the unmodified round of the target memory page is greater than the third value, then it is determined that the target memory page during the i-th scan is the same as the target memory page during the i-1-th scan, and the target memory page during the i-1-th scan is the same as the target memory page during the i-2-th scan.

9. The method according to any one of claims 1 to 7, characterized in that: The merging of the target memory page during the i-th scan and the memory page having the same content as the target memory page during the i-th scan comprises: If it is determined that the target memory page at the i-th scan and the first memory page in the queue to be merged correspond to the same process, and the target memory page at the i-th scan and the first memory page in the queue to be merged are located in a preset address range, then the target memory page at the i-th scan is added to the queue to be merged until a new queue to be merged is constructed, and each memory page in the queue to be merged and the memory page with the same content as the memory page are merged; If it is determined that the target memory page during the i-th scan and the first memory page in the queue to be merged correspond to different processes, or the target memory page during the i-th scan and the first memory page are not within a preset address range, then each memory page in the queue to be merged, as well as the memory page with the same content as the memory page, are merged, and a new queue to be merged is constructed with the target memory page during the i-th scan as the first memory page.

10. A memory page processing device, characterized in that: The device comprises: A scanning module, used for scanning the target memory page for the i-th time; A first processing module, configured to increase the value of a counter corresponding to the target memory page at the i-th scan by a first value if it is determined that the target memory page at the i-th scan has different contents from the target memory page at the i-1-th scan; A second processing module is used to detect the value of the counter corresponding to the target memory page at the i-th scan if it is determined that the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan has different content from the target memory page at the i-2-th scan; a third processing module, configured to merge the target memory page at the i-th scan and other memory pages having the same content as the target memory page at the i-th scan if it is determined that the value of the counter corresponding to the target memory page at the i-th scan is greater than the first value; Among them, memory pages with different contents correspond to different counters, and memory pages with the same contents correspond to the same counter.

11. The device according to claim 10, characterized in that The device also includes: The fourth processing module is used to terminate the processing of the target memory page during the i-th scan if it is determined that the value of the counter corresponding to the target memory page during the i-th scan is equal to the first value.

12. The device according to claim 10 or 11, characterized in that The device also includes: The fifth processing module is used to end the processing of the target memory page during the i-th scan if the target memory page during the i-th scan is determined to have the same content as the target memory page during the i-1th scan, and the target memory page during the i-1th scan is determined to have the same content as the target memory page during the i-2th scan.

13. The device according to claim 12, characterized in that The device also includes: A detection module, for detecting, based on the checksum of the target memory page at the i-th scan and the checksum of the target memory page at the i-1-th scan, whether the content of the target memory page at the i-th scan is the same as that of the target memory page at the i-1-th scan, and whether the content of the target memory page at the i-1-th scan is the same as that of the target memory page at the i-2-th scan; Among them, the checksum of the target memory page during the i-th scan is generated based on the target memory page during the i-th scan, and the checksum of the target memory page during the i-1-th scan is generated based on the target memory page during the i-1-th scan.

14. The device according to claim 13, characterized in that The detection module is specifically used for: If it is determined that the checksum of the target memory page during the i-th scan and the checksum of the target memory page during the (i-1)-th scan are different, setting the value of the unmodified round of the target memory page to a second value; If it is determined that the checksum of the target memory page during the i-th scan is the same as the checksum of the target memory page during the (i-1)-th scan, then the value of the unmodified round of the target memory page is increased by a third value; Based on the numerical value of the unmodified round of the target memory page, detecting whether the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and whether the target memory page at the i-1-th scan has the same content as the target memory page at the i-2-th scan; The unmodified round of the target memory page is used to indicate the number of times the content of the target memory page has not been modified.

15. The device according to claim 14, characterized in that The first processing module is specifically used to determine that the content of the target memory page at the i-th scan is different from that of the target memory page at the i-1-th scan if the value of the unmodified round of the target memory page is determined to be equal to the second value, and increase the value of the counter corresponding to the target memory page at the i-th scan by the first value.

16. The device according to claim 14, characterized in that The second processing module is specifically used to determine that the target memory page at the i-th scan has the same content as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan has different content from the target memory page at the i-2-th scan, if the value of the unmodified round of the target memory page is determined to be equal to the third value, and detect the value size of the counter corresponding to the target memory page at the i-th scan.

17. The device according to any one of claims 14 to 16, characterized in that The fifth processing module is specifically used to determine that the target memory page at the i-th scan is the same as the target memory page at the i-1-th scan, and the target memory page at the i-1-th scan is the same as the target memory page at the i-2-th scan, if the value of the unmodified round of the target memory page is determined to be greater than the third value, and end the processing of the target memory page at the i-th scan.

18. The device according to any one of claims 10 to 16, characterized in that The third processing module is specifically used for: If it is determined that the value of the counter corresponding to the target memory page during the i-th scan is greater than the first value, then detecting whether the target memory page during the i-th scan and the first memory page in the queue to be merged correspond to the same process, and whether the target memory page during the i-th scan and the first memory page in the queue to be merged are located within a preset address range; If it is determined that the target memory page at the i-th scan and the first memory page in the queue to be merged correspond to the same process, and the target memory page at the i-th scan and the first memory page in the queue to be merged are located in a preset address range, then the target memory page at the i-th scan is added to the queue to be merged until a new queue to be merged is constructed, and each memory page in the queue to be merged and the memory page with the same content as the memory page are merged; If it is determined that the target memory page during the i-th scan and the first memory page in the queue to be merged correspond to different processes, or the target memory page during the i-th scan and the first memory page are not within a preset address range, then each memory page in the queue to be merged, as well as the memory page with the same content as the memory page, are merged, and a new queue to be merged is constructed with the target memory page during the i-th scan as the first memory page.

19. An electronic device, characterized in that: The electronic device comprises a memory and a processor; the memory stores codes, the processor is configured to execute the codes, and when the codes are executed, the electronic device executes the method according to any one of claims 1 to 9.

20. A computer-readable storage medium, characterized in that: The method comprises computer-readable instructions, which, when executed on a computer, cause the computer to execute the method according to any one of claims 1 to 9.

21. A computer program product, characterized in that The method comprises computer-readable instructions, and when the computer-readable instructions are executed on a computer, the computer is caused to execute the method according to any one of claims 1 to 9.

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