Circuit boards and electronic devices

Abstract

The present invention provides a circuit board and an electronic device, the circuit board comprising: a dielectric layer, the dielectric layer comprising a first surface; a first wiring layer, located on the first surface of the dielectric layer, the first wiring layer comprising a routing area and an interface area; a differential routing structure, located in the routing area, the interface area and the connection area, the interface area being located between the routing area and the connection area, the connection area being used for connection, and the line width of the differential routing structure in the interface area being greater than the line width of the differential routing structure in the routing area. The present invention differentiates the line width of the differential routing structure in the routing area and the interface area by making the line width of the differential routing structure in the interface area greater than the line width of the differential routing structure in the routing area, which can reduce the impedance of the differential routing structure in the interface area, making it less likely for the differential routing structure in the interface area to have an impedance mutation, which is beneficial to maintaining the continuity of the differential impedance, and when the connection area is connected to an external port, the transmitted signal is more complete, which is beneficial to improving the certification of the circuit board through the consistency test solution.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of circuit technology, and in particular to a circuit board and an electronic device. Background Art

[0002] Impedance control is required in the design of high-speed PCB (Printed Circuit Board). PCB usually includes a dielectric layer, a top layer (TOP) high-speed trace located on the top of the dielectric layer, and a bottom layer (Bottom) high-speed trace located at the bottom of the dielectric layer. Because the thickness of the dielectric layer is large, the top layer high-speed trace cannot refer to the bottom layer high-speed trace to control impedance. Now, the coplanar line reference mode is used, that is, the ground line (GND) on the same layer is referenced to perform impedance control.

[0003] Differential lines are used in high-speed PCB design. Differential lines use differential transmission technology. Different from the traditional method of one signal line corresponding to one ground line, signals are transmitted on both signal lines. The amplitudes of the two signals are equal, the phase difference is 180 degrees, and the polarity is opposite. A ground line is set between different differential lines to prevent the signal in the differential line from being interfered by other signals. We use the interval between the signal line close to the ground line and the ground line in the differential line as the ground spacing, and the interval between the two signal lines in the differential line as the differential spacing.

[0004] In the interface area of ​​the PCB board, the large spacing between the ground planes and the differential spacing can easily lead to impedance discontinuity, causing signal integrity issues, which can further cause the high-speed PCB board to fail the Conformance Test Solution (CTS) certification. Summary of the invention

[0005] The problem solved by the embodiments of the present invention is to provide a circuit board and an electronic device, which are used to solve the signal integrity problem caused by impedance discontinuity in the interface area.

[0006] To solve the above problems, an embodiment of the present invention provides a circuit board, including: a dielectric layer, the dielectric layer including a first surface; a first wiring layer, located on the first surface of the dielectric layer, the first wiring layer including a routing area, an interface area and a connection area, the interface area is located between the routing area and the connection area, and the connection area is used for connection; a differential routing structure, located in the routing area and the interface area, and the line width of the differential routing structure in the interface area is greater than the line width of the differential routing structure in the routing area.

[0007] Optionally, the first wiring layer also includes: a plug-in area, located between the routing area and the interface area, and adjacent to the routing area and the interface area, and the differential routing structure is also located in the plug-in area; the circuit board also includes: a plurality of spaced-apart pins located in the connection area, and the pins are connected to the differential routing structure.

[0008] Optionally, the product of the length of the differential routing structure in the interface area and the routing characteristic impedance of the differential routing structure in the interface area is equal to the sum of the product of the length of the differential routing structure in the plug-in area and the routing characteristic impedance of the differential routing structure in the plug-in area, and the product of the length of the pins in the connection area and the routing characteristic impedance of the pins in the connection area.

[0009] Optionally, the line width of the differential routing structure in the plug-in area is greater than the line width of the differential routing structure in the routing area.

[0010] Optionally, the line width of the pin is equal to the line width of the differential routing structure in the interface area.

[0011] Optionally, the differential routing structure includes a first differential line and a second differential line spaced apart from each other; the first wiring layer also includes: a ground line located between the first differential line and the second differential line, and the line width of the ground line in the interface area is greater than the line width of the ground line in the plug-in area.

[0012] Optionally, the differential routing structure includes a first differential line and a second differential line spaced apart from each other, the first differential line includes a first signal line and a second signal line spaced apart from each other, the second differential line includes a third signal line and a fourth signal line spaced apart from each other, and the first signal line, the second signal line, the third signal line and the fourth signal line are arranged sequentially in one direction.

[0013] Optionally, the line width of the first signal line in the interface area is greater than the line width of the first signal line in the routing area; the line width of the second signal line in the interface area is greater than the line width of the second signal line in the routing area; the line width of the third signal line in the interface area is greater than the line width of the third signal line in the routing area; and the line width of the fourth signal line in the interface area is greater than the line width of the fourth signal line in the routing area.

[0014] Optionally, the interval between the first signal line and the second signal line in the interface area is smaller than the interval between the first signal line and the second signal line in the routing area; the interval between the third signal line and the fourth signal line in the interface area is smaller than the interval between the third signal line and the fourth signal line in the routing area.

[0015] Optionally, the first wiring layer also includes: a ground wire, located between the second signal line and the third signal line; the spacing between the ground wire and the second signal line in the interface area is smaller than the spacing between the ground wire and the second signal line in the routing area; the spacing between the ground wire and the third signal line in the interface area is smaller than the spacing between the ground wire and the third signal line in the routing area.

[0016] Optionally, the circuit board further includes: a plurality of spaced-apart ground terminals, which are located in the ground wire and penetrate the dielectric layer.

[0017] Optionally, the dielectric layer further includes: a second surface located on a side of the dielectric layer away from the first surface; the circuit board further includes: a second wiring layer located on the second surface; and a signal trace located in the second wiring layer.

[0018] Optionally, the circuit board further includes: a solder resist covering the first wiring layer and the differential routing structure, and the second wiring layer and the signal routing.

[0019] Correspondingly, an embodiment of the present invention further provides an electronic device, comprising the aforementioned circuit board.

[0020] Optionally, the electronic device includes a set-top box, a television, a projector or a mobile phone.

[0021] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0022] The embodiment of the present invention provides a circuit board, wherein the first wiring layer is located on the first surface of the dielectric layer, the first wiring layer includes a routing area, an interface area and a connection area, the interface area is located between the routing area and the connection area, and the connection area is used for connection; a differential routing structure is located in the routing area and the interface area, and the line width of the differential routing structure in the interface area is greater than the line width of the differential routing structure in the routing area. The connection area is used for connection, specifically, connection with an external port, the interface area is located between the routing area and the connection area, and the line width of the differential routing structure in the routing area and the interface area is differentiated by making the line width of the differential routing structure in the interface area greater than the line width of the differential routing structure in the routing area, so that the impedance of the differential routing structure in the interface area can be reduced, so that the differential routing structure in the interface area is not prone to impedance mutation, which is conducive to maintaining the continuity of differential impedance and improving signal integrity. When the connection area is connected to the external port, the transmitted signal is more complete, which is conducive to improving the certification of the circuit board through the consistency test solution.

[0023] In an optional solution, the differential routing structure includes a first differential line and a second differential line spaced apart from each other, the first differential line includes a first signal line and a second signal line spaced apart from each other, the second differential line includes a third signal line and a fourth signal line spaced apart from each other, and the first signal line, the second signal line, the third signal line and the fourth signal line are arranged sequentially in one direction. Compared with the routing area, in the interface area, because the line widths of the first signal line, the second signal line, the third signal line and the fourth signal line are wider, it is beneficial to make the interval between the ground wire and the second signal line in the interface area smaller than the interval between the ground wire and the second signal line in the routing area; the interval between the ground wire and the third signal line in the interface area is smaller than the interval between the ground wire and the third signal line in the routing area. At the same time, it is also beneficial to make the interval between the first signal line and the second signal line in the interface area smaller than the interval between the first signal line and the second signal line in the routing area; the interval between the third signal line and the fourth signal line in the interface area is smaller than the interval between the third signal line and the fourth signal line in the routing area, which is beneficial to reduce the impedance mutation of the first signal line, the second signal line, the third signal line and the fourth signal line in the interface area, so that the differential impedance of the four signal lines remains continuous, thereby improving signal integrity. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 It is a schematic diagram of the cross-sectional structure of a circuit board;

[0025] Figure 2 yes Figure 1 The schematic diagram of the structure of the circuit board in direction A;

[0026] Figure 3 It is a schematic cross-sectional structure diagram of an embodiment of a circuit board of the present invention;

[0027] Figure 4 yes Figure 3 Schematic diagram of the structure of the circuit board in direction B. DETAILED DESCRIPTION

[0028] As can be seen from the background technology, when traditional circuit boards use the same-layer reference for impedance control, the interface area of ​​the PCB board is prone to impedance discontinuity due to the large ground spacing and differential spacing, causing signal integrity problems, further resulting in high-speed PCB boards failing to pass the consistency test solution (CTS) certification. Now, combined with a circuit board, the reasons why the interface area is prone to impedance discontinuity and poor signal integrity are analyzed.

[0029] Figure 1 It is a schematic diagram of the cross-sectional structure of a circuit board. Figure 2 yes Figure 1 Schematic diagram of the structure of the circuit board in direction A.

[0030] A circuit board comprises: a dielectric layer 1, wherein the dielectric layer 1 comprises a first surface and a second surface opposite to each other; a first wiring layer 2, located on the first surface of the dielectric layer 1; and a second wiring layer 3, located on the second surface.

[0031] The first wiring layer 2 includes: a routing area I, a plug-in area II, an interface area III and a connection area IV arranged in sequence in a first direction x; a differential routing structure 7, which is located in the routing area I, the plug-in area II, the interface area III and the connection area IV, and the line width of the differential routing structure 7 in the routing area I, the plug-in area II, the interface area III and the connection area IV is the same, wherein the differential routing structure 7 in the plug-in area II is used to connect an electrostatic discharge device (ESD), the connection area IV has a pin 8 of a high-definition multimedia interface (HDMI), and the differential routing structure 7 in the interface area III is used to connect the differential routing structure 7 of the plug-in area II and the pin 8 in the connection area IV.

[0032] The differential routing structure 7 includes a first differential line 4 and a second differential line 5 spaced apart from each other, the first differential line 4 includes a first signal line 41 and a second signal line 42 spaced apart from each other, the second differential line 5 includes a third signal line 51 and a fourth signal line 52 spaced apart from each other, the first signal line 41, the second signal line 42, the third signal line 51 and the fourth signal line 52 are arranged in sequence in a second direction y, and the second direction y is perpendicular to the first direction x.

[0033] The first wiring layer 2 also includes: a ground line 6, which is located between the second signal line 42 and the third signal line 51. The interval between the second signal line 42 and the ground line 6, and the interval between the third signal line 51 and the ground line 6 are both ground intervals d1, and the interval between the first signal line 41 and the second signal line 42, and the interval between the third signal line 51 and the fourth signal line 52 are both differential intervals d2.

[0034] In the circuit board, the differential spacing d2 and the ground spacing d1 of the interface area III are the optimal parameters verified by Polar SI9000 software and actual production verification, so that the impedance of the differential routing structure 7 in the circuit board is stable at 100Ω. However, during the operation of the circuit board, the ground spacing d1 and the differential spacing d2 in the interface area I are large, which can easily lead to impedance discontinuity, causing signal integrity problems, and further easily causing high-speed PCB boards to fail the certification of the Conformance Test Solution (CTS).

[0035] In order to solve the technical problem, an embodiment of the present invention provides a circuit board, including: a dielectric layer, the dielectric layer including a first surface; a first wiring layer, located on the first surface of the dielectric layer, the first wiring layer including a routing area, an interface area and a connection area, the interface area is located between the routing area and the connection area, and the connection area is used for connection; a differential routing structure, located in the routing area and the interface area, and the line width of the differential routing structure in the interface area is greater than the line width of the differential routing structure in the routing area.

[0036] An embodiment of the present invention provides a circuit board, wherein the connection area is used for connection, specifically, connection with an external port, and the interface area is located between the routing area and the connection area. By making the line width of the differential routing structure in the interface area larger than the line width of the differential routing structure in the routing area, the line width of the differential routing structure in the routing area and the interface area are differentiated, which can reduce the impedance of the differential routing structure in the interface area, making it less likely for the differential routing structure in the interface area to have an impedance mutation, which is beneficial to maintaining the continuity of the differential impedance and improving the signal integrity. When the connection area is connected to the external port, the transmitted signal is more complete, which is beneficial to improving the certification of the circuit board through a consistency test solution.

[0037] refer to Figure 3 and Figure 4 , is a schematic structural diagram of an embodiment of a circuit board of the present invention, Figure 3 is a schematic cross-sectional structure diagram of an embodiment of a circuit board of the present invention, Figure 4 yes Figure 3 Schematic diagram of the structure of the circuit board in direction B.

[0038] The circuit board includes: a dielectric layer 10, the dielectric layer 10 includes a first surface; a first wiring layer 11, located on the first surface of the dielectric layer 10, the first wiring layer 11 includes a routing area II, an interface area I and a connection area IV, the interface area I is located between the routing area II and the connection area IV, and the connection area IV is used for connection; a differential routing structure 100, located in the routing area II and the interface area I, and the line width of the differential routing structure 100 in the interface area I is greater than the line width of the differential routing structure 100 in the routing area II.

[0039] The connection area IV is used for connection, specifically, connection with an external port. When the circuit board is connected to the external port through the connection area IV, the interface area I is located between the routing area II and the connection area IV. By making the line width of the differential routing structure 100 of the interface area I larger than the line width of the differential routing structure 100 of the routing area II, the line width of the differential routing structure 100 of the routing area II and the interface area I are differentiated, which can reduce the impedance of the differential routing structure 100 of the interface area I, so that the differential routing structure 100 of the interface area I is not prone to impedance mutation, which is beneficial to maintaining the continuity of the differential impedance and improving the signal integrity. When the connection area IV is connected to the external port, the transmitted signal is more complete, which is beneficial to improving the certification of the circuit board through the consistency test solution.

[0040] The dielectric layer 10 is used to provide a wiring basis for the first wiring layer 11 .

[0041] In this embodiment, the dielectric layer 10 includes a core board (not shown in the figure) and prepregs (not shown in the figure) located on the upper and lower surfaces of the core board.

[0042] The core board is a hard board with a specific thickness and copper clad on both sides.

[0043] The semi-cured sheet is a prepreg material, which is a thin sheet material impregnated with resin and cured to an intermediate degree. The semi-cured sheet can be used as a bonding material and interlayer insulation for inner conductive patterns in circuit boards.

[0044] The connection area IV in the first wiring layer 11 is used to be electrically connected to other ports for signal transmission.

[0045] In this embodiment, the circuit board further includes: a plurality of spaced-apart pins 105 located in the connection area IV, the pins 105 being used to connect to an external port, and the pins 105 being connected to the differential wiring structure 100 .

[0046] In this embodiment, the types of the connection area IV include High Definition Multimedia Interface (HDMI), Video Graphics Array (VGA), Digital Visual Interface (DVI) and High Definition Digital Display Port (DP).

[0047] In this embodiment, the connection area IV includes an HDMI interface, and accordingly, the interface area I is an HDMI interface area, and the routing area II is specifically an HDMI differential feature routing area.

[0048] The first wiring layer 11 further includes: a plug-in area III, which is located between the routing area II and the interface area I and is adjacent to the routing area II and the interface area I. The differential routing structure 100 is also located in the plug-in area III.

[0049] In this embodiment, the differential wiring structure 100 of the plug-in area III is used to electrically connect an electrostatic discharge device (ESD). When the circuit board is connected to an external port through the connection area IV, the electrostatic discharge device is used to absorb and dissipate static electricity to avoid affecting the circuit board. In other embodiments, the differential wiring structure of the plug-in area III can also be used to electrically connect a varistor (EMD), which is used for voltage protection.

[0050] In other embodiments, when no electrostatic discharge device is needed near the connection area to absorb and dissipate static electricity, the circuit board may not be provided with a plug-in area, and accordingly, the routing area and the interface area are adjacent.

[0051] In this embodiment, the differential wiring structure 100 includes a first differential line 101 and a second differential line 102 that are spaced apart from each other.

[0052] The first wiring layer 11 further includes a ground wire 103 located between the first differential wire 101 and the second differential wire 102 .

[0053] In this embodiment, the differential routing structure 100 of the plug-in area III has a differential pad 106 , that is, the first differential line 101 and the second differential line 102 both have a differential pad 106 , and the ground line 103 of the plug-in area III has a ground pad 107 .

[0054] The plug-in area III is connected to an electrostatic discharge device (ESD) through a differential pad 106 and a ground pad 107 .

[0055] Specifically, in the extension direction of the differential routing structure 100 , the number of differential pads 106 in each differential line is two and are spaced apart; in the extension direction of the ground wire 103 , the number of ground pads in the ground wire 103 is two and are spaced apart.

[0056] The interface area I is used to connect the plug-in area III and the connection area IV. When the connection area IV is connected to the external port, the static electricity in the connection area IV can be transmitted to the electrostatic discharge device in the plug-in area III to absorb and dissipate the static electricity.

[0057] In this embodiment, the routing area II, the plug-in area III, the interface area I and the connection area IV are sequentially distributed in the first direction x, and accordingly, the differential routing structure 100 extends along the first direction x.

[0058] It should be noted that the differential routing structure 100 passes through the routing area II, the plug-in area II and the interface area I in the first direction x and is connected to the pins 105 in the connection area IV.

[0059] In this embodiment, the product of the length of the differential routing structure 100 of the interface area I and the routing characteristic impedance of the differential routing structure 100 of the interface area I is equal to the sum of the product of the length of the differential routing structure 100 of the plug-in area III and the routing characteristic impedance of the differential routing structure 100 of the plug-in area III, and the product of the length of the pin 105 of the connection area IV and the routing characteristic impedance of the pin 105 of the connection area IV, as shown in the following formula:

[0060] L1*R1=L2*R2+L3*R3

[0061] Among them, L1 (such as Figure 4 ) is the length of the differential routing structure 100 in the interface area I, L2 (as shown Figure 4 ) is the length of the differential routing structure 100 in the plug-in area III, L3 (as shown Figure 4 ) is the length of the pin 105 in the connection area IV, R1 is the routing characteristic impedance of the differential routing structure 100 in the interface area I, R2 is the routing characteristic impedance of the differential routing structure 100 in the plug-in area III, and R3 is the routing characteristic impedance of the pin 105 in the connection area IV.

[0062] In the consistency test solution (CTS), a unit-step signal with a rise time of 200 picoseconds is used to measure the characteristic impedance of the differential routing structure 100, so the actual characteristic impedance resolution reaches several millimeters (mm). Within this resolution, the differential routing structure 100 needs to use a differential routing structure 100 with an opposite impedance change to compensate for the effect of the increased impedance of the HDMI interface area I, so that the impedance is more continuous.

[0063] In this embodiment, the line width of the differential routing structure 100 in the plug-in area III is greater than the line width of the differential routing structure 100 in the routing area II.

[0064] Compared with the line width of the differential routing structure 100 in routing area II, the line width of the differential routing structure 100 in plug-in area III is wider, which can compensate for the increase in characteristic impedance of the differential routing structure 100 in plug-in area III and stabilize the impedance of the entire differential routing structure 100 at 100Ω.

[0065] In this embodiment, the line width of the pin 105 is equal to the line width of the differential routing structure 100 in the interface area I.

[0066] In this embodiment, the line width of the pin 105 is equal to the line width of the differential routing structure 100 in the interface area I, which is conducive to ensuring good weldability and impedance continuity.

[0067] In this embodiment, the differential routing structure 100 includes a first differential line 101 and a second differential line 102 spaced apart from each other, the first differential line 101 includes a first signal line 1011 and a second signal line 1012 spaced apart from each other, the second differential line 102 includes a third signal line 1021 and a fourth signal line 1022 spaced apart from each other, and the first signal line 1011, the second signal line 1012, the third signal line 1021 and the fourth signal line 1022 are arranged sequentially in the second direction y.

[0068] The differential routing structure 100 utilizes differential transmission technology, and the coupling between the two signal lines of the same differential line is better, and has strong anti-interference ability; and because the polarities of the two signal lines of the same differential line are opposite, their external radiation can cancel each other out, thereby improving the tightness of coupling and effectively suppressing electromagnetic interference (EMI).

[0069] In this embodiment, the second direction y is perpendicular to the first direction x. In other embodiments, according to the distribution requirements of the differential routing structure and the ground wire in the first wiring layer, the second direction y may not be perpendicular to the first direction x.

[0070] In this embodiment, the line width of the first signal line 1011 of the interface area I is greater than the line width of the first signal line 1011 of the routing area II; the line width of the second signal line 1012 of the interface area I is greater than the line width of the second signal line 1012 of the routing area II; the line width of the third signal line 1021 of the interface area I is greater than the line width of the third signal line 1021 of the routing area II; the line width of the fourth signal line 1022 of the interface area I is greater than the line width of the fourth signal line 1022 of the routing area II.

[0071] In the second direction y, compared with the routing area II, the line widths of the first signal line 1011, the second signal line 1012, the third signal line 1021 and the fourth signal line 1022 in the interface area I are wider, which can reduce the impedance of the differential routing structure 100 of the interface area I, so that the differential routing structure 100 of the interface area I is not prone to impedance mutation, which is beneficial to maintaining the continuity of the differential impedance and improving the signal integrity. When the connection area IV is connected to the external port, the transmitted signal is more complete, which is beneficial to improving the certification of the circuit board through the consistency test solution.

[0072] As an example, when the line width of the differential routing structure in the interface area is greater than the line width of the differential routing structure in the routing area, the line widths of the first signal line 1011, the second signal line 1012, the third signal line 1021 and the fourth signal line 1022 in the interface area I are all 8 mil to 12 mil, and the line widths of the first signal line 1011, the second signal line 1012, the third signal line 1021 and the fourth signal line 1022 in the routing area II are 6.4 mil to 9.6 mil.

[0073] It should be noted that, because the size of the interface area I in the second direction y is fixed, and because the line widths of the first signal line 1011, the second signal line 1012, the third signal line 1021 and the fourth signal line 1022 are wider, it is beneficial to make the interval between the first signal line 1011 and the second signal line 1012 of the interface area I smaller than the interval between the first signal line 1011 and the second signal line 1012 of the routing area II; the interval between the third signal line 1021 and the fourth signal line 1022 of the interface area I is smaller than the interval between the third signal line 1021 and the fourth signal line 1022 of the routing area II, which is beneficial to reduce the impedance mutation of the first signal line 1011, the second signal line 1012, the third signal line 1021 and the fourth signal line 1022 of the interface area I, so that the differential impedance of the four signal lines remains continuous, thereby improving signal integrity.

[0074] As an example, the spacing between the first signal line 1011 and the second signal line 1012 in the interface area I is 3.6 mil to 5.4 mil, and the spacing between the first signal line 1011 and the second signal line 1012 in the routing area II is 4.8 mil to 7.2 mil. The spacing between the third signal line 1021 and the fourth signal line 1022 in the interface area I is 3.6 mil to 5.4 mil, and the spacing between the first signal line 1011 and the second signal line 1012 in the routing area II is 4.8 mil to 7.2 mil.

[0075] In this embodiment, the ground line 103 is located between the first differential line 101 and the second differential line 102 . Therefore, the ground line 103 prevents the signal in the first differential line 101 and the signal in the second differential line 102 from interfering with each other.

[0076] It should be noted that the line width of the ground wire 103 in the interface area I is greater than the line width of the ground wire 103 in the plug-in area III.

[0077] The line width of the ground line 103 in the interface area I is relatively large, which is conducive to further reducing the interval between the ground line 103 and the second signal line 1012, and reducing the interval between the ground line 103 and the third signal line 1021, thereby reducing the impedance mutation of the first signal line 1011, the second signal line 1012, the third signal line 1021 and the fourth signal line 1022 in the interface area I, so that the differential impedance of the four signal lines remains continuous, thereby improving signal integrity.

[0078] It should be noted that, because the size of the interface area I in the second direction y is fixed, and because the line widths of the first signal line 1011, the second signal line 1012, the third signal line 1021 and the fourth signal line 1022 are wider, it is beneficial to make the interval between the ground line 103 and the second signal line 1012 in the interface area I smaller than the interval between the ground line 103 and the second signal line 1012 in the routing area II; the interval between the ground line 103 and the third signal line 1021 in the interface area I is smaller than the interval between the ground line 103 and the third signal line 1021 in the routing area II, which is beneficial to reduce the impedance mutation of the first signal line 1011, the second signal line 1012, the third signal line 1021 and the fourth signal line 1022 in the interface area I, so that the differential impedance of the four signal lines remains continuous, thereby improving signal integrity.

[0079] As an example, in the interface area I, the interval between the ground line 103 and the second signal line 1012 is 3.6 mil to 5.4 mil, and the interval between the ground line 103 and the third signal line 1021 is 3.6 mil to 5.4 mil. In the routing area II, the interval between the ground line 103 and the second signal line 1012 is 4.8 mil to 7.2 mil, and the interval between the ground line 103 and the third signal line 1021 is 4.8 mil to 7.2 mil.

[0080] The circuit board includes: a plurality of spaced-apart ground terminals 104 (GND), which are located in the ground wire 103 and penetrate the dielectric layer 10 .

[0081] In this embodiment, the ground terminal 104 is a copper-clad ground.

[0082] The dielectric layer 10 further includes: a second surface, located on the side of the dielectric layer 10 away from the first surface; the circuit board further includes: a second wiring layer 12, located on the second surface; and a signal trace (not shown in the figure) located in the second wiring layer 12.

[0083] The signal wiring in the second wiring layer 12 is a signal line for transmitting signals. The signal wiring is transferred to the second wiring layer 12 through vias (not shown in the figure) in the circuit board.

[0084] The circuit board further includes: a solder resist covering the first wiring layer 11 and the differential wiring structure 100 , and the second wiring layer 12 and the signal wiring.

[0085] In this embodiment, the material of the solder resist includes green oil.

[0086] Correspondingly, an embodiment of the present invention further provides an electronic device, wherein the electronic device includes the aforementioned circuit board.

[0087] The electronic device includes the circuit board. Because the line width of the differential routing structure 100 in the interface area I of the circuit board is greater than the line width of the differential routing structure 100 in the routing area II, the line width of the differential routing structure 100 in the routing area II and the interface area I is differentiated, which can reduce the impedance of the differential routing structure 100 in the interface area I, so that the differential routing structure 100 in the interface area I is not prone to impedance mutation, which is beneficial to maintaining the continuity of the differential impedance and improving the signal integrity. When the connection area IV is connected to the external port, the transmitted signal is more complete, which is beneficial to improving the certification of the circuit board through the consistency test solution, and the performance of the corresponding electronic device is improved.

[0088] In this embodiment, the electronic device is a set-top box, a television, a projector or a mobile phone.

[0089] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A circuit board, characterized in that: include: a dielectric layer, the dielectric layer comprising a first surface; A first wiring layer, located on the first surface of the dielectric layer, the first wiring layer comprising a routing area, an interface area and a connection area, the interface area is located between the routing area and the connection area, and the connection area is used for connection; A differential routing structure is located in the routing area and the interface area, and the line width of the differential routing structure in the interface area is greater than the line width of the differential routing structure in the routing area; The first wiring layer further includes: a plug-in area located between the routing area and the interface area, and the differential routing structure is also located in the plug-in area.

2. The circuit board according to claim 1, characterized in that The plug-in area is adjacent to the routing area and the interface area; The circuit board further includes: a plurality of spaced-apart pins located in the connection area, wherein the pins are connected to the differential routing structure.

3. The circuit board according to claim 2, characterized in that: The product of the length of the differential routing structure in the interface area and the routing characteristic impedance of the differential routing structure in the interface area is equal to the sum of the product of the length of the differential routing structure in the plug-in area and the routing characteristic impedance of the differential routing structure in the plug-in area, and the product of the length of the pin in the connection area and the routing characteristic impedance of the pin in the connection area.

4. The circuit board according to claim 2, characterized in that: The line width of the differential routing structure in the plug-in area is greater than the line width of the differential routing structure in the routing area.

5. The circuit board according to claim 2, characterized in that: The line width of the pin is equal to the line width of the differential routing structure in the interface area.

6. The circuit board according to claim 2, characterized in that: The differential wiring structure includes a first differential line and a second differential line spaced apart from each other; The first wiring layer further includes: a ground line located between the first differential line and the second differential line, and the line width of the ground line in the interface area is greater than the line width of the ground line in the plug-in area.

7. The circuit board according to claim 1, wherein: The differential routing structure includes a first differential line and a second differential line spaced apart from each other, the first differential line includes a first signal line and a second signal line spaced apart from each other, the second differential line includes a third signal line and a fourth signal line spaced apart from each other, and the first signal line, the second signal line, the third signal line and the fourth signal line are arranged sequentially in one direction.

8. The circuit board according to claim 7, characterized in that: The line width of the first signal line in the interface area is greater than the line width of the first signal line in the routing area; The line width of the second signal line in the interface area is greater than the line width of the second signal line in the routing area; The line width of the third signal line in the interface area is greater than the line width of the third signal line in the routing area; The line width of the fourth signal line in the interface area is greater than the line width of the fourth signal line in the routing area.

9. The circuit board according to claim 7, characterized in that: The interval between the first signal line and the second signal line in the interface area is smaller than the interval between the first signal line and the second signal line in the routing area; The interval between the third signal line and the fourth signal line in the interface area is smaller than the interval between the third signal line and the fourth signal line in the routing area.

10. The circuit board according to claim 7, characterized in that: The first wiring layer further includes: a ground wire located between the second signal wire and the third signal wire; The distance between the ground wire and the second signal wire in the interface area is smaller than the distance between the ground wire and the second signal wire in the routing area; The interval between the ground wire and the third signal wire in the interface area is smaller than the interval between the ground wire and the third signal wire in the routing area.

11. The circuit board according to claim 6 or 10, characterized in that: The circuit board further includes: a plurality of spaced-apart ground terminals, which are located in the ground wire and penetrate the dielectric layer.

12. The circuit board according to claim 1, wherein: The dielectric layer further includes: a second surface located on a side of the dielectric layer facing away from the first surface; The circuit board further includes: a second wiring layer located on the second surface; and a signal trace located in the second wiring layer.

13. The circuit board according to claim 12, characterized in that: The circuit board further includes: a solder resist covering the first wiring layer and the differential wiring structure, and the second wiring layer and the signal wiring.

14. An electronic device, characterized in that: Comprising the circuit board as claimed in any one of claims 1 to 13.

15. The electronic device according to claim 14, characterized in that: The electronic device includes a set-top box, a television, a projector or a mobile phone.

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