Multilayer Circuit Substrate of Different Materials and Manufacturing Method Thereof
By connecting the ceramic substrate and the printed circuit substrate with an adhesive part in the multilayer circuit substrate and completing the thermal process at one time in the final step, the problems of flatness and long production time of the multilayer circuit substrate in the prior art are solved, and a faster manufacturing process and a flatter circuit substrate are achieved.
Patent Information
- Application Number
- CN202111550616.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-05-28
- Filing Date
- 2021-12-17
- Publication Date
- 2025-08-05
- Estimated Expiration
- 2041-12-17
AI Technical Summary
The existing multi-layer circuit substrate manufacturing method is difficult to achieve the flatness of each layer, and the production time is long, mainly due to the thermal stress bending and repeated thermal process caused by the difference in the thermal expansion coefficient of the material.
The multi-layer circuit substrate manufacturing method is adopted for different materials. The ceramic substrate and the printed circuit substrate are connected through the adhesive part, and the opening of the adhesive part is filled with conductive paste, and the thermal process is completed at one time in the final step to reduce the number of thermal processes.
The flatness of the multi-layer circuit substrate is achieved, the production time is shortened, and the deformation problem caused by thermal stress bending is alleviated.
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Figure CN115413110B_ABST
Abstract
Description
Technical Field
[0001] Various embodiments of the present disclosure relate to a multilayer circuit substrate and a method of manufacturing the multilayer circuit substrate. Background Art
[0002] With the miniaturization of semiconductor processes and the increasing integration of components, the number of probe pins, pad size reduction, and fine pitch are required, necessitating the development of multi-layer substrates. Due to the increasing complexity and density of semiconductor device circuits, and the limitations of technology and design, adding circuit layers is inevitable to expand test channels.
[0003] The increase in the number of circuit layers not only increases the manufacturing time (TAT: turnaround time) and the difficulty of product manufacturing, but also causes a flatness problem as the number of circuit layers increases.
[0004] The existing multi-layer circuit substrate manufacturing method is a method of manufacturing a multi-layer circuit substrate by sequentially forming a liquid-phase polyimide or a polyimide film on a ceramic substrate. According to the existing manufacturing method, each layer of the multi-layer circuit substrate can be manufactured by repeating the same process. After manufacturing the first layer of the multi-layer circuit substrate, the same process as the manufacturing process of the first layer can be repeated to form a second layer on the upper part of the first layer. The above method can be repeated to further manufacture the third, fourth and above circuit substrate layers. Specifically, in the process of manufacturing each layer, liquid-phase polyimide can be coated on one side of the ceramic substrate, a thermal bonding process, a drilling process, a sputtering process, a circuit pattern electroplating process using dry film lithography, and an etching process can be performed. Summary of the Invention
[0005] Technical problems to be solved
[0006] Multilayer circuit substrates manufactured using existing manufacturing methods have difficulty achieving flatness in each layer. According to existing manufacturing methods, each layer of a multilayer circuit substrate undergoes a separate thermal bonding process during its manufacture. However, due to differences in the coefficient of thermal expansion (CTE) between the individual materials, when heated, they expand to varying degrees, causing thermal stress to cause bending. This bending causes deformation in the components, making it difficult to achieve flatness in each layer.
[0007] Furthermore, manufacturing multi-layer circuit substrates using existing methods takes a relatively long time. For example, in existing methods, where liquid-phase polyimide is deposited layer by layer on a ceramic substrate, the higher the total number of layers, the more repeated the manufacturing process becomes, thus increasing the production time.
[0008] According to an embodiment of the present disclosure, a multilayer circuit substrate and a method for manufacturing the same are intended to provide a multilayer circuit substrate that minimizes the thermal bonding process, thereby flattening each layer and shortening the manufacturing time of the multilayer circuit substrate.
[0009] Technical Solution
[0010] According to one embodiment of the present disclosure, a multilayer circuit substrate of heterogeneous materials may include: an adhesive portion; a ceramic substrate portion, coupled to one side of the adhesive portion; and a printed circuit substrate portion, coupled to the other side of the adhesive portion, comprising a material different from that of the ceramic substrate portion, wherein the adhesive portion includes: an adhesive layer, comprising an adhesive substance; an adhesive portion opening, penetrating the adhesive layer; and a conductive paste, filling the interior of the adhesive portion opening.
[0011] According to an embodiment of the present disclosure, a method for manufacturing a multilayer circuit substrate of heterogeneous materials may include: a step of providing the ceramic substrate portion; a step of providing the printed circuit substrate portion; a step of making the adhesive portion capable of connecting the ceramic substrate portion and the printed circuit substrate portion; and a step of joining the printed circuit substrate portion, the adhesive portion and the ceramic substrate portion together, wherein the step of making the adhesive portion includes: a step of joining a protective layer on one side and the other side of the adhesive layer; a step of forming an opening of the adhesive portion that passes through the adhesive layer and the protective layer; a step of filling the adhesive portion opening with the conductive paste; and a step of removing the protective layer.
[0012] Effects of the Invention
[0013] According to an embodiment of the present disclosure, a method for manufacturing a multilayer circuit substrate of dissimilar materials can shorten the manufacturing time of the multilayer circuit substrate by separately forming an adhesive portion to connect the substrates of dissimilar materials. In addition, according to an embodiment of the present disclosure, a method for manufacturing a multilayer circuit substrate of dissimilar materials is to simultaneously manufacture the ceramic substrate portion, the bonding portion, and the printed circuit substrate portion, and then bond them together in the final step. Therefore, the thermal process that was previously performed for each layer can be performed only once in the final step. By minimizing the thermal process, the problem caused by bending can be alleviated, and a flat multilayer circuit substrate can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] Figure 1 is a cross-sectional view illustrating an adhesive portion according to an embodiment of the present disclosure.
[0015] Figure 2 FIG. 1 is a cross-sectional view showing a ceramic substrate portion according to an embodiment of the present disclosure.
[0016] Figure 3 FIG. 1 is a cross-sectional view showing a printed circuit board portion according to an embodiment of the present disclosure.
[0017] Figure 4 is a cross-sectional view illustrating a multilayer circuit substrate according to an embodiment of the present disclosure.
[0018] Figure 5 is a flowchart illustrating a method for manufacturing a multilayer circuit substrate according to an embodiment of the present disclosure.
[0019] Figure 6a as well as Figure 6b 1 is an explanatory diagram illustrating a production process and function of an adhesive portion according to an embodiment of the present disclosure.
[0020] Figure 7 1 is a cross-sectional view illustrating an adhesive portion, a ceramic substrate portion, and a printed circuit board portion according to an embodiment of the present disclosure.
[0021] Figure 8 This is an explanatory diagram showing a state in which an adhesive portion, a ceramic substrate portion, and a printed circuit board portion are thermocompression-bonded according to an embodiment of the present disclosure.
[0022] Description of reference numerals:
[0023] 20: Multilayer circuit board 200: Adhesive part
[0024] 205: Adhesive layer 210: Protective layer
[0025] 215: Adhesive portion opening 220: Conductive paste
[0026] 230: Circuit board 300: Ceramic substrate
[0027] 305: Ceramic substrate 310: Ceramic perforation
[0028] 315: Upper conductive layer 320: Lower conductive layer
[0029] 400: Printed circuit board 405: Conductive layer
[0030] 410: core layer 415: middle layer
[0031] 420: Perforation
[0032] 200A: First side of adhesive part 200B: Second side of adhesive part
[0033] 300A: First surface of ceramic substrate 300B: Second surface of ceramic substrate
[0034] 305A: First surface of ceramic substrate 305B: Second surface of ceramic substrate
[0035] 310A: Ceramic through-hole first opening 310B: Ceramic through-hole second opening
[0036] 400A: First surface of printed circuit board 400B: Second surface of printed circuit board DETAILED DESCRIPTION
[0037] Figure 1 is a cross-sectional view illustrating an adhesive portion 200 according to an embodiment of the present disclosure.
[0038] The adhesive portion 200 may include an adhesive layer 205 , an adhesive portion opening 215 and / or a conductive paste 220 .
[0039] Adhesive layer 205 may include an adhesive substance. For example, adhesive layer 205 may be composed of a prepreg (pre-impregnated material). Prepreg refers to a material made by impregnating reinforcing fibers with a specially blended epoxy resin. Prepregs can have excellent heat resistance and rigidity, as well as high chemical stability. Alternatively, prepregs with low resin flowability can be used, providing dimensional stability.
[0040] The adhesive layer 205 can be bonded to the ceramic substrate 300 on one side of the adhesive layer 205 (see Figure 2 The adhesive layer 205 can be bonded to the printed circuit board portion 400 on the other side of the adhesive layer 205 (refer to Figure 3 ).
[0041] For convenience, Figure 1 Only one adhesive portion opening 215 is shown in FIG. 2 , but the number of adhesive portion openings 215 is not limited thereto. The adhesive layer 205 may include a plurality of adhesive portion openings 215 .
[0042] The bonding portion opening 215 may include a space that may be filled with the conductive paste 220. The conductive paste 220 may be filled inside the bonding portion opening 215. The conductive paste 220 may include a conductive substance. For example, the conductive paste 220 may include a copper and tin alloy substance.
[0043] Figure 2 FIG. 1 is a cross-sectional view illustrating a ceramic substrate portion 300 according to an embodiment of the present disclosure.
[0044] The ceramic substrate portion 300 according to an embodiment of the present disclosure may include a ceramic substrate 305 , a ceramic through-hole 310 , an upper conductive layer 315 and / or a lower conductive layer 320 .
[0045] The ceramic substrate 305 may serve as a substrate that forms the basis of the structure of the ceramic substrate portion 300. The ceramic substrate 305 may include a ceramic material. The ceramic material may have excellent electrical insulation and mechanical strength, high thermal resistance, and chemical stability.
[0046] The coefficient of thermal expansion (CTE) of the ceramic substrate 305 is similar to that of a silicon wafer used for semiconductors, and thus the ceramic substrate 305 can be used for semiconductor inspection.
[0047] The ceramic substrate 305 may include a ceramic through-hole 310. A plurality of ceramic through-holes 310 may be formed in the ceramic substrate 305. The ceramic through-hole 310 may function as a channel electrically connecting the upper conductive layer 315 and the lower conductive layer 320. The ceramic through-hole 310 may be formed by mechanical drilling.
[0048] In various embodiments, the upper conductive layer 315 and the lower conductive layer 320 may be located on at least a portion of the ceramic substrate 305. Alternatively, the first surface 305A of the ceramic substrate 305 may be the lower surface of the ceramic substrate 305, and the second surface 305B of the ceramic substrate 305 may be the upper surface of the ceramic substrate 305. The lower conductive layer 320 may be located on the first surface 305A of the ceramic substrate 305 (e.g., the lower surface of the ceramic substrate 305). The upper conductive layer 315 may be located on the second surface 305B of the ceramic substrate 305 (e.g., the upper surface of the ceramic substrate 305).
[0049] The upper conductive layer 315 and the lower conductive layer 320 may include a conductive material. The upper conductive layer 315 and the lower conductive layer 320 may be made of any metal selected from the group consisting of copper, gold, and nickel, or alloys thereof. Taking conductivity, durability, and cost-effectiveness into consideration, copper is preferred.
[0050] The upper conductive layer 315 and the lower conductive layer 320 may include a circuit pattern 325. The circuit pattern 325 may be formed through a photolithography process, an electroplating process, an etching process, and the like.
[0051] The first opening 310A of the ceramic through-hole 310 may be the lower opening of the ceramic through-hole 310, and the second opening 310B may be the upper opening of the ceramic through-hole 310. The lower conductive layer 320 may be formed at the first opening 310A of the ceramic through-hole 310 (e.g., the lower opening of the ceramic through-hole 310). The upper conductive layer 315 may be formed at the second opening 310B of the ceramic through-hole 310 (e.g., the upper opening of the ceramic through-hole 310).
[0052] Figure 3 FIG. 4 is a cross-sectional view showing a printed circuit board portion 400 according to an embodiment of the present disclosure.
[0053] The printed circuit substrate portion 400 may include a conductive layer 405 , a core layer 410 , an intermediate layer 415 and / or a through-hole 420 .
[0054] Conductive layer 405 can be formed on one side and the other side of core layer 410. Conductive layer 405 can include a conductive material. Conductive layer 405 can be made of any metal selected from the group consisting of copper, gold, and nickel, or alloys thereof. Copper is preferred for conductivity, durability, and cost-effectiveness.
[0055] The core layer 410 may function as a substrate that serves as a base for the structure of the printed circuit substrate portion 400. The core layer 410 may include a ceramic substrate portion 300 (refer to FIG. Figure 2 ) different materials. The core layer 410 may include an insulating material. For example, the core layer 410 may be composed of polyimide. The conductive layer 405 may be formed on one side and the other side of the core layer 410.
[0056] The intermediate layer 415 may be formed between the core layers 410 and 410. The intermediate layer 415 may include insulating and adhesive substances and may function as an adhesive for connecting the core layers 410.
[0057] The through-holes 420 may be formed between the conductive layers 405 formed on one side and the other side of the core layer 410. The through-holes 420 may function as channels for electrically connecting the conductive layers 405.
[0058] Figure 4 FIG. 1 is a cross-sectional view illustrating a multilayer circuit substrate 20 according to an embodiment of the present disclosure.
[0059] The multilayer circuit substrate 20 according to an embodiment of the present disclosure may include an adhesive portion 200 , a ceramic substrate portion 300 , and / or a printed circuit substrate portion 400 .
[0060] In various embodiments, the adhesive portion 200 may be bonded to the ceramic substrate portion 300 or the printed circuit substrate portion 400 on at least a portion of the adhesive portion 200. Alternatively, the first surface 200A of the adhesive portion 200 may be the lower surface of the adhesive portion 200, and the second surface 200B of the adhesive portion 200 may be the upper surface of the adhesive portion 200. The adhesive portion 200 may bond the ceramic substrate portion 300 to the first surface 200A (e.g., the lower surface of the adhesive portion 200). The adhesive portion 200 may bond the printed circuit substrate portion 400 to the second surface 200B (e.g., the upper surface of the adhesive portion 200).
[0061] Conductive paste 220 may electrically connect upper conductive layer 315 of ceramic substrate 300 located on first surface 200A of bonding portion 200 and conductive layer 405 of printed circuit board 400 located on second surface 200B of bonding portion 200 .
[0062] Figure 5 FIG. 2 is a diagram showing a multilayer circuit substrate 20 (see FIG. Figure 4 ) is a flowchart of a manufacturing method.
[0063] refer to Figure 5 According to an embodiment of the present disclosure, the multilayer circuit substrate 20 (refer to Figure 4 ) may include: making the adhesive portion 200 (refer to Figure 1 ), providing a ceramic substrate portion 300 (reference Figure 2 ) and printed circuit board 400 (reference Figure 3 ) step (S21); and bonding the adhesive portion 200 (reference Figure 1 )、Ceramic substrate portion 300 (reference Figure 2 ) and the printed circuit board portion 400 (reference Figure 3 ) step (S22).
[0064] In step S21, a bonding layer 205 (see Figure 1 ) of the adhesive portion 200 (reference Figure 1 ). (refer to Figure 6a 、 Figure 6b ) Adhesive portion 200 (reference Figure 1 ) can bond the ceramic substrate portion 300 (reference Figure 2 ) and the printed circuit board portion 400 (reference Figure 3 ) to combine.
[0065] In step S21, a ceramic substrate portion 300 (see Figure 2 ). Ceramic substrate portion 300 (reference Figure 2 ) may include a ceramic substrate 305 (reference Figure 2 ), ceramic perforation 310 (reference Figure 2 ), upper conductive layer 315 (reference Figure 2 ) and / or the lower conductive layer 320 (reference Figure 2 ).
[0066] In step S21, a printed circuit board portion 400 (see Figure 3 ). Printed circuit board portion 400 (reference Figure 3 ) may include a conductive layer 405 (reference Figure 3 ), core layer 410 (reference Figure 3 ), intermediate layer 415 (reference Figure 3 ) and / or perforation 420 (reference Figure 3 ).
[0067] In step S22, the adhesive portion 200 may be bonded together (see Figure 1 )、Ceramic substrate portion 300 (reference Figure 2 ) and the printed circuit board portion 400 (reference Figure 3 ). For bonding, an adhesive portion 200 may be provided (refer to Figure 7 )、Ceramic substrate portion 300 (reference Figure 7 ) and the printed circuit board portion 400 (reference Figure 7 ). (refer to Figure 7 ) The configured adhesive portion 200 (reference Figure 8 )、Ceramic substrate portion 300 (reference Figure 8 ) and the printed circuit board portion 400 (reference Figure 8 ) can be heat-pressed and bonded together using a stamping device (not shown) (refer to Figure 8 ).
[0068] Figure 6a as well as Figure 6b 1 is an explanatory diagram illustrating a manufacturing process and functions of the adhesive portion 200 according to an embodiment of the present disclosure. Figure 6a FIG. 1 is a flowchart illustrating a manufacturing process and functions of the adhesive portion 200 according to an embodiment of the present disclosure. Figure 6b It shows that according to Figure 6a The flowchart shown in FIG. 1 is an explanatory diagram of the process of manufacturing the bonding portion 200 and the function of the bonding portion 200 .
[0069] refer to Figure 6a as well as Figure 6bAccording to one embodiment of the present disclosure, the process of manufacturing the adhesive portion 200 may include: bonding the adhesive layer 205 and the protective layer 210 (S201); forming an adhesive portion opening 215 penetrating the adhesive layer 205 and the protective layer 210 (S202); filling the adhesive portion opening 215 with a conductive paste 220 (S203); and removing the protective layer 210 (S204). The completed adhesive portion 200 can then be bonded to the circuit substrate 230 on one side and the other side (S205).
[0070] In step S201, protective layer 210 may be bonded to one side and the other side of adhesive layer 205. Protective layer 210 may prevent adhesive layer 205 from being damaged or foreign matter from entering adhesive layer 205 during the steps of forming adhesive portion opening 215 and conductive paste 220 (S202, S203).
[0071] The protective layer 210 may be made of polyethylene terephthalate (PET). PET is a thermoplastic film that is easily moldable and blocks the inflow of foreign matter, and thus may be effective in protecting the adhesive layer 205.
[0072] In step S202 , an adhesive portion opening 215 may be formed through the adhesive layer 205 and the protective layer 210 .
[0073] The bonding portion opening 215 may include a space that can be filled with the conductive paste 220 .
[0074] The adhesive layer 205 and the protective layer 210 may include adhesive portion openings 215 at least partially. The adhesive portion openings 215 may be formed by mechanical drilling.
[0075] For convenience, Figure 6b Only one adhesive portion opening 215 is shown in the figure, but the number of the adhesive portion openings 215 is not limited thereto. The adhesive layer 205 and the protective layer 210 may include a plurality of adhesive portion openings 215 .
[0076] The process of manufacturing the adhesive portion 200 according to one embodiment of the present disclosure may include a process of cleaning the interior of the adhesive portion opening 215 after forming the adhesive portion opening 215. A plasma cleaning process may be used to clean the interior of the adhesive portion opening 215. The cleaning process removes dust and other particles generated during the formation of the adhesive portion opening 215, thereby facilitating the filling of the conductive paste 220 into the adhesive portion opening 215 in step S203.
[0077] In step S203, the adhesive portion opening 215 may be filled with conductive paste 220. To fill the adhesive portion opening 215 with conductive paste 220, another component may be used to push the paste into the hole. To push the conductive paste 220 into the adhesive portion opening 215, a component that applies pressure to the paste, such as a squeezer (not shown), may be used.
[0078] In step S204, protective layer 210 formed on one side and the other side of adhesive layer 205 may be removed. Protective layer 210 serves to protect adhesive layer 205 from damage in steps S202 and S203. However, it may not serve any other function when adhesive layer 205 is bonded to circuit substrate 230, and therefore may be removed in step S204.
[0079] After all the steps S201, S202, S203 and S204 are completed, the adhesive portion 200 can be manufactured (refer to Figure 1 ).
[0080] Figure 6b Step S205 shows the function of the adhesive unit 200 after the steps S201, S202, S203 and S204 are completed. In step S205, the circuit substrate 230 may be bonded to one side of the adhesive unit 200 and the other side thereof. Figure 6b The circuit substrate 230 shown in FIG may be formed with a ceramic substrate portion 300 (refer to Figure 2 ) or printed circuit board portion 400 (reference Figure 3 ) or the like.
[0081] Figure 7 1 is a cross-sectional view illustrating an adhesive portion 200 , a ceramic substrate portion 300 , and a printed circuit substrate portion 400 according to an embodiment of the present disclosure.
[0082] In various embodiments, the adhesive portion 200, the ceramic substrate portion 300, and the printed circuit substrate portion 400 may be spaced apart. The ceramic substrate portion 300 may be spaced apart and located on the first surface 200A (e.g., the lower surface) of the adhesive portion 200. The printed circuit substrate portion 400 may be spaced apart and located on the second surface 200B (e.g., the upper surface) of the adhesive portion 200.
[0083] Figure 7 2 shows a case where the adhesive portion 200 includes one adhesive portion opening 215 and one conductive paste 220 , but the number of adhesive portion openings 215 and conductive paste 220 included in the adhesive portion 200 is not limited thereto.
[0084] Conductive paste 220 may be formed at a position where it may intersect all or part of upper conductive layer 315 included in ceramic substrate portion 300 and conductive layer 405 included in printed circuit substrate portion 400. For example, conductive paste 220 may be formed at a position where it may intersect upper conductive layer 315 of ceramic substrate portion 300 located on first surface 200A (lower surface) of adhesive portion 200 with a gap therebetween. Furthermore, conductive paste 220 may be formed at a position where it may intersect conductive layer 405 of printed circuit substrate portion 400 located on second surface 200B (upper surface) of adhesive portion 200 with a gap therebetween.
[0085] The positions of the adhesive portion 200, the ceramic substrate portion 300, and the printed circuit substrate portion 400 can be temporarily fixed using a support member (not shown). Holes (not shown) for temporarily engaging the support member (not shown) can be formed on one side and the other side of the adhesive portion 200, the ceramic substrate portion 300, and the printed circuit substrate portion 400. The support member (not shown) can be temporarily engaged in the holes (not shown), thereby aligning the adhesive portion 200, the ceramic substrate portion 300, and the printed circuit substrate portion 400 at intervals.
[0086] Figure 8 1 is an explanatory diagram illustrating a state in which the adhesive portion 200 , the ceramic substrate portion 300 , and the printed circuit board portion 400 are thermocompression-bonded according to an embodiment of the present disclosure.
[0087] The first surface 300A of the ceramic substrate portion 300 may be the lower surface of the ceramic substrate portion 300, and the second surface 300B may be the upper surface of the ceramic substrate portion 300. The first surface 400A of the printed circuit board 400 may be the lower surface of the printed circuit board portion 400, and the second surface 400B may be the upper surface of the printed circuit board portion 400.
[0088] A stamping device (not shown) may be located on the second surface 400B of the printed circuit substrate portion 400 (eg, the upper surface of the printed circuit substrate portion 400 ) and the first surface 300A of the ceramic substrate portion 300 (eg, the lower surface of the ceramic substrate portion 300 ).
[0089] The stamping device (not shown) may be a hot press device that applies heat and pressure to the second surface 400B (upper surface) of the printed circuit substrate portion 400 and the first surface 300A (lower surface) of the ceramic substrate portion 300. The heat and pressure generated by the stamping device (not shown) can be transferred to the bonding portion 200. The transferred heat and pressure can eliminate the gaps between the bonding portion 200, the ceramic substrate portion 300, and the printed circuit substrate portion 400, thereby compressing and bonding them.
[0090] The bonding portion 200 may be cured by heat and pressure, thereby completely bonding the ceramic substrate portion 300 and the printed circuit substrate portion 400 .
[0091] Conductive paste 220 can be sintered by applying heat and pressure. Specifically, the heat and pressure generated by a press (not shown) transform conductive paste 220 from a powder state into an alloy, thereby providing the mechanical strength required for forming multilayer circuit board 20.
[0092] After the thermocompression bonding is completed by the punching device, the support members (not shown) temporarily bonded to one side and the other side of the adhesive portion 200 , the ceramic substrate portion 300 , and the printed circuit substrate portion 400 may be removed.
[0093] The present disclosure has been described above with reference to the embodiments. However, the present disclosure is not necessarily limited thereto, and any modifications and variations can be implemented within the scope of the technical concept of the present disclosure.
Claims
1. A method for manufacturing a multilayer circuit substrate of heterogeneous materials, comprising: providing a ceramic substrate portion, the ceramic substrate portion comprising a ceramic substrate, a lower conductive layer disposed on a first surface of the ceramic substrate, an upper conductive layer disposed on a second surface of the ceramic substrate, and a ceramic through-hole electrically connecting the lower conductive layer and the upper conductive layer; providing a printed circuit board portion; a step of forming an adhesive portion capable of connecting the ceramic substrate portion and the printed circuit substrate portion; as well as The steps of arranging the printed circuit substrate portion, the bonding portion, and the ceramic substrate portion in a spaced relationship, positioning a stamping device on the printed circuit substrate portion and the ceramic substrate portion, and applying heat and pressure by the stamping device to simultaneously bond the printed circuit substrate portion, the bonding portion, and the ceramic substrate portion. The steps of making the bonding portion include: a step of bonding a protective layer to one side and the other side of the adhesive layer; forming an opening at the bonding portion penetrating the bonding layer and the protective layer; filling the bonding portion opening with a conductive paste; and The step of removing the protective layer, and wherein, in the step of simultaneously bonding the printed circuit substrate portion, the adhesive portion, and the ceramic substrate portion, the adhesive portion is cured under heat and pressure, thereby bonding the ceramic substrate portion and the printed circuit substrate portion to the adhesive portion; wherein the heating process of bonding the printed circuit substrate portion to the adhesive portion and the heating process of bonding the adhesive portion to the ceramic substrate portion are performed only during the simultaneous bonding; wherein the ceramic substrate portion is bonded to one side of the adhesive portion such that the upper conductive layer is in contact with the conductive paste of the adhesive portion, and Once the bonding between the ceramic substrate portion and the adhesive portion is completed, the conductive paste of the adhesive portion is spaced apart from the ceramic through-hole.
2. The method for manufacturing a multilayer circuit substrate of different materials according to claim 1, wherein: The adhesive layer is composed of a prepreg material.
3. The method for manufacturing a multilayer circuit substrate of different materials according to claim 1, wherein: The protective layer is composed of PET.
4. The method for manufacturing a multilayer circuit substrate of different materials according to claim 1, wherein: The adhesive layer includes a plurality of adhesive portion openings.
5. The method for manufacturing a multi-layer circuit substrate of different materials according to claim 1, wherein: The bonding portion opening is formed by mechanical drilling.
6. The method for manufacturing a multi-layer circuit substrate of different materials according to claim 1, further comprising: After the step of forming the adhesive portion opening, the step of cleaning the adhesive portion opening is performed.
7. The method for manufacturing a multi-layer circuit substrate of different materials according to claim 1, wherein the step of collectively joining the substrates comprises: a step of fixing the printed circuit substrate portion, the adhesive portion, and one side and the other side of the ceramic substrate portion using a supporting member; heating and pressing one side of the printed circuit board portion and one side of the ceramic substrate portion to bond the printed circuit board portion, the adhesive portion, and the ceramic substrate portion; as well as The step of removing the supporting component.
Citation Information
Patent Citations
Wiring board, and multilayer wiring board including the same
JP2015159242A
Multilayer wiring board
TW202119891A
Multi-Layer Circuit Board using Interposer layer and Conductive Paste
US20190008044A1