A high-precision capacitance measurement circuit and method

Abstract

The present application relates to the field of capacitance detection, especially to a high-precision detection of a precision capacitor, and provides a high-precision capacitor measurement circuit and method, comprising a to-be-detected capacitor, a reference capacitor, an integration unit, a comparison unit, a digital-to-analog conversion unit and a data extraction unit.The to-be-detected capacitor and the reference capacitor are connected to the same-phase or opposite-phase input end of the integration unit after being added to the positive and negative ends of the digital-to-analog conversion unit, the output of the integration unit is connected to the comparison unit, and the output of the comparison unit is connected to the digital-to-analog conversion unit and the data extraction unit.The circuit of the present application collects the voltage on the capacitor to obtain the capacitance value of the capacitor, so as to achieve the purpose of accurately measuring the capacitor.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit, in particular to a high-precision capacitance measurement circuit and method. BACKGROUND

[0002] Capacitive sensors have the advantages of simple structure, high resolution, reliable operation, fast dynamic response, non-contact measurement, and operation in harsh conditions such as high temperature, radiation, and strong vibration. Currently, many types of sensors use capacitive sensing, including sensors for detecting and measuring proximity, pressure, position and displacement, force, humidity, liquid level, and acceleration. A small capacitance measurement circuit must meet the requirements of large dynamic range, high measurement sensitivity, low noise, and anti-stray. The capacitive signal output by the capacitive sensor is often very small (1fF~10pF), and there is the influence of stray capacitance and parasitic capacitance of the sensor and its connecting wires, which puts very high requirements on the capacitive signal measurement circuit. The measurement of such a small capacitive signal has become a bottleneck for the development of capacitive sensor technology.

[0003] As shown in Figure 1 , it is a common capacitive measurement circuit. A timer controls the on-off of the switch. A known constant current i is used to charge the measured capacitor for a certain time t. After charging, the voltage U on the capacitor is measured. The capacitance of the measured capacitor is calculated according to the formula . This method relies heavily on the size and accuracy of the charging current, the control accuracy of the time, and the measurement accuracy of the voltage, resulting in low measurement accuracy.

[0004] Therefore, how to improve the detection accuracy of high-precision capacitance is a technical problem to be solved in the field. SUMMARY

[0005] The purpose of the present application is to provide a high-precision capacitance measurement circuit and method.

[0006] The present application solves the problem of low detection accuracy of the prior art.

[0007] In order to solve the above problems, the present application realizes the following technical scheme:

[0008] A high-precision capacitance measurement circuit, the capacitance measurement circuit comprising a clock unit, an integration unit, a comparison unit, a digital-to-analog conversion unit, a data extraction unit, and an input unit;

[0009] The clock unit is connected to the input unit, the integration unit, the comparison unit, and the data extraction unit, respectively;

[0010] The integration unit is connected to the input unit and the digital-to-analog conversion unit, respectively;

[0011] The comparison unit is connected with the data extraction unit and the digital-to-analog conversion unit respectively.

[0012] The clock unit is configured to output a clock signal; the input unit comprises a to-be-measured capacitor and a reference capacitor, and is configured to charge or discharge the integration unit according to the clock signal; the integration unit is configured to integrate discharging amounts of the to-be-measured capacitor and the reference capacitor; the comparison unit is configured to output a digital signal according to an integration result of the integration unit; the data extraction unit is configured to sample and filter the digital signal to obtain a numerical value representing a capacitance value of the to-be-measured capacitor; and the digital-to-analog conversion unit is configured to convert the digital signal into an analog signal and input the analog signal to the input end of the integration unit in an opposite phase.

[0013] Further, the clock signal comprises a low level and a high level, the to-be-measured capacitor and the reference capacitor are charged when the clock signal is at the high level, and the to-be-measured capacitor and the reference capacitor are discharged when the clock signal is at the low level.

[0014] Further, the to-be-measured capacitor is connected to a non-inverting input end of the integration unit, and the reference capacitor is connected to an inverting input end of the integration unit, and one ends of the to-be-measured capacitor and the reference capacitor away from the integration unit are connected to a reference voltage through a first switch and to the ground through a second switch.

[0015] Further, the digital-to-analog conversion unit comprises a digital-to-analog converter, a first capacitor connected to an inverting output end of the digital-to-analog converter, and a second capacitor connected to a non-inverting output end of the digital-to-analog conversion unit; another end of the first capacitor is connected to the non-inverting input end of the integration unit, and another end of the second capacitor is connected to the inverting input end of the integration unit; and the first capacitor and the second capacitor have equal capacitance values.

[0016] Further, the integration unit comprises a first-order integration circuit, or the integration unit is formed by a plurality of first-order integration circuits connected in series.

[0017] Further, the data extraction unit comprises a first-order accumulator or a high-order accumulator.

[0018] A high-precision capacitance measurement method applied to the high-precision capacitance measurement circuit, the method comprising:

[0019] The clock unit inputs a first clock signal, and the to-be-measured capacitor and the reference capacitor in the input unit are charged; at the same time, the comparison unit keeps a comparison result at a previous time and transmits the comparison result to the digital-to-analog conversion unit; and an output signal of the digital-to-analog conversion unit is input to the input end of the integration unit in an opposite phase.

[0020] The clock unit inputs a second clock signal, and the to-be-measured capacitor and the reference capacitor in the input unit discharge to the integration unit; meanwhile, the output of the integration unit is captured by the comparison unit, and a digital signal is obtained by the comparison unit according to the output of the integration unit;

[0021] The clock unit uniformly spaces the output of the first clock signal and the second clock signal, and the data extraction unit samples the output of the comparison unit to obtain a value representing the capacitance value of the to-be-measured capacitor.

[0022] Further, the first clock signal is high, and the second clock signal is low.

[0023] Further, the digital-to-analog conversion unit comprises a digital-to-analog converter, a first capacitor and a second capacitor connected to the output end of the digital-to-analog converter, respectively, the capacitance values of the first capacitor and the second capacitor are equal, and the output signal of the digital-to-analog conversion unit is coupled to the non-inverting input end of the integration unit through the first capacitor and to the inverting input end of the integration unit through the second capacitor.

[0024] Further, the capacitance value of the to-be-measured capacitor is: , wherein C1 is the capacitance value of the first capacitor, is the capacitance value of the reference capacitor, DATA is the value of the final output of the data extraction unit, and N is the maximum number of bits of the data extraction unit.

[0025] Compared with the prior art, the technical scheme and beneficial effects of the present application are as follows:

[0026] (1) The high-precision capacitance measurement circuit of the present application comprises a to-be-measured capacitor, a reference capacitor, an integration unit, a comparison unit, a digital-to-analog conversion unit and a data extraction unit. The difference between the capacitances of the to-be-measured capacitor and the reference capacitor is converted into a difference in charge quantity and input to the integration unit for integration, the comparison unit outputs a digital signal according to the integration result of the integration unit, and the data extraction unit samples the digital signal in each clock cycle to obtain a value representing the capacitance value of the to-be-measured capacitor. The digital-to-analog conversion unit converts the digital signal into an analog signal and then couples it to the input end of the integration unit through the same capacitor in reverse phase and superposition, directly samples the capacitance value of the to-be-measured capacitor by using a high-precision analog-to-digital converter, and does not need to convert the capacitance value into a voltage or a current for processing, thereby simplifying the circuit, reducing interference and improving measurement accuracy.

[0027] (2) The capacitance value of the to-be-measured capacitor of the present application is: Wherein, Cref can be 0, DATA is the final output value of the data extractor, and N is the maximum number of bits of the data extraction unit. The high-precision sampling circuit can achieve 16-32 bits, i.e. the range of N is 16-32; the first capacitor C1 can be integrated in the internal sampling chip and can achieve pF level, so that the circuit can measure the capacitance of pF or even fF level, thereby achieving high precision. Moreover, by changing the capacitance value of the reference capacitor Cref, the detection range of the to-be-detected capacitor can be changed, so that the application range of the high-precision capacitor detection circuit is wider. BRIEF DESCRIPTION OF DRAWINGS

[0028] Figure 1 is a commonly used capacitor detection circuit;

[0029] Figure 2 is a high-precision capacitor measurement circuit provided by an embodiment of the application;

[0030] Figure 3 is a first-order integral circuit provided by an embodiment of the application;

[0031] Figure 4 is Figure 3 a multi-stage series connection of the integral circuit in

[0032] Figure 5 is a circuit principle diagram of a comparison unit provided by an embodiment of the application.

[0033] BRIEF DESCRIPTION OF DRAWINGS

[0034] Input unit-100; integral unit-200; comparison unit-300; data extraction unit-400; digital-to-analog conversion unit-500. DETAILED DESCRIPTION

[0035] To make the purpose, technical scheme and advantages of the embodiments of the application clearer, the technical scheme in the embodiments of the application will be described clearly and completely below with reference to the drawings in the embodiments of the application. Obviously, the described embodiments are some of the embodiments of the application, rather than all the embodiments of the application. It should be understood that the specific embodiments described herein are only used to explain the application, and are not used to limit the application. Based on the embodiments in the application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the application.

[0036] As shown in FIG. Figure 2 A high-precision capacitor measurement circuit for measuring the capacitance value of a high-precision capacitor, specifically comprising a clock unit, an input unit 100, an integral unit 200, a comparison unit 300, a digital-to-analog conversion unit 500 and a data extraction unit 400.

[0037] The clock unit is connected with the input unit 100, the integration unit 200, the comparison unit 300 and the data extraction unit 400 respectively, the integration unit 200 is connected with the input unit 100 and the digital-to-analog conversion unit 500 respectively, and the comparison unit 300 is connected with the data extraction unit 400 and the digital-to-analog conversion unit 500 respectively.

[0038] The clock unit is used for outputting a clock signal, and the clock signal in the embodiment is a high level and a low level. The input unit comprises a to-be-measured capacitor C0 and a reference capacitor Cref, and the input unit 100 charges or discharges the integration unit 200 according to the clock signal. Specifically, when the clock signal is at a high level, the to-be-measured capacitor C0 and the reference capacitor Cref are charged, and when the clock signal is at a low level, the to-be-measured capacitor C0 and the reference capacitor Cref supply the charge stored when the clock signal is at the high level to the integration unit 200. The integration unit 200 integrates the discharge amount of the to-be-measured capacitor C0 and the reference capacitor Cref, and the comparison unit 300 outputs a digital signal according to the integration result of the integration unit 200. The data extraction unit 400 is used for sampling and filtering the digital signal to obtain a numerical value representing the capacitance value of the to-be-measured capacitor C0, and the digital-to-analog conversion unit 500 converts the digital signal into an analog signal and inputs the analog signal to the input end of the integration unit.

[0039] Continuing to refer to Figure 2 , the to-be-measured capacitor C0 is connected to the non-inverting input end of the integration unit 200, the reference capacitor Cref is connected to the inverting input end of the integration unit 200, and the to-be-measured capacitor C0 and the reference capacitor Cref are connected to the reference voltage through the first switch S1 and to the ground through the second switch S2 at the ends away from the integration unit 200.

[0040] The digital-to-analog conversion unit 500 comprises a digital-to-analog converter, a first capacitor C1 connected to the inverting output end of the digital-to-analog converter, and a second capacitor C2 connected to the non-inverting output end of the digital-to-analog conversion unit; the other end of the first capacitor C1 is connected to the non-inverting input end of the integration unit 200, and the other end of the second capacitor is connected to the inverting input end of the integration unit 200; the capacitance values of the first capacitor C1 and the second capacitor C2 are equal. The inverting output end of the digital-to-analog conversion unit 500 is coupled with C1 and then connected to the non-inverting input end of the integration unit 200, and the non-inverting output end of the digital-to-analog conversion unit 500 is coupled with C2 and then connected to the inverting input end of the integration unit 200, so that the inverting superposition realizes compensation of the charge difference between the to-be-measured capacitor C0 and the reference capacitor Cref.

[0041] As shown in Figure 3 , the integration unit 200 comprises a first-order integration circuit. As shown in Figure 4The integral unit 200 can also be formed by a plurality of first-order integral circuits in series, and the integrator in series can obtain sampling values with the same precision in a shorter time or obtain sampling values with higher precision in the same time. It can be understood that the output end of the digital-analog conversion unit, i.e., one end of the first capacitor C1 away from the digital-analog converter and one end of the second capacitor C2 away from the digital-analog converter, can be connected to the input end of the first first-order integral circuit (the output end of the input unit) or can be connected between the output end and the input end of any adjacent two first-order integral circuits.

[0042] Figure 5 The comparison unit circuit provided by the application has extremely low power consumption and extremely fast comparison speed when the input signal is greater than 1 mV. Of course, the comparison unit can also adopt other comparator circuits as long as the comparison effect can be better realized.

[0043] The data extraction unit can be a simple accumulator, a second-order accumulator or a high-order accumulator. The function of the data extraction unit is to perform operation and processing on the digital signal output by the comparison unit 300 in each clock cycle, specifically, to sample and filter the output of the comparison unit 300 at each high level rising edge.

[0044] The application further provides a detection method based on the high-precision capacitor detection circuit.

[0045] When the clock signal is high, the first switch S1 is closed, the second switch S2 is opened, the common end of the to-be-detected capacitor C0 and the reference capacitor Cref is connected to the reference voltage Vref, and the to-be-detected capacitor C0 and the reference capacitor Cref are charged, and the stored charge amounts are and ; at the same time, the comparison unit keeps the comparison result of the last moment and transmits the result to the digital-analog conversion unit, the inverting output end of the digital-analog conversion unit is coupled to the non-inverting input end of the integral unit after the non-inverting output end of the digital-analog conversion unit is coupled to the non-inverting input end of the integral unit, and the non-inverting output end of the digital-analog conversion unit is coupled to the inverting input end of the integral unit after the non-inverting output end of the digital-analog conversion unit is coupled to the inverting input end of the integral unit.

[0046] When the clock signal is low, the first switch S1 is opened, the second switch S2 is closed, the common end of the to-be-detected capacitor C0 and the reference capacitor Cref is connected to the ground, the other end of the to-be-detected capacitor C0 is connected to the non-inverting input end of the integral unit, the other end of the reference capacitor Cref is connected to the inverting input end of the integral unit, the to-be-detected capacitor C0 and the reference capacitor Cref are discharged, and the stored charge when the clock is high is supplied to the integral unit; at the same time, the output of the integral unit is captured by the comparison unit, and the output of the comparison unit obtains a digital signal of 0 or 1 according to the output of the integral unit.

[0047] The above process repeats under the control of the clock signal, and the data extraction unit samples and filters the output of the comparison unit at the rising edge of the clock signal.

[0048] Thus, after a certain time, since the integrator is composed of an amplifier, the positive and negative input terminals will always be equal, and according to the principle of charge conservation, the capacitance value of the to-be-measured capacitor can be finally obtained as: wherein DATA is the final output value of the data extraction unit, and N is the maximum number of bits of the data extraction unit.

[0049] The high-precision sampling circuit can achieve 16-32 bits, i.e., the range of N is 16-32; the first capacitor C1 can be integrated in the sampling chip and can achieve pF level, so the circuit can measure the capacitance of pF or even fF level, thereby achieving very high precision.

[0050] The high-precision capacitor detection circuit and detection method of the present application directly connect the to-be-measured capacitor to the integration unit, couple the output of the digital-to-analog conversion unit, convert the difference between the to-be-measured capacitor and the reference capacitor into the difference in charge quantity, input the difference in charge quantity into the digital-to-analog conversion unit, directly sample the value representing the capacitance value of the to-be-measured capacitor by using a high-precision digital-to-analog converter, and do not need to convert the capacitance value into a voltage or a current or other electrical parameters for processing, thereby simplifying the circuit, reducing interference, and improving the measurement precision.

[0051] The above description shows and describes the preferred embodiments of the present application, and it should be understood that the present application is not limited to the forms disclosed herein, should not be regarded as excluding other embodiments, and can be used in various other combinations, modifications and environments, and can be modified by the above teachings or related technical or knowledge within the scope of the inventive concept. Any modification and change made by those skilled in the art without departing from the spirit and scope of the present application shall be within the protection scope of the appended claims of the present application.

Claims

1. A high precision capacitance measurement circuit, characterized by, The capacitor measurement circuit comprises a clock unit, an integration unit, a comparison unit, a digital-to-analog conversion unit, a data extraction unit and an input unit; The clock unit is connected to the input unit, the integration unit, the comparison unit and the data extraction unit respectively; The integration unit is connected to the input unit and the digital-to-analog conversion unit respectively; The comparison unit is connected to the data extraction unit and the digital-to-analog conversion unit respectively; The clock unit is configured to output a clock signal; the input unit comprises a to-be-measured capacitor and a reference capacitor, and is configured to charge or discharge the integration unit according to the clock signal; the integration unit is configured to integrate discharging amounts of the to-be-measured capacitor and the reference capacitor; the comparison unit is configured to output a digital signal according to an integration result of the integration unit; the data extraction unit is configured to sample and filter the digital signal to obtain a numerical value representing a capacitance value of the to-be-measured capacitor; the digital-to-analog conversion unit comprises a digital-to-analog converter, a first capacitor connected to an inverting output terminal of the digital-to-analog converter, and a second capacitor connected to a non-inverting output terminal of the digital-to-analog conversion unit; another end of the first capacitor is connected to a non-inverting input terminal of the integration unit, and another end of the second capacitor is connected to an inverting input terminal of the integration unit, so as to compensate for a charge difference between the to-be-measured capacitor C0 and the reference capacitor Cref; the first capacitor and the second capacitor have equal capacitance values; The data extraction unit comprises a first-order accumulator or a high-order accumulator.

2. A high precision capacitance measurement circuit according to claim 1, characterized in that, The clock signal comprises a low level and a high level; when the clock signal is at the high level, the to-be-measured capacitor and the reference capacitor are charged; and when the clock signal is at the low level, the to-be-measured capacitor and the reference capacitor are discharged.

3. A high precision capacitance measurement circuit according to claim 2, characterized in that, The to-be-measured capacitor is connected to the non-inverting input terminal of the integration unit, and the reference capacitor is connected to the inverting input terminal of the integration unit; one end of the to-be-measured capacitor and one end of the reference capacitor are connected to a reference voltage through a first switch and to the ground through a second switch.

4. A high precision capacitance measurement circuit according to claim 2, characterized in that, The integration unit comprises a first-order integration circuit, or the integration unit is formed by connecting a plurality of first-order integration circuits in series.

5. A high-precision capacitance measurement method, characterized by, The method is applied to the high-precision capacitor measurement circuit of any one of claims 1 to 4, and the method comprises: The clock unit inputs a first clock signal, and the to-be-measured capacitor and the reference capacitor in the input unit are charged; at the same time, the comparison unit retains a comparison result at a previous moment, and transmits the comparison result to the digital-to-analog conversion unit; and an output signal of the digital-to-analog conversion unit is inverted and superimposed on an input terminal of the integration unit; The clock unit inputs a second clock signal, and the to-be-measured capacitor and the reference capacitor in the input unit are discharged to the integration unit; at the same time, an output of the integration unit is captured by the comparison unit, and the comparison unit obtains a digital signal according to the output of the integration unit; The clock unit uniformly intervals the first clock signal and the second clock signal, and the data extraction unit samples an output of the comparison unit each time the first clock signal appears, to obtain a numerical value representing a capacitance value of the to-be-measured capacitor.

6. The method of claim 5, wherein, The first clock signal is at the high level, and the second clock signal is at the low level.

7. The method of claim 5, wherein, The digital-to-analog conversion unit comprises a digital-to-analog converter, a first capacitor and a second capacitor connected to output terminals of the digital-to-analog converter respectively, the first capacitor and the second capacitor have equal capacitance values, and an inverting output signal of the digital-to-analog conversion unit is coupled to a non-inverting input terminal of the integration unit through the first capacitor, and a non-inverting output signal is coupled to an inverting input terminal of the integration unit through the second capacitor.

8. The method of claim 7, wherein, The capacitance of the to-be-tested capacitor is: wherein C1 is the capacitance of the first capacitor, is the capacitance of the reference capacitor, DATA is the final output value of the data extraction unit, and N is the maximum number of bits of the data extraction unit.

Images