Branch current acquisition method, system, device and computer-readable storage medium applied to simulation circuit

Abstract

The present invention provides a branch current acquisition method, system, device and computer-readable storage medium for a simulation circuit, which specifically includes recursively decomposing the simulation circuit step by step, thereby constructing a current branch topology relationship, and obtaining the required branch current accordingly. Through the technical solution proposed in this application, by constructing a circuit port admittance matrix and a circuit branch topology relationship, the matrix-vector product method is used to realize the convenient acquisition of branch current. On the one hand, it can effectively avoid the repeated calculation of the pin current of each electronic component in the process of obtaining the branch current of each level of the circuit, thereby improving the overall efficiency of obtaining the branch current; on the other hand, in the process of calculating and obtaining the branch current of the simulation circuit, the matrix-vector multiplication can be used to realize the calculation of all branch currents, thereby ensuring that the access to the computer memory is continuous, improving the memory access efficiency, and having generalizable value.

Description

Technical Field

[0001] The present invention relates to the technical field of simulation circuits, and in particular discloses a branch current acquisition method, system, device and computer-readable storage medium applied to simulation circuits. Background Art

[0002] Electronic circuit simulation refers to an engineering method that uses mathematical models to simulate the real-world behavior of electronic circuits. Using simulation systems, circuit functional behavior can be simulated without the need to build actual circuits. Simulating a design before building the actual circuit can significantly improve design efficiency. This is because designers can observe and study circuit behavior before building the circuit, eliminating the time and financial costs of physically implementing the circuit. This is particularly true for integrated circuits. The electronic processes required for physically implementing the circuits, such as photomasks, are expensive, and the high complexity of integrated circuits makes them difficult to implement on a breadboard, making traditional methods of studying circuit behavior challenging. Consequently, nearly all integrated circuit designs rely heavily on simulation.

[0003] In large-scale circuit simulations, to simulate power consumption and load conditions, it's often necessary to calculate the currents corresponding to multiple branches. It's understandable that each branch current is the sum of the pin currents of all the electronic components connected to that branch. The typical calculation method is to first calculate the current at the corresponding device pins and then add up the currents of these components.

[0004] However, in large-scale circuit simulations, the number of devices whose currents need to be calculated at each simulation point can reach hundreds of thousands to millions. The memory required to calculate the currents of different devices is discontinuous, resulting in a low cache hit rate for the central processor and slow branch current calculation speed, resulting in a poor simulation experience for users. Summary of the Invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides a branch current acquisition method, system, device and computer-readable storage medium applied to a simulation circuit.

[0006] In a first aspect of the present application, a branch current acquisition method for a simulation circuit is provided, which may specifically include:

[0007] The simulation circuit is recursively decomposed step by step until the branch current is the sum of the currents of several circuit element ports;

[0008] Based on the recursive decomposition of the simulation circuit, the current branch topology relationship is constructed;

[0009] According to the current branch topology relationship, obtain several branch currents corresponding to the simulation circuit;

[0010] The current branch topology is in a tree structure, the leaf nodes of the tree structure correspond to the port currents of several circuit components, and the root node of the tree structure corresponds to the current of the simulation circuit.

[0011] In a possible implementation of the first aspect, the process of recursively decomposing the simulation circuit step by step includes:

[0012] Decompose the current corresponding to a single circuit branch in the simulation circuit into the sum of the currents of a group of lower-level circuit branches; or

[0013] Decomposing the current corresponding to a single circuit branch in the simulation circuit into the sum of the currents of multiple groups of lower-level circuit branches;

[0014] The lower-level circuit branches correspond to the single circuit branches, and each lower-level circuit branch is regarded as a corresponding branch of the single circuit branch.

[0015] In a possible implementation of the first aspect, a single circuit branch includes at least two circuit nodes;

[0016] The number of circuit nodes included in the lower-level circuit branches is smaller than the number of circuit nodes included in the corresponding single circuit branch, and the circuit nodes included in each lower-level circuit branch are not all the same.

[0017] In a possible implementation of the first aspect, the process of establishing the current branch topology relationship further includes:

[0018] Construct an admittance matrix, wherein the number of rows of the admittance matrix corresponds to the circuit branches, and the number of columns of the admittance matrix corresponds to the circuit nodes corresponding to the simulation circuit;

[0019] Constructing a voltage column vector matrix, wherein the voltage column vector matrix includes a voltage value corresponding to each circuit node;

[0020] In the admittance matrix and the voltage column vector matrix, the distribution of the circuit nodes corresponds one to one.

[0021] In a possible implementation of the first aspect, in the admittance matrix, the element in the i-th row and j-th column corresponds to the admittance value of the circuit branch corresponding to the i-th row and the circuit node corresponding to the j-th column;

[0022] The admittance value includes the conductance value and the capacitance value.

[0023] In a possible implementation of the first aspect, the process of obtaining the plurality of branch currents corresponding to the simulation circuit further includes:

[0024] Calculate the vector product of the admittance matrix and the voltage column vector matrix to obtain the static current and charge corresponding to the circuit branch;

[0025] The branch current corresponding to the circuit branch is calculated according to the following formula:

[0026]

[0027] Where: I is the branch current; I G is the static current corresponding to the circuit branch; is the dynamic current corresponding to the circuit branch, which is obtained by differentiating the charge Q with respect to time t.

[0028] In a possible implementation of the first aspect, the process of obtaining the plurality of branch currents corresponding to the simulation circuit further includes:

[0029] The charge Q is discretized and differentiated according to the first-order backward Euler integration method to update the formula:

[0030]

[0031] Where: I is the branch current; I G is the static current corresponding to the circuit branch; T1 and T2 are two adjacent simulation moments and T1 is less than T2; Q T1 is the charge corresponding to the simulation time T1; Q T2 is the charge corresponding to the simulation time T2.

[0032] A second aspect of the present application provides a branch current acquisition system for a simulation circuit, which is applied to the branch current acquisition method for a simulation circuit provided in the first aspect, including:

[0033] A decomposition unit, used for recursively decomposing the simulation circuit step by step until the branch current is the sum of the currents of the ports of several circuit elements;

[0034] A construction unit, configured to construct a current branch topology relationship based on a step-by-step recursive decomposition of a simulation circuit;

[0035] An acquisition unit, configured to acquire a plurality of branch currents corresponding to the simulation circuit according to a current branch topology relationship;

[0036] The current branch topology is in a tree structure, the leaf nodes of the tree structure correspond to the port currents of several circuit components, and the root node of the tree structure corresponds to the current of the simulation circuit.

[0037] A third aspect of the present application provides a branch current acquisition device for a simulation circuit, comprising:

[0038] memory for storing computer programs;

[0039] The processor is configured to implement the branch current acquisition method for a simulation circuit provided in the first aspect when executing a computer program.

[0040] The fourth aspect of the present application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the branch current acquisition method for a simulation circuit provided in the first aspect.

[0041] Compared with the prior art, this application has the following beneficial effects:

[0042] Through the technical solution proposed in this application, by constructing the circuit port admittance matrix and the circuit branch topology relationship, the matrix-vector product method is used to realize the convenient acquisition of branch current. On the one hand, it can effectively avoid the repeated calculation of the pin current of each electronic component in the process of obtaining the branch current of each level of circuit, thereby improving the overall efficiency of obtaining the branch current; on the other hand, in the process of calculating and obtaining the branch current of the simulation circuit, the matrix-vector multiplication can be used to realize the calculation of all branch currents, thereby ensuring that the access to the computer memory is continuous and improving the memory access efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Other features, objects and advantages of the present invention will become more apparent upon reading the detailed description of non-limiting embodiments with reference to the following drawings:

[0044] Figure 1 According to an embodiment of the present application, a flow chart of a branch current acquisition method applied to a simulation circuit is shown;

[0045] Figure 2 According to an embodiment of the present application, a circuit schematic diagram of an example of obtaining branch current of a simulation circuit is shown;

[0046] Figure 3a According to an embodiment of the present application, a schematic diagram of an admittance matrix applied to branch current acquisition is shown;

[0047] Figure 3b According to an embodiment of the present application, a schematic diagram of a voltage column vector matrix applied to branch power acquisition is shown;

[0048] Figure 3c According to an embodiment of the present application, a schematic diagram of a vector product of an admittance matrix and a voltage column vector matrix is ​​shown;

[0049] Figure 4 According to an embodiment of the present application, a structural schematic diagram of a branch current acquisition system applied to a simulation circuit is shown;

[0050] Figure 5 According to an embodiment of the present application, a schematic structural diagram of a branch current acquisition device applied to a simulation circuit is shown;

[0051] Figure 6 According to an embodiment of the present application, a structural schematic diagram of a computer-readable storage medium is shown. DETAILED DESCRIPTION

[0052] The present invention will be described in detail below with reference to specific embodiments. The following examples will help those skilled in the art to further understand the present invention, but are not intended to limit the present invention in any form. It should be noted that, for those skilled in the art, several changes and improvements can be made without departing from the scope of the present invention. These all fall within the scope of protection of the present invention.

[0053] As used herein, the term "including" and its variations represent open inclusion, i.e., "including but not limited to." Unless otherwise stated, the term "or" means "and / or." The term "based on" means "based at least in part on." The terms "an example embodiment" and "an embodiment" mean "at least one example embodiment." The term "another embodiment" means "at least one additional embodiment." The terms "first," "second," etc. may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0054] To address the difficulty in achieving automation and generalization in the model parameter extraction process in the prior art, this application provides a branch current acquisition method, system, device, and computer-readable storage medium for use in simulated circuits. The technical solution provided by this application facilitates the acquisition of branch currents by constructing a circuit port admittance matrix and circuit branch topology relationships, utilizing matrix-vector multiplication, which has broad applicability. The technical solution provided by this application will be explained and illustrated in conjunction with examples below.

[0055] In some embodiments of the present application, Figure 1 A schematic flow chart of a branch current acquisition method applied to a simulation circuit is shown.

[0056] like Figure 1 As shown, the branch current acquisition method applied to the simulation circuit may specifically include:

[0057] Step 101: recursively decompose the simulation circuit step by step until the branch current is the sum of the currents of several circuit element ports.

[0058] Step 102: constructing a current branch topology relationship based on the recursive decomposition of the simulation circuit.

[0059] Step 103: Obtain several branch currents corresponding to the simulation circuit according to the current branch topology relationship.

[0060] Specifically, the current branch topology provided in step 103 can be in a tree structure, where the leaf nodes of the tree structure correspond to the currents of several circuit component ports, and the root node of the tree structure corresponds to the current of the simulation circuit. That is, in the technical solution provided in this application, the simulation circuit is decomposed level by level to form a corresponding tree topology, thereby facilitating the corresponding acquisition of each branch circuit.

[0061] It can be understood that through the above steps 101 to 103, the branch current can be conveniently obtained. The specific implementation of the above steps 101 to 103 will be further explained and illustrated below.

[0062] In some embodiments of the present application, in step 101 provided in the aforementioned embodiment, the process of recursively decomposing the simulated circuit step by step may further include: decomposing the current corresponding to a single circuit branch in the simulated circuit into the sum of the currents of a group of lower-level circuit branches; or decomposing the current corresponding to a single circuit branch in the simulated circuit into the sum of the currents of multiple groups of lower-level circuit branches. The lower-level circuit branches correspond to the single circuit branch, and each lower-level circuit branch is considered to be a corresponding branch of the single circuit branch.

[0063] It is understood that during the recursive decomposition of the simulated circuit, the circuit can be decomposed into one or more groups of next-level circuit branches during each recursive decomposition process, thereby ensuring that each circuit branch of the simulated circuit is completely decomposed step by step. During the decomposition process, a single circuit branch can be provided with at least two circuit nodes; the number of circuit nodes included in each lower-level circuit branch is less than the number of circuit nodes included in the corresponding single circuit branch, and the circuit nodes included in each lower-level circuit branch are not all the same.

[0064] In some embodiments of the present application, in step 102 provided in the aforementioned embodiment, the process of establishing the current branch topology relationship may further include:

[0065] Construct an admittance matrix, where the number of rows corresponds to the circuit branches, and the number of columns corresponds to the circuit nodes of the simulation circuit. The configuration of the admittance matrix will be described in detail later.

[0066] Construct a voltage column vector matrix, where the voltage column vector matrix includes the voltage value corresponding to each circuit node. It is understandable that in the process of constructing the admittance matrix and the voltage column vector matrix, it is necessary to ensure that the distribution of the circuit nodes corresponds one-to-one, so that the admittance matrix and the voltage column vector matrix can be combined later.

[0067] In a preferred implementation of the above embodiment, Figure 2 A circuit diagram showing an example of obtaining branch current of a simulation circuit is shown below. Figure 2 The specific implementation of this technical solution is demonstrated:

[0068] like Figure 2 As shown, if Figure 2 The current of the circuit branches 1, 2, and 3 in the circuit is recorded. The branch currents of these three circuit branches can be expressed as the sum of the currents of the connected electronic devices, which can be specifically expressed as:

[0069] I 支路1 =i(G1)+i(C1)

[0070] I 支路2 =i(G2)

[0071] I 支路3 =i(C2)+i(G4)

[0072] Among them: I 支路1 is the branch current corresponding to circuit branch 1, I 支路2 is the branch current corresponding to circuit branch 2, I 支路3 is the branch current corresponding to circuit branch 3, i(G1) is the pin current corresponding to electronic component G1, i(G2) is the pin current corresponding to electronic component G2, i(G4) is the pin current corresponding to electronic component G4, i(C1) is the pin current corresponding to capacitor C1, and i(C2) is the pin current corresponding to capacitor C2.

[0073] When the current of the electronic devices to be calculated in each circuit branch is obtained, the branch current can be calculated by constructing the admittance matrix and the voltage column vector matrix: Figure 3a shows a schematic diagram of an admittance matrix, Figure 3b A schematic diagram of a voltage column vector matrix is ​​shown. In the admittance matrix, as Figure 3a As shown, the element in the i-th row and j-th column corresponds to the admittance value of the circuit branch corresponding to the i-th row and the circuit node corresponding to the j-th column. The admittance value includes the conductance value and the capacitance value.

[0074] In the above embodiment, the process of obtaining a plurality of branch currents corresponding to the simulation circuit further includes:

[0075] Calculate the vector product of the admittance matrix and the voltage column vector matrix to obtain the static current and charge corresponding to the circuit branch. It can be understood that, Figure 3cThe result of matrix multiplication of an admittance matrix and a voltage column vector matrix is ​​shown. By multiplying the conductance value and capacitance value in the admittance matrix element with the voltage column vector respectively, a column vector element matrix composed of static current IG and charge QC can be obtained.

[0076] In the above embodiment, the branch current corresponding to the circuit branch can be further calculated according to the following formula:

[0077]

[0078] Where: I is the branch current; I G is the static current corresponding to the circuit branch; is the dynamic current corresponding to the circuit branch, which is obtained by differentiating the charge Q with respect to time t.

[0079] In the above embodiment, further, in the process of obtaining a plurality of branch currents corresponding to the simulation circuit, the following is further included:

[0080] The charge Q is discretized and differentiated according to the first-order backward Euler integration method to update the formula:

[0081]

[0082] Where: I is the branch current; I G is the static current corresponding to the circuit branch; T1 and T2 are two adjacent simulation moments and T1 is less than T2; Q T1 is the charge corresponding to the simulation time T1; Q T2 is the charge corresponding to the simulation time T2. At this time, the corresponding branch current can be obtained by the computer software carrying the current simulation circuit at the corresponding simulation time.

[0083] In some embodiments of the present application, Figure 4 A branch current acquisition system for a simulation circuit is shown, which is applied to the branch current acquisition method for a simulation circuit provided in the above embodiment. Specifically, Figure 4 As shown, the branch current acquisition system may include:

[0084] The decomposition unit 001 is used to recursively decompose the simulation circuit step by step until the branch current is the sum of the currents of the ports of several circuit elements.

[0085] The construction unit 002 is used to construct a current branch topology relationship based on the step-by-step recursive decomposition of the simulation circuit.

[0086] The acquisition unit 003 is used to acquire several branch currents corresponding to the simulation circuit according to the current branch topology relationship. The current branch topology relationship is in a tree structure, wherein the leaf nodes of the tree structure correspond to several circuit component port currents, and the root node of the tree structure corresponds to the current of the simulation circuit.

[0087] It can be understood that the functions implemented by the above-mentioned decomposition unit 001 to the acquisition unit 003 correspond one-to-one to the steps performed by step 101 to step 103 in the above-mentioned embodiment, and are not described in detail here.

[0088] In some embodiments of the present application, a branch current acquisition device for a simulation circuit is further provided. The device may include:

[0089] memory for storing computer programs;

[0090] The processor is used to implement the steps of the branch current acquisition method described in the technical solution of this application when executing a computer program.

[0091] It is understood that various aspects of the technical solution of the present application can be implemented as a system, method, or program product. Therefore, various aspects of the technical solution of the present application can be specifically implemented in the following forms, namely, a complete hardware implementation, a complete software implementation (including firmware, microcode, etc.), or an implementation that combines hardware and software aspects, which can be collectively referred to as "circuit", "module" or "platform" herein.

[0092] Figure 5 According to some embodiments of the present application, a schematic diagram of a branch current acquisition device for a simulation circuit is shown. Figure 5 The electronic device 600 implemented according to the implementation in this embodiment is described in detail. Figure 5 The electronic device 600 shown is merely an example and should not limit the functions and scope of use of any embodiment of the technical solution of the present application.

[0093] like Figure 5 As shown, electronic device 600 is implemented as a general-purpose computing device. The components of electronic device 600 may include, but are not limited to, at least one processing unit 610, at least one storage unit 620, a bus 630 connecting various platform components (including storage unit 620 and processing unit 610), and a display unit 640.

[0094] The storage unit stores program codes, and the program codes can be executed by the processing unit 610 , so that the processing unit 610 executes the implementation steps described in the branch current acquisition method of the above embodiment.

[0095] The storage unit 620 may include a readable medium in the form of a volatile storage unit, such as a random access unit (RAM) 6201 and / or a cache storage unit 6202 , and may further include a read-only storage unit (ROM) 6203 .

[0096] The storage unit 620 may also include a program / utility 6204 having a set (at least one) of program modules 6205, such program modules 6205 including but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which or some combination may include an implementation of a network environment.

[0097] Bus 630 may represent one or more of several types of bus structures, including a memory unit bus or memory unit controller, a peripheral bus, an accelerated graphics port, a processing unit, or a local bus using any of a variety of bus architectures.

[0098] The electronic device 600 may also communicate with one or more external devices 700 (e.g., keyboards, pointing devices, Bluetooth devices, etc.), and may also communicate with one or more devices that enable a user to interact with the electronic device 600, and / or any device that enables the electronic device to communicate with one or more other computing devices (e.g., routers, modems, etc.). Such communication may be performed through an input / output (I / O) interface 650. Furthermore, the electronic device 600 may also communicate with one or more networks (e.g., a local area network (LAN), a wide area network (WAN), and / or a public network, such as the Internet) through a network adapter 660. The network adapter 660 may communicate with other modules of the electronic device 600 through the bus 630. It should be understood that although Figure 5 Not shown, other hardware and / or software modules may be used in conjunction with electronic device 600, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage platforms.

[0099] In some embodiments of the present application, a computer-readable storage medium is also provided, on which a computer program is stored. When the computer program is executed by a processor, the relevant steps of the branch current acquisition method applied to the simulation circuit provided in the above embodiment can be implemented.

[0100] Although this embodiment does not list other specific implementation methods in detail, in some possible implementation methods, the various aspects described in the technical solution of this application can also be implemented in the form of a program product, which includes program code. When the program product is run on a terminal device, the program code is used to enable the terminal device to execute the steps described in the image stitching method area of ​​the technical solution of this application according to the implementation methods in various embodiments of the technical solution of this application.

[0101] Figure 6 According to some embodiments of the present application, a schematic diagram of the structure of a computer-readable storage medium is shown. Figure 6 , which describes a program product 800 for implementing the above method according to an embodiment of the technical solution of the present application. The program product 800 may be a portable compact disc read-only memory (CD-ROM) and include program code, and may be run on a terminal device, such as a personal computer. Of course, the program product produced according to this embodiment is not limited thereto. In the technical solution of the present application, the readable storage medium may be any tangible medium that contains or stores a program, and the program may be used by or in conjunction with an instruction execution system, apparatus, or device.

[0102] The program product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or component, or any combination thereof. More specific examples (a non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof.

[0103] Computer-readable storage media may include a data signal propagated in baseband or as a carrier wave region, wherein readable program code is carried. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. The readable storage medium may also be any readable medium other than a readable storage medium, which may send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, apparatus, or device. The program code contained on the readable storage medium may be transmitted using any appropriate medium, including but not limited to wireless, wired, optical cable, RF, etc., or any suitable combination thereof.

[0104] The program code for performing the operations of the technical solutions of the present application can be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java, C++, etc., and conventional procedural programming languages ​​such as C or similar programming languages. The program code can be executed entirely on the user computing device, locally on the user device, as a separate software package, locally on the user computing device and locally on a remote computing device, or entirely on a remote computing device or server. In the case of a remote computing device, the remote computing device can be connected to the user computing device through any type of network, including a local area network or a wide area network, or can be connected to an external computing device (for example, using an Internet service provider to connect via the Internet).

[0105] To sum up, through the technical solution proposed in this application, by constructing the circuit port admittance matrix and the circuit branch topological relationship, the matrix-vector product method is used to realize the convenient acquisition of branch current. On the one hand, it can effectively avoid the repeated calculation of the pin current of each electronic component in the process of obtaining the branch current of each level of circuit, thereby improving the overall efficiency of obtaining the branch current; on the other hand, in the process of calculating and obtaining the branch current of the simulation circuit, the matrix-vector multiplication can be used to realize the calculation of all branch currents, thereby ensuring that the access to the computer memory is continuous, improving the memory access efficiency, and having generalizable value.

[0106] The above description is only a description of the preferred embodiment of the technical solution of this application, and does not limit the scope of the technical solution of this application. Any changes and modifications made by ordinary technicians in the field of the technical solution of this application based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A branch current acquisition method applied to a simulation circuit, characterized in that: The branch current acquisition method includes: Recursively decomposing the simulation circuit step by step until the branch current is the sum of the currents of the ports of several circuit elements; Constructing a current branch topology relationship according to the step-by-step recursive decomposition of the simulation circuit; According to the current branch topology relationship, obtaining a plurality of branch currents corresponding to the simulation circuit; The current branch topology is in a tree structure, the leaf nodes of the tree structure correspond to the port currents of the plurality of circuit elements, and the root node of the tree structure corresponds to the current of the simulation circuit; The process of constructing the current branch topology relationship also includes: Constructing an admittance matrix, wherein the number of rows of the admittance matrix corresponds to the circuit branches, and the number of columns of the admittance matrix corresponds to the circuit nodes corresponding to the simulation circuit; Constructing a voltage column vector matrix, wherein the voltage column vector matrix includes a voltage value corresponding to each circuit node; The distribution of the circuit nodes in the admittance matrix and the voltage column vector matrix corresponds one to one; The process of obtaining the plurality of branch currents corresponding to the simulation circuit further includes: Calculating the vector product of the admittance matrix and the voltage column vector matrix to obtain the static current and charge corresponding to the circuit branch; The branch current corresponding to the circuit branch is calculated according to the following formula: in: is the branch current; is the static current corresponding to the circuit branch; is the dynamic current corresponding to the circuit branch, and the dynamic current is obtained by derivation of the charge Q with respect to time t.

2. The branch current acquisition method for a simulation circuit according to claim 1, wherein: The process of performing the step-by-step recursive decomposition on the simulation circuit includes: Decomposing the current corresponding to a single circuit branch in the simulation circuit into the sum of the currents of a group of lower-level circuit branches; or Decomposing the current corresponding to a single circuit branch in the simulation circuit into the sum of the currents of multiple groups of lower-level circuit branches; The lower-level circuit branches correspond to the single circuit branch, and each of the lower-level circuit branches is regarded as a corresponding branch of the single circuit branch.

3. The branch current acquisition method for a simulation circuit according to claim 2, wherein: The single circuit branch includes at least two circuit nodes; The number of the circuit nodes included in the lower-level circuit branches is smaller than the number of the circuit nodes included in the corresponding single circuit branch, and the circuit nodes included in each of the lower-level circuit branches are not all the same.

4. The branch current acquisition method for a simulation circuit according to claim 1, wherein: In the admittance matrix, the element in the i-th row and the j-th column corresponds to the admittance value of the circuit branch corresponding to the i-th row and the circuit node corresponding to the j-th column; The admittance value includes a conductance value and a capacitance value.

5. The branch current acquisition method for a simulation circuit according to claim 1, wherein: The process of obtaining the plurality of branch currents corresponding to the simulation circuit further includes: The charge Q is discretized and differentiated according to the first-order backward Euler integration method to update the formula: in: is the branch current; is the static current corresponding to the circuit branch; T1 and T2 are two adjacent simulation moments and T1 is less than T2; is the charge corresponding to the simulation time T1; is the charge corresponding to the simulation time T2.

6. A branch current acquisition system for a simulation circuit, characterized in that: The method for obtaining branch current applied to a simulation circuit as claimed in any one of claims 1 to 5 comprises: a decomposition unit, configured to recursively decompose the simulation circuit step by step until the branch current is the sum of the currents of the ports of a plurality of circuit elements; A construction unit, configured to construct a current branch topology relationship according to the step-by-step recursive decomposition of the simulation circuit; an acquiring unit, configured to acquire a plurality of branch currents corresponding to the simulation circuit according to the current branch topology relationship; The current branch topology is in a tree structure, the leaf nodes of the tree structure correspond to the port currents of the plurality of circuit elements, and the root node of the tree structure corresponds to the current of the simulation circuit; The process of constructing the current branch topology relationship also includes: Constructing an admittance matrix, wherein the number of rows of the admittance matrix corresponds to the circuit branches, and the number of columns of the admittance matrix corresponds to the circuit nodes corresponding to the simulation circuit; Constructing a voltage column vector matrix, wherein the voltage column vector matrix includes a voltage value corresponding to each circuit node; The distribution of the circuit nodes in the admittance matrix and the voltage column vector matrix corresponds one to one; The process of obtaining the plurality of branch currents corresponding to the simulation circuit further includes: Calculating the vector product of the admittance matrix and the voltage column vector matrix to obtain the static current and charge corresponding to the circuit branch; The branch current corresponding to the circuit branch is calculated according to the following formula: in: is the branch current; is the static current corresponding to the circuit branch; is the dynamic current corresponding to the circuit branch, and the dynamic current is obtained by derivation of the charge Q with respect to time t.

7. A branch current acquisition device for a simulation circuit, characterized in that: include: memory for storing computer programs; A processor is configured to implement the branch current acquisition method applied to a simulation circuit as claimed in any one of claims 1 to 5 when executing the computer program.

8. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the branch current acquisition method applied to a simulation circuit according to any one of claims 1 to 5 is implemented.

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