Method for locating a failure point of an integrated circuit

By pre-processing the surface of integrated circuits to improve emissivity and combining it with phase-locked infrared thermal imaging to generate target amplitude and phase maps, the problem of insufficient failure point location accuracy in advanced packaged integrated circuits is solved, and high-precision failure point location is achieved.

CN115423753BActive Publication Date: 2026-04-28CHINA ELECTRONICS RELIABILITY AND ENVIRONMENTAL TESTING INSTITUTE ((THE FIFTH INSTITUTE OF ELECTRONICS MINISTRY OF INDUSTRY AND INFORMATION TECHNOLOGY) (CHINA SAIBAO LABORATORY)
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
CHINA ELECTRONICS RELIABILITY AND ENVIRONMENTAL TESTING INSTITUTE ((THE FIFTH INSTITUTE OF ELECTRONICS MINISTRY OF INDUSTRY AND INFORMATION TECHNOLOGY) (CHINA SAIBAO LABORATORY)
Filing Date
2022-08-03
Publication Date
2026-04-28

AI Technical Summary

Technical Problem

Existing phase-locked infrared thermal imaging detection technology has difficulty in achieving accurate failure point location in advanced packaged integrated circuits, especially due to the large location error caused by increased thickness and reduced feature size.

Method used

By preprocessing the surface of the integrated circuit to improve emissivity, and combining it with phase-locked infrared thermal imaging detection, target amplitude map and target phase map are generated. These images are then used to determine the horizontal position and depth information of the failure point.

Benefits of technology

It improves the accuracy of locating failure points in integrated circuits, enabling precise location of failure points and reducing thermal imaging errors.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to a method, device, computer equipment, storage medium and computer program product. The method comprises the following steps: after a pretreated integrated circuit is subjected to an excitation signal, lock-in infrared thermal imaging detection is carried out to obtain an infrared image, and the emissivity of the integrated circuit is improved through pretreatment. The infrared image is processed to obtain a target amplitude graph and a target phase graph. The horizontal position information of a failure point of the integrated circuit is determined according to the target amplitude graph. The depth information of the failure point of the integrated circuit is determined according to the target phase graph. The target amplitude graph represents the horizontal position information of the failure point of the integrated circuit, and the target phase graph represents the depth information of the failure point of the integrated circuit. In combination with the horizontal information and the depth information, the specific position of the failure point of the integrated circuit can be determined. The emissivity of the integrated circuit is improved through pretreatment, the infrared emissivity of the material surface is improved, and the positioning accuracy of the failure point of the integrated circuit is improved.
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Description

Technical Field

[0001] This application relates to the field of electronic component testing technology, and in particular to a method, apparatus, computer equipment, storage medium, and computer program product for locating failure points in integrated circuits. Background Technology

[0002] With Moore's Law slowing its pace of development, the performance gains from advanced manufacturing processes are no longer sufficient to meet future application demands. The emergence of advanced packaging has shown the industry enormous potential for improving chip integration, electrical connectivity, performance optimization, and cost reduction. However, advanced packaged devices are prone to various defects during manufacturing and packaging. Due to increased process complexity, failures can occur at any point within a component's traces, vias, or interconnects connecting components.

[0003] Failure analysis is an essential means to ensure the reliability of advanced packaged devices. Traditional failure analysis uses phase-locked infrared (PLI) thermal imaging technology. The working principle of conventional PLI thermal imaging technology is that a function generator controls an excitation heat source to emit a light source with a sinusoidally varying intensity. The thermal radiation of the light source heats the component under test, and an infrared thermal imager collects the temperature information of the component surface, ultimately obtaining hotspot images and failure location information such as phase angle.

[0004] However, due to the increased thickness and reduced feature size in advanced packaged integrated circuits, conventional phase-locked infrared thermal imaging detection technology is difficult to accurately locate failures. Summary of the Invention

[0005] Therefore, it is necessary to provide a method, apparatus, computer equipment, computer-readable storage medium, and computer program product for locating thermal failure points that can improve the detection accuracy of integrated circuit failure points, in order to address the above-mentioned technical problems.

[0006] In a first aspect, this application provides a method for locating failure points in integrated circuits, the method comprising:

[0007] An excitation signal is applied to the pre-processed integrated circuit, and then phase-locked infrared thermal imaging is performed to obtain an infrared image; the pre-processing improves the emissivity of the integrated circuit surface.

[0008] The infrared image is processed to obtain the target amplitude map and the target phase map;

[0009] The horizontal position information of the failure point of the integrated circuit is determined based on the target amplitude diagram;

[0010] The depth information of the failure point of the integrated circuit is determined based on the target phase map.

[0011] In one embodiment, the preprocessing includes:

[0012] The surface of the integrated circuit is coated with paint, and the emissivity of the paint is greater than that of the surface of the integrated circuit.

[0013] In one embodiment, the preprocessing includes:

[0014] A sealing film is disposed on the surface of the integrated circuit;

[0015] The surface of the sealing film is painted with a paint whose emissivity is greater than that of the integrated circuit surface.

[0016] In one embodiment, before processing the infrared image to obtain the amplitude map and phase map, the method further includes:

[0017] The infrared image is denoised based on a reference signal with the same frequency as the excitation signal.

[0018] In one embodiment, each pixel of the infrared image represents temperature; the reference signal includes two sinusoidal reference signals having a phase difference.

[0019] The infrared image is denoised based on a reference signal with the same frequency as the excitation signal, including:

[0020] The two sinusoidal reference signals are multiplied by each temperature pixel and then averaged over time to obtain the denoised in-phase infrared image and orthogonal infrared image.

[0021] The step of processing the infrared image to obtain the target amplitude map and the target phase map includes: processing the in-phase infrared image and the orthogonal infrared image to obtain the target amplitude map and the target phase map.

[0022] In one embodiment, the method further includes: adjusting the phase-locked frequency of the excitation signal, returning to the step of applying the excitation signal to the pre-processed integrated circuit and performing phase-locked infrared thermal imaging detection to obtain an infrared image, thereby obtaining multiple infrared images;

[0023] The step of processing the in-phase infrared image and the orthogonal infrared image to obtain the target amplitude image and the target phase image includes: determining the target amplitude image from the in-phase infrared image of the plurality of infrared images, and determining the target phase image from the orthogonal infrared image of the plurality of infrared images.

[0024] Secondly, this application provides a device for locating failure points in integrated circuits, the device comprising:

[0025] The preprocessing module is used to apply an excitation signal to the preprocessed integrated circuit and then perform phase-locked infrared thermal imaging detection to obtain an infrared image; the preprocessing improves the emissivity of the integrated circuit.

[0026] The processing module is used to process the infrared image to obtain the target amplitude map and the target phase map;

[0027] A horizontal positioning module is used to determine the horizontal position information of the failure point of the integrated circuit based on the target amplitude diagram;

[0028] A depth positioning module is used to determine the depth information of the failure point of the integrated circuit based on the target phase map.

[0029] Thirdly, this application provides a computer device including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of the above-described method.

[0030] Fourthly, this application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the above-described method.

[0031] Fifthly, this application provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the above-described method.

[0032] The aforementioned method, apparatus, computer equipment, storage medium, and computer program product for locating integrated circuit failure points apply an excitation signal to a pre-processed integrated circuit and then perform phase-locked infrared thermal imaging detection to obtain an infrared image characterizing the temperature distribution of the integrated circuit. The infrared image is then processed to obtain a target amplitude map and a target phase map. The target amplitude map characterizes the horizontal position information of the integrated circuit failure point, and the target phase map characterizes the depth information of the failure point. By combining the horizontal and depth information, the specific location of the integrated circuit failure point can be determined. Pre-processing improves the infrared emissivity of the integrated circuit material surface, thereby improving the accuracy of locating the integrated circuit failure point. Attached Figure Description

[0033] Figure 1 This is an application environment diagram of a method for locating integrated circuit failure points in one embodiment.

[0034] Figure 2 This is a flowchart illustrating a method for locating integrated circuit failure points in one embodiment;

[0035] Figure 3 This is a schematic diagram of a square wave signal applied to an integrated circuit in one embodiment;

[0036] Figure 4This is a schematic diagram of an infrared image of an integrated circuit in one embodiment;

[0037] Figure 5 This is a non-inverting hotspot diagram of an integrated circuit in one embodiment;

[0038] Figure 6 This is an orthogonal hotspot diagram of an integrated circuit in one embodiment;

[0039] Figure 7 This is a target amplitude diagram of an integrated circuit in one embodiment;

[0040] Figure 8 This is a target phase map of an integrated circuit in one embodiment;

[0041] Figure 9 This is a flowchart illustrating a method for locating integrated circuit failure points in another embodiment;

[0042] Figure 10 This is a flowchart illustrating a method for locating integrated circuit failure points in another embodiment;

[0043] Figure 11 This is a flowchart illustrating a method for testing integrated circuit failure points in one embodiment;

[0044] Figure 12 This is a block diagram of a device for locating integrated circuit failure points in one embodiment;

[0045] Figure 13 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0046] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0047] The method for locating integrated circuit failure points provided in this application embodiment can be applied to, for example... Figure 1 The application environment shown. For example... Figure 1 As shown, the application environment includes a computing device 101, an integrated circuit 103, and an infrared camera 102. After the computer device 101 applies an excitation signal to the pre-processed integrated circuit 103, it performs phase-locked infrared thermal imaging detection to obtain the infrared image of the integrated circuit 103 collected by the infrared camera 102.

[0048] Specifically, the frequency of the excitation signal applied by the computer device 101 to the pre-processed integrated circuit 103 is related to the number of frames of the infrared camera 102, and the number of frames of the infrared camera 102 can be four times the frequency of the excitation signal.

[0049] Computer device 101 processes the infrared image to obtain a target amplitude map and a target phase map. Based on the target amplitude map, computer device 101 determines the horizontal position information of the failure point of integrated circuit 103, and also determines the depth information of the failure point of integrated circuit 103. By combining the horizontal and depth information, the specific location of the failure point of integrated circuit 103 can be determined.

[0050] The computer equipment 101 may include, but is not limited to, various personal computers, laptops, smartphones, and tablets.

[0051] In one embodiment, such as Figure 2 As shown, a method for locating failure points in integrated circuits is provided, which can be applied to... Figure 1 Taking a computer device as an example, the explanation includes the following steps:

[0052] Step 200: After applying an excitation signal to the pre-processed integrated circuit, phase-locked infrared thermal imaging detection is performed to obtain an infrared image. The emissivity of the integrated circuit surface is improved through preprocessing.

[0053] For advanced packaged devices of integrated circuits, due to the increase in package thickness and the decrease in feature size, integrated circuit failures often occur. By performing failure analysis on integrated circuits, the specific location of the failure point can be obtained.

[0054] Specifically, advanced packaging devices in integrated circuit boards include various complex structures such as micro-bumps, through-silicon vias (TSVs), silicon interposers, and controlled collapse chip connection bumps (C4 bumps). Failure points can occur at various structural locations within an integrated circuit board.

[0055] In this process, phase-locked infrared thermal imaging is performed after an excitation signal is applied to the integrated circuit. The frequency of the excitation signal, i.e., the square wave frequency, must maintain a certain relationship with the frame rate of the infrared camera. Specifically, the number of frames captured by the infrared camera on the integrated circuit can be four times the phase-locked frequency. Specifically, the type of excitation signal can be a square wave, such as... Figure 3 The diagram shows a square wave signal applied by the integrated circuit. The current in the square wave changes according to a modulation scheme preset by the computer, and the frequency of the square wave is the phase-locked loop (PLL) frequency. By setting the relationship between the number of frames captured by the infrared camera and the PLL frequency, the infrared camera can obtain clearer infrared images. Figure 4 The infrared image shown is of the integrated circuit, which preliminarily characterizes the temperature distribution of the integrated circuit after it is powered on. The infrared image is a digitized thermal image. Figure 4 Each pixel in the image represents a temperature.

[0056] Specifically, by applying an excitation signal to the integrated circuit, heat is generated at the failure points and other hot spots of the integrated circuit. The heat radiation is transmitted to the surface of the integrated circuit in the form of heat waves. Infrared images are taken of the integrated circuit to obtain an infrared image that characterizes the temperature distribution of the integrated circuit after it is powered on.

[0057] According to the principle of phase-locked loop (LLL) thermal imaging, the internal heat generation of the detected surface must be zero, and the phase map must be independent of the device surface emissivity. However, in actual measurements, the device surface exhibits both radiation and reflection. Especially for materials with strong visible light reflection (such as metals), high reflectivity can also lead to increased thermal imaging errors. In this implementation, preprocessing can increase the emissivity of the integrated circuit (IC) to reduce reflectivity, thereby reducing thermal imaging errors. Specifically, preprocessing can involve spraying paint onto the surface of the IC. The purpose of this paint is to increase the emissivity of the IC, i.e., to make the emissivity as high as possible (emissivity close to 1), preventing radiation reflection from surrounding heat sources. By increasing the emissivity of the IC surface to prevent radiation reflection from surrounding heat sources, the hot spots in the thermal image of the IC after power-on are more concentrated.

[0058] It should be noted that the surface of integrated circuits also contains components that are not suitable for direct painting, such as materials that are susceptible to corrosion or have porous surfaces. In this case, a sealing film needs to be applied to the surface of the integrated circuit first, and then the surface of the sealing film is painted.

[0059] By pre-treating the surface of the integrated circuit, its emissivity is improved, and radiation reflection from surrounding heat sources is prevented. This results in more concentrated hot spots in the thermal image of the integrated circuit after power-on, facilitating further processing of the infrared image.

[0060] Step 202: Process the infrared image to obtain the target amplitude map and the target phase map.

[0061] In this process, after obtaining an infrared image characterizing the temperature distribution of the integrated circuit, the computer generates a reference signal. Based on the reference signal, phase-locked coherent calculations are performed on the infrared image to remove noise points, leaving only the phase-locked frequency hotspots, thus obtaining... Figure 5 The in-phase hotspot diagram and Figure 6 The diagram shows an orthogonal heatmap. The reference signal can consist of two sinusoidal functions with a phase difference between them, and the frequency of the reference signal must be the same as the phase-locked loop frequency.

[0062] Again Figure 5 and Figure 6 Further processing was performed to obtain... Figure 7 The target amplitude diagram and Figure 8 The target phase diagram is shown.

[0063] By processing the infrared image, noise points were removed, and the obtained in-phase and orthogonal heat maps were further processed to obtain the target amplitude map and the target phase map.

[0064] Step 204: Determine the horizontal location information of the failure point of the integrated circuit based on the target amplitude diagram.

[0065] Specifically, hotspot extraction is performed on the target amplitude map to obtain the horizontal position information of the failure point. The horizontal position information refers to the x-coordinate and y-coordinate of the failure point on the plane of the integrated circuit.

[0066] Specifically, such as Figure 7 The target amplitude diagram shown indicates that the location information of the hotspots is the horizontal location information of the failure point of the integrated circuit.

[0067] The horizontal location information of the failure point is obtained by hotspot extraction from the target amplitude map.

[0068] Step 206: Determine the depth information of the failure point of the integrated circuit based on the target phase map. This involves extracting hotspots from the target phase map to obtain the depth information of the integrated circuit failure point. The depth information refers to the vertical distance between the failure point and the surface of the integrated circuit.

[0069] Specifically, based on the principle of lock-in infrared thermal imaging, for integrated circuits, the Joule heat generated by defects will be conducted through each layer of material to the surface of the integrated circuit. According to the surface convection boundary conditions, the heat conduction can be expressed by the following formula.

[0070]

[0071] Where T is a function of temperature, position (x, y, z), and time t, z is the material thickness, ρ is the density, and C is the density. p For specific heat capacity, α = k / (ρC) p ), where k is the thermal diffusivity of the material, and q(t) is the internal heat generated per unit volume. For electrothermal generation, P = IR. 2 Where I is the applied current to the defect and R is the resistance of the defect.

[0072] When the probe point is far from the heat source, assuming that heat conduction is axisymmetric through an isotropic homogeneous material, substituting q = 0 into the above equation and solving analytically yields a complex solution, where the imaginary part is the phase angle.

[0073]

[0074] Where T0 is the amplitude factor of the oscillating temperature signal, which is proportional to the power density amplitude, and r is the distance of the detection point. This represents the thermal diffusion length of the material. Therefore, the vertical distance to the detection point can be estimated based on the surface temperature phase angle information acquired by the infrared thermal imager.

[0075] Specifically, such as Figure 8 The target phase map shown has hotspot size as the depth information of the failure point of the integrated circuit. The larger the hotspot diameter, the longer the vertical distance between the failure point of the integrated circuit and the surface of the integrated circuit.

[0076] In the aforementioned method for locating integrated circuit failure points, an excitation signal is applied to the pre-processed integrated circuit, followed by phase-locked infrared thermal imaging detection to obtain an infrared image characterizing the temperature distribution of the integrated circuit. The infrared image is then processed to obtain a target amplitude map and a target phase map. The target amplitude map characterizes the horizontal position information of the integrated circuit failure point, and the target phase map characterizes the depth information of the failure point. By combining the horizontal and depth information, the specific location of the integrated circuit failure point can be determined. Pre-processing improves the infrared emissivity of the integrated circuit surface, thereby enhancing the accuracy of locating the integrated circuit failure point.

[0077] In one embodiment, the surface of the integrated circuit is painted with a paint whose emissivity is greater than that of the integrated circuit surface.

[0078] The process involves spraying paint onto the surface of the integrated circuit. The paint material is an insulating, matte black paint with a known emissivity. The emissivity of the black paint should be as high as possible (approaching 1). Specifically, the type of paint can be Nextel-Velvetcoating 811-21, JELT Noir Mat 700, Electrolube PNM-400, Krylon Ultra Flat Black, etc.

[0079] It should be noted that before painting, the surface of the integrated circuit contains two types of materials: one is a material that strongly reflects visible light and has low infrared emissivity, such as aluminum or steel; the other is a material with high infrared emissivity but low visible light absorption, such as white paint. Optionally, different thicknesses of black paint can be applied to the different materials on the surface of the integrated circuit to maintain the infrared emissivity of the integrated circuit surface as uniform as possible, while simultaneously maintaining the emissivity of the integrated circuit surface as high as possible (emissivity close to 1).

[0080] In this embodiment, by spraying paint on the surface of the integrated circuit, the emissivity of the integrated circuit surface is made as high as possible, and the visible light absorption rate and infrared emissivity are improved, so that the hot spots in the thermal imaging map of the integrated circuit after being powered on are more concentrated in the subsequent testing method.

[0081] In one embodiment, a sealing film is disposed on the surface of an integrated circuit, and the surface of the sealing film is painted with paint whose reflectivity is greater than that of the integrated circuit surface.

[0082] The surface of integrated circuits sometimes contains components unsuitable for direct painting, such as materials susceptible to corrosion or with porous surfaces. In these cases, a sealing film needs to be applied to the surface of the integrated circuit before painting. The sealing film has good light absorption and infrared emissivity, and can be a metal optical film, graphene film, etc. Furthermore, the testing of integrated circuits often involves the use of precision instruments, requiring these instruments to be coated with a paint film to prevent damage and reduce interference with the testing process.

[0083] Specifically, a surface coating method is used, where vacuum negative pressure is used to ensure close contact between the sealing film and the integrated circuit, followed by painting.

[0084] In this embodiment, by setting a sealing film on the surface of a material that is not corrosion-resistant or has pores to separate the integrated circuit from the paint, it is ensured that the integrated circuit is not corroded or remains clean, and the light absorption rate and infrared emissivity of the integrated circuit, sealing film and paint as a whole are also guaranteed, ensuring that the infrared imaging of the integrated circuit in subsequent steps is not affected.

[0085] In one embodiment, before processing the infrared image to obtain an amplitude map and a phase map, the method further includes: denoising the infrared image based on a reference signal with the same frequency as the excitation signal.

[0086] Among them, such as Figure 4 The infrared image shown is of the integrated circuit, which preliminarily characterizes the temperature distribution of the integrated circuit after it is powered on. The infrared image is a digitized thermal image. Figure 4 Each pixel in the image represents a temperature. The temperature of each pixel can be represented using a thermodynamic function, the expression of which is:

[0087] F(t) = Asin(2πft + Φ)

[0088] Where A represents the amplitude of the temperature, and f represents the frequency of the excitation signal. The phase angle representing temperature.

[0089] There are typically two reference signals, which can be sinusoidal modulation signals with the same frequency as the excitation signal. By calculating the temperature of each pixel using the two reference signals, two images are obtained, thus eliminating noise points.

[0090] Specifically, the two reference signals are used to perform phase-locked coherent calculations with each pixel, that is, the average over time is calculated after multiplication to obtain the in-phase hotspot map S of the noise-removed points. 0° Orthogonal heatmap S 90° .

[0091] In this embodiment, the infrared image is denoised using a reference signal and an excitation signal to obtain in-phase and orthogonal heat maps after noise reduction, which facilitates subsequent calculations.

[0092] In one embodiment, the method for locating integrated circuit failure points is as follows: Figure 9 As shown, it includes:

[0093] Step 900: After applying an excitation signal to the pre-processed integrated circuit, perform phase-locked infrared thermal imaging detection to obtain an infrared image. The emissivity of the integrated circuit is improved through preprocessing. Each pixel in the infrared image represents the temperature.

[0094] Specifically, the pretreatment includes two methods. The first method involves spraying paint onto the surface of the integrated circuit, where the emissivity of the paint is greater than that of the integrated circuit surface. The second method involves setting a sealing film on the surface of the integrated circuit, and then spraying paint onto the surface of the sealing film, where the emissivity of the paint is greater than that of the integrated circuit surface.

[0095] Step 902: Multiply the two sinusoidal reference signals by each temperature pixel and calculate the time average to obtain the denoised in-phase infrared image and the orthogonal infrared image. The two sinusoidal reference signals have a phase difference.

[0096] The reference signal is divided into a first reference signal and a second reference signal. Both the first and second reference signals are sinusoidal reference signals and have the same frequency as the excitation signal. The phase difference between the first and second reference signals can be 90 degrees.

[0097] The first and second reference signals are multiplied by each temperature pixel, and then the time average is calculated to obtain the denoised in-phase infrared image S. 0° and orthogonal infrared image S 90° .

[0098] Step 904: Process the in-phase infrared image and the orthogonal infrared image to obtain the target amplitude image and the target phase image.

[0099] Among them, the in-phase infrared image S 0° and orthogonal infrared image S 90° By performing simple mathematical calculations on each pixel, we can obtain the target amplitude map and the target phase map respectively.

[0100] Specifically, the formula for calculating pixel amplitude is:

[0101]

[0102] Where A represents the pixel amplitude. The formula for calculating the pixel phase angle is:

[0103]

[0104] Where φ represents the pixel phase angle.

[0105] The target amplitude map and target phase map are determined based on the pixel amplitude A and the pixel phase angle φ.

[0106] Step 906: Determine the horizontal location information of the failure point of the integrated circuit based on the target amplitude diagram.

[0107] Step 908: Determine the depth information of the failure point of the integrated circuit based on the target phase map.

[0108] In this embodiment, phase-locked coherent calculations are performed using two reference signals and the temperature of each pixel to obtain in-phase infrared and quadrature infrared images, reflecting the preliminary hotspot distribution. Further processing of the in-phase and quadrature infrared images yields target amplitude and target phase images that reflect the true location of the integrated circuit failure point.

[0109] In one embodiment, the method for locating integrated circuit failure points is as follows: Figure 10 As shown, it includes:

[0110] Step 1000: Adjust the phase-locked frequency of the excitation signal, apply the excitation signal to the pre-processed integrated circuit, and perform phase-locked infrared thermal imaging detection to obtain multiple infrared images. The emissivity of the integrated circuit is improved through preprocessing.

[0111] In the infrared image, each pixel represents the temperature.

[0112] Step 1002: Determine the target amplitude map from the in-phase infrared images of multiple infrared images, and determine the target phase map from the orthogonal infrared images of multiple infrared images.

[0113] In this process, the two sinusoidal reference signals are multiplied by each temperature pixel in multiple infrared images and then the time average is calculated to obtain multiple in-phase infrared images and multiple orthogonal infrared images after denoising. The two sinusoidal reference signals have a phase difference.

[0114] Multiple in-phase infrared images and multiple orthogonal infrared images are processed to obtain multiple target amplitude images and multiple target phase images.

[0115] Because the thermal wave propagation from the failure point of an integrated circuit exhibits a strong damping effect, which is exponentially related to the transmission distance, increasing the phase-locked frequency (PLC) increases the vertical heat transfer from the failure point, resulting in higher resolution and clearer hotspots in the infrared image. However, increasing the PLC also increases the horizontal heat transfer from the failure point, increasing the diameter of the hotspot in the infrared image, thus reducing the spatial resolution. Therefore, the longer the detection time, the thicker the sample, the deeper the failure point, the larger the hotspot, and the greater the failure localization error.

[0116] Therefore, by changing the phase-locked frequency, the most suitable phase-locked frequency can be extracted to obtain an infrared image with high spatial resolution and appropriate hotspot diameter.

[0117] Specifically, the appropriate phase-locked frequency is determined based on multiple target amplitude diagrams and multiple target phase diagrams.

[0118] Step 1004: Determine the horizontal location information of the failure point of the integrated circuit based on the target amplitude diagram.

[0119] Step 1006: Determine the depth information of the failure point of the integrated circuit based on the target phase map.

[0120] In this process, the two sinusoidal reference signals are multiplied by each temperature pixel in multiple infrared images and then the time average is calculated to obtain multiple in-phase infrared images and multiple orthogonal infrared images after denoising. The two sinusoidal reference signals have a phase difference.

[0121] Multiple in-phase infrared images and multiple orthogonal infrared images are processed to obtain multiple target amplitude images and multiple target phase images.

[0122] The vertical location of the integrated circuit's failure point can be determined based on the phase-locked loop frequency and the integrated circuit's thermal diffusivity. The calculation formula is as follows:

[0123]

[0124] Among them, z i This represents the depth information of the integrated circuit's failure point, i.e., its vertical position. α is the thermal diffusivity coefficient, f is the phase-locked frequency (i.e., the frequency of the excitation signal), and i is the number of times the excitation signal is adjusted. By combining the vertical position information of the integrated circuit's failure point obtained from the target phase map and the horizontal position information obtained from the target amplitude map, the specific location of the integrated circuit's failure point can be accurately determined.

[0125] In this embodiment, by adjusting the frequency of the excitation signal, infrared images with high spatial resolution and suitable hotspot diameter are selected to accurately locate the specific location of the integrated circuit failure point.

[0126] In one embodiment, a test method, taking the testing of an integrated circuit sample as an example, includes:

[0127] Step 1100: Place the integrated circuit sample to be measured on the sample platform.

[0128] Step 1102: Turn on the phase-locked infrared thermal imaging characterization system.

[0129] Step 1104: Power the integrated circuit sample with a DC power supply, fix the infrared camera on the three-dimensional moving stage, and adjust the focal length of the infrared camera and the three-dimensional moving stage to make the integrated circuit sample clearly visible in the field of view of the infrared camera.

[0130] Step 1106: After applying an excitation signal to the pre-processed integrated circuit sample, perform phase-locked infrared thermal imaging detection to obtain an infrared image. The emissivity of the integrated circuit sample is improved through preprocessing.

[0131] The excitation signal can be a modulation signal emitted by a computer, generated through the analog input of the DC power supply controlled by the computer and the analog output of the data acquisition card. Simultaneously, this modulation signal controls the infrared camera to acquire real-time image data.

[0132] Step 1108: Process the infrared image to obtain the target amplitude map and the target phase map.

[0133] In this process, infrared image data is processed and signals are extracted using phase-locked infrared thermal imaging software, and the extracted data is subjected to synchronous phase-locked operation to obtain the target amplitude map and the target phase map.

[0134] Step 1110: Determine the horizontal position information of the failure point of the integrated circuit sample based on the target amplitude diagram, and determine the depth information of the failure point of the integrated circuit sample based on the target phase diagram.

[0135] In this embodiment, by performing surface treatment on the integrated circuit to improve the visible light absorption rate and infrared emissivity of the material surface and eliminate specular reflection, and then performing phase-locked thermal imaging detection, high-precision integrated circuit failure location is achieved, providing a new location method for failure analysis of advanced packaged integrated circuits.

[0136] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0137] Based on the same inventive concept, this application also provides an integrated circuit failure point location device for implementing the aforementioned integrated circuit failure point location method. The solution provided by this device is similar to the implementation described in the above method; therefore, the specific limitations in one or more integrated circuit failure point location device embodiments provided below can be found in the limitations of the integrated circuit failure point location method described above, and will not be repeated here.

[0138] In one embodiment, such as Figure 12 As shown, a device for locating failure points in an integrated circuit is provided, comprising: a preprocessing module 1200, a processing module 1201, a horizontal positioning module 1202, and a depth positioning module 1203, wherein:

[0139] The preprocessing module 1200 is used to apply an excitation signal to the preprocessed integrated circuit and then perform phase-locked infrared thermal imaging detection to obtain an infrared image. Preprocessing improves the emissivity of the integrated circuit surface.

[0140] The processing module 1201 is used to process the infrared image to obtain the target amplitude map and the target phase map.

[0141] The horizontal positioning module 1202 is used to determine the horizontal position information of the failure point of the integrated circuit based on the target amplitude diagram.

[0142] The depth positioning module 1203 is used to determine the depth information of the failure point of the integrated circuit based on the target phase map.

[0143] In one embodiment, the preprocessing module 1200 is also used to spray paint on the surface of the integrated circuit, wherein the emissivity of the paint is greater than the emissivity of the integrated circuit surface.

[0144] In one embodiment, the preprocessing module 1200 is further configured to deposit a sealing film on the surface of the integrated circuit. The surface of the sealing film is then painted with a paint whose emissivity is greater than that of the integrated circuit surface.

[0145] In one embodiment, the processing unit is configured to perform noise reduction processing on the infrared image based on a reference signal with the same frequency as the excitation signal.

[0146] In one embodiment, the processing unit is further configured to multiply the two sinusoidal reference signals by each temperature pixel and then calculate the time average to obtain a denoised in-phase infrared image and a quadrature infrared image. Processing the infrared images to obtain a target amplitude image and a target phase image includes: processing the in-phase infrared image and the quadrature infrared image to obtain the target amplitude image and the target phase image.

[0147] In one embodiment, the processing unit is further configured to adjust the phase-locked frequency of the excitation signal, return to the step of applying the excitation signal to the pre-processed integrated circuit and performing phase-locked infrared thermal imaging detection to obtain an infrared image, thereby obtaining multiple infrared images. Processing the in-phase infrared image and the orthogonal infrared image to obtain a target amplitude image and a target phase image includes: determining the target amplitude image from the in-phase infrared image of the multiple infrared images, and determining the target phase image from the orthogonal infrared image of the multiple infrared images.

[0148] Each module in the aforementioned integrated circuit failure point location device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in the processor of a computer device in hardware form or independent of it, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0149] In one embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 13 As shown, the computer device includes a processor, memory, and a network interface connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores an operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The database stores location data of integrated circuit failure points. The network interface communicates with external terminals via a network connection. When executed by the processor, the computer program implements a method for locating integrated circuit failure points.

[0150] Those skilled in the art will understand that Figure 13The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0151] In one embodiment, a computer device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above method embodiments.

[0152] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon that, when executed by a processor, implements the steps in the above method embodiments.

[0153] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above method embodiments.

[0154] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties.

[0155] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0156] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0157] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for locating failure points in integrated circuits, characterized in that, The method includes: After applying an excitation signal to the pre-processed integrated circuit, phase-locked infrared thermal imaging is performed to obtain an infrared image. The pre-processing improves the emissivity of the integrated circuit surface. The pre-processing includes spraying paint onto the surface of the integrated circuit. Different materials on the surface of the integrated circuit are sprayed with black paint of varying thicknesses to maintain a uniform infrared emissivity. If the surface of the integrated circuit contains components that are not suitable for direct painting, a sealing film is set on the surface of the integrated circuit, and the surface of the sealing film is painted. The paint material is an insulating matte black paint with a known emissivity, and the emissivity of the paint is greater than that of the integrated circuit surface. The infrared image is processed to obtain the target amplitude map and the target phase map; The horizontal position information of the failure point of the integrated circuit is determined based on the target amplitude diagram; The depth information of the failure point of the integrated circuit is determined based on the target phase map.

2. The method according to claim 1, characterized in that, Before processing the infrared image to obtain the amplitude map and phase map, the method further includes: The infrared image is denoised based on a reference signal with the same frequency as the excitation signal.

3. The method according to claim 2, characterized in that, Each pixel in the infrared image represents a temperature; the reference signal includes two sinusoidal reference signals, which have a phase difference. The infrared image is denoised based on a reference signal with the same frequency as the excitation signal, including: The two sinusoidal reference signals are multiplied by each temperature pixel and then averaged over time to obtain the denoised in-phase infrared image and orthogonal infrared image. The step of processing the infrared image to obtain the target amplitude map and the target phase map includes: processing the in-phase infrared image and the orthogonal infrared image to obtain the target amplitude map and the target phase map.

4. The method according to claim 3, characterized in that, The method further includes: adjusting the phase-locked frequency of the excitation signal, returning to the step of applying the excitation signal to the pre-processed integrated circuit and performing phase-locked infrared thermal imaging detection to obtain an infrared image, thereby obtaining multiple infrared images; The step of processing the in-phase infrared image and the orthogonal infrared image to obtain the target amplitude image and the target phase image includes: determining the target amplitude image from the in-phase infrared image of the plurality of infrared images, and determining the target phase image from the orthogonal infrared image of the plurality of infrared images.

5. A device for locating failure points in integrated circuits, characterized in that, The device includes: A preprocessing module is used to apply an excitation signal to a preprocessed integrated circuit and then perform phase-locked infrared thermal imaging detection to obtain an infrared image. The preprocessing improves the emissivity of the integrated circuit. The preprocessing includes spraying paint onto the surface of the integrated circuit. Different materials on the surface of the integrated circuit are sprayed with black paint of varying thicknesses to maintain a uniform infrared emissivity. If the surface of the integrated circuit contains components that are not suitable for direct painting, a sealing film is set on the surface of the integrated circuit, and the surface of the sealing film is painted. The paint material is an insulating matte black paint with a known emissivity, and the emissivity of the paint is greater than that of the surface of the integrated circuit. The processing module is used to process the infrared image to obtain the target amplitude map and the target phase map; A horizontal positioning module is used to determine the horizontal position information of the failure point of the integrated circuit based on the target amplitude diagram; A depth positioning module is used to determine the depth information of the failure point of the integrated circuit based on the target phase map.

6. The apparatus according to claim 5, characterized in that, The processing unit is used to perform noise reduction processing on the infrared image based on a reference signal with the same frequency as the excitation signal.

7. The apparatus according to claim 6, characterized in that, The processing unit is also used to multiply the two sinusoidal reference signals with each temperature pixel and then calculate the time average to obtain the denoised in-phase infrared image and the orthogonal infrared image; and to process the infrared image to obtain the target amplitude image and the target phase image, including: processing the in-phase infrared image and the orthogonal infrared image to obtain the target amplitude image and the target phase image.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 4.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 4.

10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 4.

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