Single-path controlled charge pump

Abstract

The application provides a single-path controlled charge pump, comprising a clock generation circuit, a detection control circuit, a positive voltage charge pump circuit and a negative voltage charge pump circuit; the clock generation circuit is used for generating a clock signal and sending the clock signal to the detection control circuit; the detection control circuit is used for detecting a real-time positive voltage of the positive voltage charge pump circuit, generating a control signal by comparing the real-time positive voltage with a reference voltage, and then adjusting a positive voltage output by the positive voltage charge pump circuit and a negative voltage output by the negative voltage charge pump circuit according to the control signal and the received clock signal. As known from the above description, the single-path controlled charge pump only needs one detection control circuit, i.e. only the voltage of the positive voltage charge pump is detected, and the adjustment of the positive voltage and the negative voltage output by the charge pump can be simultaneously realized, so that compared with the prior art, the circuit structure is simplified and the robustness of the circuit is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic circuits, and in particular to a single-path controlled charge pump. BACKGROUND

[0002] The charge pump is a kind of direct current DC-DC converter, which is usually used to generate a voltage higher than the power supply voltage or a negative output voltage, and has obvious advantages in cost and size due to its simple control circuit structure, and is widely used in various occasions. At present, a typical application of the charge pump is to provide a standard power supply voltage for an RS232 level conversion chip. In the RS232 application, in order to improve the reliability of the RS232 chip and adjust the driving capability of the charge pump in real time according to the load change, the charge pump needs to output two positive and negative voltages, and a control circuit is designed to adjust the output voltage.

[0003] The existing charge pump control circuit generally adjusts the output of the positive and negative voltages of the charge pump through two feedback loops, so that the control circuit has two independent detection loops, one of which is used to detect the positive voltage V POS , and the other of which is used to detect the negative voltage V NEG . However, two independent detection loops result in a complex circuit structure, and independent judgment thresholds need to be set, which makes the thresholds sensitive to process parameters and has low robustness. In addition, the comparator of the negative voltage detection loop has difficulty in circuit implementation, and requires more circuit modules, which makes the control circuit not suitable for low-power applications.

[0004] In summary, the existing control circuit of the charge pump has the technical problems of complex circuit structure, low robustness and unsuitable for low-power applications. SUMMARY

[0005] The present application aims to provide a single-path controlled charge pump to alleviate the technical problems of complex circuit structure, low robustness and unsuitable for low-power applications of the existing control circuit of the charge pump.

[0006] The present application provides a single-path controlled charge pump, comprising: a clock generation circuit, a detection control circuit, a positive voltage charge pump circuit and a negative voltage charge pump circuit.

[0007] The two ends of the clock generation circuit are connected with the first end and the second end of the detection control circuit respectively, the third end of the detection control circuit is connected with the first end of the positive voltage charge pump circuit, the fourth end of the detection control circuit is connected with the first end of the negative voltage charge pump circuit, and the second end of the positive voltage charge pump circuit is connected with the second end of the negative voltage charge pump circuit.

[0008] The clock generation circuit is configured to generate a clock signal and send the clock signal to the detection control circuit.

[0009] The detection control circuit is configured to detect a real-time positive voltage of the positive voltage charge pump circuit, generate a control signal by comparing the real-time positive voltage with a reference voltage, and adjust a positive voltage output by the positive voltage charge pump circuit and a negative voltage output by the negative voltage charge pump circuit according to the control signal and the received clock signal.

[0010] Further, the clock signal includes a first clock and a second clock, the second clock is generated by frequency division of the first clock; the detection control circuit adjusts the negative voltage output by the negative voltage charge pump circuit according to the control signal, the first clock and the second clock.

[0011] Further, the detection control circuit includes a positive voltage charge pump control circuit and a negative voltage charge pump control circuit.

[0012] The first end of the positive voltage charge pump control circuit is connected to the first end of the clock generation circuit, the second end of the positive voltage charge pump control circuit is connected to the positive voltage charge pump circuit, the third end of the positive voltage charge pump control circuit is connected to the first end of the negative voltage charge pump control circuit, and the fourth end of the positive voltage charge pump control circuit is grounded; the second end of the negative voltage charge pump control circuit is connected to the first end of the clock generation circuit, the third end of the negative voltage charge pump control circuit is connected to the second end of the clock generation circuit, and the fourth end of the negative voltage charge pump control circuit is connected to the first end of the negative voltage charge pump circuit.

[0013] The positive voltage charge pump control circuit is configured to detect a real-time positive voltage of the positive voltage charge pump circuit, generate the control signal by comparing the real-time positive voltage with the reference voltage, and adjust the positive voltage output by the positive voltage charge pump circuit according to the control signal and the received first clock.

[0014] The negative voltage charge pump control circuit is configured to receive the first clock, the second clock and the control signal, and adjust the negative voltage output by the negative voltage charge pump circuit according to the first clock, the second clock and the control signal.

[0015] Further, the positive voltage charge pump control circuit includes a first resistor, a second resistor, a third resistor, a first switch, a comparator, a first logic unit and a reference voltage generation circuit.

[0016] The first end of the first resistor is connected with the positive voltage charge pump circuit, the second end of the first resistor is connected with the first end of the second resistor and the first input end of the comparator respectively, the second end of the second resistor is connected with the first end of the third resistor, and the second end of the third resistor is grounded.

[0017] The second input end of the comparator is connected with the reference voltage generating circuit, and the output end of the comparator is connected with the passive end of the first switch and the first input end of the first logic unit respectively.

[0018] The second input end of the first logic unit is connected with the first end of the clock generating circuit.

[0019] The common end of the first switch is connected with the first end of the third resistor, and the active end of the first switch is connected with the second end of the third resistor.

[0020] Further, the negative voltage charge pump control circuit comprises a flip-flop, a multiplexer and a second logic unit.

[0021] The first input end and the second input end of the flip-flop are connected with the third end of the positive voltage charge pump control circuit, the third input end of the flip-flop is connected with the second end of the clock generating circuit, and the output end of the flip-flop is connected with the first input end of the multiplexer.

[0022] The second input end of the multiplexer is connected with the second end of the clock generating circuit, the third input end of the multiplexer is connected with the first end of the clock generating circuit, and the output end of the multiplexer is connected with the input end of the second logic unit.

[0023] Further, the positive voltage charge pump circuit comprises a second switch, a third switch, a fourth switch, a fifth switch, a first capacitor and a second capacitor.

[0024] The active end of the second switch is connected with a power supply, and the common end of the second switch is connected with the first end of the first capacitor.

[0025] The active end of the third switch is connected with the third end of the detection control circuit and the first end of the second capacitor respectively, and the common end of the third switch is connected with the first end of the first capacitor.

[0026] The active end of the fourth switch is connected with the second end of the first capacitor, and the common end of the fourth switch is grounded.

[0027] The active end of the fifth switch is connected with the second end of the first capacitor, and the common end of the fifth switch is connected with the power supply.

[0028] The second end of the second capacitor is grounded.

[0029] Further, the negative voltage charge pump circuit comprises a sixth switch, a seventh switch, an eighth switch, a ninth switch, a third capacitor and a fourth capacitor.

[0030] The active end of the sixth switch is grounded, and the common end of the sixth switch is connected with the first end of the third capacitor.

[0031] The active end of the seventh switch is connected with the first end of the fourth capacitor, and the common end of the seventh switch is connected with the first end of the third capacitor.

[0032] The active end of the eighth switch is connected with the second end of the third capacitor, and the common end of the eighth switch is connected with the first end of the second capacitor.

[0033] The active end of the ninth switch is connected with the second end of the third capacitor, and the common end of the ninth switch is grounded.

[0034] The second end of the fourth capacitor is grounded.

[0035] Further, the reference voltage generating circuit comprises an operational amplifier, a fourth resistor, a fifth resistor and a compensation current generating circuit.

[0036] The first input end of the operational amplifier is connected with a reference voltage, the second input end of the operational amplifier is connected with the first end of the fifth resistor, and the output end of the operational amplifier is connected with the first end of the fourth resistor.

[0037] The second end of the fourth resistor is connected with the first end of the fifth resistor and the first end of the compensation current generating circuit respectively.

[0038] The second end of the fifth resistor is connected with a reference ground and the second end of the compensation current generating circuit respectively.

[0039] Further, the compensation current generating circuit comprises a sixth resistor, a seventh resistor, an eighth resistor, a first field effect transistor and a second field effect transistor.

[0040] The first end of the sixth resistor is connected with a power supply, and the second end of the sixth resistor is connected with the gate and the drain of the first field effect transistor respectively.

[0041] The source of the first field effect transistor is connected with the first end of the seventh resistor.

[0042] The second end of the seventh resistor is grounded.

[0043] The drain of the second field effect tube is connected with the second end of the fourth resistor, the gate of the second field effect tube is connected with the gate of the first field effect tube, and the source of the second field effect tube is connected with the first end of the eighth resistor.

[0044] The second end of the eighth resistor is grounded.

[0045] Further, the clock generating circuit comprises a crystal oscillator and a frequency divider.

[0046] The first end of the crystal oscillator is connected with the first end of the detection control circuit and the first end of the frequency divider respectively.

[0047] The second end of the frequency divider is connected with the second end of the detection control circuit.

[0048] In the embodiment of the present application, a single-path controlled charge pump is provided, comprising a clock generating circuit, a detection control circuit, a positive voltage charge pump circuit and a negative voltage charge pump circuit; the two ends of the clock generating circuit are connected with the first end and the second end of the detection control circuit respectively, the third end of the detection control circuit is connected with the first end of the positive voltage charge pump circuit, the fourth end of the detection control circuit is connected with the first end of the negative voltage charge pump circuit, and the second end of the positive voltage charge pump circuit is connected with the second end of the negative voltage charge pump circuit; the clock generating circuit is used for generating a clock signal and sending the clock signal to the detection control circuit; the detection control circuit is used for detecting a real-time positive voltage of the positive voltage charge pump circuit, generating a control signal by comparing the real-time positive voltage with a reference voltage, and then adjusting the positive voltage output by the positive voltage charge pump circuit and the negative voltage output by the negative voltage charge pump circuit according to the control signal and the received clock signal. As can be seen from the above description, the single-path controlled charge pump of the present application only needs one feedback loop (i.e. the detection control circuit), i.e. only the voltage of the positive voltage charge pump is detected, and the adjustment of the positive voltage and the negative voltage output by the charge pump can be realized at the same time. Compared with the prior art, the circuit structure is simplified, the number of components and the cost are reduced, and the technical problems of the prior art, such as complex circuit structure, low robustness and being not conducive to low-power application, are effectively solved. BRIEF DESCRIPTION OF DRAWINGS

[0049] In order to more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the drawings needed in the specific embodiments or the prior art description will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0050] Figure 1 A structural block diagram of a single-path controlled charge pump provided in the embodiment of the present application is shown in the figure.

[0051] Figure 2 A structure block diagram of a charge pump in the prior art;

[0052] Figure 3 A structure block diagram of a detection control circuit provided by the embodiment of the present application;

[0053] Figure 4 A circuit structure schematic diagram of a positive voltage charge pump control circuit provided by the embodiment of the present application;

[0054] Figure 5 A circuit structure schematic diagram of a negative voltage charge pump control circuit provided by the embodiment of the present application;

[0055] Figure 6 A circuit structure schematic diagram of a positive voltage charge pump circuit provided by the embodiment of the present application;

[0056] Figure 7 A circuit structure schematic diagram of a negative voltage charge pump circuit provided by the embodiment of the present application;

[0057] Figure 8 A circuit structure schematic diagram of a reference voltage generation circuit provided by the embodiment of the present application;

[0058] Figure 9 A circuit structure schematic diagram of a compensation current generation circuit provided by the embodiment of the present application;

[0059] Figure 10 A circuit structure schematic diagram of a clock generation circuit provided by the embodiment of the present application.

[0060] Fig. 11 is a clock generation circuit; Fig. 12 is a detection control circuit; Fig. 13 is a positive voltage charge pump circuit; Fig. 14 is a negative voltage charge pump circuit; Fig. 121 is a positive voltage charge pump control circuit; Fig. 122 is a negative voltage charge pump control circuit; Fig. 1211 is a reference voltage generation circuit; and Fig. 12111 is a compensation current generation circuit. DETAILED DESCRIPTION

[0061] The technical solutions of the present application will be described clearly and completely below in conjunction with the embodiments. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present application.

[0062] For the convenience of understanding the present embodiment, first, a single-path controlled charge pump disclosed by the embodiment of the present application will be introduced in detail.

[0063] Figure 1is a structure block diagram of a single-path controlled charge pump provided by an embodiment of the present application, as shown in Figure 1 The circuit comprises a clock generation circuit 11, a detection control circuit 12, a positive voltage charge pump circuit 13, and a negative voltage charge pump circuit 14.

[0064] The clock generation circuit 11 is connected to the first end and the second end of the detection control circuit 12 respectively, the third end of the detection control circuit 12 is connected to the first end of the positive voltage charge pump circuit 13, the fourth end of the detection control circuit 12 is connected to the first end of the negative voltage charge pump circuit 14, and the second end of the positive voltage charge pump circuit 13 is connected to the second end of the negative voltage charge pump circuit 14.

[0065] The clock generation circuit 11 is configured to generate a clock signal and send the clock signal to the detection control circuit.

[0066] The detection control circuit 12 is configured to detect a real-time positive voltage of the positive voltage charge pump circuit, generate a control signal by comparing the real-time positive voltage with a reference voltage, and adjust the positive voltage output by the positive voltage charge pump circuit and the negative voltage output by the negative voltage charge pump circuit according to the control signal and the received clock signal.

[0067] In the embodiment of the present application, if not otherwise specified, for a device connected at left and right ends, the first end refers to the left end of the device, and the second end refers to the right end of the device, and for a device connected at upper and lower ends, the first end refers to the upper end of the device, and the second end refers to the lower end of the device.

[0068] Specifically, the control circuit of the existing charge pump generally adjusts the output of the positive voltage and the negative voltage of the charge pump through two detection loops, as shown in Figure 2 When the two independent detection loops work: loop 1 detects the positive voltage V POS through the positive voltage charge pump detection circuit, and loop 2 detects the negative voltage V NEG through the negative voltage charge pump detection circuit. At this time, the two independent detection loops need to set mutually independent judgment thresholds V TH1 and V TH2 . However, the threshold is sensitive to process parameters, and in the case of a large number of detection loops, the robustness of the overall control circuit will be affected to a certain extent. Secondly, the two detection loops need more devices, which increases the cost of the circuit and is not conducive to low-power applications.

[0069] Therefore, the embodiment provides a single-path controlled charge pump, which comprises a clock generation circuit 11, a detection control circuit 12, a positive voltage charge pump circuit 13, and a negative voltage charge pump circuit 14, and the specific circuit connection structure is as shown in Figure 1The clock generation circuit 11 generates a clock signal and sends the clock signal to the detection control circuit 12 connected subsequently in normal operation. Further, the detection control circuit 12 detects the real-time positive voltage V POS fed back by the positive voltage charge pump circuit 13 in real time, compares the real-time positive voltage V POS with a threshold reference voltage V REF , and generates a control signal for the positive voltage charge pump circuit 13 and the negative voltage charge pump circuit 14. Finally, the detection control circuit 12 adjusts the positive voltage output by the positive voltage charge pump circuit 13 and the negative voltage output by the negative voltage charge pump circuit 14 in combination with the clock signal and the control signal.

[0070] In an embodiment of the present application, a single-path controlled charge pump is provided, comprising a clock generation circuit 11, a detection control circuit 12, a positive voltage charge pump circuit 13, and a negative voltage charge pump circuit 14. The clock generation circuit 11 is connected to the first end and the second end of the detection control circuit 12, the third end of the detection control circuit 12 is connected to the first end of the positive voltage charge pump circuit 13, the fourth end of the detection control circuit 12 is connected to the first end of the negative voltage charge pump circuit 14, and the second end of the positive voltage charge pump circuit 13 is connected to the second end of the negative voltage charge pump circuit 14. The clock generation circuit 11 is configured to generate a clock signal and send the clock signal to the detection control circuit 12. The detection control circuit 12 is configured to detect the real-time positive voltage of the positive voltage charge pump circuit 13, compare the real-time positive voltage with a reference voltage, generate a control signal, and adjust the positive voltage output by the positive voltage charge pump circuit 13 and the negative voltage output by the negative voltage charge pump circuit 14 according to the control signal and the received clock signal. As described above, the single-path controlled charge pump of the present application only needs one feedback loop (i.e. the detection control circuit), i.e. only the voltage of the positive voltage charge pump is detected, and the adjustment of the positive voltage and the negative voltage output by the charge pump can be realized at the same time. Compared with the prior art, the circuit structure is simplified, the number of components and the cost are reduced, and the technical problems of complex circuit structure, low robustness, and being not conducive to low-power applications of the control circuit of the existing charge pump are effectively alleviated.

[0071] The above describes the overall structure of the single-path controlled charge pump, and the specific circuit structure and working principle of the single-path controlled charge pump are described in detail below.

[0072] In an optional embodiment of the present application, the clock signal includes a first clock and a second clock, the second clock is generated by frequency division of the first clock, and the detection control circuit 12 adjusts the negative voltage output by the negative voltage charge pump circuit 14 according to the control signal, the first clock, and the second clock.

[0073] Specifically, the clock generating circuit 11 generates the first clock CLK1 and the second clock CLK2 by dividing the first clock CLK1, and then sends the first clock CLK1 and the second clock CLK2 to the subsequent detection control circuit 12, wherein CLK2 = 1 / N*CLK1, N is a division coefficient, which can be selected as needed in actual application. Further, the detection control circuit 12 detects the real-time positive pressure V POS fed back by the positive pressure charge pump circuit 13 in real time, and generates a control signal for the positive pressure charge pump circuit 13 and the negative pressure charge pump circuit 14 by comparing the real-time positive pressure V POS with the threshold reference voltage V REF . Finally, the detection control circuit 12 adjusts the positive pressure output by the positive pressure charge pump circuit 13 in combination with the first clock CLK1 and the control signal. In addition, the detection control circuit 12 adjusts the negative pressure output by the negative pressure charge pump circuit 14 in combination with the first clock CLK1, the second clock CLK2 and the control signal.

[0074] In an optional embodiment of the present application, with reference Figure 3 to the accompanying drawings, the detection control circuit 12 comprises a positive pressure charge pump control circuit 121 and a negative pressure charge pump control circuit 122.

[0075] The first end of the positive pressure charge pump control circuit 121 is connected to the first end of the clock generating circuit 11, the second end of the positive pressure charge pump control circuit 121 is connected to the positive pressure charge pump circuit 13, the third end of the positive pressure charge pump control circuit 121 is connected to the first end of the negative pressure charge pump control circuit 122, and the fourth end of the positive pressure charge pump control circuit 121 is grounded. The second end of the negative pressure charge pump control circuit 122 is connected to the first end of the clock generating circuit 11, the third end of the negative pressure charge pump control circuit 122 is connected to the second end of the clock generating circuit 11, and the fourth end of the negative pressure charge pump control circuit 122 is connected to the first end of the negative pressure charge pump circuit 14.

[0076] The positive pressure charge pump control circuit 121 is configured to detect the real-time positive pressure of the positive pressure charge pump circuit, and generate a control signal by comparing the real-time positive pressure with a reference voltage, and then adjust the positive pressure output by the positive pressure charge pump circuit 13 according to the control signal and the received first clock.

[0077] The negative pressure charge pump control circuit 122 is configured to receive the first clock, the second clock and the control signal, and adjust the negative pressure output by the negative pressure charge pump circuit 14 according to the first clock, the second clock and the control signal.

[0078] Specifically, the positive pressure charge pump control circuit 121 and the negative pressure charge pump control circuit 122 are respectively configured to adjust the positive pressure output by the positive pressure charge pump circuit 13 and the negative pressure output by the negative pressure charge pump circuit 14.

[0079] In normal operation, with referenceFigure 3 The positive voltage charge pump control circuit 121 monitors the real-time positive voltage V POS fed back by the positive voltage charge pump circuit 13 in real time, and compares the real-time positive voltage V POS with the reference voltage V REF generated by itself to obtain a control signal CTRL+. POS Furthermore, the control signal CTRL+ and the received first clock CLK1 are used to control the opening and closing of switches in the positive voltage charge pump circuit 13, and the output positive voltage is adjusted by adjusting the duty cycle. The negative voltage charge pump control circuit 122 receives the control signal CTRL+ generated by the positive voltage charge pump control circuit 121 and the first clock CLK1 and the second clock CLK2 generated by the clock generation circuit 11, and controls the opening and closing of switches in the negative voltage charge pump circuit 14 according to the control signal CTRL+, the first clock CLK1 and the second clock CLK2, and the output negative voltage is adjusted by switching the operating frequency.

[0080] In an optional embodiment of the present application, the reference Figure 4 The positive voltage charge pump control circuit 121 comprises a first resistor R1, a second resistor R2, a third resistor R3, a first switch S1, a comparator COMP, a first logic unit LOGIC1 and a reference voltage generation circuit 1211.

[0081] The first end of the first resistor R1 is connected to the positive voltage charge pump circuit 13, the second end of the first resistor R1 is connected to the first end of the second resistor R2 and the first input end of the comparator COMP respectively, the second end of the second resistor R2 is connected to the first end of the third resistor R3, and the second end of the third resistor R3 is grounded.

[0082] The second input end of the comparator COMP is connected to the reference voltage generation circuit 1211, and the output end of the comparator COMP is connected to the passive end of the first switch S1 and the first input end of the first logic unit LOGIC1 respectively.

[0083] The second input end of the first logic unit LOGIC1 is connected to the first end of the clock generation circuit 11.

[0084] The common end of the first switch S1 is connected to the first end of the third resistor R3, and the active end of the first switch S1 is connected to the second end of the third resistor R3.

[0085] During normal operation, the positive voltage charge pump control circuit 121 samples the positive voltage V POS output by the positive voltage charge pump circuit 13 through the first resistor R1 and the second resistor R2, and then compares the sampled voltage V FB with the reference voltage V REFThe control signal CTRL+ is generated by comparing the sampling voltage V POS Adjustment of the charging state. It is worth noting that, in order to reduce the number of switching times when the positive voltage charge pump is charging, and to reduce the false triggering caused by voltage noise and glitches, the positive voltage charge pump control circuit 121 of the embodiment adds a third resistor R3 and a first switch S1 to generate a hysteresis for the judgment threshold. In specific implementation, the control signal CTRL+ output by the comparator COMP can control the on-off of the first switch S1 at the same time, so as to realize the series or bypass of the third resistor R3 in the sampling circuit, and to realize the adjustment of the sampling voltage V POS FB Adjustment of the voltage value, which is equivalent to changing the threshold voltage. That is, by series or bypassing the third resistor R3 in the sampling circuit, there is a difference between the threshold voltages used to generate the control signal in the two cases, and the difference can be adjusted by changing the resistance value of the third resistor R3.

[0086] In an optional embodiment of the present application, the reference Figure 5 The negative voltage charge pump control circuit 122 comprises a flip-flop D, a multiplexer MUX and a second logic unit LOGIC2.

[0087] The first input end and the second input end of the flip-flop D are connected with the third end of the positive voltage charge pump control circuit 121, the third input end of the flip-flop D is connected with the second end of the clock generation circuit 11, and the output end of the flip-flop D is connected with the first input end of the multiplexer MUX.

[0088] The second input end of the multiplexer MUX is connected with the second end of the clock generation circuit 11, the third input end of the multiplexer MUX is connected with the first end of the clock generation circuit 11, and the output end of the multiplexer MUX is connected with the input end of the second logic unit LOGIC2.

[0089] In normal operation, the negative voltage charge pump control circuit 122 follows the control of the control signal CTRL+ generated by the positive voltage charge pump control circuit 121 to realize the switching of the first clock CLK1 and the second clock CLK2, so as to realize the adjustment of the negative voltage V NEG output by the negative voltage charge pump by changing the working mode. In specific implementation, when the control signal CTRL+ generated by the positive voltage charge pump control circuit 121 is high (i.e. V FB > V REF ​), the control signal CTRL+ sets CTRL- to 1 through the flip-flop D, so as to switch the clock frequency output by the negative voltage charge pump control circuit 122 to the second clock CLK2, at this time, the charge pump is in low power consumption mode; when the control signal CTRL+ generated by the positive voltage charge pump control circuit 121 is low (i.e. V FB V REF ), the control signal CTRL+ sets CTRL- to 0 through the flip-flop D, at this time, the clock frequency output by the negative voltage charge pump control circuit 122 is switched to the first clock CLK1. The negative voltage charge pump control circuit 122 changes the output clock to change the frequency output by the second logic unit LOGIC2, and then changes the switching frequency of the switch in the subsequent connected negative voltage charge pump circuit 14, so as to realize the adjustment of the negative voltage V NEG output by the negative voltage charge pump circuit 14.

[0090] In an optional embodiment of the present application, referring to Figure 6 The positive voltage charge pump circuit 13 comprises: a second switch S2, a third switch S3, a fourth switch S4, a fifth switch S5, a first capacitor C1 and a second capacitor C2.

[0091] The active end of the second switch S2 is connected with the power supply VDD, and the common end of the second switch S2 is connected with the first end of the first capacitor C1.

[0092] The active end of the third switch S3 is respectively connected with the third end of the detection control circuit 12 and the first end of the second capacitor C2, and the common end of the third switch S3 is connected with the first end of the first capacitor C1.

[0093] The active end of the fourth switch S4 is connected with the second end of the first capacitor C1, and the common end of the fourth switch S4 is grounded.

[0094] The active end of the fifth switch S5 is connected with the second end of the first capacitor C1, and the common end of the fifth switch S5 is connected with the power supply VDD.

[0095] The second end of the second capacitor C2 is grounded.

[0096] Specifically, in normal operation, the closing state of the second switch S2, the third switch S3, the fourth switch S4 and the fifth switch S5 inside the circuit is controlled by the detection control circuit 12, specifically the control logic output by the first logic unit LOGIC1 of the positive voltage charge pump control circuit 121. In specific implementation, in the first half cycle of the clock, the second switch S2 and the fourth switch S4 are closed, and the third switch S3 and the fifth switch S5 are open, and the positive voltage charge pump is in a closed state. At this time, the terminal voltage of the first capacitor C1 is the power supply voltage VDD. In the second half cycle of the clock, the third switch S3 and the fifth switch S5 are closed, and the second switch S2 and the fourth switch S4 are open, and the positive voltage charge pump is in a working state. At this time, the voltage across the first capacitor C1 is lifted to the power supply voltage VDD and twice the power supply voltage (2VDD), and the charge is stored on the second capacitor C2, thereby generating a positive voltage V POS .

[0097] In an optional embodiment of the present application, with reference to Figure 7 , the negative voltage charge pump circuit 14 comprises: a sixth switch S6, a seventh switch S7, an eighth switch S8, a ninth switch S9, a third capacitor C3 and a fourth capacitor C4;

[0098] The active end of the sixth switch S6 is grounded, and the common end of the sixth switch S6 is connected with the first end of the third capacitor C3;

[0099] The active end of the seventh switch S7 is connected with the first end of the fourth capacitor C4, and the common end of the seventh switch S7 is connected with the first end of the third capacitor C3;

[0100] The active end of the eighth switch S8 is connected with the second end of the third capacitor C3, and the common end of the eighth switch S8 is connected with the first end of the second capacitor C2;

[0101] The active end of the ninth switch S9 is connected with the second end of the third capacitor C3, and the common end of the ninth switch S9 is grounded;

[0102] The second end of the fourth capacitor C4 is grounded.

[0103] In normal operation, the closing state of the sixth switch S6, the seventh switch S7, the eighth switch S8 and the ninth switch S9 inside the circuit is controlled by the control logic output by the second logic unit LOGIC2 in the negative voltage charge pump control circuit 122. In specific implementation, in the first half cycle of the clock, the sixth switch S6 and the eighth switch S8 are closed, and the seventh switch S7 and the ninth switch S9 are open, and the negative voltage charge pump is in a closed state. At this time, the terminal voltage of the third capacitor C3 is the positive voltage V POSDuring the latter half of the clock cycle, switches S7 and S9 are closed, while switches S6 and S8 are open, activating the negative charge pump. At this time, the voltage across capacitor C3 is raised to a negative voltage V. NEG And store the charge on the fourth capacitor C4.

[0104] In an alternative embodiment of the present invention, reference is made to... Figure 8 The reference voltage generation circuit 1211 includes: an operational amplifier AMP, a fourth resistor R4, a fifth resistor R5, and a compensation current generation circuit 12111.

[0105] The first input terminal of the operational amplifier AMP is connected to the reference voltage V0, the second input terminal of the operational amplifier AMP is connected to the first terminal of the fifth resistor R5, and the output terminal of the operational amplifier AMP is connected to the first terminal of the fourth resistor R4.

[0106] The second end of the fourth resistor R4 is connected to the first end of the fifth resistor R5 and the first end of the compensation current generating circuit 12111.

[0107] The second end of the fifth resistor R5 is connected to the reference ground and the second end of the compensation current generating circuit 12111, respectively.

[0108] During normal operation, the compensation current I generated by the compensation current generating circuit 12111 in the circuit... b It can adapt to changes in power supply voltage precisely by altering the compensation current I. b The magnitude of the current is used to control the reference voltage V. REF This generates the voltage division ratio in the branch, thereby achieving the control of the reference voltage V. REF Voltage regulation, specifically, adjusting the threshold voltage of the charge pump. This is due to the compensation current I... b It can adapt to changes in power supply voltage, equivalent to a reference voltage V. REF The voltage value can adaptively change with the power supply voltage. Specifically, when the power supply voltage VDD decreases, the reference voltage V... REF The voltage value also decreases accordingly, thus ensuring that the threshold voltage of the comparator COMP in the positive voltage charge pump control circuit 121 is lower than twice VDD, ensuring that the charge pump can operate in low-power mode; when the power supply voltage VDD increases, the reference voltage V REF The voltage value also increases accordingly, thereby improving the driving capability of the charge pump.

[0109] In an alternative embodiment of the present invention, reference is made to... Figure 9 The compensation current generating circuit 12111 includes: a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first field-effect transistor NM1, and a second field-effect transistor NM2.

[0110] A first end of the sixth resistor R6 is connected with the power supply VDD, and a second end of the sixth resistor R6 is connected with the gate and the drain of the first field effect transistor NM1 respectively;

[0111] The source of the first field effect transistor NM1 is connected with a first end of the seventh resistor R7;

[0112] A second end of the seventh resistor R7 is grounded;

[0113] The drain of the second field effect transistor NM2 is connected with a second end of the fourth resistor R4, the gate of the second field effect transistor NM2 is connected with the gate of the first field effect transistor NM1, and the source of the second field effect transistor NM2 is connected with a first end of the eighth resistor R8;

[0114] A second end of the eighth resistor R8 is grounded.

[0115] Specifically, in the embodiment, the first field effect transistor NM1 and the second field effect transistor NM2 are MOS transistors, and the seventh resistor R7 and the eighth resistor R8 have the same resistance value.

[0116] In normal operation, the compensation current generating circuit 12111 is mainly used for generating the compensation current I b which can be self-adaptively changed with the power supply voltage VDD. REF Thus, the follow-up adjustment of the reference voltage V b is realized. In specific implementation, when the power supply voltage VDD is small, the gate voltage of the MOS transistor NM2 is small, at this time, the MOS transistors NM1 and NM2 both work in the saturation region and can be equivalent to the mirror compensation current. When the power supply voltage VDD is high, the gate voltage of the MOS transistor NM2 is raised, but the drain voltage of the MOS transistor NM1 is kept near the reference voltage V0 under the clamping action of the operational amplifier AMP because the drain of the MOS transistor NM1 is connected with the inverting input end (the second end of the sixth resistor R6) of the operational amplifier AMP. Therefore, the MOS transistor NM1 works in the linear region, and with the further rise of VDD, the MOS transistor NM1 enters the deep linear region, so that the compensation current I b approaches the maximum value V0 / R7. In addition, it can be known from the circuit structure that the resistance values of the sixth resistor R6 and the seventh resistor R7 can also be changed to change the slope and the turning point of the compensation current I

[0117] In an optional embodiment of the present application, the reference Figure 10 , the clock generating circuit 11 comprises a crystal oscillator OSC and a frequency divider DIV;

[0118] A first end of the crystal oscillator OSC is connected with a first end of the detection control circuit 12 and a first end of the frequency divider DIV respectively;

[0119] A second end of the frequency divider DIV is connected with a second end of the detection control circuit 12.

[0120] Specifically, the clock generating circuit 11 in the embodiment includes a crystal oscillator OSC and a frequency divider DIV, which are used to generate the first clock CLK1 and the second clock CLK2 required by the charge pump.

[0121] In summary, in combination with the introduction of the circuit structure and principle of the charge pump, the control circuit of the present application can simultaneously realize the regulation of the positive voltage and the negative voltage of the charge pump output through only one feedback loop (i.e., the detection control circuit 12), effectively simplifying the circuit structure while reducing the number of components and cost. Secondly, by introducing the compensation current generating circuit to generate a compensation current I b that can adaptively change with the power supply voltage, the follow-up regulation of the reference voltage V REF is realized, thereby increasing the robustness of the charge pump under different power supply voltages, and through single-path control, the duty cycle of the switches in the positive voltage charge pump can be quickly adjusted, the real-time voltage value of the positive voltage of the charge pump is controlled, damage to the subsequent chip caused by excessively high voltage is prevented, and the power supply reliability of the charge pump is effectively improved. Finally, since the charge pump has two control modes, when full-load working, the charge pump works at the first clock CLK1 to provide sufficient load capacity; when light-load working, the charge pump works at the second clock CLK2, and the positive voltage charge pump is closed and the negative voltage charge pump is opened to enter the low-power consumption mode, thereby reducing the switching loss and improving the efficiency.

[0122] The computer program product of the single-path controlled charge pump provided by the embodiment of the present application includes a computer readable storage medium storing program codes, and the program codes include instructions for executing the method described in the foregoing method embodiment. For details, refer to the method embodiment, which will not be repeated here.

[0123] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the above-described system and device can refer to the corresponding process in the foregoing method embodiment, which will not be repeated here.

[0124] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only schematic. For example, the division of the units is only a logical function division, and there can be another division manner in actual implementation. For example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some communication interfaces, devices or units, and can be electrical, mechanical or other forms.

[0125] For example, the flow diagrams and the block diagrams in the drawings are presented to provide illustrations of the architectures, functions, and operations of possible implementations of apparatuses, methods, and computer program products according to various embodiments of the present application. In this regard, each block in the flow diagrams or block diagrams can represent a module, a segment, or a portion of code, which comprises one or more executable instructions for implementing the specified logical functions. It should also be noted that in some alternative implementations, the functions noted in the blocks can occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and / or flow diagrams, and combinations of blocks in the block diagrams and / or flow diagrams, can be implemented by special purpose hardware-based systems that perform the specified functions or acts or combinations of special purpose hardware and computer instructions.

[0126] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, i.e., may be located in one place, or may be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purposes of the embodiments.

[0127] In addition, the functional units in the embodiments provided in the present application can be integrated in one processing unit, or each unit can be physically present separately, or two or more units can be integrated in one unit.

[0128] The functions, if realized in the form of software function units and sold or used as independent products, can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application essentially or the parts of the prior art that make contributions or parts of the technical solutions can be embodied in the form of software products. The computer software product is stored in a storage medium and includes a number of instructions for causing an electronic device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0129] It should be noted that similar reference numbers and letters refer to similar items in the following drawings, and therefore, once an item is defined in one drawing, it need not be further defined and explained in subsequent drawings. Furthermore, the terms "first", "second", "third", etc. are used only to distinguish descriptions, and cannot be understood as indicating or implying relative importance. Finally, it should be noted that the above-described embodiments are only specific embodiments of the present application, which are used to illustrate the technical solutions of the present application, and are not limitations thereof. Although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can make modifications or easily think of changes to the technical solutions described in the foregoing embodiments, or make equivalent replacements to some of the technical features, within the scope of the technology disclosed by the present application. These modifications, changes or replacements do not cause the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application. All should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A single-channel controlled charge pump, characterized in that, include: Clock generation circuit, detection and control circuit, positive voltage charge pump circuit and negative voltage charge pump circuit; The two ends of the clock generating circuit are respectively connected to the first and second ends of the detection and control circuit, the third end of the detection and control circuit is connected to the first end of the positive voltage charge pump circuit, the fourth end of the detection and control circuit is connected to the first end of the negative voltage charge pump circuit, and the second end of the positive voltage charge pump circuit is connected to the second end of the negative voltage charge pump circuit. The clock generation circuit is used to generate a clock signal and send the clock signal to the detection and control circuit; the clock signal includes a first clock and a second clock generated by dividing the first clock. The detection and control circuit is used to detect the real-time positive voltage of the positive voltage charge pump circuit, and generate a control signal by comparing the real-time positive voltage with a reference voltage, and then adjust the positive voltage output by the positive voltage charge pump circuit and the negative voltage output by the negative voltage charge pump circuit according to the control signal and the received clock signal. The detection and control circuit includes: a positive voltage charge pump control circuit and a negative voltage charge pump control circuit; The first terminal of the positive charge pump control circuit is connected to the first terminal of the clock generation circuit; the second terminal of the positive charge pump control circuit is connected to the positive charge pump circuit; the third terminal of the positive charge pump control circuit is connected to the first terminal of the negative charge pump control circuit; and the fourth terminal of the positive charge pump control circuit is grounded. Similarly, the second terminal of the negative charge pump control circuit is connected to the first terminal of the clock generation circuit; the third terminal of the negative charge pump control circuit is connected to the second terminal of the clock generation circuit; and the fourth terminal of the negative charge pump control circuit is connected to the first terminal of the negative charge pump circuit. The positive pressure charge pump control circuit is used to detect the real-time positive pressure of the positive pressure charge pump circuit, and generate the control signal by comparing the real-time positive pressure with the reference voltage, and then adjust the positive pressure output by the positive pressure charge pump circuit according to the control signal and the received first clock. The negative pressure charge pump control circuit is used to receive the first clock, the second clock, and the control signal, and adjust the negative pressure output by the negative pressure charge pump circuit according to the first clock, the second clock, and the control signal.

2. The single-channel controlled charge pump according to claim 1, characterized in that, The positive charge pump control circuit includes: a first resistor, a second resistor, a third resistor, a first switch, a comparator, a first logic unit, and a reference voltage generation circuit; The first end of the first resistor is connected to the positive charge pump circuit, the second end of the first resistor is connected to the first end of the second resistor and the first input end of the comparator, the second end of the second resistor is connected to the first end of the third resistor, and the second end of the third resistor is grounded. The second input terminal of the comparator is connected to the reference voltage generating circuit, and the output terminal of the comparator is connected to the passive terminal of the first switch and the first input terminal of the first logic unit, respectively. The second input terminal of the first logic unit is connected to the first terminal of the clock generation circuit; The common terminal of the first switch is connected to the first terminal of the third resistor, and the active terminal of the first switch is connected to the second terminal of the third resistor.

3. The single-channel controlled charge pump according to claim 1, characterized in that, The negative pressure charge pump control circuit includes: a trigger, a multiplexer, and a second logic unit; The first and second input terminals of the flip-flop are both connected to the third terminal of the positive charge pump control circuit, the third input terminal of the flip-flop is connected to the second terminal of the clock generation circuit, and the output terminal of the flip-flop is connected to the first input terminal of the multiplexer. The second input terminal of the multiplexer is connected to the second terminal of the clock generation circuit, the third input terminal of the multiplexer is connected to the first terminal of the clock generation circuit, and the output terminal of the multiplexer is connected to the input terminal of the second logic unit.

4. The single-channel controlled charge pump according to claim 1, characterized in that, The positive charge pump circuit includes: a second switch, a third switch, a fourth switch, a fifth switch, a first capacitor, and a second capacitor; The active terminal of the second switch is connected to the power supply, and the common terminal of the second switch is connected to the first terminal of the first capacitor. The active terminal of the third switch is connected to the third terminal of the detection and control circuit and the first terminal of the second capacitor, respectively, and the common terminal of the third switch is connected to the first terminal of the first capacitor. The active terminal of the fourth switch is connected to the second terminal of the first capacitor, and the common terminal of the fourth switch is grounded. The active terminal of the fifth switch is connected to the second terminal of the first capacitor, and the common terminal of the fifth switch is connected to the power supply. The second terminal of the second capacitor is grounded.

5. The single-channel controlled charge pump according to claim 4, characterized in that, The negative pressure charge pump circuit includes: a sixth switch, a seventh switch, an eighth switch, a ninth switch, a third capacitor, and a fourth capacitor; The active terminal of the sixth switch is grounded, and the common terminal of the sixth switch is connected to the first terminal of the third capacitor. The active terminal of the seventh switch is connected to the first terminal of the fourth capacitor, and the common terminal of the seventh switch is connected to the first terminal of the third capacitor. The active terminal of the eighth switch is connected to the second terminal of the third capacitor, and the common terminal of the eighth switch is connected to the first terminal of the second capacitor. The active terminal of the ninth switch is connected to the second terminal of the third capacitor, and the common terminal of the ninth switch is grounded. The second terminal of the fourth capacitor is grounded.

6. The single-channel controlled charge pump according to claim 2, characterized in that, The reference voltage generating circuit includes: an operational amplifier, a fourth resistor, a fifth resistor, and a compensation current generating circuit; The first input terminal of the operational amplifier is connected to the reference voltage, the second input terminal of the operational amplifier is connected to the first terminal of the fifth resistor, and the output terminal of the operational amplifier is connected to the first terminal of the fourth resistor. The second end of the fourth resistor is connected to the first end of the fifth resistor and the first end of the compensation current generating circuit, respectively. The second end of the fifth resistor is connected to the reference ground and the second end of the compensation current generating circuit, respectively.

7. The single-channel controlled charge pump according to claim 6, characterized in that, The compensation current generating circuit includes: a sixth resistor, a seventh resistor, an eighth resistor, a first field-effect transistor, and a second field-effect transistor; The first end of the sixth resistor is connected to the power supply, and the second end of the sixth resistor is connected to the gate and drain of the first field-effect transistor, respectively. The source of the first field-effect transistor is connected to the first terminal of the seventh resistor; The second terminal of the seventh resistor is grounded; The drain of the second field-effect transistor is connected to the second end of the fourth resistor, the gate of the second field-effect transistor is connected to the gate of the first field-effect transistor, and the source of the second field-effect transistor is connected to the first end of the eighth resistor. The second terminal of the eighth resistor is grounded.

8. The single-channel controlled charge pump according to claim 1, characterized in that, The clock generation circuit includes: a crystal oscillator and a frequency divider; The first terminal of the crystal oscillator is connected to the first terminal of the detection and control circuit and the first terminal of the frequency divider, respectively. The second terminal of the frequency divider is connected to the second terminal of the detection and control circuit.

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