Display device and method of manufacturing the same
By providing an insulating layer before the electrodes of the display device are formed and electrodes are formed on the insulating layer, the problems of misalignment of the light emitting element and electrode short-circuiting are solved, and the accuracy of the electrode gap and the prevention of short-circuiting are achieved.
Patent Information
- Application Number
- CN202080099477.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-04-06
- Filing Date
- 2020-06-10
- Publication Date
- 2025-04-25
- Estimated Expiration
- 2040-06-10
AI Technical Summary
In the existing display devices, the distance between the electrodes of the light emitting element is prone to be inaccurate due to process deviations, resulting in misalignment of the light emitting element, and residual layers may occur during electrode etching, resulting in short circuit.
Before the electrodes of the display device are formed, an insulating layer is provided and electrodes are formed on the insulating layer to ensure that the gap between the electrodes remains in the designed value and prevent short circuits.
It effectively prevents poor contact between the light emitting elements and the contact electrode, reduces process deviation, ensures the accuracy of the electrode gap, and avoids short circuit problems.
Smart Images

Figure CN115427877B_ABST
Abstract
Description
Technical Field
[0001] The present invention discloses a display device and a method for manufacturing the same. Background Art
[0002] As multimedia technology develops, the importance of display devices has steadily increased. In response to this, various types of display devices such as organic light emitting displays (OLEDs), liquid crystal displays (LCDs), etc. have been used.
[0003] The display device is a device for displaying an image, and includes a display panel such as an organic light-emitting display panel or a liquid crystal display panel. The light-emitting display panel may include a light-emitting element, for example, a light-emitting diode (LED), and examples of the light-emitting diode include an organic light-emitting diode using an organic material as a fluorescent material and an inorganic light-emitting diode using an inorganic material as a fluorescent material. Summary of the invention
[0004] Technical issues
[0005] A disclosed aspect provides a display device in which misalignment of a light emitting element is improved by reducing a process deviation of a distance between electrodes on which the light emitting element is disposed.
[0006] The disclosed aspects also provide a method of manufacturing a display device, in which when forming electrodes, a short circuit between electrodes due to a residual layer caused by poor etching is prevented, and a process condition of a gap between electrodes can be easily secured.
[0007] It should be noted that the disclosed aspects are not limited thereto, and other aspects not mentioned here will be apparent to those of ordinary skill in the art from the following description.
[0008] Technical Solution
[0009] According to a disclosed embodiment, a display device includes: a first substrate; a first electrode and a second electrode, which are spaced apart from each other on the first substrate; a first insulating layer, which is arranged between the first electrode and the second electrode and does not overlap with the first electrode and the second electrode in a thickness direction; and a light-emitting element, which is arranged on the first insulating layer, wherein two side surfaces of the first insulating layer are in contact with the first electrode and the second electrode.
[0010] First portions of the first electrode and the second electrode that are in contact with the side surface of the first insulating layer may respectively be in contact with the side surface of the first insulating layer along a thickness direction of the first insulating layer.
[0011] The thickness of the first insulating layer may be greater than a maximum thickness of each of the first electrode and the second electrode.
[0012] A width of a first portion of each of the first electrode and the second electrode may be smaller than a thickness of a portion other than the first portion.
[0013] An upper surface of the first portion may be located in the same plane as an upper surface of the first insulating layer, and both ends of the light emitting element may contact the first electrode and the first portion of the second electrode.
[0014] A height of a contact surface between each of the first electrode and the second electrode and a side surface of the first insulating layer may be greater than a thickness of each of the first electrode and the second electrode.
[0015] The light emitting element may extend in one direction, and a length of the light emitting element may be greater than a width of the first insulating layer.
[0016] One end of the light emitting element may be disposed on the first electrode, and the other end thereof may be disposed on the second electrode.
[0017] The display device may further include a second insulating layer, at least a portion of which is disposed on the light emitting element, wherein a width of the second insulating layer may be smaller than a width of the first insulating layer.
[0018] The display device may further include: a first contact electrode disposed on the first electrode and in contact with one end of the light emitting element; and a second contact electrode disposed on the second electrode and in contact with the other end of the light emitting element.
[0019] The display device may further include a plurality of first banks disposed between the first substrate and the first electrode and between the first substrate and the second electrode, wherein the first insulating layer may not contact the first banks.
[0020] According to a disclosed embodiment, a display device includes: a first substrate; a first electrode, which is arranged on the first substrate and extends in a first direction; a second electrode, which is spaced apart from the first electrode in the second direction and extends in the first direction; a first insulating layer, which is arranged between the first electrode and the second electrode and extends in the first direction; and a plurality of light-emitting elements, which are arranged on the first insulating layer and arranged along the first direction, wherein two side surfaces of the first insulating layer are in contact with the first electrode and the second electrode, and one end of each of the light-emitting elements is arranged on the first electrode, and the other end is arranged on the second electrode.
[0021] The display device may further include: a first contact electrode, arranged on the first electrode and in contact with one end of each of the light-emitting elements; and a second contact electrode, arranged on the second electrode and in contact with the other end of each of the light-emitting elements, wherein at least a portion of each of the first contact electrode and the second contact electrode may be overlapped with the first insulating layer in the thickness direction.
[0022] The first electrode may include: a bent portion extending in a second direction different from the first direction; a widened portion extending in the first direction and having a width greater than that of the bent portion; and a connecting portion connecting the bent portion with the widened portion and extending in the first direction, and a first insulating layer may be disposed between the widened portion of the first electrode and the second electrode so that one side surface of the first insulating layer contacts the widened portion of the first electrode.
[0023] The second electrode may be formed with respect to the first insulating layer in a symmetrical structure to the first electrode, and the other side surface of the first insulating layer may be in contact with the widened portion of the second electrode.
[0024] The distance between the widened portion of the first electrode and the widened portion of the second electrode may be smaller than the distance between the connecting portion of the first electrode and the connecting portion of the second electrode, and the shortest distance between the bent portion of the first electrode and the bent portion of the second electrode may be greater than the distance between the widened portions but smaller than the distance between the connecting portions.
[0025] According to a disclosed embodiment, a method for manufacturing a display device includes: forming a first insulating layer on a target substrate, and forming an electrode layer covering the target substrate and the first insulating layer; forming a first electrode and a second electrode separated from each other by the first insulating layer by partially removing the electrode layer to expose an upper surface of the first insulating layer; and placing a plurality of light-emitting elements on the first insulating layer.
[0026] The step of removing the electrode layer may include a first etching process performed as a wet etching process and a second etching process performed as a dry etching process after the first etching process.
[0027] The method may include a process of forming a plurality of first banks spaced apart from each other on the target substrate before forming the first insulating layer.
[0028] The electrode layer may be formed to cover the first bank and the first insulating layer, and the first electrode and the second electrode may be disposed on the first bank, but at least a portion of each of the first electrode and the second electrode may be directly disposed on the target substrate.
[0029] Details of other embodiments are included in the detailed description and accompanying drawings.
[0030] Beneficial Effects
[0031] In the display device according to the embodiment, the insulating layer is arranged between the plurality of electrodes, and the light emitting element is arranged on the insulating layer. The insulating layer can ensure the space in which the light emitting element is arranged while preventing the distance between the electrodes from deviating from the design value. Therefore, in the display device, the light emitting element is horizontally arranged on the insulating layer and the electrode, thereby preventing poor contact with the contact electrode.
[0032] In addition, in the method of manufacturing a display device, an insulating layer is formed before forming an electrode, so that a short circuit caused by a residual layer and a defect in the profile of an etching section that may occur in the electrode formation process can be prevented.
[0033] The effects according to the embodiments are not limited to the contents exemplified above, and more various effects are included in the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] Figure 1 is a plan view of a display device according to an embodiment;
[0035] Figure 2 is a plan view of a pixel of a display device according to an embodiment;
[0036] Figure 3 It is along Figure 2 sectional views taken along lines Q1-Q1', Q2-Q2' and Q3-Q3';
[0037] Figure 4 yes Figure 3 A magnified view of some QA parts;
[0038] Figure 5 is a partial cross-sectional view of a display device according to another embodiment;
[0039] Figure 6 is a schematic diagram of a light emitting element according to an embodiment;
[0040] Figure 7 is a flowchart showing a process of manufacturing a display device according to an embodiment;
[0041] Figures 8 to 17 is a cross-sectional view showing a process of manufacturing a display device according to an embodiment;
[0042] Fig.18 is a cross-sectional view of a portion of a display device according to another embodiment;
[0043] Fig.19 is a plan view of a sub-pixel of a display device according to another embodiment;
[0044] Fig. 20 is a plan view of a sub-pixel of a display device according to another embodiment; and
[0045] Fig.21 It is along Fig. 20 A cross-sectional view taken along line QB-QB'. DETAILED DESCRIPTION
[0046] The invention will now be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. However, the invention may be implemented in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the scope of the invention to those skilled in the art.
[0047] It will also be understood that when a layer is referred to as being “on” another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. Throughout the specification, the same reference numerals refer to the same components.
[0048] It will be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the teachings of the invention, the first element discussed below may be referred to as the second element. Similarly, the second element may also be referred to as the first element.
[0049] Hereinafter, embodiments will be described with reference to the accompanying drawings.
[0050] Figure 1 is a schematic plan view of a display device according to an embodiment.
[0051] In the specification, "above", "top" and "upper surface" refer to the upward direction of the display device 10 (that is, one direction in the third direction DR3), and "below", "bottom" and "lower surface" refer to the other direction in the third direction DR3. In addition, "left", "right", "upper" and "lower surface" refer to directions when the display device 10 is viewed in a plan view. For example, "left" refers to one direction in the first direction DR1, "right" refers to the other direction in the first direction DR1, "upper" refers to one direction in the second direction DR2, and "lower" refers to the other direction in the second direction DR2.
[0052] Reference Figure 1 , the display device 10 displays a moving image or a still image. The display device 10 may refer to any electronic device that provides a display screen. Examples of the display device 10 may include a television, a notebook computer, a monitor, a billboard, an Internet of Things (IoT) device, a mobile phone, a smart phone, a tablet personal computer (PC), an electronic watch, a smart watch, a watch phone, a head-mounted display, a mobile communication terminal, an electronic notebook, an electronic book, a portable multimedia player (PMP), a navigation device, a game console, a digital camera, and a video camera, all of which provide a display screen.
[0053] The display device 10 includes a display panel that provides a display screen. Examples of the display panel may include an inorganic light emitting diode display panel, an organic light emitting display panel, a quantum dot light emitting display panel, a plasma display panel, and a field emission display panel. The following will describe a case where an inorganic light emitting diode display panel is applied as an example of a display panel, but the disclosure is not limited to this case, and other display panels may also be applied as long as the same technical spirit is applied.
[0054] The shape of the display device 10 may be variously modified. For example, the display device 10 may have various shapes such as a horizontally long rectangle, a vertically long rectangle, a square, a quadrilateral with rounded corners (vertices), other polygons, and a circle. The shape of the display area DPA of the display device 10 may also be similar to the overall shape of the display device 10. Figure 1 , a display device 10 and a display area DPA having a horizontally long rectangular shape are shown.
[0055] The display device 10 may include a display area DPA and a non-display area NDA. The display area DPA is an area where a picture can be displayed, and the non-display area NDA is an area where a picture is not displayed. The display area DPA may also be referred to as an active area, and the non-display area NDA may also be referred to as an inactive area. The display area DPA may generally occupy the center of the display device 10.
[0056] The display area DPA may include a plurality of pixels PX. The pixels PX may be arranged in a matrix direction. Each of the pixels PX may be a rectangle or a square in a plan view. However, the disclosure is not limited thereto, and each of the pixels PX may also be in a rhombus shape with each side tilted relative to a direction. The pixels PX may be arranged alternately in a stripe type or an island type. In addition, each of the pixels PX may include one or more light emitting elements 30 (see FIG. 1 ) that emit light of a specific wavelength band to display a specific color. Figure 2 ).
[0057] The non-display area NDA may be disposed around the display area DPA. The non-display area NDA may completely or partially surround the display area DPA. The display area DPA may be rectangular, and the non-display area NDA may be disposed adjacent to four sides of the display area DPA. The non-display area NDA may form a frame of the display device 10. In each non-display area NDA, a wiring or circuit driver included in the display device 10 may be disposed, or an external device may be installed.
[0058] Figure 2 is a plan view of a pixel of a display device according to an embodiment.
[0059] Reference Figure 2, each of the pixels PX may include a plurality of sub-pixels PXn (where n is an integer from 1 to 3). For example, one pixel PX may include a first sub-pixel PX1, a second sub-pixel PX2, and a third sub-pixel PX3. The first sub-pixel PX1 may emit light of a first color, the second sub-pixel PX2 may emit light of a second color, and the third sub-pixel PX3 may emit light of a third color. The first color may be blue, the second color may be green, and the third color may be red. However, the disclosure is not limited thereto, and the sub-pixels PXn may also emit light of the same color. In addition, although in Figure 2 One pixel PX includes three sub-pixels PXn, but the disclosure is not limited thereto, and the pixel PX may also include additional sub-pixels PXn.
[0060] Each sub-pixel PXn of the display device 10 may include an emission region EMA and a non-emission region. The emission region EMA may be a region in which the light emitting element 30 is disposed to emit light of a specific wavelength band. The non-emission region may be a region in which the light emitting element 30 is not disposed and no light is output therefrom because the light emitted from the light emitting element 30 does not reach the region. The active layer 36 (see Figure 6 ) can emit light in any suitable direction, and the light can be emitted toward both sides of the light emitting element 30. The emission area EMA may include an area where the light emitting element 30 is located, and an area where light emitted from the light emitting element 30 is output to an area adjacent to the light emitting element 30.
[0061] However, the disclosure is not limited thereto, and the emission area EMA may also include an area where light emitted from the light emitting element 30 is output after being reflected or refracted by other members. A plurality of light emitting elements 30 may be disposed in each sub-pixel PXn, and an area where the light emitting element 30 is located and an area adjacent to the area may form the emission area EMA.
[0062] In addition, each sub-pixel PXn may include a cutout region CBA disposed in a non-emission region. The cutout region CBA may be disposed on one side of the emission region EMA in the second direction DR2. The cutout region CBA may be disposed between the emission regions EMA of the adjacent sub-pixels PXn in the second direction DR2. A plurality of emission regions EMA and a plurality of cutout regions CBA may be arranged in the display region DPA of the display device 10. For example, although the emission region EMA and the cutout region CBA may be repeatedly arranged in the first direction DR1, they may be alternately arranged in the second direction DR2. In addition, the distance between the cutout regions CBA in the first direction DR1 may be less than the distance between the emission regions EMA in the first direction DR1. As will be described later, the second embankment 45 may be disposed between the cutout region CBA and the emission region EMA, and the distance between the cutout region CBA and the emission region EMA may vary according to the width of the second embankment 45. Since the light emitting element 30 is not disposed in the cutout region CBA, no light is emitted from the cutout region CBA. However, portions of the electrodes 21 and 22 disposed in each subpixel PXn may be disposed in the cutout area CBA. The electrodes 21 and 22 disposed in each subpixel PXn may be separated from electrodes of adjacent subpixels PXn in the cutout area CBA. This will be described in more detail later.
[0063] Figure 3 It is along Figure 2 Cross-sectional views taken along lines Q1-Q1', Q2-Q2' and Q3-Q3'. Figure 3 Only shown Figure 2 1 is a cross-section of a first subpixel PX1, but the same illustration may be applied to other pixels PX or subpixels PXn. Figure 3 A cross section through one end and the other end of the light emitting element 30 in the first sub-pixel PX1 is shown.
[0064] Combination Figure 2 Reference Figure 3 The display device 10 may include a first substrate 11 and a semiconductor layer, a plurality of conductive layers, and a plurality of insulating layers disposed on the first substrate 11 .
[0065] Specifically, the first substrate 11 may be an insulating substrate. The first substrate 11 may be made of an insulating material such as glass, quartz or polymer resin. In addition, the first substrate 11 may be not only a rigid substrate but also a flexible substrate that can be bent, folded, curled, etc.
[0066] The light blocking layer BML may be disposed on the first substrate 11. The light blocking layer BML overlaps the active material layer ACT of the first transistor TR1 of the display device 10. The light blocking layer BML may include a light blocking material to prevent light from being incident on the active material layer ACT of the first transistor TR1. For example, the light blocking layer BML may be made of an opaque metal material that blocks transmission of light. However, the disclosure is not limited thereto. In some cases, the light blocking layer BML may be omitted.
[0067] The buffer layer 12 may be disposed on the entire surface of the first substrate 11 having the light blocking layer BML. The buffer layer 12 may be formed on the first substrate 11 to protect the first transistor TR1 of each pixel PX from moisture introduced through the first substrate 11 (the first substrate 11 is susceptible to moisture penetration) and may perform a surface planarization function. The buffer layer 12 may be composed of a plurality of inorganic layers stacked alternately. For example, the buffer layer 12 may be a layer including silicon oxide (SiO x ), silicon nitride (SiN x ) and silicon oxynitride (SiON) are alternately stacked in a multilayer.
[0068] The semiconductor layer is disposed on the buffer layer 12. The semiconductor layer may include an active material layer ACT of the first transistor TR1. The active material layer ACT may partially overlap a gate electrode GE of a first gate conductive layer to be described later.
[0069] Although only the first transistor TR1 among the transistors included in each sub-pixel PXn of the display device 10 is shown in the drawings, the disclosure is not limited thereto. The display device 10 may include more transistors. For example, by including one or more transistors in addition to the first transistor TR1 in each sub-pixel PXn, the display device 10 may include two or three transistors.
[0070] In an embodiment, the semiconductor layer may include polycrystalline silicon, single crystal silicon, oxide semiconductor, etc. Polycrystalline silicon may be formed by crystallizing amorphous silicon. When the semiconductor layer includes polycrystalline silicon, the active material layer ACT may include a plurality of doped regions ACT_a and ACT_b doped with impurities and a channel region ACT_c therebetween.
[0071] In another embodiment, the semiconductor layer may include an oxide semiconductor. In this case, each doped region of the active material layer ACT may be a conductive region. The oxide semiconductor may be an oxide semiconductor containing indium (In). In some embodiments, the oxide semiconductor may be indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium oxide (IGO), indium zinc tin oxide (IZTO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), or indium gallium zinc tin oxide (IGZTO). However, the disclosure is not limited thereto.
[0072] The first gate insulating layer 13 is disposed on the semiconductor layer and the buffer layer 12. The first gate insulating layer 13 may be disposed on the buffer layer 12 having the semiconductor layer. The first gate insulating layer 13 may be used as a gate insulating film of each transistor. The first gate insulating layer 13 may be a layer including, for example, silicon oxide (SiO x ), silicon nitride (SiN x ) or silicon oxynitride (SiON), or may have a structure in which any of the above materials are stacked.
[0073] The first gate conductive layer is disposed on the first gate insulating layer 13. The first gate conductive layer may include the gate electrode GE of the first transistor TR1 and the first capacitor electrode CSE of the storage capacitor. The gate electrode GE may overlap the channel region ACT_c of the active material layer ACT in the thickness direction. The first capacitor electrode CSE may overlap the second source / drain electrode SD2 of the first transistor TR1 to be described later in the thickness direction. In some embodiments, the first capacitor electrode CSE may be integrally connected to the gate electrode GE, and the integrated layer may partially include the gate electrode GE and the first capacitor electrode CSE. The first capacitor electrode CSE may overlap the second source / drain electrode SD2 in the thickness direction, and a storage capacitor may be formed therebetween.
[0074] The first gate conductive layer may be, but is not limited to, a single layer or a multilayer made of any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) and alloys thereof.
[0075] The first protective layer 15 is disposed on the first gate conductive layer. The first protective layer 15 may cover the first gate conductive layer to protect the first gate conductive layer. The first protective layer 15 may include, for example, silicon oxide (SiO x ), silicon nitride (SiN x ) or silicon oxynitride (SiON), or may have a structure in which any of the above materials are stacked.
[0076] The first data conductive layer is disposed on the first protective layer 15. The first data conductive layer may include first and second source / drain electrodes SD1 and SD2 of the first transistor TR1 and the data line DTL.
[0077] The source / drain electrodes SD1 and SD2 of the first transistor TR1 may respectively contact the doped regions ACT_a and ACT_b of the active material layer ACT through contact holes penetrating the first protective layer 15 and the first gate insulating layer 13. In addition, the second source / drain electrode SD2 of the first transistor TR1 may be electrically connected to the light blocking layer BML through another contact hole.
[0078] The data line DTL may transmit a data signal to other transistors (not shown) included in the display device 10. Although not shown in the drawings, the data line DTL may be connected to source / drain electrodes of other transistors.
[0079] The first data conductive layer may be, but is not limited to, a single layer or multiple layers made of any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) and alloys thereof.
[0080] The first interlayer insulating layer 17 is disposed on the first data conductive layer. The first interlayer insulating layer 17 may be used as an insulating film between the first data conductive layer and other layers on the first data conductive layer. In addition, the first interlayer insulating layer 17 may cover the first data conductive layer and protect the first data conductive layer. The first interlayer insulating layer 17 may be a layer including, for example, silicon oxide (SiO x ), silicon nitride (SiN x ) or silicon oxynitride (SiON), or may have a structure in which any of the above materials are stacked.
[0081] The second data conductive layer is disposed on the first interlayer insulating layer 17. The second data conductive layer may include a first voltage wiring VL1, a second voltage wiring VL2, and a first conductive pattern CDP. A high potential voltage (or a first power supply voltage) supplied to the first transistor TR1 may be applied to the first voltage wiring VL1, and a low potential voltage (or a second power supply voltage) supplied to the second electrode 22 may be applied to the second voltage wiring VL2. In addition, during the manufacturing process of the display device 10, an alignment signal required to align the light emitting element 30 may be transmitted to the second voltage wiring VL2.
[0082] The first conductive pattern CDP may be electrically connected to the second source / drain electrode SD2 of the first transistor TR1 through a contact hole formed in the first interlayer insulating layer 17. The first conductive pattern CDP may also be in contact with a first electrode 21 to be described later, and the first transistor TR1 may transfer a first power supply voltage received from the first voltage wiring VL1 to the first electrode 21 through the first conductive pattern CDP. Although the second data conductive layer includes one second voltage wiring VL2 and one first voltage wiring VL1 in the drawings, the disclosure is not limited thereto. The second data conductive layer may also include more first voltage wirings VL1 and more second voltage wirings VL2.
[0083] The second data conductive layer may be, but is not limited to, a single layer or a multilayer made of any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) and alloys thereof.
[0084] The first planarization layer 19 is disposed on the second data conductive layer. The first planarization layer 19 may include an organic insulating material such as polyimide (PI) for example, and perform a surface planarization function.
[0085] A plurality of first banks 40, a plurality of electrodes 21 and 22, a light emitting element 30, a second bank 45, and a plurality of contact electrodes 26 and 27 are disposed on the first planarization layer 19. In addition, a plurality of insulating layers 51 to 54 may be further disposed on the first planarization layer 19.
[0086] The first embankment 40 may be directly disposed on the first planarization layer 19. Although the first embankment 40 may extend in the second direction DR2 in each sub-pixel PXn, it may end at a position spaced apart from the boundary between the sub-pixels PXn so as not to extend to another sub-pixel PXn adjacent in the second direction DR2. In addition, the first embankments 40 may be spaced apart to face each other in the first direction DR1. The first embankments 40 may be spaced apart from each other to form an area in which the light emitting element 30 is disposed between the first embankments 40. The first embankment 40 may be disposed in each sub-pixel PXn to form a linear pattern in the display area DPA of the display device 10. Although two first embankments 40 are shown in the drawings, the disclosure is not limited thereto. The number of the first embankments 40 may be increased according to the number of electrodes 21 and 22 to be described later.
[0087] At least a portion of each of the first embankments 40 may protrude from the upper surface of the first planarization layer 19. The protruding portion of each of the first embankments 40 may have an inclined side surface, and the light emitted from the light emitting element 30 may travel toward the inclined side surface of the first embankment 40. The electrodes 21 and 22 disposed on the first embankment 40 may include a material having a high reflectivity, and the light emitted from the light emitting element 30 may be reflected by the electrodes 21 and 22 disposed on the side surface of the first embankment 40 to travel toward the top of the first planarization layer 19. That is, the first embankment 40 may provide an area for positioning the light emitting element 30 while serving as a reflective barrier that reflects the light emitted from the light emitting element 30 in an upward direction. The side surface of the first embankment 40 may be inclined in a linear shape. However, the disclosure is not limited thereto, and the outer surface of the first embankment 40 may also have a curved semicircular or semi-elliptical shape. In an embodiment, the first embankment 40 may include an organic insulating material such as polyimide (PI) as an example, but the disclosure is not limited thereto.
[0088] The electrodes 21 and 22 are disposed on the first bank 40 and the first planarization layer 19. The electrodes 21 and 22 may include a first electrode 21 and a second electrode 22. The first electrode 21 and the second electrode 22 may extend in the second direction DR2 and may be spaced apart in the first direction DR1 to face each other. The first electrode 21 and the second electrode 22 may be shaped substantially similar to the first bank 40, but their lengths measured in the second direction DR2 may be greater than the length of the first bank 40.
[0089] Each of the first electrode 21 and the second electrode 22 may extend in the second direction DR2 in each sub-pixel PXn, but may be separated from the other electrode 21 or 22 in the cutout area CBA of each sub-pixel PXn. In some embodiments, the cutout area CBA may be disposed between the emission areas EMA of the sub-pixels PXn adjacent in the second direction DR2, and the first electrode 21 and the second electrode 22 may be separated from the other first electrode 21 and the other second electrode 22 disposed in the sub-pixels PXn adjacent in the second direction DR2 in the cutout area CBA. During the manufacturing process of the display device 10, the first electrode 21 and the second electrode 22 may be formed by placing the light emitting element 30 and then cutting the electrodes 21 and 22 in the cutout area CBA. However, the disclosure is not limited thereto, and for each sub-pixel PXn, some electrodes 21 and 22 may not be separated, but may extend beyond the sub-pixels PXn adjacent in the second direction DR2, or only one of the first electrode 21 and the second electrode 22 may be separated.
[0090] The first electrode 21 may be electrically connected to the first transistor TR1 through the first contact hole CT1, and the second electrode 22 may be electrically connected to the second voltage wiring VL2 through the second contact hole CT2. For example, the first electrode 21 may overlap with a portion of the second bank 45 extending in the first direction DR1, and may contact the first conductive pattern CDP through the first contact hole CT1 penetrating the first planarization layer 19. The second electrode 22 may also overlap with a portion of the second bank 45 extending in the first direction DR1, and may contact the second voltage wiring VL2 through the second contact hole CT2 penetrating the first planarization layer 19. However, the disclosure is not limited thereto. In some embodiments, the first contact hole CT1 and the second contact hole CT2 may be disposed in the emission area EMA surrounded by the second bank 45 so as not to overlap with the second bank 45.
[0091] Although one first electrode 21 and one second electrode 22 are provided in each sub-pixel PXn in the drawings, the disclosure is not limited thereto. In some embodiments, more first electrodes 21 and more second electrodes 22 may be provided in each sub-pixel PXn. In addition, the first electrode 21 and the second electrode 22 provided in each sub-pixel PXn may not necessarily extend in one direction, but may be provided in various suitable structures. For example, the first electrode 21 and the second electrode 22 may be partially bent or folded, or any one of the first electrode 21 and the second electrode 22 may surround the other electrode. The structure or shape in which the first electrode 21 and the second electrode 22 are provided is not particularly limited, as long as the first electrode 21 and the second electrode 22 are at least partially spaced apart to face each other, so that an area where the light-emitting element 30 is to be positioned may be formed between the first electrode 21 and the second electrode 22.
[0092] The first electrode 21 and the second electrode 22 may be respectively disposed on the first bank 40. The first electrode 21 and the second electrode 22 may be spaced apart in the first direction DR1 to face each other, and the light emitting element 30 may be disposed between the first electrode 21 and the second electrode 22. At least one end of each of the light emitting elements 30 disposed between the first electrode 21 and the second electrode 22 may be electrically connected to the first electrode 21 and the second electrode 22.
[0093] In some embodiments, the first electrode 21 and the second electrode 22 may be formed to have a width greater than that of the first bank 40, respectively. For example, the first electrode 21 and the second electrode 22 may cover the outer surface of the first bank 40, respectively. The first electrode 21 and the second electrode 22 may be respectively disposed on the side surface of the first bank 40, and the distance between the first electrode 21 and the second electrode 22 may be smaller than the distance between the first banks 40. In addition, at least a portion of each of the first electrode 21 and the second electrode 22 may be directly disposed on the first planarization layer 19.
[0094] Each of the electrodes 21 and 22 may include a conductive material having high reflectivity. For example, each of the electrodes 21 and 22 may include a metal such as silver (Ag), copper (Cu), or aluminum (Al) as a material having high reflectivity, or may be an alloy containing aluminum (Al), nickel (Ni), or lanthanum (La). Each of the electrodes 21 and 22 may reflect light traveling toward the side surface of the first bank 40 after being emitted from the light emitting element 30 toward above each sub-pixel PXn.
[0095] However, the disclosure is not limited thereto, and each of the electrodes 21 and 22 may further include a transparent conductive material. For example, each of the electrodes 21 and 22 may include a material such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium tin zinc oxide (ITZO). In some embodiments, each of the electrodes 21 and 22 may have a structure in which a transparent conductive material and a metal layer having a high reflectivity are stacked in one or more layers, or may be formed as a single layer including a transparent conductive material and a metal layer. For example, each of the electrodes 21 and 22 may have a stacked structure of ITO / Ag / ITO, ITO / Ag / IZO, or ITO / Ag / ITZO / IZO.
[0096] The electrodes 21 and 22 may be electrically connected to the light emitting element 30, and a predetermined voltage may be applied to the electrodes 21 and 22 so that the light emitting element 30 may emit light. For example, the electrodes 21 and 22 may be electrically connected to the light emitting element 30 through contact electrodes 26 and 27 to be described later, and the received electrical signal may be transmitted to the light emitting element 30 through the contact electrodes 26 and 27.
[0097] In the embodiment, any one of the first electrode 21 and the second electrode 22 may be electrically connected to the anode of the light emitting element 30, and the other may be electrically connected to the cathode of the light emitting element 30. However, the disclosure is not limited thereto, and vice versa.
[0098] In addition, each of the electrodes 21 and 22 can be used to form an electric field in each sub-pixel PXn so as to align the light emitting element 30. The light emitting element 30 can be arranged between the first electrode 21 and the second electrode 22 by the electric field formed on the first electrode 21 and the second electrode 22. In an embodiment, the light emitting element 30 of the display device 10 can be sprayed onto the electrodes 21 and 22 by an inkjet process. When the ink including the light emitting element 30 is sprayed onto the electrodes 21 and 22, an alignment signal is transmitted to the electrodes 21 and 22 to generate an electric field. The light emitting element 30 dispersed in the ink can be aligned on the electrodes 21 and 22 by the dielectrophoretic force applied by the electric field generated on the electrodes 21 and 22.
[0099] The second bank 45 may be disposed on the first planarization layer 19. The second bank 45 may include portions extending in the first direction DR1 and the second direction DR2 in a plan view, and may be disposed throughout the entire display area DPA in a grid pattern. The second bank 45 may be disposed at a boundary of each sub-pixel PXn to separate adjacent sub-pixels PXn. In addition, according to an embodiment, the second bank 45 may be formed to have a height higher than the first bank 40. The second bank 45 may prevent ink from overflowing to adjacent sub-pixels PXn in an inkjet printing process during a manufacturing process of the display device 10. The second bank 45 may separate ink dispersed therein by different light-emitting elements 30 for different sub-pixels PXn so as to prevent the inks from mixing with each other.
[0100] In addition, the second bank 45 may surround the emission area EMA and the cutout area CBA disposed in each sub-pixel PXn to separate them. The first electrode 21 and the second electrode 22 may extend in the second direction DR2 to pass through the portion of the second bank 45 extending in the first direction DR1. The portion of the second bank 45 extending in the second direction DR2 may have a greater width between the emission areas EMA than between the cutout areas CBA. Therefore, the distance between the cutout areas CBA may be smaller than the distance between the emission areas EMA. Each of the electrodes 21 and 22 may overlap with the second bank 45 disposed between the cutout area CBA and the emission area EMA, and contact holes CT1 and CT2 may be formed in the overlapping portion.
[0101] The first electrode 21 and the second electrode 22 may also be disposed in the cutout area CBA beyond the second bank 45 surrounding the emission area EMA of each sub-pixel PXn. As described above, in the manufacturing process of the display device 10, the first electrode 21 and the second electrode 22 may be separated from another first electrode 21 and another second electrode 22 by a process of cutting a portion of the cutout area CBA.
[0102] Like the first bank 40 , the second bank 45 may include polyimide (PI), but the disclosure is not limited thereto.
[0103] The first insulating layer 51 is disposed on the first planarization layer 19. The first insulating layer 51 may be disposed between the first embankment 40 or between the first electrode 21 and the second electrode 22 in the emission area EMA, and may extend along the direction in which the first electrode 21 and the second electrode 22 extend (i.e., the second direction DR2). The first insulating layer 51 disposed in each sub-pixel PXn may form a linear pattern throughout the entire display area DPA. The first insulating layer 51 may insulate the first electrode 21 and the second electrode 22 from each other. In addition, the first insulating layer 51 may form a region in which the light emitting element 30 is disposed, and may prevent the semiconductor layer of the light emitting element 30 from directly contacting the electrodes 21 and 22, thereby preventing damage to the semiconductor layer.
[0104] According to an embodiment, during the manufacturing process of the display device 10, the process of forming the first insulating layer 51 may be performed before the process of forming the first electrode 21 and the second electrode 22. The electrode layer MTL covering the first insulating layer 51 may be partially removed. Fig.10 ) process to form the first electrode 21 and the second electrode 22. Therefore, the first insulating layer 51 is arranged not to overlap with the electrodes 21 and 22 in the thickness direction so as not to cover the electrodes 21 and 22. In addition, since the electrodes 21 and 22 are formed after the first insulating layer 51 is formed, the first electrode 21 and the second electrode 22 can be prevented from being short-circuited due to incomplete removal of the material forming the electrodes. In addition, the light-emitting element 30 having both ends disposed on the electrodes 21 and 22 can be prevented from tilting toward any one electrode when the electrode layer MTL is etched beyond the design. The arrangement of each of the first insulating layer 51, the electrodes 21 and 22, and the light-emitting element 30 will be described in detail later.
[0105] The light emitting element 30 may be disposed on the first insulating layer 51. The light emitting elements 30 may be spaced apart from each other along the second direction DR2 in which each of the electrodes 21 and 22 extends, and may be aligned substantially parallel to each other. The distance between the light emitting elements 30 is not particularly limited. In addition, the light emitting element 30 may extend in one direction, and the direction in which the electrodes 21 and 22 extend and the direction in which the light emitting element 30 extends may be substantially perpendicular to each other. However, the disclosure is not limited thereto, and the light emitting element 30 may also extend in a direction that is not perpendicular to the direction in which the electrodes 21 and 22 extend but is inclined to the direction in which the electrodes 21 and 22 extend.
[0106] The light emitting element 30 may include an active layer 36 containing different materials to emit light of different wavelength bands. The display device 10 may include a light emitting element 30 that emits light of different wavelength bands. For example, each light emitting element 30 of the first subpixel PX1 may include an active layer 36 that emits light of a first color with a central wavelength band of a first wavelength, each light emitting element 30 of the second subpixel PX2 may include an active layer 36 that emits light of a second color with a central wavelength band of a second wavelength, and each light emitting element 30 of the third subpixel PX3 may include an active layer 36 that emits light of a third color with a central wavelength band of a third wavelength. Therefore, the light of the first color, the light of the second color, and the light of the third color may be output from the first subpixel PX1, the second subpixel PX2, and the third subpixel PX3, respectively. However, the disclosure is not limited thereto. In some cases, the first subpixel PX1, the second subpixel PX2, and the third subpixel PX3 may include the same type of light emitting element 30 to emit light of substantially the same color.
[0107] In addition, both ends of each light emitting element 30 may be respectively disposed on the electrodes 21 and 22 between the first bank 40. For example, one end of each light emitting element 30 may be disposed on the first electrode 21, and the other end may be disposed on the second electrode 22. The length of the light emitting element 30 may extend greater than the distance between the first electrode 21 and the second electrode 22, and both ends of each light emitting element 30 may be respectively disposed on the first electrode 21 and the second electrode 22.
[0108] Each of the light emitting elements 30 may include a plurality of layers positioned in a direction perpendicular to the upper surface of the first substrate 11 or the first planarization layer 19. The direction in which the light emitting elements 30 of the display device 10 extend may be parallel to the first planarization layer 19, and the semiconductor layers included in each of the light emitting elements 30 may be positioned sequentially along a direction parallel to the upper surface of the first planarization layer 19. However, the disclosure is not limited thereto. In some cases, when each of the light emitting elements 30 has a different structure, the plurality of layers may be positioned in a direction perpendicular to the first planarization layer 19.
[0109] In addition, both ends of each light emitting element 30 may be in contact with the contact electrodes 26 and 27, respectively. Figure 6 ) may not be formed on the end surface of each light emitting element 30 in the direction in which the light emitting element 30 extends, thereby exposing some of the semiconductor layer. Therefore, the exposed semiconductor layer may be in contact with the contact electrodes 26 and 27. However, the disclosure is not limited thereto. In some cases, at least a portion of the insulating film 38 of each light emitting element 30 may be removed to partially expose the side surfaces of both ends of the semiconductor layer. The exposed side surfaces of the semiconductor layer may be in direct contact with the contact electrodes 26 and 27.
[0110] The second insulating layer 52 may be disposed on a portion of each light emitting element 30 disposed between the first electrode 21 and the second electrode 22. The second insulating layer 52 may partially cover the outer surface of the light emitting element 30. Although the second insulating layer 52 may be disposed on the light emitting element 30, it may not cover one end and the other end of each light emitting element 30, so that the contact electrodes 26 and 27 may contact both ends of each light emitting element 30. In a plan view, a portion of the second insulating layer 52 disposed on the light emitting element 30 may extend in the second direction DR2 on the first insulating layer 51. For example, the second insulating layer 52 may form a linear or island-shaped pattern in each sub-pixel PXn. The second insulating layer 52 covering the outer surface of the light emitting element 30 may protect the light emitting element 30 while anchoring the light emitting element 30 in the manufacturing process of the display device 10.
[0111] The contact electrodes 26 and 27 and the third insulating layer 53 may be disposed on the second insulating layer 52 .
[0112] The contact electrodes 26 and 27 may extend in one direction. The contact electrodes 26 and 27 may contact the light emitting element 30 and the electrodes 21 and 22. The first contact electrode 26 and the second contact electrode 27 of the contact electrodes 26 and 27 may be disposed on a portion of the first electrode 21 and a portion of the second electrode 22, respectively. The first contact electrode 26 may be disposed on the first electrode 21, the second contact electrode 27 may be disposed on the second electrode 22, and each of the first contact electrode 26 and the second contact electrode 27 may extend in the second direction DR2. The first contact electrode 26 and the second contact electrode 27 may be spaced apart from each other in the first direction DR1, and may form a stripe pattern in the emission area EMA of each sub-pixel PXn.
[0113] In some embodiments, the widths of the first contact electrode 26 and the second contact electrode 27 measured in one direction may be respectively equal to or less than the widths of the first electrode 21 and the second electrode 22 measured in the direction. The first contact electrode 26 and the second contact electrode 27 may respectively contact one end and the other end of each light emitting element 30 and partially cover the upper surfaces of the first electrode 21 and the second electrode 22.
[0114] As described above, the semiconductor layer may be exposed on both end surfaces of each light emitting element 30 in the direction in which the light emitting element 30 extends, and the first contact electrode 26 and the second contact electrode 27 may be in contact with each light emitting element 30 at the end surfaces where the semiconductor layer is exposed. One end of each light emitting element 30 may be electrically connected to the first electrode 21 through the first contact electrode 26, and the other end may be electrically connected to the second electrode 22 through the second contact electrode 27.
[0115] Although one first contact electrode 26 and one second contact electrode 27 are in one subpixel PXn in the drawings, the disclosure is not limited thereto. The number of first contact electrodes 26 and second contact electrodes 27 may vary according to the number of first electrodes 21 and second electrodes 22 in each subpixel PXn.
[0116] The third insulating layer 53 is disposed on the first contact electrode 26. The third insulating layer 53 can electrically insulate the first contact electrode 26 and the second contact electrode 27 from each other. Although the third insulating layer 53 can cover the first contact electrode 26, it may not be disposed on the other end of each light emitting element 30, so that the light emitting element 30 can contact the second contact electrode 27. The third insulating layer 53 on the upper surface of the second insulating layer 52 may be partially in contact with the first contact electrode 26 and the second insulating layer 52. The side surface of the third insulating layer 53 in the direction in which the second electrode 22 is disposed may be aligned with the side surface of the second insulating layer 52. The third insulating layer 53 may also be disposed in a non-emitting region, for example, on the first insulating layer 51 disposed on the first planarization layer 19. However, the disclosure is not limited thereto.
[0117] The second contact electrode 27 is disposed on the second electrode 22, the second insulating layer 52, and the third insulating layer 53. The second contact electrode 27 may contact the other end of each light emitting element 30 and the exposed upper surface of the second electrode 22. The other end of each light emitting element 30 may be electrically connected to the second electrode 22 through the second contact electrode 27.
[0118] The second contact electrode 27 may partially contact the second insulating layer 52, the third insulating layer 53, the second electrode 22, and the light emitting element 30. Due to the second insulating layer 52 and the third insulating layer 53, the first contact electrode 26 and the second contact electrode 27 may not contact each other. However, the disclosure is not limited thereto. In some cases, the third insulating layer 53 may be omitted.
[0119] The contact electrodes 26 and 27 may include a conductive material such as ITO, IZO, ITZO, or aluminum (Al). For example, the contact electrodes 26 and 27 may include a transparent conductive material, and the light emitted from the light emitting element 30 may pass through the contact electrodes 26 and 27 to travel toward the electrodes 21 and 22. Each of the electrodes 21 and 22 may include a material having a high reflectivity, and the electrodes 21 and 22 placed on the inclined side surfaces of the first bank 40 may reflect the incident light toward the top of the first substrate 11. However, the disclosure is not limited thereto.
[0120] The fourth insulating layer 54 may be disposed on the entire surface of the first substrate 11. The fourth insulating layer 54 may serve to protect components on the first substrate 11 from the external environment.
[0121] Each of the first insulating layer 51, the second insulating layer 52, the third insulating layer 53 and the fourth insulating layer 54 may include an inorganic insulating material or an organic insulating material. In an embodiment, the first insulating layer 51, the second insulating layer 52, the third insulating layer 53 and the fourth insulating layer 54 may include an inorganic insulating material or an organic insulating material. x ), silicon nitride (SiN x), silicon oxynitride (SiO x N y ), aluminum oxide (Al 2 O 3 ) or an inorganic insulating material of aluminum nitride (AlN). Alternatively, the first insulating layer 51, the second insulating layer 52, the third insulating layer 53, and the fourth insulating layer 54 may include an organic insulating material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, an unsaturated polyester resin, a polyphenylene resin, a polyphenylene sulfide resin, a benzocyclobutene resin, a cardo resin, a siloxane resin, a silsesquioxane resin, polymethyl methacrylate, a polycarbonate, or a polymethyl methacrylate-polycarbonate synthetic resin. However, the disclosure is not limited thereto.
[0122] As described above, the first insulating layer 51 may be provided between the first electrode 21 and the second electrode 22. The first insulating layer 51 may be formed before forming the first electrode 21 and the second electrode 22. According to an embodiment, the first insulating layer 51 may not overlap each of the electrodes 21 and 22, and the first electrode 21 and the second electrode 22 may be in contact with both side surfaces of the first insulating layer 51. By forming the electrodes 21 and 22 after forming the first insulating layer 51, the distance between the first electrode 21 and the second electrode 22 may be prevented from deviating from a designed value.
[0123] Figure 4 yes Figure 3 A zoomed-in view of a portion of QA.
[0124] Reference Figure 4 , the first insulating layer 51 is directly disposed on the first planarization layer 19 between the first banks 40. The first electrode 21 and the second electrode 22 may also be partially disposed directly on the first planarization layer 19. For example, the first electrode 21 and the second electrode 22 may have a greater width than the first bank 40 and may cover the first bank 40, while a portion of each of the first electrode 21 and the second electrode 22 is directly disposed on the first planarization layer 19.
[0125] As described above, both ends of each light emitting element 30 disposed on the first insulating layer 51 may be disposed on the first electrode 21 and the second electrode 22, respectively. The first electrode 21 and the second electrode 22 may be designed so that the distance between them is less than the length h of each light emitting element 30, and may be disposed on the first planarization layer 19 or the first bank 40. When the distance between the first electrode 21 and the second electrode 22 is too small, the first electrode 21 and the second electrode 22 may be short-circuited due to the residual layer generated by the material forming the electrodes 21 and 22 not being completely removed in the process of etching the material. When the distance between the first electrode 21 and the second electrode 22 is too large, any end of each light emitting element 30 may be disposed between the first electrode 21 and the second electrode 22. Therefore, the light emitting element 30 may be tilted in cross section. In this case, the contact electrodes 26 and 27 formed in the subsequent process may not be smoothly in contact with the end surface of each light emitting element 30.
[0126] Specifically, since the first electrode 21 and the second electrode 22 include a metal material and are disposed on the first bank 40, the exposure amount may differ between positions on each of the electrodes 21 and 22 due to a step formed by the first bank 40. In this case, the cross-section of the remaining electrodes 21 and 22 after etching may not be smooth, or the distance between the first electrode 21 and the second electrode 22 may deviate from a designed value.
[0127] According to an embodiment, after the first insulating layer 51 is first formed during the manufacturing process of the display device 10, the first electrode 21 and the second electrode 22 may be formed. The first electrode 21 and the second electrode 22 may be formed by forming an electrode layer covering the first insulating layer 51 and then removing the electrode layer to expose the upper surface of the first insulating layer 51. Since the first insulating layer 51 includes an inorganic insulating material or an organic insulating material, the cross section or side surface of the first insulating layer 51 formed by the etching process may be smooth, and the width of the first insulating layer 51 may be formed relatively easily according to the design value. By forming the first electrode 21 and the second electrode 22 after forming the first insulating layer 51, the distance between the first electrode 21 and the second electrode 22 may be formed according to the design value, thereby minimizing the process deviation. Therefore, the light emitting element 30 may be disposed on the first insulating layer 51 so that its two ends are disposed on the electrodes 21 and 22, respectively. This may prevent poor contact of the light emitting element 30 with the contact electrodes 26 and 27.
[0128] In an embodiment, the first insulating layer 51 may be disposed between the first electrode 21 and the second electrode 22, and the width W1 of the first insulating layer 51 may be equal to the distance between the first electrode 21 and the second electrode 22. That is, the two side surfaces SA1 and SA2 of the first insulating layer 51 may be in contact with the first electrode 21 and the second electrode 22, respectively. The first electrode 21 and the second electrode 22 may be formed by forming an electrode layer covering the first insulating layer 51 and then partially removing the electrode layer. For example, after the electrode layer is placed to cover both the side surface and the upper surface of the first insulating layer 51, the electrode layer may be removed to expose the upper surface of the first insulating layer 51. The first insulating layer 51 thus formed may not overlap with each of the electrodes 21 and 22 in the thickness direction. The first electrode 21 and the second electrode 22 may be in contact with the two side surfaces SA1 and SA2 of the first insulating layer 51, and the distance between them may be equal to the width W1 of the first insulating layer 51.
[0129] In the embodiment, the width W1 of the first insulating layer 51 may be smaller than the length h of each light emitting element 30, but may be larger than the width W2 of the second insulating layer 52. Since the first insulating layer 51 has a width W1 sufficient to allow the light emitting element 30 to be disposed thereon but smaller than the length h of each light emitting element 30, both ends of each light emitting element 30 may be disposed on the first electrode 21 and the second electrode 22, respectively. Considering the thickness of the electrodes 21 and 22 disposed on both side surfaces SA1 and SA2 and the length h of each light emitting element 30, the width W1 of the first insulating layer 51 may be adjusted within a range in which the light emitting element 30 may be disposed horizontally.
[0130] In addition, the second insulating layer 52 has a width W2 that is at least smaller than the length h of each light emitting element 30 so as not to cover both ends of each light emitting element 30. The first contact electrode 26 and the second contact electrode 27 may be in contact with both ends of each light emitting element 30, respectively, while at least a portion of each of the first contact electrode 26 and the second contact electrode 27 is disposed on the second insulating layer 52. However, the second insulating layer 52 may not necessarily have a smaller width than the first insulating layer 51, and the width W2 of the second insulating layer 52 may vary within a range in which the second insulating layer 52 may perform the function of anchoring the light emitting element 30 as described above.
[0131] Each of the first electrode 21 and the second electrode 22 may include a first portion EP in contact with the first insulating layer 51. The first insulating layer 51 may include a first side surface SA1 in contact with the first portion EP of the first electrode 21 and a second side surface SA2 in contact with the first portion EP of the second electrode 22. The first insulating layer 51 may include an insulating material, and both side surfaces SA1 and SA2 of the first insulating layer 51 may be formed perpendicularly to the upper surface of the first planarization layer 19 in an etching process. A contact surface between each of the first electrode 21 and the second electrode 22 and the first insulating layer 51 may be perpendicular to the upper surface of the first planarization layer 19.
[0132] According to an embodiment, the width WE1 of the first portion EP of each of the first electrode 21 and the second electrode 22 may be smaller than the thickness WE2 of the other portions. The electrode layer covering the first insulating layer 51 may have a substantially uniform thickness, but due to the step formed by the first insulating layer 51, the portion formed on the side surface of the first insulating layer 51 may be relatively thin. The thickness WE2 of each of the first electrode 21 and the second electrode 22 may be a thickness measured in a portion other than the first portion EP, and may be substantially the same in the portion other than the first portion EP. However, because the first portions EP of the electrodes 21 and 22 are formed along the side surfaces SA1 and SA2 of the first insulating layer 51, they may have a relatively small width WE1.
[0133] In addition, the thickness of the first insulating layer 51 may be greater than the thickness WE2 measured in the portion other than the first portion EP1 of each of the first electrode 21 and the second electrode 22. The first portion EP of the first electrode 21 and the second electrode 22 may be in contact with both side surfaces SA1 and SA2 of the first insulating layer 51 along the thickness direction of the first insulating layer 51. That is, the thickness WE3 of each first portion EP may be substantially the same as the thickness of the first insulating layer 51. Even if the thickness of the first electrode 21 and the second electrode 22 is less than the thickness of the first insulating layer 51, an electrode layer may be placed along the outer surface of the first insulating layer 51 during the manufacturing process to cover the two side surfaces SA1 and SA2. Therefore, the first portion EP of the first electrode 21 and the second electrode 22 may also be in sufficient contact with the two side surfaces SA1 and SA2 along the thickness direction of the first insulating layer 51. In addition, the first contact electrode 26 and the second contact electrode 27 may be in contact with both end surfaces of each light emitting element 30, and may also be in contact with the first portion EP of the electrodes 21 and 22.
[0134] In an embodiment, the upper surface of the first insulating layer 51 and the upper surfaces SE1 and SE2 of the first portions EP of the electrodes 21 and 22 may be located in the same plane. Each light emitting element 30 may be disposed on the first insulating layer 51 so that both ends thereof are located on the first portions EP of the electrodes 21 and 22, respectively. The upper surfaces SE1 and SE2 of the first portions EP of the electrodes 21 and 22 may be in contact with the side surfaces of each light emitting element 30. However, as will be described later, each light emitting element 30 may include an insulating film 38 surrounding the outer surfaces of the plurality of semiconductor layers. Therefore, the first portion EP of each of the electrodes 21 and 22 may be in direct contact with the insulating film 38 of each light emitting element 30, and may not be in contact with the semiconductor layer.
[0135] In the display device 10 according to the embodiment, the first insulating layer 51 on which the light emitting element 30 is disposed is formed before the first electrode 21 and the second electrode 22. The first insulating layer 51 may be disposed so as not to cover the first electrode 21 and the second electrode 22, and the distance between the first electrode 21 and the second electrode 22 may be formed to be the same as the width of the first insulating layer 51. Considering the length h of each light emitting element 30, the distance between the electrodes 21 and 22 may be adjusted by the width W1 of the first insulating layer 51. Since the first insulating layer 51 includes an insulating material, it is easy to form the shape or width of the first insulating layer 51 according to a designed value. Therefore, the distance between the first electrode 21 and the second electrode 22 may be more easily adjusted, and a short circuit between the electrodes 21 and 22 due to poor etching of the material forming the first electrode 21 and the second electrode 22 may be prevented. Therefore, in the display device 10 according to the embodiment, the light emitting element 30 may be horizontally disposed on the first insulating layer 51 and the electrodes 21 and 22, and misalignment of the light emitting element 30 and poor contact of the light emitting element 30 with the contact electrodes 26 and 27 may be minimized.
[0136] Figure 5 is a partial cross-sectional view of a display device according to another embodiment.
[0137] Reference Figure 5 , in the display device 10, the third insulating layer 53 may be omitted. A portion of the second contact electrode 27 may be directly disposed on the second insulating layer 52, and the first contact electrode 26 and the second contact electrode 27 may be spaced apart from each other on the second insulating layer 52. According to an embodiment, even if the third insulating layer 53 is omitted from the display device 10, the second insulating layer 52 may include an organic insulating material to perform a function of anchoring the light emitting element 30. In addition, the first contact electrode 26 and the second contact electrode 27 may be simultaneously formed by a patterning process. In addition to the third insulating layer 53 being further omitted, Figure 5 Examples and Figure 3 Therefore, any redundant description will be omitted below.
[0138] Figure 6 is a schematic diagram of a light emitting element according to an embodiment.
[0139] The light emitting element 30 may be a light emitting diode. Specifically, the light emitting element 30 may be an inorganic light emitting diode having a size of micrometers or nanometers and made of an inorganic material. When an electric field is formed in a specific direction between two electrodes facing each other, the inorganic light emitting diode may be aligned between the two electrodes having polarity formed. The light emitting element 30 may be aligned between the two electrodes by the electric field formed on the electrodes.
[0140] The light emitting element 30 according to the embodiment may extend in one direction. The light emitting element 30 may be shaped like a rod, a wire, a tube, etc. In an embodiment, the light emitting element 30 may be shaped like a cylinder or a rod. However, the shape of the light emitting element 30 is not limited thereto, and the light emitting element 30 may also have various shapes including a polygonal prism such as a cube, a cuboid or a hexagonal prism, and a shape extending in one direction and having a partially inclined outer surface. A plurality of semiconductors included in the light emitting element 30 to be described later may be sequentially arranged or stacked along one direction.
[0141] The light emitting element 30 may include a semiconductor layer doped with impurities of any conductivity type (eg, p-type or n-type). The semiconductor layer may receive an electrical signal from an external power source and emit light of a specific wavelength band.
[0142] Reference Figure 6 The light emitting element 30 may include a first semiconductor layer 31 , a second semiconductor layer 32 , an active layer 36 , an electrode layer 37 and an insulating film 38 .
[0143] The first semiconductor layer 31 may be an n-type semiconductor. In an example, if the light emitting element 30 emits light in a blue wavelength band, the first semiconductor layer 31 may include a semiconductor having a chemical formula of Al x Ga y In 1-x-y N (0≤x≤1, 0≤y≤1, 0≤x+y≤1) semiconductor material. For example, the semiconductor material included in the first semiconductor layer 31 may be any one or more of n-type doped AlGaInN, GaN, AlGaN, InGaN, AlN and InN. The first semiconductor layer 31 may be doped with an n-type dopant, and the n-type dopant may be, for example, Si, Ge, Se or Sn. In an embodiment, the first semiconductor layer 31 may be n-GaN doped with n-type Si. The length of the first semiconductor layer 31 may be in the range of, but not limited to, 1.5 μm to 5 μm.
[0144] The second semiconductor layer 32 is disposed on the active layer 36 to be described later. The second semiconductor layer 32 may be a p-type semiconductor. In an example, if the light emitting element 30 emits light in a blue or green wavelength band, the second semiconductor layer 32 may include a semiconductor having a chemical formula of Al x Ga y In 1-x-y N (0≤x≤1, 0≤y≤1, 0≤x+y≤1) semiconductor material. For example, the semiconductor material included in the second semiconductor layer 32 may be any one or more of p-doped AlGaInN, GaN, AlGaN, InGaN, AlN, and InN. The second semiconductor layer 32 may be doped with a p-type dopant, and the p-type dopant may be, for example, Mg, Zn, Ca, or Ba. In an embodiment, the second semiconductor layer 32 may be p-GaN doped with p-type Mg. The length of the second semiconductor layer 32 may be in the range of, but not limited to, 0.05 μm to 0.10 μm.
[0145] Although each of the first semiconductor layer 31 and the second semiconductor layer 32 is composed of one layer in the drawings, the disclosure is not limited thereto. According to some embodiments, each of the first semiconductor layer 31 and the second semiconductor layer 32 may include more layers, for example, a cladding layer or a tensile strain barrier reduction (TSBR) layer may be further included according to the material of the active layer 36.
[0146] The active layer 36 is disposed between the first semiconductor layer 31 and the second semiconductor layer 32. The active layer 36 may include a material having a single quantum well structure or a multi-quantum well structure. When the active layer 36 includes a material having a multi-quantum well structure, it may have a structure in which a plurality of quantum layers and a plurality of well layers are alternately stacked. The active layer 36 may emit light by combining electron-hole pairs according to an electrical signal received through the first semiconductor layer 31 and the second semiconductor layer 32. For example, if the active layer 36 emits light in a blue band, it may include a material such as AlGaN or AlGaInN. Specifically, when the active layer 36 has a multi-quantum well structure in which quantum layers and well layers are alternately stacked, the quantum layer may include a material such as AlGaN or AlGaInN, and the well layer may include a material such as GaN or AlInN. In an embodiment, the active layer 36 may include AlGaInN as a quantum layer and AlInN as a well layer to emit blue light with a central band in the range of 450nm to 495nm as described above.
[0147] However, the disclosure is not limited thereto, and the active layer 36 may also have a structure in which a semiconductor material having a large energy band gap and a semiconductor material having a small energy band gap are alternately stacked, or may include different Group 3 to Group 5 semiconductor materials according to the wavelength band of the light emitted therefrom. The light emitted from the active layer 36 is not limited to light in the blue wavelength band. In some cases, the active layer 36 may emit light in the red or green wavelength band. The length of the active layer 36 may be in the range of, but not limited to, 0.05 μm to 0.10 μm.
[0148] The light emitted from the active layer 36 may be emitted not only through the outer surface of the light emitting element 30 in the longitudinal direction but also through both side surfaces. The direction of the light emitted from the active layer 36 is not limited to one direction.
[0149] The electrode layer 37 may be an ohmic contact electrode. However, the disclosure is not limited thereto, and the electrode layer 37 may also be a Schottky contact electrode. The light emitting element 30 may include at least one electrode layer 37. Figure 6 3. The light emitting element 30 includes one electrode layer 37, but the disclosure is not limited thereto. In some cases, the light emitting element 30 may include an additional electrode layer 37, or the electrode layer 37 may be omitted. Even when the light emitting element 30 includes a different number of electrode layers 37 or further includes another structure, the following description of the light emitting element 30 may also be equally applicable.
[0150] When the light emitting element 30 is electrically connected to the electrode or the contact electrode in the display device 10 according to the embodiment, the electrode layer 37 can reduce the resistance between the light emitting element 30 and the electrode or the contact electrode. The electrode layer 37 may include a conductive metal. For example, the electrode layer 37 may include at least any one of aluminum (Al), titanium (Ti), indium (In), gold (Au), silver (Ag), indium tin oxide (ITO), indium zinc oxide (IZO) and indium tin zinc oxide (ITZO). In addition, the electrode layer 37 may include a semiconductor material doped with n-type or p-type. The electrode layer 37 may include the same material or different materials, but the disclosure is not limited thereto.
[0151] The insulating film 38 surrounds the outer surfaces of the semiconductor layer and the electrode layer. In an embodiment, the insulating film 38 may surround at least the outer surface of the active layer 36 and extend in the direction in which the light emitting element 30 extends. The insulating film 38 may protect the above components. For example, the insulating film 38 may surround the side surfaces of the above components, but may expose both ends of the light emitting element 30 in the longitudinal direction.
[0152] In the drawings, the insulating film 38 extends in the longitudinal direction of the light emitting element 30 to cover from the side surface of the first semiconductor layer 31 to the side surface of the electrode layer 37. However, the disclosure is not limited thereto, and the insulating film 38 may cover only the outer surfaces of the active layer 36 and some semiconductor layers, or may cover only a portion of the outer surface of the electrode layer 37 to partially expose the outer surface of the electrode layer 37. In addition, the upper surface of the insulating film 38 may be smooth (rounded) in cross section in a region adjacent to at least one end of the light emitting element 30.
[0153] The thickness of the insulating film 38 may be in the range of 10 nm to 1.0 μm, but is not limited thereto. The thickness of the insulating film 38 may be, for example, about 40 nm.
[0154] The insulating film 38 may include silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum nitride (AlN) or aluminum oxide (Al 2 O 3 ). Therefore, it can prevent an electrical short circuit that may occur when the active layer 36 is in direct contact with an electrode that transmits an electrical signal to the light emitting element 30. In addition, since the insulating film 38 protects the outer surface of the light emitting element 30 including the active layer 36, a decrease in light emitting efficiency can be prevented.
[0155] In addition, in some embodiments, the outer surface of the insulating film 38 may be processed. The light emitting elements 30 dispersed in a predetermined ink may be sprayed onto the electrode, and then the light emitting elements 30 may be aligned. Here, the surface of the insulating film 38 may be hydrophobic or hydrophilically treated so that the light emitting elements 30 remain separated in the ink without being aggregated with other adjacent light emitting elements 30.
[0156] The length h of the light emitting element 30 may be in the range of 1 μm to 10 μm or 2 μm to 6 μm, and may be, for example, in the range of 3 μm to 5 μm. In addition, the diameter of the light emitting element 30 may be in the range of 30 nm to 700 nm, and the aspect ratio (height-width ratio) of the light emitting element 30 may be 1.2 to 100. However, the disclosure is not limited thereto, and the plurality of light emitting elements 30 included in the display device 10 may also have different diameters depending on the difference in the composition of the active layer 36. The diameter of the light emitting element 30 may be, for example, about 500 nm.
[0157] A process of manufacturing the display device 10 according to the embodiment will now be described further with reference to other drawings.
[0158] Figure 7 is a flowchart illustrating a process of manufacturing a display device according to an embodiment.
[0159] Reference Figure 7 The method of manufacturing the display device 10 according to the embodiment may include: preparing a target substrate SUB and forming a first insulating layer 51 on the target substrate SUB (operation S100); forming an electrode layer MTL on the target substrate SUB and the first insulating layer 51 (see Fig.10 )(operation S200); forming a plurality of electrodes 21 and 22 by removing a portion of the electrode layer MTL to expose the upper surface of the first insulating layer 51 (operation S300); and placing the light emitting element 30 on the first insulating layer 51 (operation S400). As described above, in the display device 10, the first insulating layer 51 is formed before forming the electrodes 21 and 22 electrically connected to the light emitting element 30. After the first insulating layer 51 is formed, the electrode layer MTL is formed to cover the first insulating layer 51, and the first and second electrodes 21 and 22 spaced apart from each other are formed by removing a portion of the electrode layer MTL through an etching process. The process of manufacturing the display device 10 will now be described in detail with further reference to other drawings.
[0160] Figures 8 to 17 is a cross-sectional view showing a process of manufacturing the display device according to the embodiment.
[0161] First, refer to Figure 8 , prepare a target substrate SUB on which a first insulating layer 51 and electrodes 21 and 22 are disposed. Although not shown in the drawings, the target substrate SUB may include the above-mentioned first substrate 11 and a circuit element consisting of a plurality of conductive layers and a plurality of insulating layers. For ease of description, the target substrate SUB will be shown and described as including them. In addition, a plurality of first dams 40 may be placed on the target substrate SUB. The first dams 40 may be spaced apart from each other and may protrude from the upper surface of the target substrate SUB. This is the same as described above. However, in some embodiments, the first dam 40 may be omitted.
[0162] Next, refer to Fig. 9, a first insulating layer 51 is formed on the target substrate SUB. The first insulating layer 51 may be disposed between the first embankments 40. The first insulating layer 51 may be formed by placing a layer including an insulating material on the target substrate SUB and the first embankment 40, and then partially removing the layer by an etching process. In an embodiment, the first insulating layer 51 may be formed by removing the insulating material by a dry etching process. When the first insulating layer 51 is formed by a dry etching process, two side surfaces of the first insulating layer 51 perpendicular to the upper surface of the target substrate SUB may be easily formed. Compared with a wet etching process, a dry etching process may have a smaller skew in which the cross-section of the material remaining after etching is inclined. In the manufacturing process of the display device 10, the first insulating layer 51 may be formed by etching the insulating material by a dry etching process, and the side surfaces of the first insulating layer 51 remaining after etching may be formed perpendicular to the upper surface of the target substrate SUB. Optionally, in an embodiment, the first embankment 40 and the first insulating layer 51 may include the same material and thus may be formed simultaneously in one process.
[0163] Next, refer to Figures 10 to 12 , an electrode layer MTL is formed on a target substrate SUB and a first insulating layer 51, and the electrode layer MTL is partially removed to expose an upper surface of the first insulating layer 51. A portion of the electrode layer MTL may be removed to form a first electrode 21 and a second electrode 22 spaced apart from each other. The electrode layer MTL may be disposed to cover the first bank 40 and the first insulating layer 51 disposed on the target substrate SUB. The electrode layer MTL may have substantially the same thickness, but a portion covering a side surface of the first insulating layer 51 may be relatively thin due to a step formed by the first insulating layer 51.
[0164] After forming the electrode layer MTL on the target substrate SUB, a photoresist PR is placed on the electrode layer MTL, and a portion of the electrode layer MTL is removed to expose the upper surface of the first insulating layer 51. The photoresist PR placed on the electrode layer MTL may overlap the first bank 40, and may not overlap the first insulating layer 51. In an embodiment, the photoresist PR may be placed on the electrode layer MTL to correspond to the shapes of the first electrode 21 and the second electrode 22. However, the disclosure is not limited thereto.
[0165] Next, the first electrode 21 and the second electrode 22 are formed by removing a portion of the electrode layer MTL through an exposure and development process. The first electrode 21 and the second electrode 22 are formed to be spaced apart from each other while contacting both side surfaces of the first insulating layer 51. As described above, the distance between the first electrode 21 and the second electrode 22 may be the same as the width of the first insulating layer 51. When the first insulating layer 51 is first formed, the distance between the electrodes 21 and 22 may be formed to be similar to a designed value compared to when the first electrode 21 and the second electrode 22 are formed without the first insulating layer 51. In addition, the cross section of each electrode 21 or 22 remaining after etching is tilted, and skew is less likely to occur, and process deviation may be small.
[0166] The process of partially removing the electrode layer MTL may be performed by a dry etching process or a wet etching process. In some embodiments, the process of partially removing the electrode layer MTL may include performing a wet etching process and then removing a residual layer using a dry etching process.
[0167] Reference Fig.13 and Fig.14 The process of partially removing the electrode layer MTL may include a first etching process of placing a photoresist PR and then removing a portion of the electrode layer MTL using a wet etching process, and a second etching process of removing the electrode layer MTL′ remaining after the first etching process by using a dry etching process.
[0168] The electrode layer MTL may include the same material as each of the electrodes 21 and 22, and the electrode layer MTL and the first insulating layer 51 may include different materials. Since the wet etching process has high selectivity for different materials, the electrode layer MTL may be only partially removed, with little damage to the first insulating layer 51. However, in the case of a wet etching process, a skew may be formed in which a cross section remaining after etching is inclined, or a residual layer may remain due to incomplete removal of the material. Through a subsequent dry etching process, the remaining electrode layer MTL' that is not removed may be removed, or the skew formed in the cross section may be removed. According to an embodiment, a wet etching process and a dry etching process may be sequentially performed in a process of partially removing the electrode layer MTL, and the first electrode 21 and the second electrode 22 may be formed without skew while the upper surface of the first insulating layer 51 is exposed. However, the disclosure is not limited thereto, and the process of forming the electrode layer MTL may also be performed only by a dry etching process or a wet etching process.
[0169] Next, refer to Fig.15 and Fig.16, a second bank 45 is formed on the target substrate SUB, and the light emitting element 30 is placed on the first insulating layer 51 and each of the electrodes 21 and 22. The second bank 45 may surround the area where the first bank 40 is disposed on the target substrate SUB. As described above, the second bank 45 may be disposed at each boundary between a plurality of sub-pixels PXn, and may separate the emission area EMA of each sub-pixel PXn from the cutout area CBA.
[0170] Both ends of each light emitting element 30 on the first insulating layer 51 may be placed on the first electrode 21 and the second electrode 22, respectively. The ink in which the light emitting element 30 is dispersed may be sprayed onto the target substrate SUB. In an embodiment, the light emitting element 30 dispersed in the ink may be prepared, and then the ink may be sprayed onto the target substrate SUB by a printing process using an inkjet printing device. The ink sprayed by the inkjet printing device may be placed in an area surrounded by the second bank 45. The second bank 45 may prevent the ink from overflowing to other adjacent sub-pixels PXn.
[0171] When the ink including the light emitting element 30 is sprayed, an electrical signal is transmitted to the electrodes 21 and 22 to place the light emitting element 30 on the first insulating layer 51. When the electrical signal is transmitted to the electrodes 21 and 22, an electric field may be generated on the electrodes 21 and 22. The light emitting element 30 dispersed in the ink may receive a dielectrophoretic force due to the electric field, and the dielectrophoretic force applied to the light emitting element 30 may change the orientation direction and position of the light emitting element 30, thereby placing the light emitting element 30 on the first insulating layer 51. Here, the length h of each light emitting element 30 may be greater than the distance between the first electrode 21 and the second electrode 22, and both ends of each light emitting element 30 may be placed on the first electrode 21 and the second electrode 22, respectively. Specifically, the distance between the first electrode 21 and the second electrode 22 may be the same as the width of the first insulating layer 51, and because the electrodes 21 and 22 are formed after the first insulating layer 51 is formed, the process deviation may be small. Therefore, both ends of each light emitting element 30 placed on the first insulating layer 51 by the dielectrophoretic force can be accurately placed on the first electrode 21 and the second electrode 22 , respectively, and the error in orientation or deflection degree between the light emitting elements 30 can be minimized.
[0172] Next, a process of cutting a portion of each of the first electrode 21 and the second electrode 22 disposed in the cutout area CBA is performed. Figure 2As described above, the first electrode 21 and the second electrode 22 extend in one direction but may be partially separated in the cutout area CBA. An electrical signal for aligning the light emitting element 30 may be simultaneously transmitted to the electrodes 21 and 22 connected to the sub-pixel PXn. When the light emitting element 30 is placed on the first insulating layer 51, a cutting process for separating each of the electrodes 21 and 22 of each sub-pixel PXn may be performed.
[0173] Next, refer to Fig.17 , a second insulating layer 52, a third insulating layer 53, a first contact electrode 26, a second contact electrode 27 and a fourth insulating layer 54 are formed on the light emitting element 30. Their arrangement and shape are the same as those described above. Through the above process, the display device 10 including the light emitting element 30 can be manufactured.
[0174] Other embodiments of the display device 10 will now be described with reference to other drawings.
[0175] Fig.18 is a cross-sectional view of a portion of a display device according to another embodiment.
[0176] Reference Fig.18 In the display device 10 according to the embodiment, the thickness WE3 of the first portion EP of each of the electrodes 21_1 and 22_1 may be less than the thickness of the first insulating layer 51. Although both ends of the light emitting element 30 may be disposed on the electrodes 21_1 and 22_1, respectively, the first portion EP of each of the electrodes 21_1 and 22_1 may not contact the light emitting element 30.
[0177] As described above, the process of partially removing the electrode layer MTL may be performed by a wet etching process and a dry etching process. The electrode layer MTL remaining after the etching process may cause misalignment of the light emitting element 30 or a short circuit between the electrodes 21 and 22. In order to prevent this, the etching process for removing the electrode layer MTL may be performed as an over-etching process. In this case, a portion of the electrode layer MTL disposed on the side surface of the first insulating layer 51 and a portion disposed on the first insulating layer 51 may be removed to a certain extent. Therefore, the thickness WE3 of the first portion EP of each of the electrodes 21_1 and 22_1 may be less than the thickness of the first insulating layer 51, and the first portion EP may not contact the side surfaces of both ends of the light emitting element 30. However, the light emitting element 30 may be horizontally disposed on the first insulating layer 51, and both end surfaces of the light emitting element 30 may smoothly contact the first contact electrode 26 and the second contact electrode 27. The current embodiment is different from Figure 4 The embodiment of the present invention is different in that the first portion EP of the first electrode 21_1 and the second electrode 22_1 do not contact both ends of the light emitting element 30. Therefore, any redundant description will be omitted below.
[0178] The first electrode 21 and the second electrode 22 may not necessarily extend in one direction. In some embodiments, each of the electrodes 21 and 22 of the display device 10 may include a portion extending with a varying width and a portion extending in a direction different from the above portion.
[0179] Fig.19 is a plan view of a sub-pixel of a display device according to another embodiment.
[0180] Reference Fig.19 , the electrodes 21_2 and 22_2 of the display device 10 according to the embodiment may each include a widening portion RE-E extending in the second direction DR2 and having a width greater than other portions, bent portions RE-B1 and RE-B2 extending in a direction inclined from the first direction DR1 and the second direction DR2, and connecting portions RE-C1 and RE-C2 connecting the bent portions RE-B1 and RE-B2 to the widening portion RE-E. Each of the electrodes 21_2 and 22_2 may generally extend in the second direction DR2, but may have a larger width in a portion, or may be bent in a direction inclined from the second direction DR2. The first electrode 21_2 and the second electrode 22_2 may be provided in a symmetrical structure with respect to the first insulating layer 51_2 disposed therebetween. The following description will focus on the shape of the first electrode 21_2.
[0181] The first electrode 21_2 may include a widening portion RE-E having a width greater than other portions. The widening portion RE-E may be disposed on each first bank 40 in the emission area EMA of each sub-pixel PXn, and may extend in the second direction DR2. The first insulating layer 51_2 may be disposed between the widening portion RE-E of the first electrode 21_2 and the widening portion RE-E of the second electrode 22_2, and the light emitting element 30 may be disposed on the first insulating layer 51_2. The first insulating layer 51_2 may contact the corresponding widening portions RE-E of the electrodes 21_2 and 22_2. In addition, the first contact electrode 26_2 and the second contact electrode 27_2 may be disposed on the widening portions RE-E of the electrodes 21_2 and 22_2, respectively, and the widths of the first contact electrode 26_2 and the second contact electrode 27_2 may be less than the width of the widening portion RE-E. This is the same as described above.
[0182] The connection portions RE-C1 and RE-C2 may be connected to both sides of each of the widening portions RE-E in the second direction DR2, respectively. The first connection portion RE-C1 is disposed on one side of each widening portion RE-E in the second direction DR2, and the second connection portion RE-C2 is disposed on the other side of each widening portion RE-E. The connection portions RE-C1 and RE-C2 may be connected to each widening portion RE-E and may be disposed across the emission area EMA and the second bank 45 of each sub-pixel PXn.
[0183] The width of the first connection portion RE-C1 and the second connection portion RE-C2 may be smaller than the width of each widening portion RE-E. One side of each of the connection portions RE-C1 and RE-C2 extending in the second direction DR2 may be colinearly connected to one side of each widening portion RE-E extending in the second direction DR2. For example, among both sides of the widening portion RE-E and both sides of the connection portions RE-C1 and RE-C2, the sides located outside the center of the emission area EMA may be connected to each other. Therefore, the distance DE1 between the widening portion RE-E of the first electrode 21_2 and the widening portion RE-E of the second electrode 22_2 may be smaller than the distance DE2 between the connection portions RE-C1 and RE-C2 of the first electrode 21_2 and the connection portions RE-C1 and RE-C2 of the second electrode 22_2.
[0184] The bent portions RE-B1 and RE-B2 are connected to the connection portions RE-C1 and RE-C2. The bent portions RE-B1 and RE-B2 may include a first bent portion RE-B1 connected to the first connection portion RE-C1 and disposed across the second bank 45 and the cutout area CBA, and a second bent portion RE-B2 connected to the second connection portion RE-C2 and disposed across the second bank 45 and the cutout area CBA of another sub-pixel PXn. The bent portions RE-B1 and RE-B2 connected to the connection portions RE-C1 and RE-C2 may be bent in a direction inclined from the second direction DR2, for example, toward the center of each sub-pixel PXn. Therefore, the shortest distance DE3 between the bent portions RE-B1 and RE-B2 of the first electrode 21_2 and the bent portions RE-B1 and RE-B2 of the second electrode 22_2 may be smaller than the distance DE2 between the connection portions RE-C1 and RE-C2 of the first electrode 21_2 and the connection portions RE-C1 and RE-C2 of the second electrode 22_2. However, the shortest distance DE3 between the bent portions RE-B1 and RE-B2 of the first electrode 21_2 and the bent portions RE-B1 and RE-B2 of the second electrode 22_2 may be greater than the distance DE1 between the widening portions RE-E.
[0185] A relatively wide contact portion RE-P may be formed at each portion where the first connection portion RE-C1 is connected to the first bent portion RE-B1. The contact portion RE-P may overlap the second bank 45, and a first contact hole CT1 of the first electrode 21_2 and a second contact hole CT2 of the second electrode 22_2 may be formed in the contact portion RE-P.
[0186] In addition, a residual portion RE-D remaining after the first electrode 21_2 and the second electrode 22_2 are separated in the cutout area CBA may be formed at the end of the first bent portion RE-B1. The residual portion RE-D may be a portion remaining after the electrodes 21_2 and 22_2 of the subpixels PXn adjacent in the second direction DR2 are cut in the cutout area CBA.
[0187] Fig.19 Examples and Figure 2 The difference of the embodiment is that the first electrode 21_2 and the second electrode 22_2 each include a widening portion RE-E, connecting portions RE-C1 and RE-C2, and bent portions RE-B1 and RE-B2, and are symmetrically arranged with respect to the center of each sub-pixel PXn. However, the disclosure is not limited thereto. In some cases, the first electrode 21_2 and the second electrode 22_2 may have different shapes.
[0188] Fig. 20 is a plan view of a sub-pixel of a display device according to another embodiment. Fig.21 It is along Fig. 20 A cross-sectional view taken along line QB-QB'.
[0189] Reference Fig. 20 and Fig.21 , the display device 10 may include a plurality of first electrodes 21_3 and a plurality of second electrodes 22_3 in each sub-pixel PXn. The first electrode 21_3 may have Fig.19 The second electrode 22_3 may have the same shape as the shape of the embodiment of the present invention. A plurality of first electrodes 21_3 (eg, two first electrodes 21_3) may be symmetrically arranged with respect to the center of each sub-pixel PXn. Figure 2The shape of the embodiment is the same as the shape of the embodiment. A plurality of second electrodes 22_3 (for example, two second electrodes 22_3) may be disposed between the first electrode 21_3. The distance between the first electrode 21_3 and the second electrode 22_3 may vary depending on a portion of the first electrode 21_3. For example, the distance DE1 between the widened portion RE-E and the second electrode 22_3 may be smaller than the distance DE2 between the connecting portions RE-C1 and RE-C2 and the second electrode 22_3 and the distance DE3 between the bent portions RE-B1 and RE-B2 and the second electrode 22_3. The distance DE2 between the connecting portions RE-C1 and RE-C2 and the second electrode 22_3 may be greater than the distance DE3 between the bent portions RE-B1 and RE-B2 and the second electrode 22_3. However, the disclosure is not limited thereto. Since the shapes of the electrodes 21_3 and 22_3 are similar to those described above with reference to Figure 2 and Fig.19 The shapes described are the same, so their detailed description will be omitted.
[0190] The arrangement and shape of the first bank 40 ( 41_3 and 42_3 ), the first insulating layer 51_3 , and the contact electrodes 26_3 , 27_3 , and 28_3 provided in each subpixel PXn may vary according to the arrangement of the first electrode 21_3 and the second electrode 22_3 .
[0191] The first insulating layer 51_3 may be disposed between the widened portion RE-E of each first electrode 21_3 and the second electrode 22_3, and both side surfaces of the first insulating layer 51_3 may be in contact with the widened portion RE-E of each first electrode 21_3 and the second electrode 22_3, respectively. The light emitting element 30 may have one end disposed on the widened portion RE-E of the first electrode 21_3 and the other end disposed on the second electrode 22_3.
[0192] The first bank 40 may include a first sub-bank 41_3 and a second sub-bank 42_3 having different widths. The first sub-bank 41_3 and the second sub-bank 42_3 may both extend in the second direction DR2, but may have different widths measured in the first direction DR1. Since the first sub-bank 41_3 has a greater width than the second sub-bank 42_3, each of the first sub-banks 41_3 may be arranged across a boundary with a sub-pixel PXn adjacent to the first direction DR1. For example, the first sub-bank 41_3 may be arranged in the emission area EMA of each sub-pixel PXn and at a boundary between the sub-pixels PXn. Therefore, a portion of the second bank 45_3 extending in the second direction DR2 may be partially arranged on each first sub-bank 41_3. Two first sub-banks 41_3 may be partially arranged in one sub-pixel PXn. One second sub-bank 42_3 may be arranged between the first sub-banks 41_3.
[0193] The second sub-bank 42_3 may extend in the second direction DR2 at the center of the emission area EMA of each sub-pixel PXn. The second sub-bank 42_3 may have a smaller width than the first sub-bank 41_3 and may be disposed between and spaced apart from the first sub-bank 41_3.
[0194] The widened portion RE-E of the first electrode 21_3 and the second bank 45_3 may be disposed on the first sub-bank 41_3. The widened portion RE-E of the first electrode 21_3 of the adjacent sub-pixel PXn in the first direction DR1 may be disposed on the first sub-bank 41_3. That is, the widened portions RE-E of the two first electrodes 21_3 are disposed on one first sub-bank 41_3. Two second electrodes 22_3 may be disposed on the second sub-bank 42_3. The second electrodes 22_3 may be disposed on both sides of the second sub-bank 42_3 extending in the second direction DR2, and may be spaced apart from each other on the second sub-bank 42_3.
[0195] Any one of the first electrodes 21_3 may include a contact portion RE-P to form a first contact hole CT1, and the other first electrode 21_3 may not include the contact portion RE-P. Similarly, any one of the second electrodes 22_3 may include a contact portion RE-P to form a second contact hole CT2, and the other second electrode 22_3 may not include the contact portion RE-P. The electrodes 21_3 and 22_3 connected to the first transistor TR1 or the second voltage wiring VL2 through the contact hole CT1 or CT2 may receive electrical signals therefrom, and the other electrodes 21_3 and 22_3 may receive electrical signals through contact electrodes 26_3, 27_3, and 28_3 to be described later.
[0196] Both ends of each light emitting element 30 on the first insulating layer 51_3 are disposed on the widened portion RE-E of the first electrode 21_3 and the second electrode 22_3. Of both ends of each light emitting element 30, one end where the second semiconductor layer 32 is disposed may be disposed on the first electrode 21_3. Therefore, one end of each first light emitting element 30A disposed on the left side of the center of each sub-pixel PXn between the electrodes 21_3 and 22_3 and one end of each second light emitting element 30B disposed on the right side of the center of each sub-pixel PXn between the electrodes 21_3 and 22_3 may face in opposite directions.
[0197] The display device 10 including a larger number of electrodes 21_3 and 22_3 may include a larger number of contact electrodes 26_3, 27_3, and 28_3.
[0198] In an embodiment, the contact electrodes 26_3, 27_3 and 28_3 may include a first contact electrode 26_3 disposed on any one of the first electrodes 21_3, a second contact electrode 27_3 disposed on any one of the second electrodes 22_3, and a third contact electrode 28_3 disposed on another first electrode 21_3 and another second electrode 22_3 and surrounding the second contact electrode 27_3.
[0199] The first contact electrode 26_3 is disposed on any one of the first electrodes 21_3. For example, the first contact electrode 26_3 is disposed on the widened portion RE-E of the first electrode 21_3 on which one end of each first light emitting element 30A is disposed. The first contact electrode 26_3 may be in contact with the widened portion RE-E of the first electrode 21_3 and one end of each first light emitting element 30A. The second contact electrode 27_3 is disposed on any one of the second electrodes 22_3. For example, the second contact electrode 27_3 is disposed on the second electrode 22_3 on which the other end of each second light emitting element 30B is disposed. The second contact electrode 27_3 may be in contact with the second electrode 22_3 and the other end of each second light emitting element 30B. The first contact electrode 26_3 and the second contact electrode 27_3 may be in contact with the electrodes 21_3 and 22_3 in which the first contact hole CT1 and the second contact hole CT2 are formed, respectively. The first contact electrode 26_3 may contact the first electrode 21_3 electrically connected to the first transistor TR1 through the first contact hole CT1, and the second contact electrode 27_3 may contact the second electrode 22_3 electrically connected to the second voltage wiring VL2 through the second contact hole CT2. The first contact electrode 26_3 and the second contact electrode 27_3 may transfer an electrical signal received from the first transistor TR1 or the second voltage wiring VL2 to the light emitting element 30. The first contact electrode 26_3 and the second contact electrode 27_3 are substantially the same as those described above.
[0200] Electrodes 21_3 and 22_3 in which contact holes CT1 and CT2 are not formed are further provided in each sub-pixel PXn. Since the electrodes 21_3 and 22_3 in which contact holes CT1 and CT2 are not formed do not directly receive an electrical signal from the first transistor TR1 or the second voltage wiring VL2, they may be substantially in a floating state. However, a third contact electrode 28_3 may be provided on the electrodes 21_3 and 22_3 in which contact holes CT1 and CT2 are not formed, and an electrical signal transmitted to the light emitting element 30 may flow through the third contact electrode 28_3.
[0201] The third contact electrode 28_3 may be disposed on the first electrode 21_3 and the second electrode 22_3 in which the contact holes CT1 and CT2 are not formed, and may surround the second contact electrode 27_3. The third contact electrode 28_3 may include a portion extending in the second direction DR2 and a portion connecting them and extending in the first direction DR1 to surround the second contact electrode 27_3. The portions of the third contact electrode 28_3 extending in the second direction DR2 may be respectively disposed on the first electrode 21_3 and the second electrode 22_3 in which the contact holes CT1 and CT2 are not formed, and may contact the light emitting element 30. For example, the portion of the third contact electrode 28_3 disposed on the second electrode 22_3 may contact the other end of each first light emitting element 30A, and the portion disposed on the first electrode 21_3 may contact one end of each second light emitting element 30B. The portion of the third contact electrode 28_3 extending in the first direction DR1 may overlap the second electrode 22_3 in which the second contact hole CT2 is formed, but another insulating layer (not shown) may be disposed between them so that they are not directly connected to each other.
[0202] The electrical signal transmitted from the first contact electrode 26_3 to one end of each first light emitting element 30A is transmitted to the third contact electrode 28_3 in contact with the other end of each first light emitting element 30A. The third contact electrode 28_3 can transmit the electrical signal to one end of each second light emitting element 30B, and the electrical signal can be transmitted to the second electrode 22_3 through the second contact electrode 27_3. Therefore, the electrical signal for light emission of the light emitting element 30 can be transmitted to only one first electrode 21_3 and one second electrode 22_3, and the first light emitting element 30A and the second light emitting element 30B can be connected in series through the third contact electrode 28_3.
[0203] In summarizing the detailed description, it will be appreciated by those skilled in the art that many changes and modifications may be made to the preferred embodiments without departing substantially from the principles of the invention. Therefore, the preferred embodiments of the disclosed invention are only used in a general and descriptive sense, and not for the purpose of limitation.
Claims
1. A display device, comprising: first base; a first electrode and a second electrode spaced apart from each other on the first substrate; a first insulating layer, disposed between the first electrode and the second electrode and not overlapping the first electrode and the second electrode in a thickness direction; as well as A light emitting element is disposed on the first insulating layer, Wherein, two side surfaces of the first insulating layer are in contact with the first electrode and the second electrode, A width of each of first portions of the first electrode and the second electrode contacting the side surface of the first insulating layer is smaller than a thickness of portions other than the first portion.
2. The display device according to claim 1, wherein: The first portions of the first electrode and the second electrode that are in contact with the side surface of the first insulating layer are in contact with the side surface of the first insulating layer along the thickness direction of the first insulating layer, respectively.
3. The display device according to claim 2, wherein: The thickness of the first insulating layer is greater than the maximum thickness of each of the first electrode and the second electrode.
4. The display device according to claim 2, wherein: The upper surface of the first portion and the upper surface of the first insulating layer are located in the same plane, and Both ends of the light emitting element are in contact with the first electrode and the first portion of the second electrode.
5. The display device according to claim 2, wherein: A height of a contact surface between each of the first electrode and the second electrode and a corresponding side surface of the first insulating layer is greater than a thickness of each of the first electrode and the second electrode.
6. The display device according to claim 1, wherein: The light emitting element extends in one direction, and The length of the light emitting element is greater than the width of the first insulating layer.
7. The display device according to claim 6, wherein: One end of the light emitting element is disposed on the first electrode, and the other end is disposed on the second electrode.
8. The display device according to claim 6, further comprising a second insulating layer, at least a portion of the second insulating layer being disposed on the light emitting element. in, The width of the second insulating layer is smaller than the width of the first insulating layer.
9. The display device according to claim 8, further comprising: a first contact electrode, disposed on the first electrode and in contact with one end of the light emitting element; as well as The second contact electrode is disposed on the second electrode and contacts the other end of the light emitting element.
10. The display device according to claim 8, further comprising a plurality of first banks disposed between the first substrate and the first electrode and between the first substrate and the second electrode, in, The first insulating layer does not contact the first bank.
11. A display device, comprising: first base; A first electrode, disposed on the first substrate and extending in a first direction; a second electrode spaced apart from the first electrode in a second direction and extending in the first direction; a first insulating layer, disposed between the first electrode and the second electrode and extending in the first direction; as well as a plurality of light emitting elements, disposed on the first insulating layer and arranged along the first direction, Wherein, two side surfaces of the first insulating layer are in contact with the first electrode and the second electrode, One end of each of the light emitting elements is disposed on the first electrode, and the other end is disposed on the second electrode, and The first electrode includes: a bent portion extending in a direction inclined from the second direction and the first direction; a widened portion extending in the first direction and having a width greater than that of the bent portion; and a connecting portion connecting the bent portion with the widened portion and extending in the first direction, and the first insulating layer is arranged between the widened portion of the first electrode and the second electrode, so that one side surface of the first insulating layer is in contact with the widened portion of the first electrode.
12. The display device according to claim 11, further comprising: a first contact electrode disposed on the first electrode and in contact with one end of each of the light emitting elements; as well as a second contact electrode provided on the second electrode and in contact with the other end of each of the light emitting elements, Wherein, at least a portion of each of the first contact electrode and the second contact electrode overlaps with the first insulating layer in a thickness direction.
13. The display device according to claim 11, wherein: The second electrode is formed with respect to the first insulating layer in a symmetrical structure with the first electrode, and The other side surface of the first insulating layer contacts the widened portion of the second electrode.
14. The display device according to claim 13, wherein: A distance between the widened portion of the first electrode and the widened portion of the second electrode is smaller than a distance between the connecting portion of the first electrode and the connecting portion of the second electrode, and The shortest distance between the bent portion of the first electrode and the bent portion of the second electrode is greater than the distance between the widened portions but smaller than the distance between the connecting portions.
15. A method for manufacturing a display device, the method comprising: forming a first insulating layer on a target substrate, and forming an electrode layer covering the target substrate and the first insulating layer; forming a first electrode and a second electrode spaced apart from each other by the first insulating layer by partially removing the electrode layer to expose an upper surface of the first insulating layer; as well as placing a plurality of light emitting elements on the first insulating layer, Wherein, two side surfaces of the first insulating layer are in contact with the first electrode and the second electrode, A width of each of first portions of the first electrode and the second electrode contacting the side surface of the first insulating layer is smaller than a thickness of portions other than the first portion.
16. The method according to claim 15, wherein: The step of removing the electrode layer includes a first etching process performed as a wet etching process and a second etching process performed as a dry etching process after the first etching process. 17 . The method of claim 16 , comprising a process of forming a plurality of first banks spaced apart from each other on the target substrate before forming the first insulating layer.
18. The method according to claim 17, wherein: The electrode layer is formed to cover the first bank and the first insulating layer, and The first electrode and the second electrode are disposed on the first bank, but at least a portion of each of the first electrode and the second electrode is directly disposed on the target substrate.
Citation Information
Patent Citations
Pixel structure, display apparatus and method of manufacturing the pixel structure
CN107610602A
Display device and method of manufacturing display device
CN110828422A
Display device and method of manufacturing same
CN110854150A