A new near-hemispherical detector and its preparation method

Abstract

The present application relates to a kind of new near hemispherical probe and its preparation method, the near hemispherical probe can retain the excellent electrical characteristics of three-dimensional spherical structure, the area of collection electrode is small under the same electrode spacing, and the capacitance is low, and charge collection efficiency is almost independent of θ.Hemispherical electrode has good sealing, completely isolates detection sensitive area from substrate, dark current is not affected by wafer thickness, and extremely low noise is conducive to low-energy X-ray or low-energy particle detection.

Description

Technical Field

[0001] This invention relates to the field of detector technology, and specifically to a novel near-hemispherical detector and its fabrication method. Background Technology

[0002] Compared to two-dimensional planar electrode detectors, three-dimensional spherical electrode silicon detectors (such as...) have... Figure 1 (As shown) The electrodes are embedded in the silicon substrate, allowing the total depletion voltage to be independent of the silicon bulk thickness and only related to the electrode spacing, decreasing as the electrode spacing decreases. Compared to traditional three-dimensional detectors such as three-dimensional columnar electrodes, three-dimensional double-sided columnar electrodes, and three-dimensional trench electrodes, the collecting electrodes of the three-dimensional spherical electrode silicon detector are point-shaped or planar electrodes. For the same electrode spacing, the collecting electrode area is small, the capacitance is low, and the charge collection efficiency is almost independent of θ. Theoretically, the three-dimensional spherical electrode silicon detector has the optimal electrical characteristics (electric field distribution, potential distribution, etc.), but it cannot be fabricated using current processes.

[0003] Therefore, there is a need to develop a new detector that can retain the excellent electrical properties of a three-dimensional spherical structure. Summary of the Invention

[0004] To overcome the problems existing in the prior art, the inventors discovered through research that a three-dimensional hemispherical electrode silicon detector, such as... Figure 2-5 As shown, it retains the excellent electrical properties of a spherical structure, and the hemispherical electrode and the central collecting electrode in the detector can be fabricated separately using a double-sided process. Based on the above findings, this invention provides a novel near-hemispherical detector and its fabrication method. This near-hemispherical detector can retain the excellent electrical properties of a three-dimensional spherical structure. For the same electrode spacing, the collecting electrode area is small and the capacitance is low, and the charge collection efficiency is almost independent of θ. The hemispherical electrode has good sealing properties, completely isolating the detection sensitive area from the substrate. The dark current is not affected by the wafer thickness, and the extremely low noise is beneficial for low-energy X-ray or low-energy particle detection.

[0005] To achieve the above objectives, the present invention provides the following technical solution.

[0006] A near-hemispherical detector, comprising:

[0007] A first silicon oxide layer, the first silicon oxide layer including a plurality of grooves extending through its upper and lower surfaces, the plurality of grooves not communicating with each other, and filled therein with electrode material;

[0008] A substrate layer is disposed on the upper surface of the first silicon oxide layer; the substrate layer includes: a ring structure and a near-hemispherical structure; the ring structure is disposed around the near-hemispherical structure, and the ring structure and the near-hemispherical structure are in contact with each other; the near-hemispherical structure includes a shallow surface portion of the near-hemispherical surface, a main body portion, and a shallow surface portion at the center of the bottom surface; the shallow surface portion of the near-hemispherical surface and the shallow surface portion at the center of the bottom surface are independently either n-type heavily doped regions or p-type heavily doped regions, and the doping types of the two are different; both the n-type heavily doped regions and the p-type heavily doped regions are in contact with the electrode material; and

[0009] A second silicon oxide layer covers the substrate layer.

[0010] The present invention also provides a method for fabricating a near-hemispherical detector, comprising:

[0011] S100: Provides a substrate;

[0012] S200: A silicon oxide layer is formed on both the upper and lower surfaces of the substrate, wherein the silicon oxide layer located on the lower surface of the substrate is a first silicon oxide layer;

[0013] S300: Etch the silicon oxide layer on the upper surface of the substrate and the substrate to form an annular trench;

[0014] S400: Ions are implanted into the bottom of the annular trench or into the bottom and sidewalls of the annular trench to form an n-type heavily doped region or a p-type heavily doped region, and the lower surface of the n-type heavily doped region or the p-type heavily doped region is in contact with the first silicon oxide layer.

[0015] S500: Remove the remaining silicon oxide layer on the upper surface of the substrate;

[0016] S600: Fill the annular trench with silicon oxide and cover the upper surface of the substrate;

[0017] S700: Repeat steps S300-S600 several times until a near-hemispherical structure is formed. In this process, the annular trenches formed by each etching are connected to each other, the depth of the annular trenches formed by each etching gradually decreases, the ions implanted each time are the same, and the n-type heavily doped regions or p-type heavily doped regions formed after each ion implantation are in contact with each other.

[0018] S800: Etch the first silicon oxide layer to form a first groove, exposing the central portion of the bottom surface of the near-hemispherical structure;

[0019] S900: Ions are implanted into the shallow surface layer of the exposed center portion of the bottom surface to form an n-type heavily doped region or a p-type heavily doped region. This step is different from the doping type in step S400. Then, electrode material is filled into the first groove.

[0020] S1000: Etch the first silicon oxide layer again to form a second groove, exposing the lower surface of the n-type heavily doped region or the p-type heavily doped region formed in step S400; and

[0021] S1100: Fill the second groove with electrode material.

[0022] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0023] 1. This invention provides a novel near-hemispherical detector that retains the excellent electrical characteristics of a three-dimensional spherical structure, with a small collecting electrode area and low capacitance for the same electrode spacing, and the charge collection efficiency is almost independent of θ.

[0024] 2. The depletion voltage of the near-hemispherical detector of the present invention is related to the electrode spacing and can be set to below 1V.

[0025] 3. The near-hemispherical detector of the present invention has no dead zone in its detection unit, thereby improving the carrier collection efficiency and the coherence between detection units is extremely low.

[0026] 4. The near-hemispherical detector of the present invention has low dark current, and its dimensions are not affected by substrate thickness once the size of the near-hemispherical detector device is determined. Figure 22 As can be seen.

[0027] 5. The near-hemispherical detector of the present invention has a short signal response time and high charge collection efficiency.

[0028] 6. The electric field and potential distribution of the near-hemispherical detector of the present invention are uniform, which is beneficial to carrier collection. Attached Figure Description

[0029] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0030] Figure 1 This is a schematic diagram of a three-dimensional cylindrical coordinate system and a schematic diagram of an ideal three-dimensional spherical electrode silicon detector unit.

[0031] Figure 2 This is a schematic diagram of a three-dimensional hemispherical electrode silicon detector.

[0032] Figure 3 This is a top view of a three-dimensional hemispherical electrode silicon detector and its electric field distribution.

[0033] Figure 4 This is a vertical cross-sectional view of a three-dimensional hemispherical electrode silicon detector.

[0034] Figure 5 This is a simulation diagram of the potential of a three-dimensional hemispherical electrode silicon detector.

[0035] Figure 6 This is a schematic diagram of the near-hemispherical detector of the present invention.

[0036] Figure 7-14 The following is the fabrication process flow of the near-hemispherical detector of the present invention.

[0037] Figure 15 This is a schematic diagram of the structure obtained after ion implantation into the bottom of the annular trench following the second etching.

[0038] Figure 16 This is a design drawing of the aspect ratio of the annular groove of the present invention.

[0039] Figure 17 This is a simulation diagram of the impurity ion distribution process after the first to third deep etching-ion implantation-filling in the embodiments of the present invention.

[0040] Figure 18 This is a simulation diagram of the activated B ion concentration distribution in the near-hemispherical detector prepared according to an embodiment of the present invention.

[0041] Figure 19 The electric field distribution diagram is shown for the near-hemispherical detector prepared according to an embodiment of the present invention.

[0042] Figure 20 The potential distribution diagram is shown for the near-hemispherical detector prepared according to an embodiment of the present invention.

[0043] Figure 21 The electron current density distribution diagram of the near-hemispherical detector prepared according to an embodiment of the present invention.

[0044] Figure 22 A comparison of dark current for 3D detectors with the same radius but different structures.

[0045] Explanation of reference numerals in the attached figures:

[0046] 100 is the first silicon oxide layer, 101 is the groove, 102 is the electrode material, 200 is the substrate layer, 210 is the ring structure, 220 is the near-hemispherical structure, 221 is the shallow surface part of the near-hemispherical surface, 222 is the main body part, 223 is the shallow surface part of the bottom center, 300 is the second silicon oxide layer, and 400 is the ring trench. Detailed Implementation

[0047] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0048] Existing three-dimensional spherical electrode silicon detectors theoretically possess optimal electrical properties (electric field distribution, potential distribution, etc.), but they cannot be fabricated using current processes. Therefore, this invention provides a novel near-hemispherical detector that retains the excellent electrical properties of a three-dimensional spherical structure.

[0049] The near-hemispherical detector of the present invention will be further described below with reference to the accompanying drawings.

[0050] See Figure 6 The near-hemispherical detector of the present invention includes: a first silicon oxide layer 100, the first silicon oxide layer 100 including a plurality of grooves 101 penetrating its upper and lower surfaces, the plurality of grooves 101 being non-communicating with each other, and filled therein with electrode material 102; a substrate layer 200, the substrate layer 200 being disposed on the upper surface of the first silicon oxide layer 100; the substrate layer 200 includes: an annular structure 210 and a near-hemispherical structure 220; the annular structure 210 is disposed around the near-hemispherical structure 220, and the annular structure 210 and the near-hemispherical structure 220 are disposed around the periphery of the near-hemispherical structure 220. Structures 220 are in contact with each other; the near-hemispherical structure 220 includes a shallow surface portion 221 of the near-hemispherical surface, a main body portion 222, and a shallow surface portion 223 at the center of the bottom surface; the shallow surface portion 221 of the near-hemispherical surface and the shallow surface portion 223 at the center of the bottom surface are independently n-type heavily doped regions or p-type heavily doped regions, and the doping types of the two are different; both the n-type heavily doped regions and the p-type heavily doped regions are in contact with the electrode material 102; and a second silicon oxide layer 300 covers the substrate layer 200.

[0051] The near-hemispherical detector of the present invention has the following advantages: 1. It can retain the excellent electrical characteristics of a three-dimensional spherical structure, with a small collecting electrode area and low capacitance for the same electrode spacing, and the charge collection efficiency is almost independent of θ; 2. The depletion voltage is related to the electrode spacing and can be set to below 1V; 3. There is no dead zone in the detection unit, thereby improving the carrier collection efficiency, and the coherence between detection units is extremely low; 4. The dark current is low, and the size of the near-hemispherical detector device is not affected by the substrate thickness after the size is determined; 5. The signal response time is short and the charge collection efficiency is high; 6. The electric field and potential distribution are uniform, which is beneficial to carrier collection.

[0052] In some embodiments of the present invention, the doping concentration of the n-type heavily doped region may be 1 × 10⁻⁶.17 -1×10 20 cm -3 The doping concentration of the heavily doped p-type region can be 1 × 10⁻⁶. 17 -1×10 20 cm -3 .

[0053] In some embodiments of the present invention, the ring structure 210 may be lightly n-type or lightly p-type doped. The main body 222 of the near-hemispherical structure 220 may be lightly n-type or lightly p-type doped. This arrangement enables the formation of P+NN+ junctions, N+NP+ junctions, P+PN+ junctions, or N+PP+ junctions in the near-hemispherical structure 220. The doping concentration of the n-type or p-type light doping may be 1 × 10⁻⁶. 10 -1×10 13 cm -3 The lightly doped n-type ion can be a phosphorus ion. The lightly doped p-type ion can be a boron ion.

[0054] In some embodiments of the present invention, the near-hemispherical surface may be pyramidal or polygonal. Of course, the type of near-hemispherical surface of the present invention is not limited to the two mentioned above.

[0055] In some embodiments of the present invention, there are two grooves 101. One groove 101 is an annular groove, in which the electrode material 102 is in contact with the shallow surface portion 221 of the near-hemispherical surface. The other groove 101 is located at the center of the annular groove, in which the electrode material 102 is in contact with the shallow surface portion 223 at the center of the bottom surface. This arrangement makes the electric field and potential distribution of the near-hemispherical detector uniform, which is beneficial for carrier collection.

[0056] In some embodiments of the invention, the height of the annular structure 210 is greater than the height of the near-hemispherical structure 220. The near-hemispherical structure 220 is formed by etching, and therefore its height is less than the height of the annular structure 210.

[0057] In this invention, the radius of the near-hemispherical structure 220 can be adjusted according to the actual application.

[0058] In some embodiments of the present invention, the substrate layer 200 is made of ultrapure high-resistivity silicon, epitaxial silicon, silicon-on-insulator, other semiconductor materials capable of being epitaxially grown on a silicon substrate, or a multilayer stack of the same.

[0059] In some embodiments of the present invention, the electrode material 102 may be aluminum, copper or tungsten.

[0060] This invention also provides a method for fabricating the aforementioned near-hemispherical detector, specifically including the following steps, see below. Figure 7-14 .

[0061] S100: Provides a substrate.

[0062] The substrate is made of ultrapure high-resistivity silicon, epitaxial silicon, silicon-on-insulator, other semiconductor materials that can be epitaxially grown on a silicon substrate, or a multilayer stack of the same.

[0063] S200: A silicon oxide layer is formed on both the upper and lower surfaces of the substrate, wherein the silicon oxide layer located on the lower surface of the substrate is a first silicon oxide layer 100.

[0064] The thickness of the silicon oxide layer can be 0.5-2 μm. The silicon oxide layer can be formed by chemical vapor deposition. This invention does not impose any particular limitation on the method for forming the silicon oxide layer.

[0065] In some embodiments, the method for forming the silicon oxide layer includes: performing wet oxidation or dry oxidation on the upper and lower surfaces of the substrate (but considering the oxidation rate and the low requirements for oxide layer quality, wet oxidation is generally chosen) to grow the silicon oxide layer. A slightly larger silicon oxide layer thickness can offset the stress caused by deep trench etching, thereby reducing wafer bending.

[0066] S300: Etch the silicon oxide layer on the upper surface of the substrate and the substrate to form an annular trench 400, see [link to documentation]. Figure 7 .

[0067] Etching can be performed by combining photolithography and deep reactive ion etching.

[0068] S400: Ions are implanted into the bottom of the annular trench or into the bottom and sidewalls of the annular trench to form an n-type heavily doped region or a p-type heavily doped region, and the lower surface of the n-type heavily doped region or the p-type heavily doped region is brought into contact with the first silicon oxide layer 100.

[0069] In some embodiments of the present invention, see Figure 8 In step S400, ions can be implanted into the bottom and sidewalls of the annular trench. The implantation parameters include: an ion implantation angle of -80° to 80°, a rotation angle of -360° to 360°, and a dose of 1×10⁻⁶. 13 -1×10 17 cm -2 The energy ranges from 30 to 2000 keV, and the implantation depth is greater than 0 and less than or equal to 2 μm. By controlling the implantation parameters, ion doping can be formed on the bottom and sidewalls of the annular trench, ensuring that the n-type or p-type heavily doped regions formed after each ion implantation are in contact with each other, thereby forming a conductive path.

[0070] In some embodiments of the present invention, in step S400, ions may be implanted into the bottom of the annular trench, wherein the implantation parameters include: a dose of 0.8 × 10⁻⁶. 15 -1.2×10 15 cm -2 The implantation depth is 2-5 μm. By controlling the implantation parameters, ion doping can be formed at the bottom of the annular trench, and it can be ensured that the n-type heavily doped regions or p-type heavily doped regions formed after each ion implantation are in contact with each other, thereby forming a conductive path. Figure 15 This is a schematic diagram of the structure obtained after ion implantation into the bottom of the annular trench following the second etching.

[0071] S500: Remove the remaining silicon oxide layer on the upper surface of the substrate, see [link to previous section]. Figure 9 .

[0072] The remaining silicon oxide layer can be removed by wet etching. For example, HF acid can be used for wet etching.

[0073] S600: Fill the annular trench with silicon oxide and cover the upper surface of the substrate. See [link to relevant documentation]. Figure 10 .

[0074] This invention does not impose any particular limitation on the method of forming silicon oxide. In some embodiments, a thin layer of SiO2 (the thickness of which can be [missing information]) is first thermally oxidized to grow on the sidewalls of the annular trench. Then, a thick (μm-level) SiO2 layer is deposited using high-density plasma-enhanced chemical vapor deposition (PECVD), followed by chemical mechanical polishing (CMP) to thin the SiO2 layer on the upper surface of the substrate to 1-2 μm.

[0075] In some cases, after the annular trench is filled with silicon oxide, the silicon oxide layer within the annular trench may contain partial voids, such as... Figure 11 As shown, the presence of voids can appropriately reduce the stress problems caused by the etching and filling of annular trenches, reduce wafer bending, and improve alignment accuracy, but it may also bring reliability issues, requiring a trade-off between the two.

[0076] S700: Repeat steps S300-S600 several times until a near-hemispherical structure 220 is formed. In this process, the annular trenches formed by each etching are interconnected, the depth of the annular trenches gradually decreases with each etching, the number of implanted ions is the same each time, and the n-type or p-type heavily doped regions formed after each ion implantation are in contact with each other. See [link to documentation]. Figure 12-14 .

[0077] In this invention, the previous etching is connected to the next etching, so that the annular trenches formed by each etching (including all the annular trenches formed in steps 400 and 700) are connected to each other.

[0078] In this invention, the aspect ratio of the annular groove obtained by the next etching is smaller than that of the previous etching, thereby ensuring that a near-hemispherical structure 220 can be formed.

[0079] In this invention, the same ions are implanted in steps S400 and S700 each time. The implanted ions can be phosphorus ions or boron ions. The n-type heavily doped regions or p-type heavily doped regions formed after each ion implantation are in contact with each other, thereby achieving conductivity.

[0080] In this invention, see Figure 16 The aspect ratio of the annular trench formed in each etching (including all etching in steps 400 and 700) is calculated according to the following two formulas:

[0081]

[0082] w=kh (2)

[0083] Wherein, H is the substrate thickness, R is the radius of the main body 222 of the near-hemispherical structure 220, x is the distance from the inner wall of the annular trench to the central axis of symmetry of the near-hemispherical structure 220, l is the ion implantation depth in step 900, h is the etching depth of the annular trench, w is the etching width of the annular trench, and k is the reciprocal of the aspect ratio.

[0084] After determining H, R, and l, formulas (1) and (2) can be calculated using the mathematical software Matlab. This allows for the determination of the width and depth of the annular trench at different positions along the radial direction for various aspect ratios. In actual manufacturing processes, appropriate data can be selected based on the size of the detector device, substrate thickness, and other factors. The width of the annular trench can be kept constant, with only the depth varying. Alternatively, the depth can be selected based on the rate of change of the sphere, thereby reducing the number of processing steps.

[0085] In some embodiments, x can be 0 to 20 μm.

[0086] S800: Etch the first silicon oxide layer 100 to form a first groove, exposing the center portion of the bottom surface of the near-hemispherical structure 220.

[0087] S900: Ions are injected into the shallow surface of the exposed center portion of the bottom surface to form an n-type heavily doped region or a p-type heavily doped region. This step is different from the doping type in step S400. Then, electrode material 102 is filled into the first groove.

[0088] In step S900, the implantation parameters include: an ion implantation angle of -80° to 80°, a rotation angle of -360° to 360°, and a dose of 1×10⁻⁶. 13 -1×10 17 cm -2 The energy ranges from 30 to 2000 keV, and the implantation depth is 0.8–1.2 μm. The implanted ions can be boron ions or phosphorus ions.

[0089] S1000: Etch the first silicon oxide layer 100 again to form a second groove, exposing the lower surface of the n-type heavily doped region or the p-type heavily doped region formed in step S400.

[0090] Preferably, the second groove is an annular groove. The first groove is located at the center of the annular groove.

[0091] S1100: Fill the second groove with electrode material 102, see [link to previous section] Figure 6 .

[0092] The present invention does not impose any particular restrictions on the filling method of electrode material 102.

[0093] In some embodiments of the present invention, after step S400 and before step S500, the preparation method further includes performing an annealing activation treatment; and after step S900 and before step S1000, the preparation method further includes performing an annealing activation treatment.

[0094] In some embodiments of the present invention, after step S700 and before step S800, the preparation method further includes performing an annealing activation treatment; and after step S900 and before step S1000, the preparation method further includes performing an annealing activation treatment.

[0095] In some embodiments of the present invention, after step S900 and before step S1000, the preparation method further includes: performing an annealing activation treatment.

[0096] The present invention will be further described below with reference to specific embodiments.

[0097] Taking the fabrication of a near-hemispherical electrode with a radius of 20 μm on a 30 μm thick silicon wafer as an example, the main process flow is as follows: 10 etching steps are performed sequentially from the outside to the inside.

[0098] A wet oxidation process is performed on the surface of the silicon wafer to grow a 2 μm thick silicon dioxide layer on both the top and bottom surfaces. Next, a 1 μm layer of photoresist is applied to the top surface of the silicon wafer. The first photolithography step involves etching the silicon dioxide layer at x = 20-20.5 μm to form a 0.5 μm wide annular trench. Then, deep reactive ion etching (DRIE) using the Bosch process is employed to continue etching downwards, resulting in an annular trench 29 μm deep, with a dose of 1 × 10⁻⁶. 15 cm -2 Boron ions were implanted using an energy of 180 keV, an ion implantation angle of 7°, and a wafer rotation of 7°. Subsequently, silicon dioxide was filled into the annular trench to cover the upper surface of the silicon wafer. Finally, the surface was thinned to 2 μm using chemical mechanical polishing.

[0099] Repeat the above process, with the second photolithography position at x = 19.5-20 μm, the third photolithography position at x = 19-19.5 μm, the fourth photolithography position at x = 18.5-19 μm, the fifth photolithography position at x = 17.5-18.5 μm, the sixth photolithography position at x = 16-17.5 μm, the seventh photolithography position at x = 14.3-16 μm, the eighth photolithography position at x = 12-14.3 μm, the ninth photolithography position at x = 8.7-12 μm, and the tenth photolithography position at x = 0-8.7 μm. The depth and width of the resulting 10 annular grooves are shown in the table below.

[0100] Table 1

[0101]

[0102] Then, after ion implantation, the impurity ions are rapidly annealed at 1050℃ for 1 min to activate them.

[0103] The power electrode and central readout electrode are fabricated on the back side of the detector using a double-sided process, specifically including the following steps: A first photolithography is performed on the silicon dioxide layer on the lower surface of the silicon wafer, with the photolithography position at x = -0.5-0.5 μm and an ion implantation dose of 1 × 10⁻⁶. 15 cm -2 Phosphorus ions with an energy of 180 keV were rapidly annealed at 1050℃ for 1 min, and aluminum was deposited by magnetron sputtering as the power electrode. A second photolithography was performed on the silicon dioxide layer on the lower surface of the silicon wafer to form an annular groove at a photolithography position of x = 19.5-20.5 μm. After etching the silicon dioxide, aluminum was magnetron sputtered as the central readout electrode.

[0104] Figure 17 This is a simulation diagram of the impurity ion distribution process after the first to third deep etching-ion implantation-filling in this embodiment of the invention. The black box area A is the boron ion doping region, with a peak concentration of 1×10⁻⁶. 19 cm -3 about.

[0105] Figure 18 This is a simulation diagram of the activated B ion concentration distribution in the near-hemispherical detector prepared in this embodiment. In this embodiment, the activated B ion concentration of the sidewall doped detector is 10. 17 cm -3 The order of magnitude is as follows, with the highest doping concentration at the bottom being 2.5 × 10⁻⁶. 19 cm -3 The doping concentration of the sidewalls is sufficient to conduct the hemispherical electrode.

[0106] Figure 19 This is an electric field distribution diagram of the near-hemispherical detector prepared in this embodiment. Figure 20 This is a potential distribution diagram of the near-hemispherical detector prepared in this embodiment. Figure 19 and 20 It can be seen that the electrical characteristics of the near-hemispherical detector body of the present invention are well distributed overall.

[0107] Figure 21 This is a diagram showing the electron current density distribution of the near-hemispherical detector prepared in this embodiment. Figure 21 It can be seen that the near-hemispherical detector of the present invention has low dark current and is not affected by substrate thickness after the size of the near-hemispherical detector device is determined.

[0108] Figure 22 The figure shows a comparison of dark current for different 3D detector structures with the same radius. Simulation devices a, b, and c are shown in the figure. Simulation device a is an ideal hemispherical detector, simulation device b is a trench-cylindrical detector, and simulation device c is a trench-flat panel detector. Figure 22 It can be seen that the dark current of the near-hemispherical detector in this embodiment of the invention is close to that of the ideal hemispherical detector, but the dark current is smaller.

[0109] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A near-hemispherical detector, characterized in that, include: A first silicon oxide layer, the first silicon oxide layer including a plurality of grooves extending through its upper and lower surfaces, the plurality of grooves not communicating with each other, and filled therein with electrode material; A substrate layer, wherein the substrate layer is disposed on the upper surface of the first silicon oxide layer; The substrate layer includes a ring structure and a near-hemispherical structure; the ring structure is disposed around the near-hemispherical structure, and the ring structure and the near-hemispherical structure are in contact with each other; the ring structure is lightly n-type doped or lightly p-type doped; the near-hemispherical structure includes a shallow surface portion of the near-hemispherical surface, a main body portion, and a shallow surface portion at the center of the bottom surface; the main body portion is lightly n-type doped or lightly p-type doped; the shallow surface portion of the near-hemispherical surface and the shallow surface portion at the center of the bottom surface are independently either heavily n-type doped regions or heavily p-type doped regions, and the doping types are different; both the heavily n-type doped regions and the heavily p-type doped regions are in contact with the electrode material; and A second silicon oxide layer covers the substrate layer.

2. The near-hemispherical detector according to claim 1, characterized in that, The near-hemispherical surface is pyramidal or polygonal.

3. The near-hemispherical detector according to claim 1, characterized in that, The number of grooves is two, one of which is an annular groove, and the other groove is located at the center of the annular groove.

4. The near-hemispherical detector according to claim 1, characterized in that, The height of the ring structure is greater than the height of the near-hemispherical structure.

5. The near-hemispherical detector according to claim 1, characterized in that, The substrate layer is made of ultrapure high-resistivity silicon, epitaxial silicon, silicon-on-insulator, other semiconductor materials that can be epitaxially grown on a silicon substrate, or a multilayer stack of them. The electrode material is aluminum, copper, or tungsten.

6. The method for fabricating the near-hemispherical detector according to any one of claims 1-5, characterized in that, include: S100: Provides a substrate; S200: A silicon oxide layer is formed on both the upper and lower surfaces of the substrate, wherein the silicon oxide layer located on the lower surface of the substrate is a first silicon oxide layer; S300: Etch the silicon oxide layer on the upper surface of the substrate and the substrate to form an annular trench; S400: Ions are implanted into the bottom of the annular trench or into the bottom and sidewalls of the annular trench to form an n-type heavily doped region or a p-type heavily doped region, and the lower surface of the n-type heavily doped region or the p-type heavily doped region is in contact with the first silicon oxide layer. S500: Remove the remaining silicon oxide layer on the upper surface of the substrate; S600: Fill the annular trench with silicon oxide and cover the upper surface of the substrate; S700: Repeat steps S300-S600 several times until a near-hemispherical structure is formed. In this process, the annular trenches formed by each etching are connected to each other, the depth of the annular trenches formed by each etching gradually decreases, the ions implanted each time are the same, and the n-type heavily doped regions or p-type heavily doped regions formed after each ion implantation are in contact with each other. S800: Etch the first silicon oxide layer to form a first groove, exposing the central portion of the bottom surface of the near-hemispherical structure; S900: Ions are injected into the shallow surface of the exposed center portion of the bottom surface to form an n-type heavily doped region or a p-type heavily doped region. The doping type of this step is different from that of step S400. Then, electrode material is filled into the first groove. S1000: Etch the first silicon oxide layer again to form a second groove, exposing the lower surface of the n-type heavily doped region or the p-type heavily doped region formed in step S400. as well as S1100: Fill the second groove with electrode material.

7. The preparation method according to claim 6, characterized in that, The aspect ratio of the annular trench formed by each etching is calculated according to the following two formulas: Official 1 Official 2 Wherein, H is the substrate thickness, R is the radius of the main body of the near-hemispherical structure, and x is the distance from the inner wall of the annular trench to the central axis of symmetry of the near-hemispherical structure. h is the ion implantation depth in step 900, w is the etching depth of the annular trench, and k is the reciprocal of the aspect ratio.

8. The preparation method according to claim 6 or 7, characterized in that, In step S400, ions are injected into the bottom and sidewalls of the annular trench. The injection parameters include: an ion implantation angle of -80° to 80°, a rotation angle of -360° to 360°, and a dose of 1×10⁻⁶. 13 -1×10 17 cm -2 Energy 30~2000 KeV, injection depth greater than 0 and less than or equal to 2 μm; In step S400, ions are injected into the bottom of the annular trench, and the injection parameters include: a dose of 0.8 × 10⁻⁶. 15 -1.2×10 15 cm -2 The injection depth is 2-5 μm.

9. The preparation method according to claim 6 or 7, characterized in that, In step S900, the implantation parameters include: ion implantation angle of -80° to 80°, rotation angle of -360° to 360°, and dose of 1×10⁻⁶. 13 -1×10 17 cm -2 Energy ranges from 30 to 2000 keV, with an injection depth of 0.8 to 1.2 μm.

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