Coreless packaging substrate and preparation method thereof

Abstract

The present invention provides a coreless packaging substrate and a preparation method thereof, the preparation method of the coreless packaging substrate comprising: S1: providing a support plate with a dissociable film; S2: preparing a first metal column and a buried wire on the dissociable film by a dry process, wherein the line width / line spacing of the buried wire is greater than or equal to 5μm / 5μm; S3: forming a first dielectric layer on the dissociable film, the first metal column and the buried wire to obtain a coreless packaging substrate structure; S4: forming a first metal seed layer on the surface of the coreless packaging substrate structure; S5: forming a first metal disk and a first line on the first metal seed layer; S6: removing the support plate through the dissociable film. The present invention solves the problems of poor product performance and many common problems in the process caused by the buried wire technology in the prior art, such as quality problems such as "side erosion" of the line and uneven bottom edge of the buried wire, so as to improve the accuracy of the buried wire line and cope with the rapidly developing coreless packaging substrate.

Description

Technical Field

[0001] The present invention relates to the field of manufacturing semiconductor packaging substrates, and in particular to a coreless packaging substrate and a preparation method thereof. Background Art

[0002] With the development of modern society, especially with the advent of the 5G era, electronic products have gradually become multifunctional and highly integrated. High-frequency radio frequency and power amplifiers and other high-power electronic components have higher and higher requirements for the heat dissipation capacity of the packaging substrate, which has promoted the development of high-density and diversified substrate heat dissipation structure design. As wireless communications, automotive electronics and other consumer electronic products develop towards multifunctionality, light and thin, high frequency and high speed, low power consumption and high reliability, the thinning of electronic products has spawned coreless packaging substrates, which are not only thinner than core packaging substrates, but also have better electrical performance. For rigid packaging substrates that support and conduct chips, the lines involved are getting thinner and thinner. The embedded trace substrate technology ETS (Embedded Trace Substrate) is a special line structure of the coreless substrate. The embedded trace line has high control accuracy and is embedded in the resin. The so-called embedded in the resin means that the top of the embedded trace line is coated with resin, which makes the embedded trace line have a strong bonding force. It has now developed from the conventional line width / line spacing (L / S) of 50μm / 50μm to 25μm / 25μm, 15μm / 15μm and even smaller 8μm / 8μm.

[0003] The traditional PCB buried wire process adopts the process of "pressing copper foil on the carrier board, pattern transfer, electroplating / etching and film stripping" to make buried wires. During the etching process, the etching solution will attack the area to be etched and the side wall of the protected pattern at the same time, causing the "side etching" phenomenon of the line. The buried wire completed in this way is not the designed "rectangular" shape but a "trapezoidal" shape, and the finished buried wire often has the problem of uneven bottom edges. If the additive method is used, it will be limited by the solution and equipment. At present, the thinnest can only be 8μm / 8μm, and it will also cause the generation of wastewater. In addition, if the pattern is made using the additive method, the copper foil on the carrier board must be turned over and flash-etched for removal, and the solution etching will cause the previously prepared buried wire to be dented (Dimple) and other problems, reducing its reliability. More importantly, some embedded antennas or inductors will set tolerances for the line width spacing of the buried wires, such as a tolerance of ±3μm, which is a tolerance that the additive and semi-additive methods cannot achieve. This has a great adverse impact on the integrity of electrical signal transmission and the need to make more precise buried wire lines.

[0004] In view of the above, it is necessary to provide a coreless packaging substrate and a preparation method thereof to solve the poor product performance caused by the buried wire technology in the prior art and the many problems often occurring in the process, such as "side corrosion" of the line, uneven bottom edge of the buried wire, and other quality problems, so as to improve the accuracy of the buried wire line and cope with the rapidly developing coreless packaging substrate. Summary of the invention

[0005] In view of the shortcomings of the prior art mentioned above, the object of the present invention is to provide a coreless packaging substrate and a preparation method thereof, so as to solve the poor product performance caused by the buried wire technology in the prior art and the numerous problems often occurring in the process, such as "side corrosion" of the line, uneven bottom edge of the buried wire, and other quality problems, so as to improve the accuracy of the buried wire line and cope with the rapidly developing coreless packaging substrate.

[0006] To achieve the above-mentioned object and other related objects, the present invention provides a method for preparing a coreless packaging substrate, the preparation method comprising:

[0007] S1: providing a support plate with a dissociable membrane;

[0008] S2: preparing a first metal column and a buried line on the dissociable film by a dry process, wherein the first metal column is higher than the buried line, and the line width / line spacing of the buried line is greater than or equal to 5 μm / 5 μm;

[0009] S3: forming a first dielectric layer on the dissociable film, the first metal pillar and the buried wire to plastic-encapsulate the first metal pillar and the buried wire to obtain a coreless package substrate structure;

[0010] S4: forming a first metal seed layer on the surface of the coreless packaging substrate structure;

[0011] S5: forming a first metal plate and a first circuit on the first metal seed layer;

[0012] S6: removing the support plate through the dissociable film to obtain the coreless packaging substrate.

[0013] Optionally, when the height of the coreless packaging substrate is less than a coreless packaging substrate of a preset height, steps S2 to S5 are repeated at least once after step S5, wherein step S2 is repeated excluding the step of forming the buried wire, until the coreless packaging substrate of the preset height is formed.

[0014] Optionally, the method for preparing the coreless packaging substrate further comprises the step of performing a solder resist process on the upper and lower surfaces of the coreless packaging substrate to protect the outer layer structure of the coreless packaging substrate from being oxidized.

[0015] Optionally, the material of the first dielectric layer does not contain glass fiber.

[0016] Optionally, the first metal column is a copper column, the copper column is cylindrical, the diameter of the copper column is greater than or equal to 10 μm, and the height of the copper column is greater than or equal to 5 μm.

[0017] Optionally, the dry process is 3D printing technology.

[0018] Optionally, the printing material used for preparing the first metal column and the embedded wire by the 3D printing technology includes a mixed slurry of conductive particles of silver and copper or a pure metal nano slurry.

[0019] The present invention also provides a coreless packaging substrate, which is prepared by any one of the above-mentioned methods for preparing the coreless packaging substrate.

[0020] Optionally, the thickness of the coreless packaging substrate is greater than or equal to 30 μm.

[0021] As described above, the coreless packaging substrate and the preparation method thereof of the present invention have the following beneficial effects:

[0022] The support plate of the present invention can be reused, which reduces the waste of cost and can effectively avoid the problems of warping, card jamming, etc. caused by the coreless packaging substrate being too thin or expanding and shrinking during the production process; the present invention prepares the coreless packaging substrate on the support plate with a dissociable film, and after the substrate is prepared and the dissociable film is removed, it will not cause problems such as depression caused by etching away the copper foil in the traditional buried wire process, so that the line shape is better and more stable. In addition, the first metal column and the buried wire of the present invention can directly contact the dissociable film, and the dielectric layer is pressed after the preparation of the first metal column and the buried wire, and the bonding force is better, thereby increasing the reliability of the coreless packaging substrate. After the dissociable film is removed, there will be no dielectric layer on the surface of the first metal column. The residual glue in the dielectric layer avoids the problem of height difference between the first metal column and the dielectric layer; the present invention adopts a dry process to prepare the first metal column and the buried wire, which can reduce the generation of waste water, alleviate environmental pollution, and is more environmentally friendly; compared with the traditional process of electroplating hole filling, only one specification of hole diameter can be electroplated at a time, and first metal columns and buried wires of different specifications need to be prepared separately to ensure the uniformity of electroplating, the present invention can prepare buried wires of different specifications and higher first metal columns, the preparation is more flexible and changeable, the process flow is simplified, the production cycle is shorter, and the production efficiency is higher; the circuit layer of the present invention is prepared by an additive method, and compared with the previous subtractive method or semi-additive method, more sophisticated circuits and disks can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a schematic flow chart of a method for preparing a coreless packaging substrate of the present invention.

[0024] Figures 2 to 10 It is a schematic structural diagram showing the steps of the method for preparing the coreless packaging substrate of the present invention.

[0025] Fig.11 It is a schematic structural diagram of a coreless packaging substrate in another embodiment of the present invention.

[0026] Component number description

[0027] 10 Support plate

[0028] 20 Dissociable membrane

[0029] 31 First Metal Pillar

[0030] 32 Second Metal Pillar

[0031] 40 Thread Embedment

[0032] 51 first dielectric layer

[0033] 52 second dielectric layer

[0034] 61 First seed layer

[0035] 62 Second seed layer

[0036] 70 dry film

[0037] 81 First Metal Plate

[0038] 82 First Line

[0039] 83 Second Metal Plate

[0040] 84 Second Line

[0041] 85 Third Metal Plate

[0042] 86 Third Line DETAILED DESCRIPTION

[0043] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0044] When describing the embodiments of the present invention in detail, for the sake of convenience, the cross-sectional views showing the device structures will not be partially enlarged according to the general scale, and the schematic views are only examples, which should not limit the scope of protection of the present invention.

[0045] For ease of description, spatial relational terms such as "under", "below", "below", "below", "above", "on", etc. may be used herein to describe the relationship of one structure or feature shown in the drawings to other structures or features. It will be understood that these spatial relational terms are intended to include other directions of the device in use or operation in addition to the directions depicted in the drawings. In addition, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or there may be one or more intervening layers. As used herein, "between..." means including the end point values.

[0046] In the context of the present application, a structure in which a first feature is described as being "above" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0047] See also Figures 1 to 11 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0048] Embodiment 1

[0049] like Figure 1 and Fig.10 As shown, this embodiment provides a method for preparing a coreless packaging substrate, and the method for preparing the coreless packaging substrate comprises the following steps:

[0050] S1: providing a support plate 10 with a dissociable membrane 20 attached;

[0051] S2: using a dry process to prepare a first metal column 31 and a buried line 40 on the dissociable film 20, wherein the first metal column 31 is higher than the buried line 40, and the line width / line spacing of the buried line 40 is greater than or equal to 5 μm / 5 μm;

[0052] S3: forming a first dielectric layer 51 on the dissociable film 20, the first metal pillar 31 and the buried wire 40 to plastic-encapsulate the first metal pillar 31 and the buried wire 40 to obtain a coreless package substrate structure;

[0053] S4: forming a first metal seed layer 61 on the surface of the coreless packaging substrate structure;

[0054] S5: forming a first metal plate 81 and a first circuit 82 on the first metal seed layer 61;

[0055] S6: removing the support plate 10 through the dissociable film 20 to obtain the coreless packaging substrate.

[0056] The support plate of the present embodiment can be reused, which reduces the waste of cost and can effectively avoid the problems of warping and board jamming caused by the coreless packaging substrate being too thin or expanding and shrinking during the production process; the present embodiment prepares the coreless packaging substrate on the support plate with a dissociable film. After the substrate is prepared and the dissociable film is removed, it will not cause problems such as depression caused by etching away the copper foil in the traditional buried wire process, making the line shape better and more stable. In addition, the first metal column and the buried wire of the present embodiment can directly contact the dissociable film. After the preparation of the first metal column and the buried wire, the dielectric layer is pressed together, and the bonding force is better, thereby increasing the reliability of the coreless packaging substrate. After the dissociable film is removed, there will be no dielectric layer on the surface of the first metal column. The residual glue in the dielectric layer avoids the problem of height difference between the first metal column and the dielectric layer; the present embodiment adopts a dry process to prepare the first metal column and the buried wire, which can reduce the generation of waste water, alleviate environmental pollution, and is more environmentally friendly; compared with the traditional process of electroplating hole filling, only one specification of hole diameter can be electroplated at a time, and first metal columns and buried wires of different specifications need to be prepared separately to ensure the uniformity of electroplating, the present embodiment can prepare buried wires of different specifications and higher first metal columns, the preparation is more flexible and changeable, the process flow is simplified, the production cycle is shorter, and the production efficiency is higher; the circuit layer of the present embodiment is prepared by an additive method, which can achieve more sophisticated circuits and disks compared with the previous subtractive method or semi-additive method.

[0057] See also Figures 1 to 10 , this embodiment is further described below with reference to the accompanying drawings.

[0058] like Figure 1 and Figure 2 As shown, as an example, step S1 is first performed to provide a support plate 10 with a detachable film 20 attached thereto.

[0059] The support plate 10 has a certain rigidity, which can be sufficient to support other structures formed on its surface. The dissociable film 20 attached to the support plate 10 is used for subsequent processes, which facilitates the removal of the support plate 10. There is no restriction on the thickness of the support plate 10 and the thickness of the dissociable film 20, which can be set according to actual needs, as long as the above requirements are met. The material of the support plate 10 is one or a combination of two or more of inorganic materials, organic high molecular polymers, etc. In addition, the support plate 10 can be reused, which reduces the waste of cost to a certain extent. The support plate of this embodiment can be reused, which reduces the waste of cost, and can also effectively avoid the problems of warping and carding caused by the coreless packaging substrate being too thin or expanding and shrinking during the production process; in this embodiment, the coreless packaging substrate is prepared on the support plate with a dissociable film. After the substrate is prepared and the dissociable film is removed, it will not cause the problems such as depression caused by etching away the copper foil by the traditional buried wire process, so that the line shape is better and more stable.

[0060] like Figure 1 and Figure 3 As shown, as an example, step S2 is then performed to prepare a first metal column 31 and a buried wire 40 on the dissociable film 20 using a dry process, wherein the first metal column 31 is higher than the buried wire 40, and the line width / line spacing of the buried wire 40 is greater than or equal to 5μm / 5μm.

[0061] As an example, the dry process is 3D printing technology, which can reduce the generation of wastewater, alleviate environmental pollution, and be more environmentally friendly; the printing material used by the 3D printing technology to prepare the first metal column 31 and the buried wire 40 includes a mixed slurry of conductive particles of silver and copper or one of pure metal nano slurries, and the slurry utilization rate is high, which will not cause a lot of waste, so that the overall cost will be lower.

[0062] When the 3D printing technology is used to print the first metal column 31 and the buried wire 40, the first metal column 31 and the buried wire 40 of different specifications can be printed at one time, saving process time, as long as the specifications required by the first metal column 31 and the buried wire 40 are pre-set. And it includes but is not limited to printing the first metal column 31 and the buried wire 40 of different specifications at one time, and the first metal column 31 can be printed first, and then the buried wire 40, or the buried wire 40 can be printed first and then the first metal column 31. There is no fixed restriction on the specific type of 3D printer used by the 3D printing technology. As long as it can meet the printing requirements of this embodiment, it can be selected based on actual conditions. In addition, it is also possible to print and laser sinter at the same time, or to print first and then sinter and solidify the molding. The molding method can be set according to actual needs and is not limited here.

[0063] Compared with the traditional process of electroplating hole filling, which can only electroplate one specification of hole diameter at a time, and needs to prepare first metal columns and buried wires of different specifications separately to ensure the uniformity of electroplating, the present embodiment can prepare buried wires 40 of different specifications and higher first metal columns 31, and the preparation is more flexible and changeable, the process flow is simplified, the production cycle is shorter, and the production efficiency is higher.

[0064] In the present embodiment, the shape of the first metal pillar 31 can be set according to actual conditions, and can be one or a combination of two or more of a rectangular parallelepiped, a cylindrical and a polygonal pillar. In the present embodiment, in order to ensure the indiscriminate interconnection of each layer of metal pillars, the first metal pillars 31 preferably adopt the same shape. Taking the cylindrical shape as an example, the diameter of the first metal pillar 31 is greater than or equal to 10μm, and the height is greater than or equal to 5μm. The specific size can be set according to actual needs as long as it is within the range. In the present embodiment, due to the conductive effect of metal copper and its low cost, the first metal pillar 31 is preferably a copper pillar.

[0065] In this embodiment, the line width / line spacing of the buried wire 40 is greater than or equal to 5μm / 5μm, and the height is not limited, as long as the height of the first metal column 31 is higher than the height of the buried wire 40 during preparation. In the prior art, the buried wires produced by the process of "pressing copper foil on a carrier board, pattern transfer, electroplating / etching and film removal" can only achieve the finest line width / line spacing specification of 8μm / 8μm. In this embodiment, the 3D printing technology is used for printing, and circuits of 5μm / 5μm or more can be produced.

[0066] It should be noted that the height of the first metal column 31 needs to be higher than the buried wire 40 to ensure the interconnection between the first metal column 31 and the upper and lower layers.

[0067] like Figure 1 and Figures 4 to 5 As shown, as an example, step S3 is then performed to form a first dielectric layer 51 on the dissociable film 20, the first metal column 31 and the buried wire 40 to plastic-encapsulate the first metal column 31 and the buried wire 40 to obtain a coreless package substrate structure.

[0068] A first dielectric layer 51, also called an insulating layer, is laminated on the dissociable film 20, the first metal column 31 and the buried wire 40, and may include all insulating dielectric layers of the PCB. However, in the prior art, PP material containing glass fiber is often used for lamination, but the line density of the coreless packaging substrate made by this method is not high. As an example, the material of the first dielectric layer 51 does not contain glass fiber, and the material of the first dielectric layer 51 may be one or a combination of two or more of epoxy resin, polyimide, polymaleimide triazine resin, polyphenylene ether or polytetrafluoroethylene, glass, quartz or silicon oxide. Lamination is performed by hot pressing or vacuum lamination. The first dielectric layer 51 will have fluidity with lamination, thereby filling the gap between the first metal column 31 and the buried wire 40. It should be noted here that after lamination, the height of the first dielectric layer 51 needs to be higher than the height of the first metal column 31 (such as Figure 4 shown).

[0069] like Figure 5 As shown, the top layer of the above structure is subjected to physical polishing or grinding and plasma dry etching process to expose the top of the first metal column 31, and at the same time, the end of the first metal column 31 printed by the 3D printing method is ground off, so that the first metal column 31 obtains a complete columnar shape. After grinding the above structure, there will still be a small amount of residual glue left by the first dielectric layer 51 on the top surface of the first metal column 31, and the surface can be appropriately treated, such as plasma treatment process or chemical desmear process, so that the roughness and cleanliness of the surface of the above structure are increased, so as to increase the subsequent bonding force between the first metal seed layer 61 and the substrate surface.

[0070] In addition, the first metal column 31 and the buried wire 40 of this embodiment can directly contact the dissociable film 20. After the first metal column 31 and the buried wire 40 are prepared and the dielectric layer is pressed together, the bonding force is better, thereby increasing the reliability of the coreless packaging substrate.

[0071] like Figure 1 and Figure 6 As shown, as an example, step S4 is then performed to form a first metal seed layer 61 on the surface of the coreless package substrate structure.

[0072] The material of the first metal seed layer 61 is one or a combination of two or more of titanium, copper and titanium-tungsten alloy; the process method for forming the first metal seed layer 61 is a chemical copper deposition process or a sputtering process.

[0073] like Figure 1 and Figures 7 and 8 As shown, as an example, step S5 is then performed: forming a first metal plate 81 and a first circuit 82 on the first metal seed layer 61 .

[0074] The pattern transfer process is performed on the first metal seed layer 61, including the steps of film pasting, exposure and development. First, a dry film 70 is pasted on the first metal seed layer 61. After exposure and development (such as Figure 7 As shown in FIG. 1 ), electroplating metal is performed in the pattern formed by development, and the attached dry film is removed after electroplating, and the first metal seed layer 61 under the dry film is flash-etched away, and at this time, the first metal plate 81 and the first circuit 82 are formed (as shown in FIG. 1 ). Figure 8 As shown). In addition, the preparation method of the first metal disk 81 and the first circuit 82 can also be printed using the 3D printing technology. It should be noted here that the first metal disk 81 is located at the end of the first metal column 31, and the cross-section is larger than the first metal column 31, so as to avoid the short circuit of the coreless package substrate caused by the misalignment of the first metal column 31; the developed groove can be a circular groove, a square groove, or a polygonal groove, which can be set according to actual needs and is not limited here. The shape of the developed groove is also the shape of the cross-section of the first metal disk 81 and the first circuit 82. The shapes of the two can be the same or different. The material of the first metal disk 81 and the first circuit 82 is preferably metal copper in this embodiment. The circuit layer of this embodiment is prepared by the additive method, which can achieve more sophisticated circuits and disks compared with the previous subtractive method or semi-additive method.

[0075] like Figure 1 and Fig. 9 As shown, as an example, step S6 is finally performed to remove the support plate 10 through the dissociable film 20 to obtain the coreless packaging substrate.

[0076] Laser dissociation or physical dissociation is performed from the support plate 10 in a direction away from the dissociable film 20 , so as to separate the dissociable film 20 and the support plate 10 from the first metal pillar 31 and the buried wire 40 , thereby obtaining the coreless packaging substrate.

[0077] like Fig.10 As an example, when the height of the coreless packaging substrate is less than a preset height of the coreless packaging substrate, steps S2 to S5 are repeated at least once, wherein the repeated step S2 does not include the step of forming the buried wire 40, and a second metal block 32, a second metal plate 83 and a second line 84 are formed until the preset height of the coreless packaging substrate is reached.

[0078] A second metal column 32 is directly formed on the first metal plate 81, a second dielectric layer 52 is formed on the first dielectric layer 51 and the first metal column 31 to plastic-encapsulate the second metal column 32, a second metal seed layer 62 is formed on the surface of the coreless package substrate structure, and a second metal plate 83 and a second circuit 84 are formed on the second metal seed layer 62. The process methods and material types involved in the repeated steps are the same as those in steps S2 to S5, which have been described in detail above and will not be repeated here.

[0079] As an example, the method for preparing the coreless packaging substrate further includes the step of performing a solder resist process on the upper and lower surfaces of the coreless packaging substrate to protect the outer layer structure of the coreless packaging substrate from being oxidized.

[0080] The outer layer structure of the coreless packaging substrate is the metal pillars, buried wires, metal plates and circuits of the coreless packaging substrate, such as the first metal pillar 31, the buried wire 40, the first metal plate 81 and the first circuit 82 in this embodiment. The solder resist process can protect them from oxidation and ensure the yield of the coreless packaging substrate before use.

[0081] Embodiment 2

[0082] This embodiment provides a specific embodiment of a method for preparing a coreless packaging substrate, and the method for preparing a coreless packaging substrate comprises the following steps:

[0083] The support plate 10 with the dissociable film 20 is provided. The support plate 10 has a certain rigidity. The dissociable film 2 can be physically decomposed and peeled off. In this embodiment, the thickness of the support plate 10 is 1 mm, and the thickness of the dissociable film 20 is 10 μm.

[0084] The 3D printing technology is used to print the first metal column 31 and the buried wire 40 on the dissociable film 20. In this embodiment, the first metal column 31 is a copper column, which is used to interconnect the circuits of the coreless packaging substrate. The copper column is cylindrical in shape, with a radius of 30μm and a height of 40um. The buried wire 40 has a line width of 30μm, a line spacing of 40um, and a line height of 20um. While printing the copper column and the buried wire 40, laser sintering is performed. The printing material used in the 3D printing technology includes a mixed slurry of conductive granular silver and copper. The mixed slurry has better heat dissipation performance. At this time, the first metal column 31 can be directly defined as a copper column.

[0085] The first dielectric layer 51 is formed on the dissociable film 20, the copper pillar and the buried wire 40 by means of heat pressing. The material of the first dielectric layer 51 is epoxy resin. During the heat pressing process, the gap between the copper pillar and the buried wire 40 is filled due to its fluidity, and the top of the first dielectric layer 51 is higher than the top of the copper pillar. The surface of the top of the first dielectric layer 51 is ground by physical grinding, and the copper pillar is exposed while the end of the printed copper pillar is ground off, so that the copper pillar has a complete cylindrical shape; after grinding the above structure, a small amount of residual glue left by the first dielectric layer 51 will still exist on the top surface of the copper pillar. This embodiment uses a plasma treatment process to remove the glue residue, so that the roughness and cleanliness of the surface of the above structure are increased, and the subsequent bonding force between the first metal seed layer 61 and the substrate surface is also increased.

[0086] Titanium and copper are sputtered on the surface of the coreless package substrate structure by a sputtering process to form a first metal seed layer 61. The first sputtered metal seed layer 61 can be a nano-scale titanium metal layer and a copper metal layer. Since the titanium metal layer has high conductivity and adhesion, and good thickness flatness, the subsequently formed circuit can be firmly combined with the first dielectric layer 51. In this embodiment, the thickness of the sputtered titanium metal layer is 200nm, and the thickness of the sputtered copper metal layer is 600nm. The copper metal is mainly used to adjust the electroplating impedance to make the first sputtered metal seed layer 61 more uniform.

[0087] A pattern transfer process, film pasting, exposure and development are performed on the first metal seed layer 61. After development, pattern electroplating is performed, and the film is removed after electroplating. After film removal, the first metal seed layer 61 underneath is flash-etched away to form the first metal plate 81 and the first circuit 82. The material of the first metal plate 81 and the first circuit 82 is also metallic copper, which can be consistent with the material of the first metal column 31.

[0088] After preparing the above-mentioned substrate structure, the above steps can be repeated to continue printing the copper pillars, the second metal plate 83 and the second circuit 84 on the first metal plate 81. The height of the copper pillars printed each time is similar. The process methods and material types involved are the same as those in the above-mentioned steps and have been introduced in detail, so they will not be repeated here.

[0089] After the second metal plate 83 and the second line 84 are prepared, laser dissociation is performed from the support plate 10 in a direction away from the dissociable film 20 to separate the dissociable film 20 and the support plate 10 from the copper pillar and the buried wire 40, thereby obtaining a complete coreless packaging substrate.

[0090] Finally, a solder resist process is performed on the upper and lower surfaces of the coreless package substrate to protect the outer second metal plate 83, the second line 84, the copper column and the buried line 40 from being oxidized.

[0091] Embodiment 3

[0092] like Fig. 9 As shown, this embodiment provides a coreless packaging substrate, the coreless packaging substrate is obtained by the preparation method of embodiment 1, and the coreless packaging substrate includes:

[0093] A dielectric layer containing a metal column and a buried wire, wherein the metal column passes through the dielectric layer from top to bottom, and one end of the buried wire is wrapped inside the dielectric layer;

[0094] A metal disk and a circuit are sequentially arranged on a side of the dielectric layer away from the buried wire, a metal seed layer is further arranged between the dielectric layer, the metal disk and the circuit, and the cross section of the metal disk is larger than that of the metal column.

[0095] In this embodiment, metal plates and circuits are sequentially arranged only on one side of the dielectric layer away from the buried wire, in order to facilitate mounting of the exposed end of the buried wire in subsequent processes, which can be specifically arranged according to actual needs.

[0096] As an example, the thickness of the coreless package substrate is greater than or equal to 30 μm.

[0097] Embodiment 4

[0098] like Fig.11 As shown, this embodiment also provides a method for preparing a coreless packaging substrate, which differs from the first embodiment in that in step S2, only the first metal pillar 31 is prepared, but the buried wire 40 is not prepared, and the entire coreless packaging substrate structure does not include the buried wire 40; at the same time, after removing the support plate 10 through the dissociable film 20, it also includes a step of inverting the coreless packaging substrate structure 180°, and sequentially forming a third metal seed layer 63, a third metal plate 85 and a third line 86 on the surface of the coreless packaging substrate structure, wherein the third metal seed layer 63, the third metal plate 85 and the third line 86 are located on opposite sides of the coreless packaging substrate structure with the first metal seed layer 61, the first metal plate 81 and the first line 82.

[0099] The process method for forming the third metal seed layer 63 is a chemical copper deposition process or a sputtering process. The material of the third metal seed layer 63 is one of titanium, copper and titanium-tungsten alloy. The materials used for the first metal seed layer 61 and the third metal seed layer 63 may be the same or different. In this embodiment, the same material is preferably used to maintain the consistency of the conductive effect of the overall structure.

[0100] The process used to form the third metal plate 85 and the third line 86 is also a pattern transfer process, and the third metal plate 85 is located at the other end of the first metal column 31. Other requirements are the same as those in the above embodiment 1, which have been described in detail and will not be repeated here.

[0101] Embodiment 5

[0102] like Fig.11 As shown, this embodiment provides another coreless packaging substrate, the coreless packaging substrate is obtained by the preparation method of embodiment 4, and the coreless packaging substrate includes:

[0103] A dielectric layer including a metal column, wherein the metal column penetrates the dielectric layer vertically;

[0104] The upper and lower surfaces of the dielectric layer are sequentially provided with metal disks and circuits, and a metal seed layer is further provided between the dielectric layer and the metal disks and the circuits. The metal disks are located at both ends of the metal column, and the cross section of the metal disks is larger than that of the metal column.

[0105] In this embodiment, the upper and lower surfaces of the dielectric layer are sequentially provided with metal plates and circuits to facilitate mounting in subsequent processes, and the specific arrangements may be made according to actual needs.

[0106] In summary, the present invention provides a coreless packaging substrate and a preparation method thereof, the preparation method of the coreless packaging substrate comprising: S1: providing a support plate with a dissociable film; S2: preparing a first metal column and a buried wire on the dissociable film by a dry process, wherein the first metal column is higher than the buried wire, and the line width / line spacing of the buried wire is greater than or equal to 5μm / 5μm; S3: forming a first dielectric layer on the dissociable film, the first metal column and the buried wire to plastic-encapsulate the first metal column and the buried wire to obtain a coreless packaging substrate structure; S4: forming a first metal seed layer on the surface of the coreless packaging substrate structure; S5: forming a first metal disk and a first circuit on the first metal seed layer; S6: removing the support plate through the dissociable film to obtain the coreless packaging substrate. The support plate of the present invention can be reused, which reduces the waste of cost and can effectively avoid the problems of warping, card jamming, etc. caused by the coreless packaging substrate being too thin or expanding and shrinking during the production process; the present invention prepares the coreless packaging substrate on the support plate with a dissociable film, and after the substrate is prepared and the dissociable film is removed, it will not cause problems such as depression caused by etching away the copper foil in the traditional buried wire process, so that the line shape is better and more stable. In addition, the first metal column and the buried wire of the present invention can directly contact the dissociable film, and the dielectric layer is pressed after the preparation of the first metal column and the buried wire, and the bonding force is better, thereby increasing the reliability of the coreless packaging substrate. After the dissociable film is removed, there will be no residual glue in the dielectric layer on the surface of the first metal column, avoiding the first metal column and the dielectric layer. There is a problem of height difference in the electrical layer; the present invention adopts a dry process to prepare the first metal column and the buried wire, which can reduce the generation of wastewater, reduce environmental pollution, and is more green and environmentally friendly; compared with the traditional process of electroplating hole filling, only one specification of hole diameter can be electroplated at a time, and first metal columns and buried wires of different specifications need to be prepared separately to ensure the uniformity of electroplating. The present invention can prepare buried wires of different specifications and higher first metal columns, and the preparation is more flexible and changeable, the process flow is simplified, the production cycle is shorter, and the production efficiency is higher; the circuit layer of the present invention is prepared by an additive method, compared with the previous subtractive method or semi-additive method, it can achieve more sophisticated circuits and disks. Therefore, the present invention effectively overcomes the various shortcomings of the prior art and has a high industrial utilization value.

[0107] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for preparing a coreless packaging substrate, characterized in that: The method for preparing the coreless packaging substrate comprises: S1: providing a support plate with a dissociable membrane; S2: preparing a first metal column and a buried wire on the dissociable film by using 3D printing technology, wherein the first metal column is higher than the buried wire, and the line width / line spacing of the buried wire is greater than or equal to 5 μm / 5 μm; S3: forming a first dielectric layer on the dissociable film, the first metal pillar and the buried wire to plastic-encapsulate the first metal pillar and the buried wire to obtain a coreless package substrate structure; S4: forming a first metal seed layer on the surface of the coreless packaging substrate structure; S5: forming a first metal plate and a first circuit on the first metal seed layer; S6: removing the support plate through the dissociable film, and performing laser dissociation or physical dissociation from the support plate in a direction away from the dissociable film to obtain the coreless packaging substrate.

2. The method for preparing a coreless packaging substrate according to claim 1, wherein: When the height of the coreless packaging substrate is less than a coreless packaging substrate of a preset height, steps S2 to S5 are repeated at least once after step S5, wherein step S2 is repeated excluding the step of forming the buried wire, until the coreless packaging substrate of the preset height is formed.

3. The method for preparing a coreless packaging substrate according to claim 1, wherein: The method for preparing the coreless packaging substrate further includes the step of performing a solder resist process on the upper and lower surfaces of the coreless packaging substrate to protect the outer layer structure of the coreless packaging substrate from being oxidized.

4. The method for preparing a coreless packaging substrate according to claim 1, wherein: The material of the first dielectric layer does not contain glass fiber.

5. The method for preparing a coreless packaging substrate according to claim 1, wherein: The first metal column is a copper column, the copper column is cylindrical, the diameter of the copper column is greater than or equal to 10 μm, and the height of the copper column is greater than or equal to 5 μm.

6. The method for preparing a coreless packaging substrate according to claim 1, wherein: The printing material used in the 3D printing technology to prepare the first metal column and the buried wire is a mixed slurry containing conductive particles of silver and copper or a pure metal nano slurry.

7. A coreless packaging substrate, characterized in that: The coreless packaging substrate comprises: a coreless packaging substrate prepared by the method for preparing a coreless packaging substrate according to any one of claims 1 to 6.

8. The coreless packaging substrate according to claim 7, characterized in that: The thickness of the coreless packaging substrate is greater than or equal to 30 μm.

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