Photosensitive sensors and their manufacturing methods
By combining heterojunction structure and 4T pixel technology, the noise problem of photosensitive sensors in the short-wavelength infrared range is solved, realizing a low-noise, fast charge transfer photosensitive sensor design suitable for imager and time-of-flight measurement applications.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-06-15
- Publication Date
- 2026-03-06
AI Technical Summary
Existing photosensitive sensors cannot effectively detect in the short-wavelength infrared range and have noise problems, especially the kTC noise introduced when reading nodes is difficult to eliminate.
A heterojunction structure is adopted, and photosensitive and readout regions are formed using first and second semiconductor materials with different band gaps. Charge transfer is controlled by a transfer gate, and 4T pixel technology and associated dual sampling readout are combined to reduce noise interference.
It achieves low-noise, fast charge transfer in the short-wavelength infrared range, providing more accurate measurement results while simplifying the design of traditional screen structures.
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Figure CN115483306B_ABST
Abstract
Description
[0001] Priority requirements
[0002] This application claims priority to French patent application number 2106356, filed on June 16, 2021, the entire contents of which are incorporated herein by reference to the fullest extent permitted by law. Technical Field
[0003] The embodiments and implementations relate to photosensitive sensors, specifically photosensitive sensors capable of detecting radiation in the so-called short-wavelength infrared (SWIR) range. Background Technology
[0004] Radiation in the short-wavelength infrared (SWIR) range typically has wavelengths between 1 μm and 2.5 μm and cannot be detected using silicon semiconductor devices.
[0005] In fact, the energy of photons in the SWIR range is less than the band gap (also known as the band gap or band gap) between the valence band and conduction band of silicon.
[0006] Therefore, photosensitive sensors suitable for radiation in the SWIR range typically use semiconductor materials with narrow band gaps, often referred to as "low band gap materials," such as, for example, indium gallium arsenide (InGaAs). This type of material is often described using the terms "Type III-V materials" or "Type III-V compounds," because its composition belongs to Groups III and V of the periodic table.
[0007] That said, the readout and control circuitry of photosensitive sensors is typically made of silicon. Therefore, a hybrid integration technique with copper bonds between the silicon readout circuitry and the photosensitive element made of III-V material is usually required.
[0008] However, in traditional hybrid integration, the read nodes (or memory nodes) used to store the charge generated by the photosensitive element are located in a portion made of silicon. Therefore, reads from the read nodes are typically performed in real time, which introduces noise problems during resets because time noise (so-called kTC noise) cannot be subtracted from the read nodes, for example, using correlated double sampling techniques.
[0009] Therefore, there is a need in the art for a photosensitive sensor that is suitable for the short-wave infrared wavelength range, has low noise, fast charge transfer, and is based on a non-bulky architecture. Summary of the Invention
[0010] According to one aspect, a photosensitive sensor includes at least one pixel, the pixel including a photosensitive region, a readout region, and a transfer gate, the photosensitive region being photosensitive in a first semiconductor material, the readout region being photosensitive in a second semiconductor material, and the transfer gate facing the portion of the first semiconductor material and the second semiconductor material located between the photosensitive region and the readout region, the first semiconductor material and the second semiconductor material having different band gaps and being in contact with each other to form a heterojunction facing the transfer gate.
[0011] In other words, a heterojunction photosensitive sensor is provided, in which the photosensitive region can be coupled to the readout region by means of charge transfer controlled by a transfer gate. Providing a transfer gate between the photosensitive region and the readout region forms the basis of a so-called 4T (4 transistors) pixel technology, in which the readout region benefits from correlated double sampling readout.
[0012] The sensor is advantageously configured such that a control signal applied to the transmission gate causes charge transfer from the photosensitive area to the read node of the read area.
[0013] According to an embodiment, a first semiconductor material and a second semiconductor material are selected such that the energy level of the conduction band of the first semiconductor material is greater than the energy level of the conduction band of the second semiconductor material, and the energy level of the valence band of the first semiconductor material is greater than the energy level of the valence band of the second semiconductor material.
[0014] The semiconductor material arrangement in which the energy levels are defined above is typically described as "Type II".
[0015] In this configuration, there exists a potential drop (i.e., a downslope) at the heterojunction level between the energy levels of the corresponding conduction bands and the corresponding valence bands along the direction from the first semiconductor material to the second semiconductor material. On the other hand, there exists a potential barrier (i.e., an upslope) between the corresponding conduction bands and the corresponding valence bands along the direction from the second semiconductor material to the first semiconductor material.
[0016] In other words, the selection of the first semiconductor material and the second semiconductor material allows charge to flow in the direction from the first semiconductor material to the second semiconductor material, while the potential barrier prevents charge from flowing in the direction from the second semiconductor material to the first semiconductor material.
[0017] This configuration results in little or no electrical noise and little or no residual magnetism in the transmission after incomplete charge transfer or charge return (often referred to as "hysteresis").
[0018] According to an embodiment, a first semiconductor material is selected to be photosensitive within the wavelength range of interest, and a second semiconductor material is selected to be non-photosensitive within the wavelength range of interest.
[0019] In short, semiconductor materials can be photosensitive in the wavelength range of photons that correspond to the width of the semiconductor's band gap (i.e., the difference between the energy levels of the semiconductor's conduction band and valence band).
[0020] Therefore, in this embodiment, the readout area itself does not react to the signal detected in the photosensitive area, and the readout area does not generate parasitic charges due to exposure to the signal to be detected.
[0021] This allows for more accurate measurements while providing a simple implementation, assuming there is no need to provide a traditional screen structure that prevents the signal to be detected from being transmitted to the reading area.
[0022] According to the embodiment, the wavelength range of interest is between 700 nm and 1800 nm.
[0023] According to an embodiment, the first semiconductor material is gallium antimony arsenide (GaAsSb), and the second semiconductor material is indium phosphide (InP).
[0024] In fact, this choice of semiconductor materials makes it advantageous to provide all the configurations of the embodiments defined above at the same time, and these materials have mutually compatible crystal structures.
[0025] According to an embodiment, in the portion located between the photosensitive region and the readout region, the first semiconductor material and the second semiconductor material are doped with the same type.
[0026] According to an embodiment, the photosensitive region is configured to generate charge through the photoelectric effect, while the readout region is configured to store charge through the capacitance effect.
[0027] According to an embodiment, the photosensitive region includes a doped region of a first material arranged to form two PN junctions having corresponding space charge regions, which are joined together to form a fully depleted common region.
[0028] This type of photosensitive area embodiment is commonly referred to as a "pinned photodiode" or a depletion diode.
[0029] According to another aspect, the present invention proposes a method for manufacturing a photosensitive sensor, the method comprising at least manufacturing pixels, including: arranging a first semiconductor material and a second semiconductor material having different band gaps in contact with each other to form a heterojunction; forming a transfer gate facing the heterojunction; forming portions of the first semiconductor material and the second semiconductor material located on both sides of the heterojunction; forming a photosensitive region in the first semiconductor material; and forming a readout region in the second semiconductor material; wherein the photosensitive region and the readout region are formed on both sides of the portions of the first semiconductor material and the second semiconductor material facing the transfer gate.
[0030] According to the implementation method, a first semiconductor material and a second semiconductor material are selected such that the energy level of the conduction band of the first semiconductor material is greater than the energy level of the conduction band of the second semiconductor material, and the energy level of the valence band of the first semiconductor material is greater than the energy level of the valence band of the second semiconductor material.
[0031] Depending on the implementation, the first semiconductor material is selected to be photosensitive in the wavelength range of interest, and the second semiconductor material is selected to be non-photosensitive in the wavelength range of interest.
[0032] Depending on the implementation method, the wavelength range of interest is between 700nm and 1800nm.
[0033] Depending on the implementation method, the first semiconductor material is gallium antimony arsenide (GaAsSb), while the second semiconductor material is indium phosphide (InP).
[0034] Depending on the implementation method, forming the first semiconductor material and the second semiconductor material includes: doping the first material and the second material with the same type.
[0035] According to the implementation method, forming the photosensitive region includes: implanting dopants into a first material to form a PN junction configured to generate charge through the photoelectric effect, and forming the readout region includes: implanting dopants into a second material configured to store charge through the capacitance effect.
[0036] According to an embodiment, forming the photosensitive region further includes: re-implanting dopants into the first material, the dopants being configured to form a second PN junction such that the two PN junctions of the photosensitive region have corresponding space charge regions, the space charge regions being joined together to form a fully depleted common region.
[0037] According to the implementation method, arranging the first semiconductor material and the second semiconductor material includes: etching a cavity in the semiconductor substrate of the second material; and performing heteroepitaxial growth of the first material in the cavity.
[0038] According to the implementation method, arranging the first semiconductor material and the second semiconductor material includes: performing heteroepitaxial growth on the surface of the semiconductor substrate of the second material to the thickness of the first material; etching a cavity in the thickness of the first material until the second material is exposed; and performing homoepitaxial growth of the second material in the cavity. Attached Figure Description
[0039] Other advantages and features of the invention will become apparent in a non-limiting manner as the detailed description of the embodiments and implementations and the detailed description of the accompanying drawings are examined, wherein:
[0040] Figure 1The pixels of the photosensitive sensor are illustrated in the form of an electrical diagram (top) and a schematic cross-sectional view of the semiconductor device (bottom);
[0041] Figure 2 The diagram shows the electrical diagram of a pixel (top) and the graph (bottom) representing the potential levels V present in different regions of the pixel and in the semiconductor material.
[0042] Figure 3 The diagram illustrates the band structure of a type II heterojunction;
[0043] Figures 4A to 4E The illustration shows a reference for manufacturing. Figure 1 and Figure 2 The steps and results of the method for the pixels of the described photosensitive sensor; and
[0044] Figures 5A to 5D The illustration shows a reference for manufacturing. Figure 1 and Figure 2 The results of the steps of the alternative methods for the pixels of the described photosensitive sensor. Detailed Implementation
[0045] Figure 1 The image shows the pixel PX of the photosensitive sensor CP in the form of an electrical diagram (top) and a schematic cross-sectional view (bottom) of a semiconductor device including an example of an embodiment with pixel PX.
[0046] A pixel PX includes a photosensitive area PPD, a readout area SN, and a transfer gate TG between the photosensitive area PPD and the readout area SN.
[0047] The photosensitive area PPD is made of a first semiconductor material M1, while the readout area SN is made of a second semiconductor material M2, which is different from the first semiconductor material M1.
[0048] Therefore, the first semiconductor material M1 and the second semiconductor material M2 have different band gaps and are in contact with each other, thereby forming a heterojunction HJ at the level of their contact area.
[0049] The transfer gate TG faces the heterojunction HJ and is partially positioned on both sides of the heterojunction HJ between the photosensitive region PPD and the readout region SN. This is the first semiconductor material M1 and the second semiconductor material M2.
[0050] The photosensitive region PPD is configured to generate charge through the photoelectric effect, for example, during the integration phase when the photosensitive region PPD is illuminated by a light signal.
[0051] In this example, the photosensitive region PPD is an embodiment of a pinned photodiode (also known as a "pinned diode" or "depletion diode"), that is, an embodiment in which doped regions are included in the first materials 100, 102, 104, which are arranged to form two PN junctions having corresponding space charge regions, which are joined to form a fully depleted common region 102.
[0052] In practice, the pinned photodiode (PPD) is formed in a semiconductor well 100 in the first material M1 and is doped with a first type, such as P-type. In this example, the well 100 is incorporated into the substrate 200 formed in the second material M2.
[0053] The photodiode (PPD) includes a first region 102 and a second region 104. The first region 102 is implanted into a well 100 and is doped with a second type (e.g., N-type) opposite to the first type. The second region 104 is implanted more locally onto the surface of the well 100 and is doped (typically, strongly doped) with the first type.
[0054] Therefore, the first doped region 102 (i.e., the cathode region in the N-type case) is "pinned" between the two PN junctions formed between the well 100 and the first doped region 102, and between the first doped region 102 and the second doped region. The implantation depths of the implanted regions 102 and 104, and the dopant concentrations of the well 100 and the implanted regions 102 and 104, are provided such that the space charge region is bonded in the first implanted region 102. Thus, the first implanted region 102 shared by the two PN junctions completely depletes minority carriers.
[0055] Alternatively, in embodiments substantially the same as those described above, the photosensitive region PPD may be a “single” photodiode embodiment, i.e., a single PN junction, but without a second implanted region 104.
[0056] The read region SN is configured to store charge via the capacitance effect, for example, during the read phase after the integration phase.
[0057] The readout region SN is formed in the substrate 200, is made of the second material M2 and is doped with a first conductivity type, such as P-type; and the readout region SN includes region 202, which is implanted into the substrate 200 and doped with the same type, such as N-type.
[0058] Therefore, the read region SN is represented by a diode diagram. The intrinsic capacitance of diode SN may be sufficient to store the desired charge. If the intrinsic capacitance of diode SN is insufficient, an auxiliary capacitor element (e.g., a metal-oxide-semiconductor (MOS) structure type capacitor element) can be coupled to the injected region 202 to increase the charge storage capacity.
[0059] In particular, the charge storage function of the readout area SN enables the implementation of non-simultaneous integration and readout phases that are separated over time. This is especially true for global shutter acquisition, where the integration phase is performed within the same time interval for all pixels of the sensor, while the readout phase can be performed sequentially in the readout area SN at different times.
[0060] The transfer gate TG is configured as an inductive conduction channel adapted to transfer photogenerated charge entering the photosensitive region PPD to the readout region SN, for example, after the integration phase and at the start of the readout phase.
[0061] In this respect, the transmission gate TG includes an embodiment of a conductive region 300 (e.g., made of metal) separated from the semiconductor materials M1, M2 by the thickness of the dielectric material 302.
[0062] Gate structures 300 and 302 are formed on the surfaces of the first semiconductor material M1 and the second semiconductor material M2, which are referred to as the front FA. The front FA is typically the implantation surface.
[0063] Specifically, the lateral edge of gate region 300 defines the implanted regions 102, 104 and 202 (as referenced below). Figures 4A to 4E and Figures 5A to 5D The so-called self-alignment method described.
[0064] Gate structures 300 and 302 are positioned facing the heterojunction HJ, and semiconductor regions are located on both sides of the heterojunction HJ. More specifically, gate structures 300 and 302 are positioned facing the portion 100 between the implanted regions 102 and 104 of the pinned diode PPD of the first semiconductor material M1 and the heterojunction HJ; and further facing the portion 200 between the implanted region 202 of the readout region SN of the second semiconductor material M2 and the heterojunction HJ.
[0065] Therefore, by applying a control potential to the conductive gate region 300, a conductive channel can be formed in the semiconductor region facing the transfer gate TG.
[0066] In this regard, it should be noted that the well 100 formed in the first semiconductor material M1 and the substrate 200 formed in the second semiconductor material M2 are doped with the same type, for example, P-type, at least in the portion located between the photosensitive region PPD and the readout region SN.
[0067] Furthermore, in order to enable the transfer of charge from the photosensitive region PPD to the readout region SN, the first semiconductor material M1 and the second semiconductor material M2 are advantageously selected to have a favorable band pattern in terms of charge transfer.
[0068] In this regard, refer to Figure 2 and Figure 3 .
[0069] Figure 2 The above reference is illustrated in the diagram. Figure 1 The electrical diagram of the pixel PX described (top) and the graph representing the potential level V present in different regions of the pixel PX and in the semiconductor material (bottom).
[0070] The dashed line HJ is positioned as a reference for the location of the heterojunction HJ between the first semiconductor material M1 and the second semiconductor material M2, as shown below. Figure 1 As shown.
[0071] The relative position of the potential level V in the figure corresponds to an example where the first doping type is P-type, that is, when the first material M1 of the well 100 and the second material M2 of the substrate 200 are P-type doped.
[0072] Therefore, in this example, the photogenerated charge is an electron, and the potential barrier is formed by a spatial change that lowers the potential, while the potential well or potential “drop” (the opposite of “potential barrier”) is formed by a spatial change that increases the potential.
[0073] When the photosensitive region PPD is a pinned photodiode, the absence of moving charges in the fully depleted region will produce a constant reset effect at a level V1 known as the "depletion potential".
[0074] In the portion of the well 100 between the photosensitive region PPD and the heterojunction HJ, there is no potential V2 that defines the potential barrier for the photogenerated charge QP in the photosensitive region PPD.
[0075] The potential V3 in the portion of the substrate 200 between the heterojunction HJ and the photosensitive region PPD is greater than the potential V2, so as to limit the "drop" of the photogenerated charge QP transferred to the read node.
[0076] The potential V4 at the read node SN is greater than the levels of V2, V3 and the depletion potential V1 of the pinned photodiode PPD, thus forming a potential "trap" for the transferred charge QT.
[0077] In order to transfer the photogenerated charge QP in the photosensitive region PPD to the readout region SN, the transfer gate TG is placed at a positive potential greater than the inversion threshold of the first material M1 and the second material M2.
[0078] The potentials V2 and V3 existing between the photosensitive area PPD and the readout area SN are increased to levels greater than level V1 and less than level V4, respectively, and they have the same difference between them, namely levels V2b and V3b.
[0079] Therefore, the photogenerated charge QP is transferred to the read node SN; and when the transfer gate potential is brought to a level below the threshold, the charge QT transferred in the read node is captured by the barrier between V4 and V3.
[0080] This configuration (especially the fact that the potential V3 in the second material M2 is greater than the potential V2 in the first material M1) advantageously enables transmission with little or no noise and little or no hysteresis.
[0081] Specifically, this configuration is obtained when the energy level of the conduction band of the first semiconductor material is greater than the energy level of the conduction band of the second semiconductor material and the energy level of the valence band of the first semiconductor material is greater than the energy level of the valence band of the second semiconductor material.
[0082] This type of semiconductor material arrangement is typically described as "Type II".
[0083] In this regard, refer to Figure 3 . Figure 3 This represents the band structure of a type II heterojunction formed by gallium antimony arsenide (GaAsSb) and indium phosphide (InP).
[0084] The stoichiometry of gallium antimony arsenide (GaAsSb) is 0.49 antimony Sb and 0.51 arsenic As per unit of gallium (Ga); that is, "GaAs..." 0.51 Sb 0.49 ".
[0085] References above Figure 1 and Figure 2 In the described embodiment of the pixel PX, the first semiconductor material M1 is advantageously gallium antimony arsenide (GaAsSb) and the second semiconductor material M2 is advantageously indium phosphide (InP).
[0086] In fact, on the one hand, these materials have a type II band structure, and the energy of the conduction band EC1 of GaAsSb is ΔEC greater than that of the conduction band EC2 of InP; the energy of the valence band EV1 of GaAsSb is ΔEV greater than that of the valence band EC2 of InP.
[0087] Furthermore, GaAsSb has a band gap of 0.72 eV, while InP has a band gap of 1.35 eV.
[0088] Therefore, InP exhibits photoelectric effect for signals with wavelengths less than 920 nm, while GaAsSb exhibits photoelectric effect for signals with wavelengths less than 1750 nm.
[0089] Therefore, for wavelengths between 920 nm and 1750 nm, the first material M1 (GaAsSb) is photosensitive, while the second material M2 (InP) is not photosensitive.
[0090] Therefore, the first semiconductor material M1 can be selected to be photosensitive in the wavelength range of interest, while the second semiconductor material M2 can be selected to be non-photosensitive in the wavelength range of interest.
[0091] In the GaAsSb and InP examples, the wavelength range of interest is, for example, between 920 nm and 1750 nm.
[0092] Moreover, GaAsSb and InP have good lattice compatibility, so they can co-form in a stable manner.
[0093] Figures 4A to 4E The illustration shows a reference for manufacturing. Figure 1 and Figure 2 The steps and results of the method for the described photosensitive sensor CP pixel PX.
[0094] Figure 4A This refers to a semiconductor substrate 400 formed of a second semiconductor material. In this example, the second material is indium phosphide (InP). The substrate 400 is P-type doped, for example, by implantation or by in-situ addition of zinc (Zn) impurities.
[0095] Figure 4B This represents the result of etching the cavity 410 in the semiconductor substrate 400. The etching can be a dry etching type, such as plasma etching or reactive ion etching (RIE).
[0096] Figure 4C This represents the result of heteroepitaxial growth of a first semiconductor material 420 in a cavity 410 opened in the substrate 400. In this example, the first material is gallium antimony arsenide (GaAsSb). Therefore, the well 420 of the first material is incorporated into the second material of the substrate 400. The well 420 of the first material is p-type doped, for example, by in-situ doping, through the introduction of carbon C impurities during its formation.
[0097] Heteroepitaxy refers to the technique of growing GaAsSb crystals (usually in the gas phase) on crystals with different chemical properties (InP). The crystal structures of GaAsSb and InP have good lattice compatibility, which helps to reduce the dislocation risk between the first and second materials.
[0098] This forms a first semiconductor material 420 and a second semiconductor material 400 with different band gaps that are in contact with each other, thus forming a heterojunction HJ.
[0099] After the first material 420 is grown, a flattening may optionally be provided to flatten the surfaces of the first semiconductor material 420 and the second semiconductor material 400 in the same plane (referred to as the front FA).
[0100] Figure 4DThis indicates the result of forming a transfer gate TG on both sides of the heterojunction HJ, facing the heterojunction HJ and the first semiconductor material Pt1 and the second semiconductor material Pt2.
[0101] At this point, a dielectric layer 432 and a conductive layer 430 have been formed on the front surface FA of the substrate 400 and the well 420. Then, the stack of layers 430 and 432 is masked, and etching is performed on the parts not covered by the mask.
[0102] The unetched portion of the stack of layers 430 and 432 forms the transfer gate TG and is positioned facing the heterojunction HJ and the portions of the first semiconductor material Pt1 and the second semiconductor material Pt2 located on both sides of the heterojunction HJ.
[0103] Figure 4E This indicates the result of forming a photosensitive region PPD in the first semiconductor material 420 and a readout region SN in the second semiconductor material 400.
[0104] The formation of the photosensitive region PPD includes: first implanting an N-type dopant 422 into the P-type well 420.
[0105] Therefore, within the scope of a single photodiode embodiment, a first PN junction is formed between the N-type doped region 422 and the well 420, which is capable of generating charge through the photoelectric effect.
[0106] Advantageously, forming the photosensitive region PPD further includes re-implanting a P-type dopant 424 onto the surface of the well 420. Thus, a second PN junction 424 is formed between the N-type doped region 422 and the P-type doped region.
[0107] The concentration and depth of the dopants 420, 422, and 424 used to form the photosensitive region PPD are provided in such a way that two junction PNs have corresponding space charge regions, which are joined together to form the fully depleted region 422.
[0108] Forming the read region SN includes implanting an N-type dopant 402, such as a silicon (Si) impurity, into the second material 400.
[0109] The injected region 402 is adapted to store charge through a capacitance effect. This method may optionally include the formation of an additional capacitor element (e.g., a conventional MOS-type capacitor element) coupled to the read region SN to increase the charge storage capacity.
[0110] During implantation in regions 422, 424, and 402, the transfer gate thus formed facing the heterojunction HJ acts as an opaque mask for the implanted impurities. The lateral edges of the transfer gate TG therefore define the implantation regions 422, 424, and 402 in a self-aligned manner.
[0111] Figures 5A to 5D The illustration shows a reference for manufacturing. Figure 1 and Figure 2 The results of the steps of the alternative method for the pixel PX of the described photosensitive sensor CP.
[0112] Figure 5A This refers to a semiconductor substrate 500 formed from a P-type doped second semiconductor material (e.g., indium phosphide, InP). The thickness of a first material 510 (e.g., gallium arsenide, GaAsSb formed by heteroepitaxial growth) covers the surface of the substrate 500.
[0113] Figure 5B This indicates the result of etching cavity 520 in the thickness of the first material 510 until the second material 500 is exposed.
[0114] Figure 5C This indicates the result of homogeneous epitaxial growth of the second material 502 from the exposed surface of the second material 500 within the cavity 520.
[0115] Therefore, a well 510 is formed in the first material, which contacts a well in the second material 502, thereby forming a heterojunction HJ between them.
[0116] Figure 5D This indicates the result of forming the readout area SN and the photosensitive area PPD based on the alternative scheme of a "single" photodiode.
[0117] In this alternative, a second P-type injection was not performed. Figure 4E (424), the unique injection of N-type region 512 together with well 510 forms a single PN junction. The injection of N-type read region 402 in well 502 is related to the reference... Figure 4E The steps described are performed in the same manner.
[0118] refer to Figure 5D Alternative embodiments and references of the described "single" photodiode Figure 5A , Figure 5B and Figure 5C The alternatives described, which form traps 510 and 502 from different semiconductor materials, are not specifically related.
[0119] In summary, a heterojunction photosensitive sensor has been presented, in which a photosensitive region PPD formed in a first semiconductor material can be coupled to a readout region SN formed in a second semiconductor material different from the first semiconductor material by means of a transfer gate TG via charge transfer controlled by a heterojunction HJ. Providing a transfer gate TG between the photosensitive region and the readout region SN forms the basis of a so-called 4T (4 transistors) pixel technology, in which the readout region SN benefits from associated double sampling readout.
[0120] In summary, correlated double sampling is a technique that involves sampling the reference level (specifically, including reset noise) of the read node before transmitting charge, and also includes sampling the signal level (specifically, including both reset noise and the signal). Therefore, the reset noise can be subtracted to retain only the value of the signal at the read node SN.
[0121] A photosensitive sensor CP may include a plurality of such pixels PX arranged in a photosensitive matrix, particularly in embodiments designed for imagers in the short-wavelength infrared (SWIR) range.
[0122] Imagers including the photosensitive sensor CP as described above, within the SWIR range, can be designed, for example, for time-of-flight measurements, i.e., to acquire a depth map generated by the elapsed time between the emission time of a signal illuminating a scene (e.g., within the SWIR range) and the reception time of that signal reflected by elements of the scene.
[0123] Time-of-flight measurement imagers, including photosensitive sensors CP as described above, can be applied, for example, to autonomous vehicle sensors or to the context of biometric identification measurements such as facial shape.
Claims
1. A photosensitive sensor, comprising: at least one pixel, wherein each pixel comprises: a photosensitive region in a first semiconductor material; a read region in a second semiconductor material; and a transfer gate facing portions of the first semiconductor material and the second semiconductor material located between the photosensitive region and the read region; wherein the first semiconductor material has a first bandgap and the second semiconductor material has a second bandgap different from the first bandgap; wherein the first semiconductor material and the second semiconductor material are in contact with each other to form a heterojunction facing the transfer gate; and wherein in the portions of the first semiconductor material and the second semiconductor material located between the photosensitive region and the read region, the first semiconductor material and the second semiconductor material are doped with the same conductivity type.
2. The photosensitive sensor of claim 1, wherein an energy level of a conduction band of the first semiconductor material is greater than an energy level of a conduction band of the second semiconductor material, and wherein an energy level of a valence band of the first semiconductor material is greater than an energy level of a valence band of the second semiconductor material.
3. The photosensitive sensor of claim 1, wherein the first semiconductor material is photosensitive in a wavelength range of interest, and the second semiconductor material is not photosensitive in the wavelength range of interest.
4. The photosensitive sensor of claim 3, wherein the wavelength range of interest is between 700 nm and 1800 nm.
5. The photosensitive sensor of claim 1, wherein the first semiconductor material is gallium antimonide arsenide (GaAsSb), and the second semiconductor material is indium phosphide (InP).
6. The photosensitive sensor of claim 1, wherein the photosensitive region is configured to generate charge by a photoelectric effect, and the read region is configured to store charge by a capacitive effect.
7. The photosensitive sensor of claim 1, wherein the photosensitive region comprises a doped region of the first semiconductor material arranged to form two PN junctions having respective space charge regions that join so as to form a common region that is fully depleted.
8. A method for manufacturing a pixel of a photosensitive sensor, comprising: arranging a first semiconductor material and a second semiconductor material having different bandgaps in contact with each other to form a heterojunction; forming a transfer gate facing the heterojunction, wherein portions of the first semiconductor material and the second semiconductor material are located on either side of the heterojunction; forming a photosensitive region in the first semiconductor material; and forming a read region in the second semiconductor material; wherein the photosensitive region and the read region are located on either side of the portions of the first semiconductor material and the second semiconductor material facing the transfer gate; and wherein in the portions of the first semiconductor material and the second semiconductor material located between the photosensitive region and the read region, the first semiconductor material and the second semiconductor material are doped with the same conductivity type.
9. The method of claim 8, wherein an energy level of a conduction band of the first semiconductor material is greater than an energy level of a conduction band of the second semiconductor material, and wherein an energy level of a valence band of the first semiconductor material is greater than an energy level of a valence band of the second semiconductor material.
10. The method of claim 8, wherein the first semiconductor material is photosensitive in a wavelength range of interest, and the second semiconductor material is not photosensitive in the wavelength range of interest.
11. The method of claim 10, wherein the wavelength range of interest is between 700 nm and 1800 nm.
12. The method of claim 8, wherein the first semiconductor material is gallium antimonide arsenide (GaAsSb), and the second semiconductor material is indium phosphide (InP).
13. The method of claim 8, wherein forming the photosensitive region comprises: injecting dopants in the first semiconductor material to form a first PN junction configured to generate electric charges by a photoelectric effect, and wherein forming the read region comprises injecting dopants in the second semiconductor material, the dopants configured to store electric charges by a capacitive effect.
14. The method of claim 13, wherein forming the photosensitive region further comprises: injecting dopants in the first semiconductor material again, the dopants configured to form a second PN junction, wherein the first and second PN junctions of the photosensitive region have respective space charge regions that are joined and form a common region that is completely depleted.
15. The method of claim 8, wherein arranging the first semiconductor material and the second semiconductor material comprises: etching a cavity in a semiconductor substrate of the second semiconductor material; and performing a heteroepitaxial growth of the first semiconductor material in the cavity.
16. The method of claim 8, wherein arranging the first semiconductor material and the second semiconductor material comprises: performing a heteroepitaxial growth of a thickness of the first semiconductor material on a surface of a semiconductor substrate of the second semiconductor material; etching a cavity in the thickness of the first semiconductor material until the second semiconductor material is exposed; and performing a homoepitaxial growth of the second semiconductor material in the cavity.
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