Phase correction circuit, electric energy metering device and corresponding method thereof

Abstract

This invention provides a phase correction circuit, an energy metering device, and a corresponding method thereof. The phase correction circuit provided in this embodiment includes: a first delay module for receiving at least two input signals with asynchronous phases, and obtaining a first delayed signal by performing a first delay of M sampling intervals on the phase-leading signal based on a first phase difference between a phase-leading signal and a phase-lag signal among the at least two input signals; and a second delay module for performing a second delay of less than one sampling interval on the first delayed signal based on a second phase difference between the first delayed signal and the phase-lag signal; wherein M is a positive integer greater than or equal to 1, and the second delayed signal is phase-synchronized with the phase-lag signal. Using this invention not only enables more accurate and faster phase correction, but also simplifies the circuit design, ensuring high phase resolution without occupying a large circuit area.

Description

Technical Field

[0001] This invention relates to the field of electrical energy technology, and in particular to a phase correction circuit, an electrical energy metering device, and a corresponding method thereof. Background Technology

[0002] During the electricity metering process, the different or suboptimal selection of components in the metering channels for voltage, live wire current, and neutral wire current signals can lead to phase asynchrony among these signals, negatively impacting electricity metering. Therefore, phase synchronization correction of the electricity signals is particularly important.

[0003] Currently, existing solutions for phase synchronization correction all increase the circuit area and make it difficult to guarantee high phase resolution. Summary of the Invention

[0004] The purpose of this invention is to provide a phase correction circuit, an energy metering device, and a corresponding method, which can be used not only for phase synchronization correction of phase-asynchronous signals, especially for phase synchronization correction of energy signals in energy metering, but also to ensure high phase resolution while occupying a small circuit area.

[0005] An embodiment of the present invention provides a phase correction circuit comprising: a first delay module for receiving at least two input signals that are out of phase, and obtaining a first delayed signal by performing a first delay of M sampling intervals on the phase-leading signal based on a first phase difference between the phase-leading signal and the phase-lag signal in the at least two input signals; and a second delay module for performing a second delay of less than one sampling interval on the first delayed signal based on a second phase difference between the first delayed signal and the phase-lag signal; wherein M is a positive integer greater than or equal to 1, and the second delayed signal is phase-synchronized with the phase-lag signal.

[0006] Optionally, the phase-lagging signal includes the input signal with the most phase lag among at least two input signals.

[0007] Optionally, the phase correction circuit includes a first processing module for configuring the value of M based on the first phase difference, the frequency of the phase-leading signal, and the current frequency; wherein,

[0008]

[0009] In the formula, [] denotes the floor function. f represents the first phase difference, and f represents the frequency of the phase-leading signal. clk This represents the current frequency, which is the frequency of the first delay module, 2πf / f clkThis indicates the phase that is delayed by the first delay of a phase-leading signal by one sampling interval.

[0010] Optionally, the first delay module includes a register, which includes M delay units. The M delay units are used to perform a first delay of M sampling intervals on the phase-leading signal to obtain a first delayed signal, and each of the M delay units is adapted to perform a first delay of one sampling interval on the phase-leading signal.

[0011] Optionally, the M delay units include at least two delay units connected in series.

[0012] Optionally, the second delay module includes an all-pass filter, which is used to delay the first delay signal by a second delay of less than one sampling interval to obtain a second delayed signal; the phase correction circuit includes a second processing module, which is used to configure the coefficients of the all-pass filter based on the second phase difference and the phase response formula of the all-pass filter.

[0013] Optionally, the all-pass filter includes a first-order all-pass IIR filter, the phase response formula of which is:

[0014]

[0015] In the formula, ω represents the second phase difference, ω represents the angular frequency of the phase-leading signal, π represents the angle of the pole of the first-order all-pass IIR filter, and a1 represents the coefficient of the first-order all-pass IIR filter.

[0016] Optionally, the all-pass filter includes at least a second-order all-pass IIR filter, and the at least second-order all-pass IIR filter includes at least two second-order all-pass IIR filters connected in series; the sum of the phase delays of the first delayed signal as it passes through all the second-order all-pass IIR filters in sequence is the second phase difference; the phase response formula of the second-order all-pass IIR filter is:

[0017]

[0018] In the formula, ω represents the phase lag of the first delayed signal after passing through a second first-order all-pass IIR filter, ω represents the angular frequency of the phase-leading signal, π represents the angle of the pole of the second first-order all-pass IIR filter, and a2 represents the coefficient of the second first-order all-pass IIR filter.

[0019] Optionally, the coefficients a2 of all second-order all-pass IIR filters are the same.

[0020] An embodiment of the present invention provides an energy metering device comprising a sampling module, a filtering module, a phase correction circuit, and a metering module connected in sequence; wherein, the sampling module is used to acquire at least two analog energy signals with asynchronous phases, and convert the at least two analog energy signals into at least two digital energy signals, each of the at least two digital energy signals corresponding one-to-one with each of the at least two analog energy signals; the filtering module is used to filter the at least two digital energy signals to obtain at least two input signals, each of the at least two input signals corresponding one-to-one with each of the at least two digital energy signals; the phase correction circuit is used to delay all phase-leading signals in the at least two input signals to obtain all second delayed signals that are phase-synchronized with the phase-lagging signal in the at least two input signals, the delay including a first delay and a second delay; the metering module is used to perform energy metering based on the synchronization signal including all second delayed signals and the phase-lagging signal.

[0021] Optionally, at least two analog power signals include an analog voltage signal, an analog live wire current signal, and an analog neutral wire current signal.

[0022] An embodiment of the present invention provides a phase correction method comprising: receiving at least two input signals that are out of phase, and obtaining a first delayed signal by performing a first delay of M sampling intervals on the phase-leading signal based on a first phase difference between the phase-leading signal and the phase-lag signal in the at least two input signals; obtaining a second delayed signal by performing a second delay of less than one sampling interval on the first delayed signal based on a second phase difference between the first delayed signal and the phase-lag signal; wherein M is a positive integer greater than or equal to 1, and the second delayed signal is phase-synchronized with the phase-lag signal.

[0023] Optionally, the phase-lagging signal includes the input signal with the most phase lag among at least two input signals.

[0024] Optionally, the phase correction method includes: based on a first phase difference, the frequency of the phase-leading signal, and the value of the current frequency configuration M; wherein,

[0025]

[0026] In the formula, [] denotes the floor function. f represents the first phase difference, and f represents the frequency of the phase-leading signal. clk Represents the current frequency, 2πf / f clk This indicates the phase that is delayed by the first delay of a phase-leading signal by one sampling interval.

[0027] Optionally, the first delay of the phase-leading signal by M sampling intervals includes: using a register to perform the first delay of the phase-leading signal by M sampling intervals; wherein the register includes M delay units, the M delay units are used to perform the first delay of the phase-leading signal by M sampling intervals to obtain the first delayed signal, and each of the M delay units is adapted to perform the first delay of the phase-leading signal by one sampling interval.

[0028] Optionally, obtaining a second delayed signal by subjecting the first delayed signal to a second delay of less than one sampling interval includes: configuring the coefficients of an all-pass filter; using the all-pass filter to subject the first delayed signal to a second delay of less than one sampling interval to obtain the second delayed signal; wherein the coefficients are configured based on the second phase difference and the phase response formula of the all-pass filter.

[0029] Optionally, the all-pass filter includes a first-order all-pass IIR filter, the phase response formula of which is:

[0030]

[0031] In the formula, ω represents the second phase difference, ω represents the angular frequency of the phase-leading signal, π represents the angle of the pole of the first-order all-pass IIR filter, and a1 represents the coefficient of the first-order all-pass IIR filter.

[0032] Optionally, the all-pass filter includes at least a second-order all-pass IIR filter, and the at least second-order all-pass IIR filter includes at least two second-order all-pass IIR filters connected in series; the sum of the phase delays of the first delayed signal as it passes through all the second-order all-pass IIR filters in sequence is the second phase difference; the phase response formula of the second-order all-pass IIR filter is:

[0033]

[0034] In the formula, ω represents the phase lag of the first delayed signal after passing through a second first-order all-pass IIR filter, ω represents the angular frequency of the phase-leading signal, π represents the angle of the pole of the second first-order all-pass IIR filter, and a2 represents the coefficient of the second first-order all-pass IIR filter.

[0035] Optionally, the coefficients a2 of all second-order all-pass IIR filters are the same; the phase of the first delayed signal after passing through each second-order all-pass IIR filter is the same.

[0036] An embodiment of the present invention provides an energy metering method comprising: acquiring at least two analog energy signals with asynchronous phases, and converting the at least two analog energy signals into at least two digital energy signals, wherein each of the at least two digital energy signals corresponds one-to-one with each of the at least two analog energy signals; filtering the at least two digital energy signals to obtain at least two input signals as described in the phase correction method, wherein each of the at least two input signals corresponds to each of the at least two energy signals; delaying all phase-leading signals in the at least two input signals based on the phase correction method to obtain all second delayed signals that are phase-synchronized with the phase-lagging signal in the at least two input signals, wherein the delay includes a first delay and a second delay; and performing energy metering based on the synchronization signal including all second delayed signals and the phase-lagging signal.

[0037] Optionally, at least two analog power signals include an analog voltage signal, an analog live wire current signal, and an analog neutral wire current signal.

[0038] Compared with the prior art, the technical solutions of the embodiments of the present invention have beneficial effects.

[0039] For example, by performing preliminary phase adjustment of an integer number of sampling intervals and precise phase adjustment of less than one sampling interval on the phase-leading signal in the phase-asynchronous signal, the phase of the phase-leading signal and the phase-lag signal can be synchronized. This not only makes phase correction more accurate and faster, but also simplifies the circuit design and does not occupy too much circuit area while ensuring high phase resolution.

[0040] For example, using a register to perform a first delay on a phase-leading signal can not only quickly and accurately perform preliminary correction of the phase-leading signal for an integer number of sampling intervals, but also requires less circuit area.

[0041] For example, by using a register to perform preliminary correction on the phase-leading signal and then combining it with an all-pass filter to precisely adjust the phase after the preliminary correction, the phase correction of the phase-leading signal can be made more accurate, thereby making the phase of the corrected phase-leading signal consistent and synchronized with the phase-lagging signal.

[0042] For example, using an all-pass filter can adjust the phase of the pre-corrected signal by a smaller angle (i.e., less than a delay of one sampling interval), thereby ensuring that the corrected signal has high phase resolution. Attached Figure Description

[0043] Figure 1 This is a schematic diagram of the connection of the phase correction circuit in an embodiment of the present invention;

[0044] Figure 2 This is a connection diagram of an energy metering device in an embodiment of the present invention;

[0045] Figure 3 This is another connection diagram of the power metering device in an embodiment of the present invention;

[0046] Figure 4 This is a schematic flowchart of the phase correction method in an embodiment of the present invention;

[0047] Figure 5 This is a flowchart illustrating the electricity metering method in an embodiment of the present invention. Detailed Implementation

[0048] In existing technologies, schemes for achieving phase synchronization correction all increase the circuit area and make it difficult to guarantee a high phase resolution.

[0049] Unlike existing technologies, this invention provides an improved phase correction circuit, an energy metering device, and a corresponding method thereof. The phase correction circuit provided in this embodiment includes: a first delay module for receiving at least two input signals that are out of phase, and for performing a first delay of M sampling intervals on the phase-leading signal based on a first phase difference between a phase-leading signal and a phase-lag signal in the at least two input signals to obtain a first delayed signal; a second delay module for performing a second delay of less than one sampling interval on the first delayed signal based on a second phase difference between the first delayed signal and the phase-lag signal to obtain a second delayed signal; wherein M is a positive integer greater than or equal to 1, and the second delayed signal is phase-synchronized with the phase-lag signal.

[0050] Compared with the prior art, the technical solution of the present invention has beneficial effects. For example, by performing preliminary phase adjustment of an integer number of sampling intervals and precise phase adjustment of less than one sampling interval on the phase-leading signal in the phase-asynchronous signal, the phase of the phase-leading signal and the phase-lag signal are synchronized. This not only makes the phase correction more accurate and faster, but also simplifies the circuit design and does not occupy too much circuit area while ensuring high phase resolution.

[0051] To make the objectives, features, and beneficial effects of the embodiments of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It is to be understood that the specific embodiments described below are merely for explaining the present invention and are not intended to limit the present invention. Furthermore, descriptions of identical or similar components in different embodiments, as well as descriptions of prior art components, features, effects, etc., may be omitted.

[0052] Furthermore, for ease of description, the accompanying drawings show only the parts relevant to the embodiments of the present invention, and not all the structures. Also, different reference numerals may be used in the drawings to refer to the same or similar components in different embodiments.

[0053] Figure 1 This is a schematic diagram of a phase correction circuit in an embodiment of the present invention.

[0054] Reference Figure 1 The phase correction circuit 10 includes a first delay module 11 and a second delay module 12 connected to the first delay module 11.

[0055] In a specific implementation, the first delay module 11 receives at least two input signals that are out of phase, and obtains a first delayed signal by performing a first delay of M sampling intervals on the phase-leading signal based on a first phase difference between the phase-leading signal and the phase-lag signal among the at least two input signals. The second delay module 12 obtains a second delayed signal by performing a second delay of less than one sampling interval on the first delayed signal based on a second phase difference between the first delayed signal and the phase-lag signal. Here, M is a positive integer greater than or equal to 1, and the second delayed signal is phase-synchronized with the phase-lag signal.

[0056] The above technical solution synchronizes the phase of the phase-leading signal with the phase-lagging signal by performing preliminary phase adjustment of an integer number of sampling intervals and precise phase adjustment of less than one sampling interval on the phase-leading signal in the phase-asynchronous signal. This not only ensures more accurate and faster phase correction, but also simplifies the circuit design and does not occupy too much circuit area while ensuring high phase resolution.

[0057] Reference Figure 1 In some embodiments, the phase correction circuit 10 may include a first delay module 11 and a second delay module 12. When at least two input signals include two or more phase-leading signals that require phase correction, the phase correction circuit 10 can be used to sequentially correct the phase of the two or more phase-leading signals.

[0058] In other embodiments, the phase correction circuit 10 may include at least two phase correction units. Each of the at least two phase correction units includes a first delay module 11 and a second delay module 12. When at least two input signals include two or more phase-leading signals that require phase correction, one of the phase correction circuits 10 can be used to simultaneously perform phase correction on the two or more phase-leading signals. One phase correction unit is adapted to correct one phase-leading signal, and the correction of all phase-leading signals can be performed simultaneously.

[0059] In practice, at least two input signals are digital signals.

[0060] In some embodiments, the phase-leading signal can be any input signal whose phase is relatively leading among at least two input signals, and the phase-lag signal can be any input signal whose phase is relatively lagging among at least two input signals.

[0061] In a specific implementation, the phase correction circuit 10 can perform phase correction on any one of the phase-leading signals among at least two input signals that are out of phase, thereby synchronizing the phase of the phase-leading signal with the phase of any one of the phase-lagging signals.

[0062] In other embodiments, the phase lag signal can be the input signal with the most phase lag among at least two input signals, i.e., the phase lag signal; the phase lead signal can be any input signal among at least two input signals other than the phase lag signal.

[0063] In a specific implementation, the phase correction circuit 10 can perform phase correction on all phase-leading signals of at least two input signals that are out of phase, thereby synchronizing the phase of all phase-leading signals with the phase-lagging signal, so that the phases of at least two input signals are all synchronized.

[0064] In a specific implementation, the phase correction circuit 10 can be applied to energy metering. In this case, at least two input signals may include a digital voltage signal, a digital live wire current signal, and a digital neutral wire current signal. The first delay module 11 is adapted to receive the digital voltage signal, the digital live wire current signal, and the digital neutral wire current signal, and to perform phase correction on all phase-leading signals in the digital voltage signal, the digital live wire current signal, and the digital neutral wire current signal to synchronize the phases of the digital voltage signal, the digital live wire current signal, and the digital neutral wire current signal used for energy metering.

[0065] In a specific implementation, the first delay module 11 in the phase correction circuit 10 is adapted to perform preliminary phase adjustment of the phase-leading signal by an integer number of sampling intervals, while the second delay module 12 is adapted to perform precise phase adjustment of the phase-leading signal by less than one sampling interval, so that the phase-leading signal can be synchronized with the phase-lagging signal.

[0066] When performing preliminary phase correction on a phase-leading signal through the first delay module 11, the phase difference between the phase-leading signal and the phase-lag signal is the first phase difference of the phase-leading signal.

[0067] In a specific implementation, the first delay module 11 is adapted to perform phase adjustment on the phase-leading signal based on the first phase difference of a certain phase-leading signal by a maximum integer number of sampling intervals to obtain the first delay signal of the phase-leading signal.

[0068] Specifically, the first delay module 11 can perform phase adjustment on the phase-leading signal using a maximum of M sampling intervals, where M is a positive integer greater than or equal to 1. Therefore, the first delay module 11 is adapted to perform a first delay of the phase-leading signal by M sampling intervals based on the first phase difference of the phase-leading signal to obtain a first delayed signal of the phase-leading signal.

[0069] In some embodiments, the phase correction circuit 10 further includes a first processing module connected to the first delay module 11.

[0070] In specific implementation, the first processing module is used to configure the value of M based on the first phase difference, the frequency of the phase-leading signal, and the current frequency.

[0071]

[0072] In equation (1), [] denotes the floor function. f represents the first phase difference, and f represents the frequency of the phase-leading signal. clk Represents the current frequency, 2πf / f clk This indicates the phase that is delayed by the first delay of a phase-leading signal by one sampling interval.

[0073] In specific implementation, the frequency f of the phase-leading signal is the frequency of the phase-leading signal before it enters the first delay module 11 as an input signal. 2πf is the angular frequency of the phase-leading signal, that is, the angle that changes within one period of 2π before the phase-leading signal enters the first delay module 11 as an input signal. Current frequency f clk The frequency of the first delay module 11 is 2πf / f. clk The phase lagging behind by the first delay of one sampling interval for a phase-leading signal. The sampling interval is the sampling interval of the first delay module.

[0074] In some embodiments, the first delay module 11 may include register Z. -M .

[0075] In practical implementation, register Z -M It can include M delay units Z -1 Furthermore, there are M delay units Z. -1 The frequencies are all the same, and they are all in register Z. -M The frequency.

[0076] In practical implementation, the first processing module is adapted to use register Z -M The value of M is configured based on the frequency of the current frequency.

[0077] In practical implementation, there are M delay units Z -1 The first delayed signal is obtained by delaying the phase-leading signal by M sampling intervals, and the M delay units Z -1 Each delay unit Z in -1 Both are suitable for applying a first delay of one sampling interval to a phase-leading signal. The sampling interval is the sampling interval of the first delay module, and is expressed in register Z. -M The sampling interval is used as the sampling interval of the first delay module.

[0078] In some embodiments, register Z -M Includes at least two delay units Z -1 Furthermore, at least two delay units Z -1 Connected in series.

[0079] In this embodiment of the invention, register Z is used. -M Applying a first delay to the phase-leading signal not only enables rapid and accurate preliminary correction of the phase-leading signal by an integer number of sampling intervals, but also requires less circuit area.

[0080] In a specific implementation, the second delay module 12 is used to obtain a second delayed signal by applying a second delay of less than one sampling interval to the first delayed signal based on the second phase difference between the first delayed signal and the phase lag signal. The sampling interval is the sampling interval of the first delay module. The second delayed signal is phase-synchronized with the phase lag signal.

[0081] When performing precise phase correction on a phase-leading signal through the second delay module 12, the phase difference between the first delayed signal and the phase-lag signal of the phase-leading signal is the second phase difference of the phase-leading signal.

[0082] In practical implementation, less than one sampling interval can be There are 1 sampling interval. The sampling interval is the sampling interval of the first delay module.

[0083] As previously described, the first delay module 11 is adapted to perform a first delay of M sampling intervals on the phase-leading signal to obtain a first delayed signal. Wherein, Assuming, Then M = 3. Therefore, the second delay module 12 is adapted to perform a second delay of (3.5-3) sampling intervals on the first delay signal to obtain the second delay signal.

[0084] Therefore, the first delay module 11 in the phase correction circuit 10 is suitable for performing preliminary phase adjustment on the phase-leading signal by a maximum integer number of sampling intervals, while the second delay module 12 is suitable for performing precise phase adjustment on the phase-leading signal by a period less than one sampling interval, thereby enabling the phase-leading signal to synchronize with the phase-lagging signal. This not only allows for rapid phase correction but also makes the phase correction more accurate.

[0085] In some embodiments, the second delay module 12 may include an all-pass filter.

[0086] In a specific implementation, the all-pass filter is used to delay the first delayed signal by less than one sampling interval based on the second phase difference to obtain the second delayed signal. The sampling interval is the sampling interval of the first delay module.

[0087] In some embodiments, the phase correction circuit 10 further includes a second processing module connected to the second delay module 12.

[0088] In practice, the second processing module is used to configure the coefficients of the all-pass filter based on the second phase difference and the phase response formula of the all-pass filter.

[0089] In some embodiments, the all-pass filter includes a first-order infinite-length unit impulse response digital filter (IIR).

[0090] The phase response formula of a first-order all-pass IIR filter can be expressed as:

[0091]

[0092] In equation (2), ω represents the second phase difference, ω represents the angular frequency of the phase-leading signal, π represents the angle of the pole of the first-order all-pass IIR filter, and r represents the magnitude of the first-order all-pass IIR filter.

[0093] In practical implementation, the magnitude r of the first-order all-pass IIR filter can be expressed as follows:

[0094] r = 1 / a1 (3),

[0095] In equation (3), a1 represents the coefficient of the first-order all-pass IIR filter.

[0096] Substituting equation (3) into equation (2), the phase response formula of the first-order all-pass IIR filter can be expressed as:

[0097]

[0098] In a specific implementation, the angular frequency ω of the phase-leading signal is the angle that changes within a period of 2π before the phase-leading signal enters the first delay module 11 as an input signal, and ω = 2πf. Here, f is the frequency of the phase-leading signal, that is, the frequency that the phase-leading signal has before entering the first delay module 11 as an input signal.

[0099] Therefore, the second processing module can be based on the phase response formula (4) of the first first-order all-pass IIR filter and the second phase difference. The coefficients a1 representing the first-order all-pass IIR filter are obtained by considering the frequency f of the phase-leading signal.

[0100] After configuring the coefficients a1 of the first-order all-pass IIR filter, the first-order all-pass IIR filter can be used to apply a second delay of less than one sampling interval to the first delayed signal to obtain a second delayed signal. The sampling interval is the sampling interval of the first delay module. The second delayed signal is phase-synchronized with the phase-lag signal.

[0101] In other embodiments, the all-pass filter includes at least a second-order all-pass IIR filter. For example, a second-order all-pass IIR filter, or a third-order all-pass IIR filter, etc.

[0102] In a specific implementation, at least a second-order all-pass IIR filter may include at least two second-order all-pass IIR filters connected in series. Furthermore, the sum of the phase delays of the first delayed signal as it passes through all the second-order all-pass IIR filters is the second phase difference.

[0103] For example, a second-order all-pass IIR filter comprises two second-order all-pass IIR filters connected in series. Furthermore, the sum of the phase delays of the first delayed signal as it passes through the two second-order all-pass IIR filters is the second phase difference.

[0104] For example, a third-order all-pass IIR filter comprises three second-order all-pass IIR filters connected in series. Furthermore, the sum of the phase delays of the first delayed signal as it passes through the three second-order all-pass IIR filters is the second phase difference.

[0105] The phase response formula for a second-order all-pass IIR filter can be expressed as:

[0106]

[0107] In equation (5), ω represents the phase lag of the first delayed signal after passing through a second first-order all-pass IIR filter, ω represents the angular frequency of the phase-leading signal, π represents the angle of the pole of the second first-order all-pass IIR filter, and a2 represents the coefficient of the second first-order all-pass IIR filter.

[0108] In a specific implementation, the angular frequency ω of the phase-leading signal is the angle that changes within a period of 2π before the phase-leading signal enters the first delay module 11 as an input signal, and ω = 2πf. Here, f is the frequency of the phase-leading signal, that is, the frequency that the phase-leading signal has before entering the first delay module 11 as an input signal.

[0109] In specific implementation, it can be This is called the third phase difference, and it can be overcome by the second phase difference. It is obtained from the number of second-order all-pass IIR filters.

[0110] In some embodiments, the coefficients a2 of all second-order all-pass IIR filters can be the same. In this case, the third phase difference... Through the second phase difference It is obtained by dividing by the number of second-order all-pass IIR filters.

[0111] Therefore, the second processing module can be based on the phase response formula (5) of the second first-order all-pass IIR filter and the third phase difference. The coefficients a2 representing the second first-order all-pass IIR filter are obtained by considering the frequency f of the phase-leading signal.

[0112] After configuring the coefficients a2 of the second first-order all-pass IIR filter, a second delayed signal can be obtained by using at least a second-order all-pass IIR filter, comprising at least two second-order all-pass IIR filters connected in series, to apply a second delay of less than one sampling interval to the first delayed signal. The sampling interval is the same as the sampling interval of the first delay module. The second delayed signal is phase-synchronized with the phase-lag signal.

[0113] In some embodiments, the second processing module can be the first processing module, that is, the first processing module and the second processing module can be the same processing module.

[0114] It is understood that the phase of the phase-lagging signal in the embodiments of the present invention remains unchanged during the correction process of the phase-leading signal. The corrected phase-leading signal is synchronized with the phase of the corresponding phase-lagging signal.

[0115] This invention also provides an energy metering device.

[0116] Figure 2This is a schematic diagram of the connection of an energy metering device in an embodiment of the present invention.

[0117] Reference Figure 2 The power metering device 20 includes a sampling module 21, a filtering module 22, a phase correction module 23, and a metering module 24 connected in sequence.

[0118] In specific implementation, the sampling module 21 is used to acquire at least two analog power signals with asynchronous phases, and convert the at least two analog power signals into at least two digital power signals respectively. Each of the at least two digital power signals corresponds one-to-one with each of the at least two analog power signals.

[0119] It is understandable that during the conversion of at least two analog power signals into at least two digital power signals, the resulting phase delays are the same and will not affect the phase difference between the at least two power signals before and after the conversion.

[0120] In some embodiments, the sampling module 21 may include an analog-to-digital converter (ADC).

[0121] In practical implementation, the analog-to-digital converter is suitable for acquiring at least two analog power signals with asynchronous phases, and converting the at least two analog power signals into at least two digital power signals respectively. The digital power signals correspond one-to-one with the analog power signals.

[0122] In practice, at least two analog electrical signals include an analog voltage signal, an analog live wire current signal, and an analog neutral wire current signal. Correspondingly, at least two digital electrical signals include a digital voltage signal, a digital live wire current signal, and a digital neutral wire current signal.

[0123] In some embodiments, an analog-to-digital converter may include two input terminals for connecting to the positive and negative terminals of an analog electrical signal, respectively.

[0124] Specifically, the two input terminals can be input terminal A and input terminal B. Input terminal A is connected to the positive terminal of the analog electrical signal, and input terminal B is connected to the negative terminal of the analog electrical signal.

[0125] For example, input terminal A can be connected to the positive terminal of an analog voltage signal, and input terminal B can be connected to the negative terminal of an analog voltage signal.

[0126] For example, input terminal A can be connected to the positive terminal of the analog live wire current signal, and input terminal B can be connected to the negative terminal of the analog live wire current signal.

[0127] For example, input terminal A can be connected to the positive terminal of the analog neutral current signal, and input terminal B can be connected to the negative terminal of the analog neutral current signal.

[0128] In a specific implementation, the filtering module 22 is used to filter at least two digital power signals to obtain at least two input signals. Each of the at least two input signals corresponds one-to-one with each of the at least two digital power signals.

[0129] It is understandable that in the process of filtering at least two digital power signals to obtain at least two input signals, the resulting phase delays are the same and will not affect the phase difference between the at least two power signals before and after filtering.

[0130] In some embodiments, the filtering module 22 may include a finite-length impulse response digital filter (FIR).

[0131] In practical implementation, a finite-length unit impulse response filter is used to filter at least two digital power signals to obtain at least two input signals. Each of the at least two input signals corresponds one-to-one with each of the at least two digital power signals.

[0132] In a specific implementation, the phase correction module 23 can be the phase correction circuit 10 provided in the embodiments of the present invention, and includes the same or similar components as the phase correction circuit 10 to achieve the same or similar functions.

[0133] Specifically, the phase correction module 23 is used to delay all phase-leading signals in at least two input signals to obtain all second delayed signals that are phase-synchronized with the phase-lagging signal among the at least two input signals. Each second delayed signal corresponds one-to-one with a phase-leading signal. Furthermore, the delay for each phase-leading signal includes both the first delay and the second delay provided in this embodiment of the invention.

[0134] For example, in some embodiments, the phases of the digital voltage input signal, the digital live wire current input signal, and the digital neutral wire current input signal are sequentially lagging. The digital neutral wire current input signal is the most lagging signal, while the digital voltage input signal and the digital live wire current input signal are leading signals. In this case, the phase correction module 23 is adapted to delay the digital voltage input signal and the digital live wire current input signal respectively to obtain a digital voltage delay signal and a digital live wire current delay signal that are phase-synchronized with the digital neutral wire current input signal. Both the digital voltage delay signal and the digital live wire current delay signal are phase-synchronized with the digital neutral wire current input signal.

[0135] In practice, the metering module 24 is used to perform energy metering based on a synchronization signal that includes all second delay signals and the phase-lagging signal.

[0136] For example, metering module 24 is used to perform energy metering based on phase-synchronized digital voltage delay signal, digital live wire current delay signal, and digital neutral wire current input signal.

[0137] Figure 3 This is another connection diagram of the power metering device in an embodiment of the present invention.

[0138] Reference Figure 3 The electricity metering device 30 includes a first preprocessing unit 31, a second preprocessing unit 32, a third preprocessing unit 33, and a metering module 34 connected to the first preprocessing unit 31, the second preprocessing unit 32, and the third preprocessing unit 33, respectively.

[0139] Specifically, the first preprocessing unit 31 includes a first sampling module 311, a first filtering module 312, and a first phase correction module 313 connected in sequence. The first sampling module 311 acquires an analog voltage signal and converts it into a digital voltage signal. The first filtering module 312 filters the digital voltage signal to obtain a digital voltage input signal. The first phase correction module 313 delays the digital voltage input signal to obtain a delayed digital voltage signal. The delay includes a first delay and a second delay provided in this embodiment of the invention.

[0140] The second preprocessing unit 32 includes a second sampling module 321, a second filtering module 322, and a second phase correction module 323 connected in sequence. The second sampling module 321 acquires analog live wire current signals and converts them into digital live wire current signals. The second filtering module 322 filters the digital live wire current signals to obtain a digital live wire current input signal. The second phase correction module 323 delays the digital live wire current input signal to obtain a delayed digital live wire current signal. The delay includes a first delay and a second delay provided in this embodiment of the invention.

[0141] The third preprocessing unit 33 includes a third sampling module 331, a third filtering module 332, and a third phase correction module 333 connected in sequence. The third sampling module 331 acquires an analog neutral current signal and converts it into a digital neutral current signal. The third filtering module 332 filters the digital neutral current signal to obtain a digital neutral current input signal. The third phase correction module 333 delays the digital neutral current input signal to obtain a delayed digital neutral current signal. The delay includes a first delay and a second delay provided in this embodiment of the invention.

[0142] In specific implementations, the first sampling module 311, the second sampling module 321 and the third sampling module 331 can all be the sampling module 21 in the power metering device 20 provided in the embodiments of the present invention, and include the same or similar components as the sampling module 21 to achieve similar functions.

[0143] Unlike sampling module 21, the first sampling module 311 can be used only to acquire analog voltage signals and convert them into digital voltage signals. The second sampling module 321 can be used only to acquire analog live wire current signals and convert them into digital live wire current signals. The third sampling module 331 can be used only to acquire analog neutral wire current signals and convert them into digital neutral wire current signals.

[0144] In specific implementations, the first filter module 312, the second filter module 322 and the third filter module 332 can all be filter modules 22 in the power metering device 20 provided in the embodiments of the present invention, and include the same or similar components as the filter module 22 to achieve similar functions.

[0145] Unlike filter module 22, the first filter module 312 can be used only to filter the digital voltage signal to obtain the digital voltage input signal. The second filter module 322 can be used only to filter the digital live wire current signal to obtain the digital live wire current input signal. The third filter module 332 can be used only to filter the digital neutral wire current signal to obtain the digital neutral wire current input signal.

[0146] In specific implementations, the first phase correction module 313, the second phase correction module 323 and the third phase correction module 333 can all be phase correction modules 23 in the phase correction circuit 10 or the power metering device 20 provided in the embodiments of the present invention, and include the same or similar components as the phase correction circuit 10 or the phase correction module 23 to achieve similar functions.

[0147] Unlike phase correction circuit 10 or phase correction module 23, the first phase correction module 313 can be used only to delay the digital voltage input signal to obtain a digital voltage delay signal. The second phase correction module 323 can be used only to delay the digital live wire current input signal to obtain a digital live wire current delay signal. The third phase correction module 333 can be used only to delay the digital neutral wire current input signal to obtain a digital neutral wire current delay signal.

[0148] In a specific implementation, the power metering device 30 also includes a third processing module that is connected to the first filter module 312, the second filter module 322 and the third filter module 332 respectively.

[0149] Specifically, the third processing module is used to acquire the voltage signal phase of the digital voltage input signal through the first filtering module 312, the live current phase of the digital live current input signal through the second filtering module 322, and the neutral current phase of the digital neutral current input signal through the third filtering module 332, and to determine the phase leading signal and the phase lagging signal in the voltage signal phase, the live current signal phase and the neutral current signal.

[0150] In specific implementation, the third processing module is also connected to the first phase correction module 313, the second phase correction module 323 and the third phase correction module 333 respectively.

[0151] Specifically, the third processing module is used to determine the first phase difference between the digital voltage input signal and the phase-lagging signal as the first phase difference of the digital voltage input signal when the digital voltage input signal is a phase-leading signal, and output the first phase difference to the first phase correction module 313; and to determine the first phase difference between the digital live wire current input signal and the phase-lagging signal as the first phase difference of the digital live wire current input signal when the digital live wire current input signal is a phase-leading signal, and output the first phase difference to the second phase correction module 323; and to determine the first phase difference between the digital neutral wire current input signal and the phase-lagging signal as the first phase difference of the digital neutral wire current input signal when the digital neutral wire current input signal is a phase-leading signal, and output the first phase difference to the third phase correction module 333.

[0152] In practical implementation, the digital voltage input signal, digital live wire current input signal, and digital neutral wire current input signal are out of phase, and at least one of them is the most lagging signal, while the others are leading signals. Therefore, the first phase correction module 313, the second phase correction module 323, and the third phase correction module 333 do not perform phase correction operations simultaneously.

[0153] Specifically, the first phase correction module 313 corrects the digital voltage input signal only when the digital voltage input signal is a phase-leading signal, so that the corrected digital voltage delay signal is synchronized with the phase of the most lagging signal. The second phase correction module 323 corrects the digital live wire current input signal only when the digital live wire current input signal is a phase-leading signal, so that the corrected digital live wire current delay signal is synchronized with the phase of the most lagging signal. The third phase correction module 333 corrects the digital neutral wire current input signal only when the digital neutral wire current input signal is a phase-leading signal, so that the corrected digital neutral wire current delay signal is synchronized with the phase of the most lagging signal.

[0154] In practical implementation, the phase correction module corresponding to the phase-lagging signal is adapted to enable the input digital power signal to be directly output.

[0155] For example, if the digital neutral current input signal is the most phase-lagging signal, then the third phase correction module 333 is adapted to make the digital neutral current input signal from the third filter module 332 directly output to the metering module 34.

[0156] In a specific implementation, the metering module 34 can be the metering module 24 in the power metering device 20 provided in the embodiment of the present invention, and includes the same or similar components as the metering module 24 to achieve the same or similar functions.

[0157] This invention also provides a phase correction method.

[0158] Figure 4 This is a schematic flowchart of the phase correction method in an embodiment of the present invention;

[0159] Reference Figure 4 The phase correction method 40 may include:

[0160] S41, receive at least two input signals that are out of phase, and obtain a first delayed signal by performing a first delay of M sampling intervals on the phase-leading signal based on the first phase difference between the phase-leading signal and the phase-lag signal in the at least two input signals;

[0161] S42, the first delayed signal is obtained by applying a second delay of less than one sampling interval to the first delayed signal based on the second phase difference between the first delayed signal and the phase lag signal.

[0162] In practice, M is a positive integer greater than or equal to 1;

[0163] In practice, the second delayed signal is phase-synchronized with the phase-lag signal.

[0164] In practice, at least two input signals are digital signals.

[0165] In some embodiments, the phase-leading signal can be any input signal whose phase is relatively leading among at least two input signals, and the phase-lag signal can be any input signal whose phase is relatively lagging among at least two input signals.

[0166] In other embodiments, the phase lag signal can be the input signal with the most phase lag among at least two input signals, i.e., the phase lag signal; the phase lead signal can be any input signal among at least two input signals other than the phase lag signal.

[0167] In specific implementations, the phase correction method 40 may further include:

[0168] S411, based on the first phase difference, the frequency of the phase-leading signal, and the current frequency configuration value M.

[0169] in,

[0170]

[0171] In the formula, [] denotes the floor function. f represents the first phase difference, and f represents the frequency of the phase-leading signal. clk Represents the current frequency, 2πf / f clk This indicates the phase that is delayed by the first delay of a phase-leading signal by one sampling interval.

[0172] In some embodiments, the first delay of M sampling intervals on the phase-leading signal in step 41 may include:

[0173] S412, using register Z -M The phase-leading signal is delayed by a first delay of M sampling intervals.

[0174] In practical implementation, register Z -M It can include M delay units Z -1 Furthermore, there are M delay units Z. -1 The frequencies are all the same, and they are all in register Z. -M The frequency.

[0175] In practical implementation, register Z is used. -M The frequency is used as the current frequency f clk The value of M is configured.

[0176] In practical implementation, there are M delay units Z -1The first delayed signal is obtained by delaying the phase-leading signal by M sampling intervals. Furthermore, the M delay units Z... -1 Each delay unit Z in -1 Both are suitable for applying a first delay of one sampling interval to a phase-leading signal. The sampling interval is the sampling interval of the first delay module, and is expressed in register Z. -M The sampling interval is used as the sampling interval of the first delay module.

[0177] In some embodiments, the step 42 of applying a second delay of less than one sampling interval to the first delayed signal to obtain the second delayed signal includes:

[0178] S421, configures the coefficients of the all-pass filter;

[0179] S422, the first delayed signal is delayed by a second delay of less than one sampling interval using an all-pass filter to obtain the second delayed signal.

[0180] The sampling interval is the sampling interval of the first delay. Furthermore, the coefficients are configured based on the second phase difference and the phase response formula of the all-pass filter.

[0181] In some embodiments, the all-pass filter includes a first first-order all-pass IIR filter. Furthermore, the phase response formula of the first first-order all-pass IIR filter is:

[0182]

[0183] In the formula, ω represents the second phase difference, ω represents the angular frequency of the phase-leading signal, π represents the angle of the pole of the first-order all-pass IIR filter, and a1 represents the coefficient of the first-order all-pass IIR filter.

[0184] After configuring the coefficients a1 of the first-order all-pass IIR filter, the first-order all-pass IIR filter can be used to apply a second delay of less than one sampling interval to the first delayed signal to obtain a second delayed signal. The sampling interval is the sampling interval of the first delay. The second delayed signal is phase-synchronized with the phase-lag signal.

[0185] In other embodiments, the all-pass filter includes at least a second-order all-pass IIR filter. The at least second-order all-pass IIR filter includes at least two second-order all-pass IIR filters connected in series. The sum of the phase delays of the first delayed signal as it passes through all the second-order all-pass IIR filters is the second phase difference. The phase response formula for the second-order all-pass IIR filter is:

[0186]

[0187] In the formula, ω represents the phase lag of the first delayed signal after passing through a second first-order all-pass IIR filter, ω represents the angular frequency of the phase-leading signal, π represents the angle of the pole of the second first-order all-pass IIR filter, and a2 represents the coefficient of the second first-order all-pass IIR filter.

[0188] In some embodiments, the coefficients a2 of all second-order all-pass IIR filters are the same; the phase of the first delayed signal after passing through each second-order all-pass IIR filter is the same.

[0189] After configuring the coefficients a2 of the second first-order all-pass IIR filter, a second-delayed signal can be obtained by using at least a second-order all-pass IIR filter, comprising at least two second-order all-pass IIR filters connected in series, to apply a second delay of less than one sampling interval to the first delayed signal. The sampling interval is the sampling interval of the first delay. The second-delayed signal is phase-synchronized with the phase-lag signal.

[0190] It is understood that the phase correction method 40 provided in this embodiment of the invention can be implemented based on the phase correction circuit 10 provided in this embodiment of the invention. Furthermore, the execution of each step in the phase correction method 40 and the relationship between each step can also be referred to the foregoing description of the phase correction circuit 10, and will not be repeated here.

[0191] This invention also provides a method for measuring electrical energy.

[0192] Figure 5 This is a flowchart illustrating the electricity metering method in an embodiment of the present invention.

[0193] Reference Figure 5 The electricity metering method 50 may include:

[0194] S51, acquire at least two analog power signals with asynchronous phases, and convert the at least two analog power signals into at least two digital power signals respectively;

[0195] S52, at least two digital power signals are filtered to obtain at least two input signals;

[0196] S53, based on the phase correction method, delay all phase-leading signals in at least two input signals to obtain all second delayed signals that are phase-synchronized with the phase-lagging signal in at least two input signals;

[0197] S54 performs energy metering based on a synchronization signal that includes all second-delayed signals and the most phase-lagging signal.

[0198] In practice, at least two analog electrical signals include an analog voltage signal, an analog live wire current signal, and an analog neutral wire current signal.

[0199] In practice, each of the at least two digital power signals corresponds one-to-one with each of the at least two analog power signals.

[0200] In practice, each of the at least two input signals corresponds one-to-one with each of the at least two digital power signals.

[0201] In a specific implementation, the phase correction method described in step S53 is the phase correction method 40 provided in the embodiment of the present invention.

[0202] In specific implementation, the delay mentioned in step S53 includes the first delay and the second delay provided in the embodiments of the present invention.

[0203] It is understood that the electricity metering method 50 provided in this embodiment of the invention can be implemented based on the electricity metering devices 20 and 30 provided in this embodiment of the invention. Furthermore, the execution of each step in the electricity metering method 50 and the relationship between each step can be referred to the foregoing description of the electricity metering devices 20 and 30, and will not be repeated here.

[0204] Although specific embodiments have been described above, these embodiments are not intended to limit the scope of the invention, even when only a single embodiment is described with respect to a particular feature. The feature examples provided in this disclosure are intended to be illustrative and not limiting, unless otherwise stated. In practice, one or more technical features of the dependent claims may be combined with the technical features of the independent claims as needed and where technically feasible, and the technical features from the respective independent claims may be combined in any suitable manner rather than solely by the specific combinations listed in the claims.

[0205] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A phase correction circuit, characterized in that, include: The first delay module is used to receive at least two input signals that are out of phase, and to obtain a first delayed signal by performing a first delay of M sampling intervals on the phase-leading signal based on the first phase difference between the phase-leading signal and the phase-lag signal in the at least two input signals. The first delay module includes a register, which includes M delay units. The M delay units are used to perform the first delay of the phase-leading signal by the first delay of the M sampling intervals to obtain the first delayed signal. Each of the M delay units is adapted to perform the first delay of the phase-leading signal by one sampling interval. The second delay module is used to delay the first delay signal by a second delay of less than one sampling interval based on the second phase difference between the first delay signal and the phase hysteresis signal to obtain the second delay signal; The second delay module includes an all-pass filter, which is used to apply the second delay of less than one sampling interval to the first delayed signal to obtain the second delayed signal; the phase correction circuit includes a second processing module, which is used to configure the coefficients of the all-pass filter based on the second phase difference and the phase response formula of the all-pass filter; The first processing module is used to configure the value of M based on the first phase difference, the frequency of the phase leading signal, and the current frequency. in, M= [ φ 1 / (2πf / f clk ) In the formula, [] represents the floor function. φ 1 This represents the first phase difference. f This indicates the frequency of the phase-leading signal. f clk This refers to the current frequency, which is the frequency of the first delay module. 2πf / f clk The phase that is delayed by the first delay, which represents the phase leading signal after one sampling interval; Where M is a positive integer greater than or equal to 1, and the second delayed signal is phase-synchronized with the phase lag signal.

2. The phase correction circuit according to claim 1, characterized in that, The phase lag signal includes the input signal with the most phase lag among the at least two input signals.

3. The phase correction circuit according to claim 1, characterized in that, The M delay units include at least two delay units connected in series.

4. The phase correction circuit according to claim 1, characterized in that, The all-pass filter includes a first-order all-pass IIR filter, and the phase response formula of the first-order all-pass IIR filter is: ， In the formula, This represents the second phase difference. This represents the angular frequency of the phase-leading signal. This represents the angle of the poles of the first-order all-pass IIR filter. This represents the coefficients of the first-order all-pass IIR filter.

5. The phase correction circuit according to claim 1, characterized in that, The all-pass filter includes at least a second-order all-pass IIR filter, which includes at least two second-order all-pass IIR filters connected in series. The sum of the phase delays of the first delayed signal as it passes through all the second-order all-pass IIR filters is the second phase difference. The phase response formula of the second-order all-pass IIR filter is: ， In the formula, This represents the phase delay of the first delayed signal after passing through a second first-order all-pass IIR filter. This represents the angular frequency of the phase-leading signal. This represents the angle of the poles of the second first-order all-pass IIR filter. This represents the coefficients of the second first-order all-pass IIR filter.

6. The phase correction circuit according to claim 5, characterized in that, All coefficients of the second-order first-order all-pass IIR filter They are all the same.

7. An electricity metering device, characterized in that, It includes a sampling module, a filtering module, a phase correction circuit as described in any one of claims 1 to 6, and a metering module connected in sequence; wherein, The sampling module is used to acquire at least two analog power signals with asynchronous phases, and to convert the at least two analog power signals into at least two digital power signals respectively, wherein each of the at least two digital power signals corresponds one-to-one with each of the at least two analog power signals; The filtering module is used to filter the at least two digital power signals to obtain the at least two input signals, and each of the at least two input signals corresponds one-to-one with each of the at least two digital power signals. The phase correction circuit is used to delay all the phase-leading signals in the at least two input signals to obtain all the second delayed signals that are phase-synchronized with the phase-lagging signal in the at least two input signals, wherein the delay includes the first delay and the second delay; The metering module is used to perform energy metering based on a synchronization signal that includes all the second delayed signals and the phase-lagging signal.

8. The electricity metering device according to claim 7, characterized in that, The at least two analog electrical signals include an analog voltage signal, an analog live wire current signal, and an analog neutral wire current signal.

9. A phase correction method, characterized in that, include: Receive at least two input signals that are out of phase, and obtain a first delayed signal by delaying the phase-leading signal by M sampling intervals based on a first phase difference between the phase-leading signal and the phase-lag signal in the at least two input signals; The first delay of the phase-leading signal by M sampling intervals includes: applying the first delay of the phase-leading signal by the M sampling intervals using a register; wherein the register includes M delay units, the M delay units are used to apply the first delay of the phase-leading signal by the M sampling intervals to obtain the first delayed signal, and each of the M delay units is adapted to apply the first delay of the phase-leading signal by one sampling interval; The first delayed signal is obtained by applying a second delay of less than one sampling interval to the first delayed signal based on the second phase difference between the first delayed signal and the phase hysteresis signal; The step of applying a second delay of less than one sampling interval to the first delayed signal to obtain a second delayed signal includes: configuring the coefficients of an all-pass filter; applying the second delay of less than one sampling interval to the first delayed signal using the all-pass filter to obtain the second delayed signal; wherein the coefficients are configured based on the second phase difference and the phase response formula of the all-pass filter; Based on the first phase difference, the frequency of the phase-leading signal, and the current frequency configuration value M; wherein, M= [ φ 1 / (2πf / f clk ) In the formula, [] represents the floor function. φ 1 This represents the first phase difference. f This indicates the frequency of the phase-leading signal. f clk Indicates the current frequency, 2πf / f clk The phase that is delayed by the first delay, which represents the phase leading signal after one sampling interval; Where M is a positive integer greater than or equal to 1, and the second delayed signal is phase-synchronized with the phase lag signal.

10. The phase correction method according to claim 9, characterized in that, The phase lag signal includes the input signal with the most phase lag among the at least two input signals.

11. The phase correction method according to claim 9, characterized in that, The all-pass filter includes a first-order all-pass IIR filter, and the phase response formula of the first-order all-pass IIR filter is: ， In the formula, This represents the second phase difference. This represents the angular frequency of the phase-leading signal. This represents the angle of the poles of the first-order all-pass IIR filter. This represents the coefficients of the first-order all-pass IIR filter.

12. The phase correction method according to claim 9, characterized in that, The all-pass filter includes at least a second-order all-pass IIR filter, which includes at least two second-order all-pass IIR filters connected in series. The sum of the phase delays of the first delayed signal as it passes through all the second-order all-pass IIR filters is the second phase difference. The phase response formula of the second-order all-pass IIR filter is: ， In the formula, This represents the phase delay of the first delayed signal after passing through a second first-order all-pass IIR filter. This represents the angular frequency of the phase-leading signal. This represents the angle of the poles of the second first-order all-pass IIR filter. This represents the coefficients of the second first-order all-pass IIR filter.

13. The phase correction method according to claim 12, characterized in that, All coefficients of the second-order first-order all-pass IIR filter All are the same; the phase delayed by the first delayed signal through each of the second first-order all-pass IIR filters is the same.

14. A method for metering electrical energy, characterized in that, include: Acquire at least two analog power signals with asynchronous phases, and convert the at least two analog power signals into at least two digital power signals respectively, wherein each of the at least two digital power signals corresponds one-to-one with each of the at least two analog power signals; The at least two digital power signals are filtered to obtain at least two input signals as described in any one of claims 9 to 13, wherein each of the at least two input signals corresponds one-to-one with each of the at least two digital power signals; Based on the phase correction method according to any one of claims 9 to 13, all the phase-leading signals in the at least two input signals are delayed to obtain all the second delayed signals that are phase-synchronized with the phase-lagging signal in the at least two input signals, wherein the delay includes the first delay and the second delay; Energy metering is performed based on a synchronization signal that includes all the second delayed signals and the phase-lagging signal.

15. The electricity metering method according to claim 14, characterized in that, The at least two analog electrical signals include an analog voltage signal, an analog live wire current signal, and an analog neutral wire current signal.

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