Light emitting diode and semiconductor device

Abstract

The present invention provides a light-emitting diode and a semiconductor device. The light-emitting diode comprises: a substrate, a buffer layer epitaxially grown on the substrate in sequence, an N-type gallium nitride layer, a light-emitting region buffer layer, a first light-emitting layer, a second light-emitting layer, an electron blocking layer and a P-type gallium nitride layer, wherein the second light-emitting layer comprises one or more light-emitting well-barrier pair sublayers; the thickness of the light-emitting region buffer layer is a preset first multiple of the thickness of the light-emitting well-barrier pair sublayer; the thickness of the first light-emitting layer is a preset second multiple of the thickness of the light-emitting well-barrier pair sublayer, and the second multiple is less than the first multiple; the thickness of the electron blocking layer is a preset third multiple of the thickness of the light-emitting well-barrier pair sublayer, and the third multiple is less than the first multiple. The internal luminous efficiency of the light-emitting diode can be improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a light-emitting diode (LED) and a semiconductor device. Background Art

[0002] GaN-based LEDs emit light by radiating visible light when electrons and holes recombine. They are energy-saving, have a long service life, and are small in size. They are widely used in the field of lighting, for example, they can be used for display, indication, decoration, lighting equipment, etc. However, the internal luminous efficiency of LEDs with epitaxial structures is generally between 50% and 80%, which is not high. In particular, the epitaxial structure contains many functional layers, and the unreasonable matching of the functional layers affects each other, especially the matching between the light-emitting layer and the electron blocking layer and the internal structure of the light-emitting layer, which leads to an increase in the non-combination radiation of some carriers, affecting the light-emitting efficiency of the LED. Summary of the invention

[0003] In view of this, an object of the present invention is to provide a light emitting diode and a semiconductor device to improve the internal light emitting efficiency of the light emitting diode.

[0004] In a first aspect, an embodiment of the present invention provides a light emitting diode, comprising:

[0005] A substrate, a buffer layer, an N-type gallium nitride layer, a light-emitting region buffer layer, a first light-emitting layer, a second light-emitting layer, an electron blocking layer and a P-type gallium nitride layer epitaxially grown on the substrate in sequence, wherein:

[0006] The second light-emitting layer includes one or more light-emitting well-barrier pair sublayers;

[0007] The thickness of the light-emitting region buffer layer is a preset first multiple of the thickness of the light-emitting well-barrier pair sublayer;

[0008] The thickness of the first light-emitting layer is a preset second multiple of the thickness of the light-emitting well-barrier pair sublayer, and the second multiple is smaller than the first multiple;

[0009] The thickness of the electron blocking layer is a preset third multiple of the thickness of the light emitting well-barrier pair sublayer, and the third multiple is smaller than the first multiple.

[0010] In combination with the first aspect, the embodiment of the present invention provides a first possible implementation of the first aspect, wherein the thickness of the light emitting well-barrier pair sublayer is The first multiple is 20-40, the second multiple is 2.5-8, and the third multiple is 1-6.

[0011] In combination with the first aspect, the embodiment of the present invention provides a second possible implementation of the first aspect, wherein the thickness of the light emitting well-barrier pair sublayer is The first multiple is 25-40, the second multiple is 3-8, and the third multiple is 2-6.

[0012] In combination with the first possible implementation of the first aspect, the embodiment of the present invention provides a third possible implementation of the first aspect, wherein the thickness of the light-emitting region buffer layer is The thickness of the first light-emitting layer is The thickness of the electron blocking layer is

[0013] In combination with the second possible implementation of the first aspect, the embodiment of the present invention provides a fourth possible implementation of the first aspect, wherein the thickness of the light-emitting region buffer layer is The thickness of the first light-emitting layer is The thickness of the electron blocking layer is

[0014] In combination with the first aspect, an embodiment of the present invention provides a fifth possible implementation of the first aspect, wherein the light-emitting area buffer layer, the first light-emitting layer, and the second light-emitting layer are all n-type doped nitride semiconductors containing Al and In, wherein the average concentration of Al atoms in the second light-emitting layer is greater than the average concentration of Al atoms in the first light-emitting layer and greater than the average concentration of Al atoms in the light-emitting area buffer layer.

[0015] In combination with the fifth possible implementation of the first aspect, an embodiment of the present invention provides a sixth possible implementation of the first aspect, wherein the average concentration of In atoms in the second light-emitting layer is greater than the average concentration of In atoms in the first light-emitting layer and greater than the average concentration of In atoms in the light-emitting region buffer layer.

[0016] In combination with the sixth possible implementation of the first aspect, an embodiment of the present invention provides a seventh possible implementation of the first aspect, wherein the average concentration of n-type impurity atoms in the buffer layer of the light-emitting area is greater than the average concentration of n-type impurity atoms in the second light-emitting layer and greater than the average concentration of n-type impurity atoms in the first light-emitting layer.

[0017] In combination with the sixth possible implementation of the first aspect, an embodiment of the present invention provides an eighth possible implementation of the first aspect, wherein the light-emitting area buffer layer includes one or more sub-layer pairs grown epitaxially in sequence, and the In content of the previous sub-layer pair in the light-emitting area buffer layer is less than the In content of the next sub-layer pair.

[0018] In combination with the first aspect, the embodiment of the present invention provides a ninth possible implementation of the first aspect, wherein the second light-emitting layer includes: a first light-emitting well-barrier pair sublayer and a second light-emitting well-barrier pair sublayer, the first light-emitting well-barrier pair sublayer includes: a first light-emitting well sublayer and a first light-emitting barrier sublayer, the second light-emitting well-barrier pair sublayer includes: a second light-emitting well sublayer and a second light-emitting barrier sublayer, wherein,

[0019] The first light-emitting well sublayer is epitaxially grown on the first light-emitting layer, the first light-emitting barrier sublayer is epitaxially grown on the first light-emitting well sublayer, the second light-emitting well sublayer is epitaxially grown on the first light-emitting barrier sublayer, and the second light-emitting barrier sublayer is epitaxially grown on the second light-emitting well sublayer.

[0020] The light-emitting well-barrier pair sublayer comprises: a light-emitting well sublayer and a barrier sublayer, wherein the barrier sublayer is epitaxially grown on the light-emitting well sublayer, and the second light-emitting layer is a periodic structure in which light-emitting well sublayers and barrier sublayers are alternately stacked.

[0021] Preferably, the N-type impurity is silicon, and in the N-type gallium nitride layer, the molar concentration of silicon atoms is 10 18 / cm 3 ~10 21 / cm 3 The molar concentration of silicon atoms in the buffer layer of the light-emitting region is 10 18 / cm 3 ~10 19 / cm 3 The molar concentration of silicon atoms in the second light-emitting layer is 10 17 / cm 3 ~10 18 / cm 3 The molar concentration of silicon atoms in the first light-emitting layer is 10 17 / cm 3 ~10 19 / cm 3 .

[0022] Furthermore, the light-emitting well-barrier pair sublayer includes: a light-emitting well sublayer and a barrier sublayer, the barrier sublayer is epitaxially grown on the light-emitting well sublayer, and the second light-emitting layer is a periodic structure in which light-emitting well sublayers and barrier sublayers are alternately stacked, and the number of periods is 3 to 15.

[0023] In a second aspect, an embodiment of the present invention further provides a semiconductor device, comprising the light emitting diode as described above.

[0024] The light-emitting diode and semiconductor device provided by the embodiments of the present invention include: a substrate, a buffer layer epitaxially grown on the substrate in sequence, an N-type gallium nitride layer, a light-emitting region buffer layer, a first light-emitting layer, a second light-emitting layer, an electron blocking layer and a P-type gallium nitride layer, wherein the second light-emitting layer includes one or more light-emitting well-barrier pair sublayers; the thickness of the light-emitting region buffer layer is a preset first multiple of the thickness of the light-emitting well-barrier pair sublayer; the thickness of the first light-emitting layer is a preset second multiple of the thickness of the light-emitting well-barrier pair sublayer, and the second multiple is smaller than the first multiple; the thickness of the electron blocking layer is a preset third multiple of the thickness of the light-emitting well-barrier pair sublayer, and the third multiple is smaller than the first multiple.

[0025] At the same time, the concentration relationship between Al atoms, n-type impurities, and In atoms in the buffer layer, the first light-emitting layer, and the second light-emitting layer in the light-emitting region is adjusted. In this way, by optimizing the best matching thickness of each layer from the buffer layer to the P-type GaN layer, the thickness of the buffer layer, the first light-emitting layer, and the electron blocking layer in the light-emitting region is associated with the second light-emitting layer, thereby optimizing the matching performance of the layers that affect each other, and effectively improving the internal luminous efficiency of the light-emitting diode.

[0026] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0028] Figure 1 A schematic diagram of the structure of a light emitting diode provided in an embodiment of the present invention is shown;

[0029] Figure 2 A schematic diagram showing the relationship between the luminous efficiency of the light-emitting region buffer layers of different thicknesses, based on the thickness of the light-emitting well-barrier pair sublayer in the light-emitting diode provided by the embodiment of the present invention;

[0030] Figure 3 A schematic diagram showing the relationship between the luminous efficiencies of the second light-emitting layers of different thicknesses, based on the thickness of the light-emitting well-barrier pair sublayer in the light-emitting diode provided by the embodiment of the present invention;

[0031] Figure 4A schematic diagram showing the relationship between the luminous efficiency of electron blocking layers of different thicknesses corresponding to the light emitting diode provided by the embodiment of the present invention, taking the thickness of the light emitting well-barrier pair sublayer as a reference;

[0032] Figure 5 A schematic diagram of the structure of a semiconductor device provided by an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. The components of the embodiments of the present invention generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present invention.

[0034] In the existing LED, since the material of the light-emitting layer in the epitaxial structure is generally gallium nitride, the concentration of n-type electrons is high and the mobility is large, while in the P-type gallium nitride layer above the light-emitting layer, the carrier concentration of holes is small and the mobility is low, so that electrons often overflow into the P-type gallium nitride layer, and a part of the carriers generated by the P-type gallium nitride layer undergo non-radiative recombination with electrons, thereby reducing the internal luminous efficiency. In addition, since the materials used in the various layers of the epitaxial structure are different and the corresponding lattice constants are different, stress is generated due to the mismatch of the lattice constants, and the polarization field strength caused by the stress will also reduce the internal luminous efficiency of the LED. In the embodiment of the present invention, the epitaxial structure contains a large number of layers and the layers are mutually influenced and restricted. Therefore, under the condition of fully considering the mutual influence between the layers, the thickness of each layer of the epitaxial structure is optimized to reduce the probability of non-radiative recombination of carriers and electrons, and the materials of each layer are optimized to reduce the influence of the stress generated by the mismatch of the lattice constants of each layer on the internal luminous efficiency, thereby improving the internal luminous efficiency of the LED.

[0035] The embodiments of the present invention provide a light emitting diode and a semiconductor device, which are described below through embodiments.

[0036] Figure 1 FIG. 1 shows a schematic diagram of the structure of a light emitting diode provided by an embodiment of the present invention. Figure 1 As shown, the light emitting diode 100 comprises:

[0037] A substrate 101, a buffer layer 102, an N-type gallium nitride (GaN) layer 103, a light-emitting region buffer layer 104, a first light-emitting layer 105, a second light-emitting layer 106, an electron blocking layer 107, and a P-type gallium nitride layer 108 epitaxially grown on the substrate 101 in sequence, wherein:

[0038] The second light emitting layer 106 includes one or more light emitting well-barrier pair sublayers;

[0039] The thickness of the light-emitting region buffer layer 104 is a preset first multiple of the thickness of the light-emitting well-barrier pair sublayer;

[0040] The thickness of the first light-emitting layer 105 is a preset second multiple of the thickness of the light-emitting well-barrier pair sublayer, and the second multiple is smaller than the first multiple;

[0041] The thickness of the electron blocking layer 107 is a preset third multiple of the thickness of the light emitting well-barrier pair sublayer, and the third multiple is smaller than the first multiple.

[0042] In an embodiment of the present invention, as an optional embodiment, the structure of the first light-emitting layer 105 is the same as that of the second light-emitting layer 106, both of which include one or more light-emitting well-barrier pair sublayers. The difference is that the contents of some components in the materials of the light-emitting well-barrier pair sublayers are different.

[0043] In an embodiment of the present invention, as an optional embodiment, the light-emitting well-barrier pair sublayer includes: a light-emitting well sublayer and a barrier sublayer, the barrier sublayer is epitaxially grown on the light-emitting well sublayer, and the second light-emitting layer is a periodic structure in which the light-emitting well sublayer and the barrier sublayer are alternately stacked. As an optional embodiment, the number of periods is 3 to 15.

[0044] In the embodiment of the present invention, as an optional embodiment, the number of light-emitting well-barrier pair sublayers is 2, the second light-emitting layer 106 includes: a first light-emitting well-barrier pair sublayer 1061 and a second light-emitting well-barrier pair sublayer 1062, the first light-emitting well-barrier pair sublayer 1061 includes: a first light-emitting well sublayer 10611 and a first light-emitting barrier sublayer 10612, the second light-emitting well-barrier pair sublayer 1062 includes: a second light-emitting well sublayer 10621 and a second light-emitting barrier sublayer 10622, wherein,

[0045] The first light-emitting well sublayer 10611 is epitaxially grown on the first light-emitting layer 105 , the first light-emitting barrier sublayer 10612 is epitaxially grown on the first light-emitting well sublayer 10611 , the second light-emitting well sublayer 10621 is epitaxially grown on the first light-emitting barrier sublayer 10612 , and the second light-emitting barrier sublayer 10622 is epitaxially grown on the second light-emitting well sublayer 10621 .

[0046] In the embodiment of the present invention, when the second light emitting layer 106 includes more light emitting well-barrier pair sub-layers, each light emitting well-barrier pair sub-layer is epitaxially grown in sequence.

[0047] In the embodiment of the present invention, as an optional embodiment, the material of the N-type GaN layer is GaN, the material of the light-emitting well sublayer is InGaN, the material of the barrier sublayer is GaN, and the light-emitting region buffer layer includes one or more sublayer pairs grown epitaxially in sequence, each sublayer pair includes: a GaN sublayer and an InGaN sublayer, wherein the material of the GaN sublayer is GaN, the material of the InGaN sublayer is InGaN, and the In content of the light-emitting region buffer layer is less than the In content of the light-emitting well sublayer of the first light-emitting layer. In this way, the light-emitting region buffer layer is used as a transition layer between the N-type GaN layer and the light-emitting well sublayer of the first light-emitting layer. Since the In content in the light-emitting region buffer layer is less than the In content in the light-emitting well sublayer of the first light-emitting layer, the lattice mutation (stress) caused by the different materials (lattice constants) of the light-emitting well sublayer in the N-type GaN layer and the first light-emitting layer can be effectively alleviated, and the stress generated by the mismatch of the lattice constants between the N-type GaN layer and the first light-emitting layer can be released, thereby reducing the influence of the polarization field strength caused by the stress on the luminous efficiency.

[0048] In the embodiment of the present invention, as an optional embodiment, the thickness of the light-emitting well-barrier pair sublayer is set to The first multiple is 20 to 40, the second multiple is 2.5 to 8, and the third multiple is 1 to 6. As another preferred embodiment, the thickness of the light-emitting well-barrier pair sublayer is set to achieve the best radiation recombination efficiency. The first multiple is 25-40, the second multiple is 3-8, and the third multiple is 2-6.

[0049] In the embodiment of the present invention, as an optional embodiment, the thickness of the light-emitting region buffer layer 104 is Within this thickness range, the stress generated by the mismatch of lattice constants between the N-type GaN layer and the light-emitting trap sublayer in the first light-emitting layer can be released to the maximum extent, and defects generated at the interface between the N-type GaN layer and the light-emitting region buffer layer can be prevented from continuing to grow. If the thickness of the light-emitting region buffer layer 104 is less than this thickness range, the stress release will be insufficient. If the thickness exceeds this thickness range, the light emission angle will be changed, affecting the light extraction efficiency of the LED.

[0050] In the embodiment of the present invention, as an optional embodiment, if the thickness of the light-emitting region buffer layer 104 is The thickness of the first light emitting layer 105 is set to The thickness of the electron blocking layer 107 is As a more preferred embodiment, if the thickness of the light-emitting region buffer layer 104 is The thickness of the first light emitting layer 105 is set to The thickness of the electron blocking layer 107 is

[0051] In an embodiment of the present invention, as an optional embodiment, the light-emitting area buffer layer, the first light-emitting layer, and the second light-emitting layer are all n-type doped nitride semiconductors containing Al and In, wherein the average concentration of Al atoms in the second light-emitting layer is greater than the average concentration of Al atoms in the first light-emitting layer and greater than the average concentration of Al atoms in the light-emitting area buffer layer.

[0052] In the embodiment of the present invention, as an optional embodiment, the average concentration of In atoms in the second light-emitting layer is greater than the average concentration of In atoms in the first light-emitting layer, and the average concentration of In atoms in the first light-emitting layer is greater than the average concentration of In atoms in the light-emitting region buffer layer. As another optional embodiment, the average concentration of n-type impurity atoms in the light-emitting region buffer layer>the average concentration of n-type impurity atoms in the second light-emitting layer≥the average concentration of n-type impurity atoms in the first light-emitting layer.

[0053] In the embodiment of the present invention, the buffer layer of the light-emitting area, the first light-emitting layer, and the second light-emitting layer all contain a certain amount of In, which makes the crystal quality not high. The defects generated from the bottom layer (substrate, buffer layer, N-type GaN layer) may not only be covered in these layers, but will be continuously amplified and increased. Therefore, in order to improve the performance, as an optional embodiment, the material of the electron blocking layer is GaN containing a dopant, wherein the dopant is one of Si, Mg, In, and Al or any combination thereof. In this way, the bandgap width of the electron blocking layer can be increased, the blocking effect on electrons can be improved, and the better crystal growth quality of GaN in the electron blocking layer can be used to fill the defects. The thicker the thickness, the better the filling effect. However, on the other hand, due to the The sub-blocking layer contains dopant components such as Al, and has a high energy barrier. The thicker the thickness, the more obvious the energy barrier effect, and the stronger the blocking of holes, so that fewer holes enter the second light-emitting layer, and the radiation recombination efficiency decreases. Therefore, as an optional embodiment, the third multiple is 1 to 6. Within this thickness range, the excellent surface and better energy barrier effect of the epitaxial wafer can be taken into account. If it is less than this thickness range, the coverage of defects derived from the lower layer (the layer below the electron blocking layer) will be insufficient, and the control of electron overflow will be insufficient, resulting in poor radiation recombination efficiency; if it is greater than this thickness, it will cause absorption of photons and blocking of holes due to light absorption and excessively strong energy barrier effect, thereby affecting the radiation recombination efficiency.

[0054] In the embodiment of the present invention, the material of the buffer layer is GaN or AlGaN.

[0055] In the embodiment of the present invention, the N-type impurity is silicon. As an optional embodiment, in the N-type GaN layer, silicon (Si) is doped in GaN, and the molar concentration of the doped Si atoms is 10 18 / cm3 ~10 21 / cm 3 .

[0056] In the embodiment of the present invention, the buffer layer of the light-emitting region may include one or more sub-layer pairs grown epitaxially in sequence, wherein the In content of the InGaN sub-layer in the previous sub-layer pair is less than the In content of the InGaN sub-layer in the next sub-layer pair. As an optional embodiment, the InGaN used in the buffer layer of the light-emitting region may include a superlattice structure, and GaN and InGaN may also include a dopant, wherein the dopant is one of Al and Si or any combination thereof, and the molar concentration of silicon atoms in the buffer layer of the light-emitting region is 10 18 / cm 3 ~10 19 / cm 3 .

[0057] In the embodiment of the present invention, as an optional embodiment, the material used in the first light-emitting layer may include a superlattice structure, and the material may be doped with Al and / or Si, wherein the molar concentration of Si atoms is 10 17 / cm 3 ~10 19 / cm 3 .

[0058] In the embodiment of the present invention, as an optional embodiment, the material used in the second light-emitting layer is doped with Al and / or Si, wherein the molar concentration of silicon atoms in the second light-emitting layer is 10 17 / cm 3 ~10 18 / cm 3 .

[0059] In the embodiment of the present invention, the electron blocking layer may include one or more sub-layers.

[0060] In the embodiment of the present invention, the material of the P-type GaN layer is GaN, and GaN may be doped with Mg and / or Si.

[0061] In the embodiment of the present invention, by optimizing the optimal matching thickness of each layer from the buffer layer to the P-type GaN layer, the thickness of the buffer layer in the light-emitting area, the first light-emitting layer, and the electron blocking layer are all related to the second light-emitting layer, thereby optimizing the matching performance of each layer that influences each other, reducing the stress mismatch caused by the thickness mismatch between the layers of the epitaxial structure, and the non-radiative recombination of carriers caused by the stress mismatch, thereby improving the radiative recombination efficiency. At the same time, by optimizing the materials of each layer of the epitaxial structure, the influence of the stress caused by the lattice constant mismatch of each layer on the internal luminous efficiency is reduced, thereby improving the internal luminous efficiency.

[0062] Figure 2FIG. 1 is a schematic diagram showing the relationship between the luminous efficiency of the light-emitting region buffer layer of different thicknesses, based on the thickness of the light-emitting well-barrier pair sublayer in the light-emitting diode provided by the embodiment of the present invention. Figure 2 As shown in the figure, the thickness of the light-emitting well-barrier pair sublayer is MQW Thx, and MQW Thx*15~20 means that the thickness of the light-emitting area buffer layer is 15~20 times the thickness of the light-emitting well-barrier pair sublayer. By adjusting the thickness of the light-emitting area buffer layer to MQW Thx*15~50, the luminous efficiency (LOP, Light Output Power) can be maintained above 85%, especially when the thickness of the light-emitting area buffer layer is MQW Thx*25~40, the LOP is close to 100%.

[0063] Figure 3 FIG. 1 is a schematic diagram showing the relationship between the luminous efficiency of the second luminous layer with different thicknesses, based on the thickness of the luminous well-barrier pair sublayer in the light-emitting diode provided by the embodiment of the present invention. Figure 3 As shown in the figure, the LOP is higher than 94%, especially when the thickness of the second light-emitting layer is MQW Thx*2.5-8, the LOP is close to 100%.

[0064] Figure 4 FIG. 1 is a schematic diagram showing the relationship between the luminous efficiency of the electron blocking layer with different thicknesses, based on the thickness of the light-emitting well-barrier pair sublayer in the light-emitting diode provided by the embodiment of the present invention. Figure 4 As shown in the figure, the LOP is higher than 97%, especially when the thickness of the electron blocking layer is MQW Thx*1-6, the LOP is close to 100%.

[0065] The present invention further provides a semiconductor device 200, which includes a light emitting diode 100 formed by the above-mentioned embodiment. Figure 5 The semiconductor device 200 is a front-mounted LED structure, which includes a P electrode 201 disposed on and electrically connected to the P-type gallium nitride layer 108, and an N electrode 202 disposed on and electrically connected to the N-type gallium nitride layer.

[0066] When the P-electrode 201 and the N-electrode 202 are connected to an external power source, the electrons generated in the N-type gallium nitride layer 103 will diffuse in the positive direction into the light-emitting layer (105, 106), and the holes in the P-type gallium nitride layer 108 will diffuse in the negative direction into the light-emitting layer (105, 106). The electrons and holes that enter the light-emitting layer (105, 106) are confined in the light-emitting layer (105, 106) due to the effect of the heterojunction barrier layer, and when the electrons are recombined with the holes through transition, spontaneous radiation light will be generated.

[0067] Furthermore, in order to increase the amount of light emitted from the front side of the semiconductor device 200 , a reflective layer 203 is usually provided on the back side of the substrate 101 . The reflective layer is a distributed Bragg reflective layer or a metal reflective layer with high reflectivity.

[0068] In another embodiment, the light-emitting diode 100 can also be formed into a semiconductor device 200 with other structures through an etching process, a vapor deposition process, a grinding process, etc., such as a flip-chip structure LED or a high-voltage structure LED or a vertical structure LED or a lighting device including the above-mentioned light-emitting diode 100.

[0069] It should be noted that similar numbers and letters represent similar items in the following figures. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description and are not to be understood as indicating or implying relative importance.

[0070] Finally, it should be noted that the above-described embodiments are only specific implementation methods of the present application, which are used to illustrate the technical solutions of the present application, rather than to limit them. The protection scope of the present application is not limited thereto. Although the present application is described in detail with reference to the above-mentioned embodiments, ordinary technicians in the field should understand that any technician familiar with the technical field can still modify the technical solutions recorded in the above-mentioned embodiments within the technical scope disclosed in the present application, or can easily think of changes, or make equivalent replacements for some of the technical features therein; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application. They should all be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A light emitting diode, characterized in that: include: A substrate, a buffer layer, an N-type gallium nitride layer, a light-emitting region buffer layer, a first light-emitting layer, a second light-emitting layer, an electron blocking layer and a P-type gallium nitride layer epitaxially grown on the substrate in sequence, wherein: The second light-emitting layer includes one or more light-emitting well-barrier pair sublayers; The thickness of the light-emitting region buffer layer is a preset first multiple of the thickness of the light-emitting well-barrier pair sublayer; the first multiple is 20 to 40; The thickness of the first light-emitting layer is a preset second multiple of the thickness of the light-emitting well-barrier pair sublayer, and the second multiple is smaller than the first multiple; The thickness of the electron blocking layer is a preset third multiple of the thickness of the light emitting well-barrier pair sublayer, and the third multiple is smaller than the first multiple; The light-emitting region buffer layer, the first light-emitting layer, and the second light-emitting layer are all n-type doped nitride semiconductors containing Al and In; The average concentration of n-type impurity atoms in the buffer layer of the light-emitting region>the average concentration of n-type impurity atoms in the second light-emitting layer≥the average concentration of n-type impurity atoms in the first light-emitting layer; The average concentration of Al atoms in the second light-emitting layer is greater than the average concentration of Al atoms in the first light-emitting layer and greater than the average concentration of Al atoms in the buffer layer of the light-emitting region.

2. The light emitting diode according to claim 1, characterized in that: The thickness of the light-emitting well-barrier pair sublayer is 90Å to 160Å, the second multiple is 2.5 to 8, and the third multiple is 1 to 6.

3. The light emitting diode according to claim 1, characterized in that: The thickness of the light-emitting well-barrier pair sublayer is 110Å to 160Å, the first multiple is 25 to 40, the second multiple is 3 to 8, and the third multiple is 2 to 6.

4. The light emitting diode according to claim 2, characterized in that: The thickness of the light-emitting region buffer layer is 2000Å to 6000Å, the thickness of the first light-emitting layer is 500Å to 700Å, and the thickness of the electron blocking layer is 90Å to 960Å.

5. The light emitting diode according to claim 3, characterized in that: The thickness of the light-emitting region buffer layer is 2500Å to 6000Å, the thickness of the first light-emitting layer is 500Å to 700Å, and the thickness of the electron blocking layer is 110Å to 960Å.

6. The light emitting diode according to claim 1, characterized in that: The average concentration of In atoms in the second light-emitting layer is greater than the average concentration of In atoms in the first light-emitting layer and greater than the average concentration of In atoms in the light-emitting region buffer layer.

7. The light emitting diode according to claim 6, characterized in that: The light-emitting region buffer layer includes one or more sub-layer pairs that are sequentially epitaxially grown, and the In content of a preceding sub-layer pair in the light-emitting region buffer layer is less than the In content of a succeeding sub-layer pair.

8. The light emitting diode according to claim 1, characterized in that: The second light-emitting layer includes: a first light-emitting well-barrier pair sublayer and a second light-emitting well-barrier pair sublayer, the first light-emitting well-barrier pair sublayer includes: a first light-emitting well sublayer and a first light-emitting barrier sublayer, the second light-emitting well-barrier pair sublayer includes: a second light-emitting well sublayer and a second light-emitting barrier sublayer, wherein, The first light-emitting well sublayer is epitaxially grown on the first light-emitting layer, the first light-emitting barrier sublayer is epitaxially grown on the first light-emitting well sublayer, the second light-emitting well sublayer is epitaxially grown on the first light-emitting barrier sublayer, and the second light-emitting barrier sublayer is epitaxially grown on the second light-emitting well sublayer.

9. A semiconductor device, characterized in that: The light emitting diode comprises the light emitting diode as claimed in any one of claims 1 to 8.

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