A Spindt cathode electron source and its preparation method and application

Abstract

The present invention discloses a Spindt cathode electron source and its preparation method and application. The structure of the cathode electron source includes: a silicon substrate, an insulating layer and a gate arranged in sequence from bottom to top, wherein an insulating layer cavity is formed between the silicon substrate, the insulating layer and the gate through hole; an emission cone arranged on the silicon substrate and located in the insulating layer cavity, wherein the emission cone corresponds to the gate through hole; and a coating layer arranged on the silicon substrate, wherein the coating layer is located in the insulating layer cavity and completely covers the silicon substrate exposed in the insulating layer cavity; an incidental oxide layer located between the coating layer and the emission cone and covering the lower side of the emission cone; and the upper side of the emission cone is exposed outside the incidental oxide layer. The cathode electron source structure eliminates the undesired electron emission of the triple junction, thereby effectively preventing the common network discharge and the resulting space arc failure.

Description

Technical Field

[0001] The present invention relates to the field of vacuum electronic technology, and more specifically, to a Spindt cathode electron source and a preparation method and application thereof. Background Art

[0002] Field emission electron sources based on the principle of strong electric field-induced electron escape have the advantages of no need for external energy, room temperature operation, instantaneous start-up, and high current density. They can replace traditional hot cathode electron sources in vacuum electronic devices and are expected to retain the advantages of high frequency, high power, high temperature resistance, and radiation resistance of the devices, while also achieving a smaller size and lighter weight, with good comprehensive advantages. Potential applications of field emission electron sources include various high-end analytical instruments, display devices, X-ray emitters, microwave power devices, high-energy particle acceleration devices, space propulsion devices, and many other scenarios. The development of high-performance field emission electron sources is of great significance to the development and progress of vacuum electronic devices.

[0003] The Spindt cathode is the earliest developed, most mature and most widely used field emission electron source. Many later studies on field emission electron sources have used it as a reference. The Spindt cathode is an array cathode with a large number of integrated micro-emission units. Figure 1 shows the structure of a typical unit. Figure 1 The component numbers are: 101-silicon substrate, 201-insulating layer, 301-gate and 401-emitting cone. In normal operation, a forward bias is applied to 101-silicon substrate and 301-gate, which can generate a strong electric field on the surface of 401-emitting cone, resulting in electron emission. As the gate bias increases, the unit emission current can increase rapidly in an exponential form. The large number of micro-emitting units integrated enables the Spindt cathode to maintain a large current density and total current at the same time.

[0004] However, the Spindt cathode electron source often experiences arc failure when used at high currents, which affects device reliability. Related studies have shown that the main cause of arc failure is that when a very high voltage is applied between the 301-gate and the 101-silicon substrate, undesired electron emission will occur at the junction of the 101-silicon substrate, the 201-insulating layer, and the vacuum. Under the action of the electric field, the undesired emitted electrons climb along the side wall of the 201-insulating layer toward the 301-gate, during which they continuously collide to generate electron multiplication, and then form network discharge, and finally induce arcs at the 301-gate and 401-emitting cone, causing damage. For this type of arc failure, there are two types of related patented technologies in the early stage.

[0005] One type of technology is to try to block the path of electron discharge along the network. Japanese patent JP-A8-321255 structure, such as Figure 2As shown, a second insulating layer material is introduced. These two insulating materials construct three alternating insulating layers 201, 202 and 203. In fact, a structure with five, seven or more layers can also be constructed. The lateral corrosion difference caused by the different corrosion selectivity of the two materials can realize the insulating sidewall of the overall fold structure. This kind of fold structure insulating sidewall makes it much more difficult for electrons generated from the three-junction position of 101-silicon substrate, 201-insulating layer and vacuum to move along the wall to 301-gate and generate network discharge. The structure of US Patent US6075315A, such as Figure 3 As shown, another insulating layer material is also introduced, but it is only used to construct a 204-shielding layer between the 201-insulating layer and the 301-gate. The special structural design makes the 301-gate retract moderately, and the 204-shielding layer is used to isolate the space from the 101-silicon substrate, the 201-insulating layer and the vacuum triple junction to the 301-gate, so that it is difficult for the undesired emission electrons to produce network discharge and reach the 301-gate. However, this type of technology does not prevent the emission of undesired electrons. Although it increases the difficulty of electron discharge along the network, it does not solve the fundamental problem. In addition, the structure of the US patent greatly reduces the surface electric field strength of the 401-emitting cone under the same operating voltage due to the retraction of the 301-gate, weakening the electron emission capability of the Spindt cathode.

[0006] Another type of technology is to try to block the channel for generating space arc. U.S. Patent US6369496B1 structure, such as Figure 4 As shown, another insulating material is used to construct 205-insulating ring column to surround 401-emitting cone, isolating it from 201-insulating layer and 301-gate to avoid space arc. Figure 5 As shown, another insulating material is used to construct the 206-covering layer, and the 201-insulating layer and the 301-gate are completely covered to prevent them and the 401-emitting cone from generating a space arc. However, this type of technology does not fundamentally prevent the emission of undesired electrons, and the former is not completely isolated, and the latter requires a higher operating voltage due to the insulating covering, which will also cause insulation breakdown and space arcing. Summary of the invention

[0007] Based on the above facts, the purpose of the present invention is to provide a Spindt cathode electron source and its preparation method and application, which solves the problem that the prior art cannot completely overcome the undesired electron emission, and can effectively prevent the common network discharge and space arc failure of traditional structure electron sources.

[0008] In one aspect, the present invention provides a Spindt cathode electron source, the structure of which comprises:

[0009] A silicon substrate, an insulating layer and a gate are sequentially arranged from bottom to top, wherein an insulating layer cavity is formed between the silicon substrate, the insulating layer and the gate through hole;

[0010] An emission cone disposed on the silicon substrate and located in the cavity of the insulating layer, wherein the emission cone corresponds to the gate through hole; and

[0011] A coating layer is disposed on the silicon substrate, wherein the coating layer is located in the cavity of the insulating layer and completely covers the silicon substrate exposed in the cavity of the insulating layer;

[0012] An incidental oxide layer is located between the coating layer and the emitting cone and covers the lower side of the emitting cone; the upper side of the emitting cone is exposed outside the incidental oxide layer.

[0013] Furthermore, the coating layer is silicon dioxide obtained by thermal oxidation of the surface of the silicon substrate.

[0014] Furthermore, the coating layer has a thickness of 30-100 nm.

[0015] Furthermore, the height of the upper side surface of the emitting cone exposed outside the incidental oxide layer is 0.3-0.4 μm.

[0016] Furthermore, the material of the emission cone is selected from pure metals with high melting point and low work function, preferably W or Mo.

[0017] Furthermore, the bottom diameter of the emitting cone is 0.6-1 μm, the height is 0.8-2.2 μm, and the top curvature radius is 20-50 nm.

[0018] Furthermore, the height of the upper side surface of the emitting cone exposed outside the incidental oxide layer is 15-50% of the overall height of the emitting cone.

[0019] Furthermore, the material of the incidental oxide layer is obtained by thermal oxidation of the surface of the lower side of the emitting cone.

[0020] Furthermore, the silicon substrate is selected from a semiconductor process standard N-type doped silicon wafer.

[0021] Furthermore, the resistivity of the silicon substrate is 0.005-5Ω·cm.

[0022] Furthermore, the insulating layer material is selected from silicon dioxide or silicon nitride.

[0023] Furthermore, the thickness of the insulating layer material is 0.8-2 μm.

[0024] Furthermore, the material of the gate is selected from high melting point pure metal, preferably W or Mo; preferably, the thickness of the gate is 100-200 nm, and the diameter of the gate through hole is 0.8-1.2 μm.

[0025] In another aspect, the present invention provides a method for preparing the Spindt cathode electron source as described above, comprising the following steps:

[0026] forming an insulating layer on a silicon substrate;

[0027] Vacuum coating to form a gate layer on the insulating layer;

[0028] By photolithography, the gate layer and the insulating layer are sequentially etched until the silicon substrate, so as to form a gate and insulating layer cavity containing a gate through hole;

[0029] Rotate the substrate and vacuum-coat a sacrificial layer only on the surface of the gate by using a method of small surface inclination angle to reduce the gate through hole;

[0030] A layer of emitting cone material is vertically vacuum-coated on the surface to form an emitting cone in the cavity;

[0031] removing the sacrificial layer and the emitter tip material deposited on the sacrificial layer;

[0032] Rotate the substrate and vacuum-coat a protective layer only on the gate surface and the side surface of the emitter cone by using a method of large surface inclination;

[0033] Thermally oxidizing the silicon substrate, forming the coating layer on the surface of the silicon substrate in the cavity, and incidentally oxidizing the unprotected portion of the emitting cone to form an incidental oxide layer;

[0034] The protective layer is removed by etching to expose the gate and the upper side of the emission cone, thereby obtaining the Spindt cathode electron source.

[0035] In yet another aspect, the present invention provides use of the Spindt cathode electron source as described above in a device for vacuum electronics.

[0036] The beneficial effects of the present invention are as follows:

[0037] The Spindt cathode electron source provided by the present invention has a coating layer that completely covers the silicon substrate, eliminating the three-point structure formed by the silicon substrate, the insulating layer and the vacuum, and preventing the structure from generating undesired electron emission. Compared with the previous technology of blocking the electron transmission path along the network discharge or the arc discharge path, the present invention eliminates the electron emission source that generates discharge and arc, and can effectively prevent the traditional structure electron source from easily failing due to network discharge and space arc in high voltage and high current working conditions, effectively improving the working reliability of the electron source.

[0038] The manufacturing method of the Spindt cathode electron source provided by the present invention is to implement two steps of manufacturing the emission cone protection layer and the substrate coating layer after completing the traditional structure. The whole manufacturing method has a simple process flow, is easy to implement, and has strong compatibility. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The specific implementation modes of the present invention are further described in detail below in conjunction with the accompanying drawings.

[0040] Figure 1 A schematic structural diagram of a Spindt cathode electron source showing a typical structure in the prior art is shown.

[0041] Figure 2 A schematic structural diagram of a Spindt cathode electron source with a multi-insulating layer corrugated sidewall structure in the prior art is shown.

[0042] Figure 3 The schematic diagram of the structure of a Spindt cathode electron source with a gate shielding layer in the prior art is shown.

[0043] Figure 4 The schematic diagram of the structure of the Spindt cathode electron source with an insulating ring column and an emission cone in the prior art is shown.

[0044] Figure 5 The schematic diagram of the structure of a Spindt cathode electron source with a covering layer in the prior art is shown.

[0045] Figure 6 A schematic structural diagram of a substrate-coated Spindt cathode electron source of the present invention is shown.

[0046] Figure 7a-7h A flow chart showing the production of a substrate-coated Spindt cathode electron source according to the present invention.

[0047] Figure 8a and Figure 8b A photograph and a partial magnified photograph of a conventional high-aspect ratio Spindt cathode electron source with a substrate coating layer according to the present invention are shown.

[0048] Figure 9a-9c The scanning electron photographs of the Spindt cathode electron source with a large aspect ratio and a substrate coating layer of the present invention, which is used to manufacture an emission cone array and a final local amplified emission unit through a primary and secondary cycle are shown.

[0049] Figure 10a-Figure 10b The emission performance test curves of the Spindt cathode electron source obtained in Example 1 and Example 2 of the present invention are shown respectively. DETAILED DESCRIPTION

[0050] In order to more clearly illustrate the present invention, the present invention is further described below in conjunction with preferred embodiments and accompanying drawings. Similar components in the accompanying drawings are represented by the same reference numerals. It should be understood by those skilled in the art that the content specifically described below is illustrative rather than restrictive, and should not be used to limit the scope of protection of the present invention.

[0051] In view of the problem that the Spindt cathode electron source in the prior art often suffers from arc failure when used at high current, affecting the reliability of the device, and there is no related technology that can well overcome this problem, a specific embodiment of the present invention provides a Spindt cathode electron source, such as Figure 6 As shown, its structure includes:

[0052] A silicon substrate 101, an insulating layer 201 and a gate 301 are sequentially arranged from bottom to top, wherein an insulating layer cavity is formed between the silicon substrate 101, the insulating layer 201 and the gate through hole;

[0053] An emission cone 401 disposed in the cavity of the insulating layer on the silicon substrate 101, wherein the emission cone 401 corresponds to the gate through hole; and

[0054] A coating layer 207 disposed on the silicon substrate 101, wherein the coating layer 207 is located in the cavity of the insulating layer and completely covers the silicon substrate 101 exposed in the cavity of the insulating layer;

[0055] An incidental oxide layer 402 is located between the coating layer 207 and the emission cone 401 and covers the lower side of the emission cone 401 ; the upper side of the emission cone 401 is exposed outside the incidental oxide layer 402 .

[0056] In this embodiment, the diameter of the gate through hole is smaller than the diameter of the cavity of the insulating layer.

[0057] By constructing the coating layer 207, the three-point structure of the traditional Spindt cathode electron source formed by the silicon substrate, the insulating layer and the vacuum is eliminated, and the generation of undesired electron emission therein and the resulting network discharge and space arc are prevented, thereby improving the working reliability of the Spindt cathode electron source under high voltage and high current.

[0058] The coating layer 207 is used to effectively cover the silicon substrate 101, and a certain thickness is required to withstand electric field breakdown. The coating layer 207 is located in the cavity formed by the silicon substrate 101, the emitting cone 401 and the insulating layer 201, completely covering the silicon substrate 101 to isolate the vacuum, eliminating the three junctions formed by the silicon substrate, the insulating layer and the vacuum in the traditional structure. Considering the coating layer position and process realization, the coating layer material 207 is thermally oxidized silicon dioxide. In order to effectively form a barrier, the coating layer 207 is preferably 30-100nm thick.

[0059] In some preferred examples, the coating layer is silicon dioxide obtained by thermal oxidation of the surface of the silicon substrate.

[0060] The function of the emission cone is to emit electrons. In a preferred example, the material of the emission cone 401 is selected from pure metals with high melting points and low work functions to achieve effective emission of electrons. For example, the material of the emission cone 401 can be preferably molybdenum (melting point 2620°C, work function 4.2eV) or tungsten (melting point 3420°C, work function 4.5eV). Compared with silicon materials commonly used in semiconductor processes, they can overcome the problems of large work function, chemical instability, poor electrical and thermal conductivity, etc., thereby providing large current stable electron emission.

[0061] The shape of the emission cone 401 affects its surface electric field strength and thus affects field electron emission. The optimal position of the cone height is between the upper and lower surfaces of the gate, which is specifically determined by the thickness of the insulating layer 201 and the gate 301, and the range is preferably 0.8-2.2μm; the radius of curvature of the top of the cone is specifically determined by the height of the emission cone 401, the diameter of the through hole of the gate 301, and the thickness of the film deposited in both directions of the cone, and the optimization range is 20-50nm; the diameter of the bottom of the emission cone is determined by the diameter of the hole of the gate 301 and the thickness of the deposited film in the inclined direction of the cone, and the range is 0.6-1μm.

[0062] The Spindt cathode field emission electron source principle holds that field-induced electron emission only exists in a very small area at the top of the emission cone 401. Exemplarily, the height of the upper side of the emission cone exposed outside the incidental oxide layer is 15-50% of the overall height of the emission cone. Under this condition, the upper side (upper half) of the emission cone 401 maintains the original material properties, allowing the Spindt cathode electron source to maintain the proper electron emission performance. The lower side (lower half) of the emission cone 401 covered by the incidental oxide layer does not affect the electron source performance due to its position.

[0063] In some further preferred examples, the height of the upper side surface of the emitting cone exposed outside the incidental oxide layer is 0.3-0.4 μm.

[0064] Exemplarily, the material of the attached oxide layer is obtained by thermal oxidation of the surface of the lower side of the emitter cone. The silicon substrate also serves as a bearing structure and is suitable for the characteristics of micro-machining technology. A microelectronic standard size silicon wafer is selected; the silicon substrate 101 is responsible for providing the functions of emitting electrons and cathode conduction. It is preferred to use a semiconductor process standard N-type doped silicon wafer, and the resistivity is preferably 0.005-5Ω·cm.

[0065] The function of the insulating layer 201 is to resist the high working voltage between the silicon substrate 101 and the gate 301, and the insulating layer 201 needs to have a high breakdown field strength and thickness. The thickness of the insulating layer is determined according to the combined influence of the breakdown field strength, the diameter of the gate through hole and the shape of the emitter cone 401, and the preferred range is 0.8-2μm; the material of the insulating layer 201 is preferably selected from process-compatible silicon dioxide or silicon nitride, and more preferably, according to the process implementation method, when the thickness of the insulating layer 201 is 0.8-1.2μm, the material is selected from thermally oxidized silicon dioxide with better comprehensive performance, and when the thickness is 1.2-2μm, the material is selected from chemical vapor deposition silicon nitride with better preparation process.

[0066] The function of the gate is to form a strong electric field on the surface of the emission cone 401 to draw out electrons by applying a high voltage. The gate itself must bear the structural strength and a certain amount of leakage heat power dissipation. The material of the gate 301 is selected from a metal material with a high melting point. In a preferred example, the material of the gate 301 is selected from molybdenum or tungsten. The thickness of the gate 301 is affected by the structural strength and micro-machining process. According to the actual application, it is preferably 100-200nm. The diameter of the gate through hole affects the electric field strength and electron emission performance of the emission cone 401 when a voltage is applied. According to the actual application, it is preferably 0.8-1.2μm.

[0067] According to another specific embodiment of the present invention, a method for preparing a Spindt cathode electron source is provided, which comprises the following steps:

[0068] 1) An insulating layer 201 is formed on a silicon substrate 101 .

[0069] The insulating layer material is preferably thermally oxidized silicon dioxide, which is formed by direct oxidation of silicon wafer material and has the best bonding effect with silicon wafer; however, the thermal oxidation growth of silicon dioxide is extremely slow after exceeding a certain thickness, so thermally oxidized silicon dioxide is selected when the insulating layer is thin, and silicon nitride by chemical vapor deposition method is selected after exceeding a certain thickness. In one example, the thermally oxidized silicon dioxide insulating layer has a thickness range of 0.8-1.2μm; in another example, the chemical vapor deposition silicon dioxide insulating layer has a thickness range of 1.2-2μm. Chemical vapor deposition method can also deposit silicon nitride material as an insulating layer.

[0070] 2) Vacuum coating to form a gate layer on the insulating layer 201, such as Figure 7a shown.

[0071] The gate material is selected from a metal material with a high melting point, preferably W or Mo. The gate 301 is formed by vacuum coating technology, preferably magnetron sputtering coating method. Compared with other coating processes, sputtering coating can obtain better film layer bonding. The thickness of the gate 301 can be adjusted according to the actual application, preferably 100-200nm.

[0072] 3) By photolithography, the gate layer and the insulating layer 201 are sequentially etched until the silicon substrate 101, forming a gate 301 having a gate through hole and an insulating layer cavity, such as Figure 7b shown.

[0073] Conventional photolithography technology in semiconductor processes is used to form a masking layer of a gate through-hole pattern, and the pattern on the masking layer can be copied and transferred to a structural layer through a subsequent etching process. In the present invention, the structural layer is a gate layer.

[0074] The gate 301 is etched through the pattern mask layer to form a gate through hole. The etching is preferably performed by reactive ion etching. Reactive ion etching is a highly anisotropic dry etching method that can produce etching in the depth direction while keeping the width direction dimension basically unchanged. For the gate through hole etching in the present invention, it is possible to complete 301-gate 100-200nm depth direction etching, while maintaining the 0.8-1.2μm gate through hole diameter defined by the photolithography mask layer basically unchanged, and obtain an approximately steep side wall.

[0075] The insulating layer is etched through the gate through hole to form an insulating layer gate-controlled cavity. The etching is preferably a combination of reactive ion etching and wet chemical etching. First, reactive ion etching is used to achieve almost full depth etching of the insulating layer of 0.8-2μm, ensuring that no lateral drilling occurs during the process, thereby avoiding gate suspension and weak bonding of the insulating layer. Wet chemical etching is used as a short-time rinse etching to ensure that the insulating layer cavity is etched directly to the silicon substrate. Since the wet chemical etching method has a good etching selectivity, it can be ensured that the process is basically only for the insulating layer material without damaging the silicon substrate. The short-time wet chemical etching process will produce slight lateral drilling, making the lateral size of the insulating cavity slightly larger than the 0.8-1.2μm gate through hole diameter.

[0076] 4) Rotate the substrate and use a small surface tilt angle to vacuum coat only a sacrificial layer on the gate surface to reduce the gate through hole, such as Figure 7c shown.

[0077] The purpose of depositing the sacrificial layer at a small angle is, firstly, to control the bottom size of the emission cone 401 by reducing the hole diameter of the gate 301; secondly, to completely wrap the gate 301 so that the deposited film layer used to make the emission cone 401 and the gate 301 are effectively isolated in the subsequent process.

[0078] The material of the sacrificial layer 501 is selected from materials having an etching selectivity ratio with the silicon substrate 101, the insulating layer 201, the gate 301 and the emitter cone 401, preferably selected from metal oxide materials to facilitate the formation of a uniform film layer with fine grains. In a preferred embodiment, it is selected from aluminum oxide.

[0079] The sacrificial layer 501 is deposited at a small tilt angle, so that the sacrificial layer 501 material only exists on the surface of the gate 301, including the upper surface and the edge of the gate through hole, but does not enter the cavity formed by the silicon substrate 101 and the insulating layer 201. Preferably, the small tilt angle range is selected from 15-30 degrees with the gate plane.

[0080] The sacrificial layer 501 is vacuum coated, preferably vacuum evaporation coating with parallel beam injection. Parallel beam injection ensures the consistency of the gate closing of each unit on the Spindt cathode array; vacuum evaporation ensures that the particles of the deposited material are small so as to form a smooth edge in the gate through hole. In a preferred embodiment, the vacuum coating is selected from electron beam evaporation coating.

[0081] The thickness of the sacrificial layer 501 mainly depends on the degree of shrinkage of the gate hole 301 and is related to the incident angle of the deposition material beam. Preferably, the gate hole diameter is reduced to about 0.2 μm, and the thickness of the sacrificial layer 501 is 100-200 nm.

[0082] 5) A layer of emitting cone material is vertically vacuum-coated on the surface to form an emitting cone 401 in the cavity, such as Figure 7d shown.

[0083] The purpose of vertical deposition on the surface is to form an emission cone 401. Part of the vertically deposited material is deposited on the sacrificial layer 501 to form an incidental deposition layer 403; part of the material is deposited on the silicon substrate 101 through the gate through hole shrunk by the sacrificial layer 501. Since the material continuously deposited in this process will also shrink the gate through hole, the range of the material deposited on the silicon substrate 101 is continuously reduced, thereby forming a conical emission cone 401.

[0084] The emission cone material is selected from pure metals with high melting point and low work function, such as molybdenum or tungsten, to achieve effective emission of electrons. In another preferred example, a conductive non-metallic material with high melting point and low work function, such as zirconium carbide, can also be deposited on the surface of the emission cone 401 as an electron emission material.

[0085] The deposition of the emission cone material is selected from vacuum evaporation to ensure that the deposited material particles are fine and uniform, so as to form an emission cone with a dense structure and a smooth surface; to meet the requirements of high melting point material deposition, the deposition of the emission cone material is selected from electron beam evaporation coating.

[0086] The deposition thickness of the emission cone material depends on the required height of the emission cone 401, and the two are basically in a ratio of (1-1.2):1. For the formation of a cone with a height range of 0.8-1μm, the preferred deposition thickness is 1-1.2μm. In view of the preferred structure, the small-angle deposition of the sacrificial layer 501 has reduced the gate hole to 0.6-1μm, during the deposition of the emission cone 401 material, the gate hole will continue to shrink until it is completely closed, resulting in the deposited material can no longer enter the cavity to increase the height of the emission cone 401, and the height of the emission cone 401 formed by a single material deposition will not exceed 1μm. Therefore, for the formation of a cone with a height range of 1-2.2μm, multiple emission cone material deposition processes are required.

[0087] 6) Remove the sacrificial layer 501 and the emitter tip material deposited on the sacrificial layer, such as Figure 7e shown.

[0088] The material of the sacrificial layer 501 is selected from materials having an etching selectivity ratio with the silicon substrate 101, the insulating layer 201, the gate 301, the emitter cone 401 and the subsequent coating layer 207, so that when the sacrificial layer material is removed by etching, the etching liquid will not damage other materials. In a preferred embodiment, the sacrificial layer material is selected from aluminum oxide, and the etching liquid is selected from 120° C. hot phosphoric acid or a 20% potassium hydroxide solution.

[0089] 7) Rotate the substrate and vacuum-coat a protective layer 601 and 602 only on the surface of the gate 301 and the side of the emitting cone 401 by using a method of large surface inclination. Figure 7f shown.

[0090] The purpose of depositing the protective layer at a large tilt angle is to form a temporary protective layer on the surface of the gate 301 and the emission cone 401, so that in the subsequent process of forming the coating layer 207, the surface state of the gate 301 and part of the emission cone 401 is not affected.

[0091] The protective layer material is selected from materials having an etching selectivity ratio with the silicon substrate 101, the insulating layer 201, the gate 301 and the emitter cone 401, and is not affected by the subsequent process of forming the coating layer 207. Preferably, the protective layer material is selected from metal oxide materials to facilitate the formation of a uniform film layer with fine grains. In a preferred embodiment, the protective layer material is selected from aluminum oxide.

[0092] The protective layer is selected from the large tilt angle deposition, which is relative to the small tilt angle deposition of the aforementioned sacrificial layer, in order to allow the protective layer material to exist on the surface of the gate 301, including the upper surface and the edge of the gate through hole, and the upper surface of the emission cone 401; incidentally, the protective layer material may also exist on the upper part of the side wall of the insulating layer 201, which has no practical use; but the protective layer material should ensure that the line of sight angle does not reach the surface of the silicon substrate 101 to avoid affecting the formation of the subsequent coating layer 207. Preferably, the large tilt angle range is selected from 30-60 degrees with the plane of the gate 301.

[0093] The protective layer is vacuum-coated, preferably vacuum-evaporated by parallel beam injection. Parallel beam injection ensures that no random particles enter the cavity and reach the surface of the silicon substrate 101 during angled evaporation; vacuum evaporation ensures that the deposited material particles are small to form uniform protection. In a preferred embodiment, the vacuum coating is selected from electron beam evaporation coating.

[0094] The deposition thickness of the protective layer is based on forming a continuous and dense film on the surface of the gate 301 and the emission cone 401. Preferably, the deposition thickness ranges from 50 to 100 nm.

[0095] 8) thermally oxidizing the silicon substrate 101, forming the coating layer 207 on the surface of the silicon substrate 101 in the cavity, and the unprotected part of the emitting cone 401 is incidentally oxidized to form an incidental oxide layer 402, such as Figure 7g shown.

[0096] The purpose of thermally oxidizing the silicon substrate 101 is to directly oxidize the silicon material, and the formed silicon dioxide forms a coating layer 207 on the surface of the silicon substrate 101 in the cavity, completely covering the silicon substrate to eliminate the three junctions formed by the silicon substrate 101, the insulating layer 201 and the vacuum in the cavity. The coating layer 207 requires a certain thickness to withstand electric field breakdown and effectively form an electron emission barrier, and the thickness is preferably 30-100nm.

[0097] Silicon wafers can be naturally oxidized at room temperature, but the thickness of the oxide layer generally does not exceed 20 nm, which cannot meet the requirements of the coating layer 207, so a high-temperature oxidation method is used. Preferably, the thermal oxidation of the silicon substrate 101 uses a relatively low temperature of 700-800°C, which not only ensures the desired oxide layer thickness, but also does not excessively affect the combination of the emission cone 401 and the silicon substrate 101. More preferably, the thermal oxidation can use dry oxygen thermal oxidation or water vapor thermal oxidation. The former has a slow rate and can obtain a dense oxide layer, and the latter has a fast rate and can shorten the process time.

[0098] 9) The protective layers 601, 602 and 603 are removed by etching to expose the gate 301 and the upper side of the emission cone 401, thereby obtaining the Spindt cathode electron source. Figure 7h shown.

[0099] The materials of the emitter cone protection layer 601 and the gate protection 602 are selected from materials having an etching selectivity ratio with the silicon substrate 101, the insulating layer 201, the gate 301, the emitter cone 401 and the coating layer 207. When the protective layer material is removed by etching, the etching liquid will not damage other materials. In a preferred embodiment, the sacrificial layer material is selected from aluminum oxide, and the corresponding etching liquid is selected from 120°C hot phosphoric acid, or a potassium hydroxide solution with a concentration of 20%.

[0100] The following is described in conjunction with specific embodiments:

[0101] Example 1

[0102] A Spindt cathode electron source with a substrate coating, the conventional aspect ratio of the emission cone is close to 1:1, and its structure is as follows Figure 6 As shown, it includes a silicon substrate 101, an emission cone 401 and an accompanying oxide layer 402, a coating layer 207, an insulating layer 201 and a gate 301 arranged in sequence from bottom to top. The manufacturing method thereof includes the following steps:

[0103] 1) The silicon substrate 101 is N-type doped. <100> A silicon wafer with a crystal orientation and a resistivity of 0.01Ω·cm is thermally oxidized at 1200° C. for 16 hours to grow a layer of silicon dioxide with a thickness of 0.8 μm as the insulating layer 201.

[0104] 2) Using the RF magnetron sputtering vacuum coating method, sputtering at 600W power for 3 minutes, a 0.2μm thick molybdenum layer is deposited on the insulating layer 201 as the gate 301, such as Figure 7a shown.

[0105] 3) A Shipley S1818 photoresist with a thickness of 1.4 μm is coated on the gate 301, and a circular hole array with a diameter of 1 μm is formed in the photoresist layer by ultraviolet lithography as a masking layer; the gate 301 is etched through the photoresist masking layer by an inductively coupled plasma method using a sulfur hexafluoride process atmosphere, with a discharge power of 500 W and an etching power of 300 W, and the gate 301 is completely etched through in 4 minutes to obtain a gate 301 opening (through hole); the insulating layer 201 is etched through the gate opening by an inductively coupled plasma method using a trifluoromethane process atmosphere, with a discharge power of 500 W and an etching power of 300 W, and the etching depth is about 0.6 μm in 6 minutes, and then BOE buffer (hydrofluoric acid: ammonium fluoride: water = 3 ml: 6 g: 10 ml) is used to continue etching, and the silicon dioxide insulating layer is completely etched to the silicon substrate 101 in 5 minutes, and a certain degree of lateral drilling is generated at the same time; the residual Shipley S1818 photoresist is removed to form a gate-controlled cavity structure, such as Figure 7b shown.

[0106] 4) The substrate is rotated at 30 RPM along the plane normal direction, and at the same time, aluminum oxide is evaporated by electron beam at a plane angle of 20 degrees, with a power of 2 kW for 10 minutes, to form a 200 nm thick aluminum oxide as a sacrificial layer 501 on the plane of the gate 301; the sacrificial layer completely covers the upper surface and the side of the opening of the gate 301, and reduces the gate opening from 1 μm to 0.8 μm, as shown in FIG. Figure 7c shown.

[0107] 5) Electron beams are used to evaporate molybdenum in the vertical direction of the substrate, and the deposited material passes through the 301-gate 301 opening to reach the 101-silicon substrate 101. As the gate opening continues to shrink, an emission cone 401 is gradually formed on the silicon substrate 101. The deposition power is 4 kW for 40 minutes, and the thickness of the deposited molybdenum layer is 1.1 μm. The height of the emission cone 401 is about 0.9 μm. At the same time, a 1.1 μm thick incidental deposition layer 403 is formed on the plane of the sacrificial layer 501. Figure 7d shown.

[0108] 6) Using hot phosphoric acid at a concentration of 85% and a temperature of 120°C, the sacrificial layer 501 is etched and completely dissolved in 1 minute. The incidental deposition layer 403 on the sacrificial layer 501 is then peeled off from the substrate, leaving a conventional Spindt cathode electron source consisting of the silicon substrate 101, the emission cone 401, the insulating layer 201 and the gate 301, such as Figure 7e shown.

[0109] 7) The substrate is rotated at 30 RPM along the plane normal direction, and at the same time, aluminum oxide is evaporated by electron beam at a plane angle of 45 degrees, with a power of 2 kW for 2 minutes, to form a 50 nm thick gate protection layer 602 on the plane of the gate 301, which completely covers the upper surface and the side of the opening of the gate 301, and a 50 nm thick emission cone protection layer 601 is formed on the upper half of the emission cone 401, which completely covers the electron emission part of the top of the emission cone 401; at the same time, an additional protection layer is formed on the side wall of the insulating layer 201, such as Figure 7f shown.

[0110] 8) Thermal oxidation is performed at 800° C. for 5 hours with dry oxygen oxidation to form a 30 nm thick silicon dioxide 207 coating layer 207 on the surface of the silicon substrate 101 in the cavity, and at the same time, an oxidized surface and an oxidized layer 402 are formed on the unprotected portion of the lower half of the emitting cone 401. Figure 7g shown.

[0111] 9) Use hot phosphoric acid with a concentration of 85% and a temperature of 120°C to etch the emitter cone protection layer 601, the gate protection layer 602 and the incidental protection layer 603. Completely dissolve them in 1 minute, exposing the gate 301 and the upper half of the emitter cone 401, and obtain a substrate-coated Spindt cathode electron source, such as Figure 7h shown.

[0112] The above process obtains a substrate-coated Spindt cathode electron source, wherein the gate opening diameter of the emission array unit is 1 μm, the thickness of the insulating layer is 0.8 μm, the gate thickness is 0.2 μm, the height of the emission cone is 0.9 μm, the tip curvature radius of the emission cone is 50 nm, and the coating thickness is 30 nm. The scanning electron photographs of the Spindt cathode electron source array and the local amplified emission unit are shown as follows: Figure 8a and 8b shown.

[0113] Example 2

[0114] A Spindt cathode electron source with a substrate coating, the conventional aspect ratio of the emission cone is close to 1.5:1, and its structure is as follows Figure 6 As shown, it includes a silicon substrate 101, an emission cone 401 and an accompanying oxide layer 402, a coating layer 207, an insulating layer 201 and a gate 301 arranged in sequence from bottom to top. The manufacturing method thereof includes repeating Example 1, except that:

[0115] In step 1, the 201-insulating layer 201 is grown by chemical vapor deposition, and tetraethyl orthosilicate (TEOS) is decomposed at 640 degrees for 120 minutes to obtain a silicon dioxide insulating layer with a thickness of 1.2 μm.

[0116] In step 3, the insulating layer 201 is etched using a trifluoromethane process atmosphere, with the process parameters unchanged, and the silicon dioxide is etched to a depth of about 1 μm in 15 minutes.

[0117] Steps 4-6 need to be repeated twice: in the first cycle, a molybdenum layer with a thickness of 0.6 μm is deposited in step 5, and the height of the emission cone 401 is about 0.5 μm. In the second cycle, aluminum oxide is evaporated by electron beam in step 4 to form a sacrificial layer 501 with a thickness of 250 nm on the plane of the gate 301, reducing the gate opening from 1 μm to 0.7 μm; in step 5, a molybdenum layer with a thickness of 1 μm is deposited, and 0.8 μm is superimposed on the 0.5 μm height of the emission cone 401.

[0118] In step 8, water vapor thermal oxidation is performed at 800° C. for 2 hours to form a silicon dioxide coating layer 207 with a thickness of 100 nm on the surface of the silicon substrate 101 in the cavity.

[0119] The above process yields a substrate-coated Spindt cathode electron source, with an emission array unit grid opening diameter of 1 μm, an insulating layer thickness of 1.2 μm, a grid thickness of 0.2 μm, an emission cone height of 1.3 μm, a tip curvature radius of 40 nm, and a coating layer thickness of 100 nm. The scanning electron photographs of the Spindt cathode electron source produced by one and two cycles of emission cone arrays and the final local amplification emission unit are shown below. Figure 9a ,9b and 9c.

[0120] The verification results of the above embodiments show that the substrate-coated Spindt cathode electron source proposed in the present invention can effectively eliminate the undesired electron emission generated by the triple junction of the silicon substrate, the insulating layer and the vacuum, thereby avoiding the vacuum arc electron source failure problem caused thereby.

[0121] Taking the structural parameters (mainly the gate hole diameter, the height of the emission cone and the curvature radius of the top of the cone) and materials of the embodiment as an example, the gate voltage threshold for electron emission of the Spindt cathode electron source without a substrate coating structure is 70-80V, and the emission current increases with the increase of the gate voltage. However, when the gate voltage exceeds 120-130V, a significant vacuum arc may be generated, resulting in damage to the cathode electron source. However, in the Spindt cathode electron source with a substrate coating structure in this embodiment 1, the gate voltage threshold for electron emission remains basically unchanged, and it can still work stably when the gate voltage exceeds 130V, maintaining reliable emission of large current. Example 2 and other embodiments verify that similar results are shown, indicating that the present invention can better solve the vacuum arc failure problem caused by undesired electrons at the three junctions of the Spindt cathode electron source.

[0122] Figure 10 shows the emission performance test curves of two Spindt cathode electron sources with substrate coating structures. The vacuum degree of the test environment is 2×10 -7 Pa. The test adopts a three-pole test with an external anode. A fixed high voltage is applied to the external anode, and the gate voltage is gradually increased to test the emission current. The total emission current includes the anode current and the gate interception current. Fig.10a The Spindt cathode obtained in Example 1, which includes an array of 11,000 emission units and a unit center spacing of 5 μm, starts to generate electron emission at a gate voltage of 70 V, and obtains a stable emission current of 24.62 mA at 148 V, corresponding to an emission current density of 8.7 A / cm 2 . Fig.10b The Spindt cathode obtained in Example 2, which includes an array of 25 emission units and a unit center spacing of 5 μm, starts to generate electron emission at a gate voltage of 80 V, and obtains a stable emission current of 159 μA at 160 V, corresponding to an emission current density of 25.4 A / cm 2 .

[0123] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not limitations on the implementation methods of the present invention. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is impossible to list all the implementation methods here. All obvious changes or modifications derived from the technical solution of the present invention are still within the protection scope of the present invention.

Claims

1. A Spindt cathode electron source, characterized in that: Its structure includes: A silicon substrate, an insulating layer and a gate are sequentially arranged from bottom to top, wherein an insulating layer cavity is formed between the silicon substrate, the insulating layer and the gate through hole; An emission cone disposed on the silicon substrate and located in the cavity of the insulating layer, wherein the emission cone corresponds to the gate through hole; and A coating layer is disposed on the silicon substrate, wherein the coating layer is located in the cavity of the insulating layer and completely covers the silicon substrate exposed in the cavity of the insulating layer; An incidental oxide layer is located between the coating layer and the emitting cone and covers the lower side of the emitting cone; the upper side of the emitting cone is exposed outside the incidental oxide layer.

2. The Spindt cathode electron source according to claim 1, characterized in that: The coating layer is silicon dioxide obtained by thermal oxidation of the surface of the silicon substrate.

3. The Spindt cathode electron source according to claim 1, characterized in that: The coating layer has a thickness of 30-100 nm.

4. The Spindt cathode electron source according to claim 1, characterized in that: The height of the upper side surface of the emitting cone exposed outside the incidental oxide layer is 0.3-0.4 μm.

5. The Spindt cathode electron source according to claim 1, characterized in that: The material of the emission cone is selected from pure metals with high melting point and low work function.

6. The Spindt cathode electron source according to claim 5, characterized in that The material of the emission cone is selected from W or Mo.

7. The Spindt cathode electron source according to claim 1, characterized in that: The bottom diameter of the emitting cone is 0.6-1 μm, the height is 0.8-2.2 μm, and the top curvature radius is 20-50 nm.

8. The Spindt cathode electron source according to claim 1, characterized in that: The height of the upper side surface of the emitting cone exposed outside the incidental oxide layer is 15-50% of the overall height of the emitting cone.

9. The Spindt cathode electron source according to claim 1, characterized in that: The incidental oxide layer is obtained by thermally oxidizing the surface of the lower side of the emitting cone.

10. The Spindt cathode electron source according to claim 1, characterized in that: The silicon substrate is selected from a semiconductor process standard N-type doped silicon wafer.

11. The Spindt cathode electron source according to claim 1, characterized in that: The resistivity of the silicon substrate is 0.005-5Ω·cm.

12. The Spindt cathode electron source according to claim 1, characterized in that: The insulating layer material is selected from silicon dioxide or silicon nitride.

13. The Spindt cathode electron source according to claim 1, characterized in that: The thickness of the insulating layer material is 0.8-2 μm.

14. The Spindt cathode electron source according to claim 1, characterized in that: The material of the gate is selected from high melting point pure metal.

15. The Spindt cathode electron source according to claim 1, characterized in that: The gate electrode is made of W or Mo.

16. The Spindt cathode electron source according to claim 1, characterized in that: The thickness of the gate is 100-200 nm, and the diameter of the gate through hole is 0.8-1.2 μm.

17. The method for preparing a Spindt cathode electron source according to any one of claims 1 to 16, characterized in that: The steps include: forming an insulating layer on a silicon substrate; Vacuum coating to form a gate layer on the insulating layer; By photolithography, the gate layer and the insulating layer are sequentially etched until the silicon substrate, so as to form a gate and insulating layer cavity containing a gate through hole; Rotate the substrate and vacuum-coat a sacrificial layer only on the surface of the gate by using a method of small surface inclination to reduce the gate through hole; A layer of emitting cone material is vertically vacuum-coated on the surface to form an emitting cone in the cavity; removing the sacrificial layer and the emitter tip material deposited on the sacrificial layer; Rotate the substrate and vacuum-coat a protective layer only on the gate surface and the side surface of the emitter cone by using a method of large surface inclination; Thermally oxidizing the silicon substrate, forming the coating layer on the surface of the silicon substrate in the cavity, and incidentally oxidizing the unprotected portion of the emitting cone to form an incidental oxide layer; The protective layer is removed by etching to expose the gate and the upper side of the emission cone, thereby obtaining the Spindt cathode electron source.

18. Use of the Spindt cathode electron source according to any one of claims 1 to 16 in a vacuum electronic device.

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