Display panel, manufacturing method thereof and spliced display panel
By forming a thin film layer on the display panel for protection, the problems of metal trace corrosion and moisture intrusion are solved, achieving effective protection of the display panel and normal lighting of the spliced display.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
- Filing Date
- 2022-08-16
- Publication Date
- 2026-04-17
AI Technical Summary
In the mini direct-view display process, exposed metal traces on the side can cause corrosion, and moisture can enter from the front and damage the device. Furthermore, existing protection methods may affect splicing or cause interface coverage to prevent the substrate from lighting up.
A thin film layer with a thickness of less than 30μm and a moisture permeability (WVTR) of <1*10-2g/(m2*24h) is used for protection. The connection terminals are fixed by a protective cover and vacuum-coated on the entire surface. After forming the protective film layer, the protective cover is removed to expose the connection terminals.
It effectively prevents water and oxygen intrusion, solves poor contact problems, and ensures the splicing and lighting functions of the display panel.
Smart Images

Figure CN115513221B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technology, and in particular to a display panel and its manufacturing method, and a splicing display panel. Background Technology
[0002] In mini-display technology, due to the need for cell testing, metal traces are exposed on the sides, directly exposed to moisture and oxygen, which can easily lead to corrosion. Simultaneously, the devices use thin-film transistor switches, with the semiconductor layer made of indium gallium zinc oxide (IGZO). Moisture can easily penetrate from the front, causing device failure. Furthermore, mini-displays require splicing, necessitating protection of the side metal traces. This side protection material cannot be too thick. If side adhesive is used, excessive thickness can affect splicing. Currently, some methods use physical vapor deposition (PVD) or chemical vapor deposition (CVD) for protection, but due to process limitations, side protection is not possible. Some methods use full-surface coating for protection, but this can result in the coating completely covering the circuit board interfaces (connection terminals), preventing the substrate from lighting up. Summary of the Invention
[0003] In view of this, this application provides a splicing display panel that can prevent water and oxygen intrusion and can light up the substrate, as well as a method for manufacturing the same and a display terminal.
[0004] To solve the above problems, the technical solution provided in this application is as follows:
[0005] In a first aspect, this application provides a splicing display panel, comprising multiple display panels spliced together, wherein the display panels include:
[0006] Base;
[0007] A driving transistor is formed on the substrate;
[0008] A pixel unit is formed on the driving transistor; one pixel unit is electrically connected to one driving transistor.
[0009] A first metal trace is formed on the substrate; one of the metal traces is electrically connected to one of the pixel units.
[0010] An encapsulation layer is formed on the substrate and covers the driving transistor, the pixel unit, and a portion of the first metal trace;
[0011] A circuit board is formed on the surface of the substrate away from the driving transistor; the circuit board includes connection terminals;
[0012] A connector; one end of the connector is formed on the surface of the substrate facing the driving transistor and electrically connected to the first metal trace, and the other end is formed on the surface of the substrate away from the driving transistor and electrically connected to the circuit board; and
[0013] A protective film layer covers the encapsulation layer, the first metal trace, the connector, at least a portion of the substrate, and at least a portion of the circuit board; the protective film layer has an opening through which the connector terminal is exposed.
[0014] In one optional embodiment of this application, the thickness of the protective film layer is less than 30 μm.
[0015] In an optional embodiment of this application, the moisture permeability (WVTR) of the protective membrane layer is < 1*10. -2 g / (m 2 *24h).
[0016] In an optional embodiment of this application, a portion of the substrate and a portion of the circuit board are exposed from the opening.
[0017] In an optional embodiment of this application, the display panel further includes a second metal trace, which is formed on the substrate and electrically connected to the driving transistor, and the protective film layer covers the second metal trace.
[0018] A second aspect of this application provides a splicing display panel, comprising a plurality of display panels as described above, each display panel including a first end and a second end, the connector being located at the second end; the first end of one display panel is spliced with the second end of another adjacent display panel.
[0019] A third aspect of this application provides a method for manufacturing a display panel, comprising the following steps:
[0020] A display panel intermediate is provided; the display panel intermediate includes a substrate, a driving transistor, a pixel unit, a first metal trace, a packaging layer, a circuit board, and a connector. The driving transistor, the first metal trace, the packaging layer, and the circuit board are all formed on the substrate. The pixel unit is formed on the driving transistor and electrically connected to the corresponding driving transistor. The packaging layer covers the driving transistor, the pixel unit, and part of the first metal trace. The circuit board is formed on the surface of the substrate away from the driving transistor and includes a connection terminal. One end of the connector is formed on the surface of the substrate facing the driving transistor and is electrically connected to the first metal trace.
[0021] The connector is bent such that the other end of the connector is formed on the surface of the substrate away from the driving transistor and is electrically connected to the circuit board.
[0022] A protective cover is provided and the protective cover is fixed around the connection terminal; the connection terminal is housed within the protective cover;
[0023] The display panel intermediate body, to which the protective cover is fixed, is coated with a protective film to form a protective film layer; the protective film layer covers the encapsulation layer, the first metal trace, the connector, the substrate, the circuit board and the protective cover;
[0024] Remove the protective cover and the protective film layer formed on the protective cover to form an opening in the protective film layer, through which the connection terminal is exposed; and
[0025] Multiple display panels are spliced together.
[0026] In an optional embodiment of this application, the thickness of the protective film layer is less than 30 μm; or the moisture permeability (WVTR) of the protective film layer is less than 1*10. -2 g / (m 2 *24h).
[0027] In an optional embodiment of this application, the protective cover is fixed around the connection terminal by adhesive blocks formed by dispensing. The adhesive blocks are right-angled triangles, with the hypotenuse of the triangle facing the protective film layer.
[0028] In one optional embodiment of this application, at least one of the Pyrelin vacuum coating method and atomic layer deposition vacuum coating method is used for full-surface coating.
[0029] The display panel and its manufacturing method provided in this application, as well as the splicing display panel, form a protective cover around the circuit board to cover the connection terminals of the circuit board. After forming a protective film layer by vacuum coating, the protective cover is removed. The protective film layer and the protective cover can not only protect the front and sides of the display panel, thereby effectively preventing water and oxygen intrusion, but also solve the problem of poor contact caused by the coating of the connection terminals of the circuit board. Attached Figure Description
[0030] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0031] Figure 1 This is a cross-sectional view of a splicing display panel provided in a preferred embodiment of this application.
[0032] Figure 2 for Figure 1 A cross-sectional view of one of the display panels shown in the splicing display panel diagram.
[0033] Figure 3 for Figure 2 A magnified view of a portion of the display panel shown.
[0034] Figure 4 This is a flowchart illustrating a method for manufacturing a display panel according to a preferred embodiment of this application.
[0035] Figure 5 This is a cross-sectional view of a display panel intermediate body provided in a preferred embodiment of the present application, with a protective cover formed around the connection terminals of the circuit board of the display panel intermediate body.
[0036] Figure 6 In order to be in Figure 5 The image shown is a cross-sectional view of the display panel intermediate body, to which the protective cover is fixed, after undergoing full-surface vacuum coating.
[0037] Figure 7 This is a flowchart illustrating a method for preparing a splicing display panel according to a preferred embodiment of this application. Detailed Implementation
[0038] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0039] In the description of this application, it should be understood that the terms "upper," "lower," etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.
[0040] Reference numerals and / or reference letters may be repeated in different embodiments of this application. Such repetition is for the purpose of simplification and clarity and does not in itself indicate the relationship between the various implementations and / or settings discussed.
[0041] The splicing display panel, its manufacturing method, and the display terminal provided in this application will be described in detail below with reference to specific embodiments and accompanying drawings.
[0042] Please see Figure 1-3 A preferred embodiment of this application provides a splicing display panel 100, which includes a plurality of display panels 110 spliced together. Specifically, each display panel 110 includes a first end 111 and a second end 112 opposite to the first end 111, and the first end 111 of one display panel 110 is spliced with the second end 112 of another adjacent display panel 110.
[0043] Each of the display panels 110 includes a substrate 20, a display structure 10, a first metal trace 22, an encapsulation layer 30, a circuit board 40, a connector 50, and a protective film layer 70. The display structure 10 and the first metal trace 22 are formed on the substrate 20. The first metal trace 22 is electrically connected to the display structure 10 and the connector 50. The encapsulation layer 30 is formed on the substrate 20. The circuit board 40 is formed on the surface of the substrate 20 away from the display structure 10. One end of the connector 50 is formed on the surface of the substrate 20 facing the display structure 10 and is electrically connected to the first metal trace 22. The other end is formed on the surface of the substrate 20 away from the display structure 10 and is electrically connected to the circuit board 40. The protective film layer 70 covers the encapsulation layer 30, the first metal trace 22, the connector 50, at least a portion of the substrate 20, and at least a portion of the circuit board 40.
[0044] Specifically, the display structure 10 includes a driving transistor 11 and a pixel unit 12. The driving transistor 11 is formed on the substrate 20, and one pixel unit 12 is formed on one driving transistor 11 and electrically connected to the driving transistor 11. The driving transistor 11 drives the pixel unit 12, causing the pixel unit 12 to emit light.
[0045] Specifically, in an optional embodiment of this application, the active layer of the driving transistor 11 is made of IGZO material.
[0046] Specifically, in an optional embodiment of this application, the pixel unit 12 includes a red sub-pixel (R), a green sub-pixel (G), and a blue sub-pixel (B), arranged in RGB order. Of course, in other embodiments, the pixel unit 12 may also include white sub-pixels, yellow sub-pixels, etc., and is not limited to red sub-pixels (R), green sub-pixels (G), and blue sub-pixels (B), and the arrangement of the sub-pixels is not limited to RGB; it can also be RGBW, etc.
[0047] The encapsulation layer 30 covers the driving transistor 11, the pixel unit 12, and a portion of the first metal trace 22. That is, a portion of the first metal trace is exposed outside the encapsulation layer 30.
[0048] The encapsulation layer 30 can be made of materials such as silicone or epoxy, and can be formed by spraying, molding, or other methods.
[0049] In an optional embodiment of this application, all the display structures 10 within the plurality of display panels 110 are equally spaced. Specifically, the distance between two adjacent display structures 10 within the same display panel 110 is defined as d1, and the distance between two adjacent display structures 10 located within two adjacent display panels 110 is defined as d2, then d1 = d2.
[0050] In an optional embodiment of this application, the display panel 110 further includes a second metal trace 21, which is formed on the substrate 20 and electrically connected to the driving transistor 11. The encapsulation layer 30 covers the second metal trace 21. The second metal trace 21 is used for lamp-lighting testing.
[0051] The circuit board 40 includes a connection terminal 41. The connection terminal 41 serves as an interface for connecting external electronic components. In this embodiment, the connection terminal 41 is located on a surface of the substrate 20 on which the circuit board 40 is located.
[0052] An external driving signal enters the circuit board 40 from the connection terminal 41, and then passes through the connector 50, the first metal trace 22 and the driving transistor 11 in sequence to enter the pixel unit 12 to drive the pixel unit 12 to emit light.
[0053] The protective film layer 70 has an opening 71, through which the connecting terminal 41 is exposed.
[0054] In an optional embodiment of this application, a portion of the circuit board 40 is also exposed from the opening 71.
[0055] In an optional embodiment of this application, a portion of the substrate 20 is also exposed from within the opening 71.
[0056] In an optional embodiment of this application, the thickness d3 of the protective film layer 70 is less than 30 μm. The thickness of the protective film layer 70 is relatively thin and will not affect the splicing of the display panel.
[0057] In an optional embodiment of this application, the moisture permeability (WVTR) of the protective membrane layer 70 is < 1*10. -2 g / (m 2 *24h). That is, the moisture permeability of the protective film layer 70 of the splicing display panel 100 of this application can reach 1*10. -2 g / (m 2 *24h) level.
[0058] In an optional embodiment of this application, the connector 50 is a chip-on-film (COF) film. Specifically, the two ends of the connector 50 are respectively fixed to opposite surfaces of the substrate 20 and electrically connected to one end of the first metal trace 22 and the circuit board 40, respectively, and the middle part of the connector 50 is in contact with the side of the substrate 20.
[0059] Specifically, the connector 50 is located at the second end 112 of the display panel 110.
[0060] Please see Figure 4-6 This application also provides a method for manufacturing a display panel 110, including:
[0061] Step S1, please refer to Figure 4-5 A display panel intermediate 120 is provided; the display panel intermediate 120 includes a substrate 20, a driving transistor 11, a pixel unit 12, a first metal trace 22, an encapsulation layer 30, a circuit board 40, and a connector 50. The driving transistor 11, the first metal trace 22, the encapsulation layer 30, and the circuit board 40 are all formed on the substrate 20. The pixel unit 12 is formed on the driving transistor 11 and electrically connected to the corresponding driving transistor 11. The encapsulation layer 30 covers the driving transistor 11, the pixel unit 12, and part of the first metal trace 22. The circuit board 40 is formed on the surface of the substrate 20 away from the driving transistor 11 and includes a connection terminal 41. One end of the connector 50 is formed on the surface of the substrate 20 facing the driving transistor 11 and is electrically connected to the first metal trace 22.
[0062] The encapsulation layer 30 can be made of materials such as silicone or epoxy, and can be formed by spraying, molding, or other methods.
[0063] In an optional embodiment of this application, the display panel 110 further includes a second metal trace 21, which is formed on the substrate 20 and electrically connected to the driving transistor 11. The encapsulation layer 30 covers the second metal trace 21. The second metal trace 21 is used for lamp-lighting testing.
[0064] An external driving signal enters the circuit board 40 from the connection terminal 41, and then passes through the connector 50, the first metal trace 22 and the driving transistor 11 in sequence to enter the pixel unit 12 to drive the pixel unit 12 to emit light.
[0065] Step S2: Bend the connector 50 so that the other end of the connector 50 is formed on the surface of the substrate 20 away from the driving transistor 11 and electrically connected to the circuit board 40.
[0066] In an optional embodiment of this application, the connector 50 is a chip-on-film (COF) film. Specifically, the two ends of the connector 50 are respectively fixed to opposite surfaces of the substrate 20 and electrically connected to one end of the first metal trace 22 and the circuit board 40, respectively, and the middle part of the connector 50 is in contact with the side of the substrate 20.
[0067] Specifically, the connector 50 is located at the second end 112 of the display panel 110.
[0068] Step S3, please refer to Figure 4-5 A protective cover 60 is provided and the protective cover 60 is fixed around the connection terminal 41; the connection terminal 41 is housed within the protective cover 60.
[0069] Specifically, the protective cover 60 has a receiving space 61, and the connecting terminal 41 is received within the receiving space 61.
[0070] In an optional embodiment of this application, one end of the protective cover 60 is fixed to the surface of the circuit board 40 opposite to the substrate 20, and the other end is fixed to the surface of the substrate 20 opposite to the driving transistor 11.
[0071] In another optional embodiment of this application, both ends of the protective cover 60 are fixed to the surface of the circuit board 40 facing away from the substrate 20.
[0072] In another optional embodiment of this application, one end of the protective cover 60 is fixed to the surface of the circuit board 40 facing away from the substrate 20, and the other end is fixed to the side of the circuit board 40 connected to the substrate.
[0073] In an optional embodiment of this application, the protective cover 60 is fixed around the connection terminal 41 by adhesive blocks 62 formed by dispensing.
[0074] Preferably, the adhesive block 62 is a right-angled triangle, with the hypotenuse of the triangle connected to the protective cover 60 and the circuit board 40 or the substrate 20, respectively. The right-angled triangular shape of the adhesive block 62 facilitates subsequent disconnection of the coating and makes it easier to remove the protective cover 60. Of course, the shape of the adhesive block 62 is not limited to a right-angled triangle; the specific shape can be set according to actual conditions.
[0075] For step S4, please refer to [link / reference]. Figure 4 and Figure 6 The display panel intermediate body 120, on which the protective cover 60 is fixed, is coated with a protective film layer 70 to form a protective film layer 70; the protective film layer 70 covers the encapsulation layer 30, the first metal trace 22, the connector 50, the substrate 20, the circuit board 40 and the protective cover 60.
[0076] In an optional embodiment of this application, the vacuum coating of the entire surface can be carried out using the Parylene vacuum coating method, the atomic layer deposition (ALD) vacuum coating method, or a combination of the two methods.
[0077] For step S5, please refer to [link / reference]. Figure 4 and Figure 1-3 Remove the protective cover 60 and the protective film layer 70 formed on the protective cover 60 to form an opening 71 on the protective film layer 70, through which the connection terminal 41 is exposed.
[0078] In an optional embodiment of this application, a portion of the circuit board 40 is also exposed from the opening 71.
[0079] In an optional embodiment of this application, a portion of the substrate 20 is also exposed from within the opening 71.
[0080] In an optional embodiment of this application, the thickness d3 of the protective film layer 70 is less than 30 μm. The thickness of the protective film layer 70 is relatively thin and will not affect the splicing of the display panel 110.
[0081] In an optional embodiment of this application, the moisture permeability (WVTR) of the protective membrane layer 70 is < 1*10. -2 g / (m 2 *24h). That is, the moisture permeability of the protective film layer 70 of the splicing display panel 100 of this application can reach 1*10. -2 g / (m 2 *24h) level.
[0082] Please see Figure 5-6 , Figure 1 and Figure 7 This application also provides a method for manufacturing a splicing display panel 100, including steps S1, S2, S3, S4, S5 and S6.
[0083] For step S6, please refer to [link / reference]. Figure 7 and Figure 1 Multiple display panels 110 are spliced together.
[0084] In an optional embodiment of this application, all the display structures 10 within the plurality of display panels 110 are equally spaced. Specifically, the distance between two adjacent display structures 10 within the same display panel 110 is defined as d1, and the distance between two adjacent display structures 10 located within two adjacent display panels 110 is defined as d2, then d1 = d2.
[0085] The display panel and its manufacturing method provided in this application, as well as the splicing display panel, form a protective cover around the circuit board to cover the connection terminals of the circuit board. After forming a protective film layer by vacuum full-surface coating, the protective cover is removed, and then multiple display panels are spliced together. The protective film layer and the protective cover can not only protect the front and sides of the display panel, thereby effectively preventing water and oxygen intrusion, but also solve the problem of poor contact caused by the coating of the connection terminals of the circuit board.
[0086] In addition, a protective film layer with a thickness of less than 30μm can be obtained by vacuum full-surface coating. The thickness of the protective film layer is relatively thin and will not affect the splicing of the display panel.
[0087] In summary, although the present application has disclosed the preferred embodiments as described above, the above preferred embodiments are not intended to limit the present application. Those skilled in the art can make various modifications and refinements without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be determined by the scope defined in the claims.
Claims
1. A display panel, characterized in that, include: Base; A driving transistor is formed on the substrate; Pixel units are formed on the driving transistor; One of the pixel units is electrically connected to one of the driving transistors; A first metal trace is formed on the substrate; One of the metal traces is electrically connected to one of the pixel units; An encapsulation layer is formed on the substrate and covers the driving transistor, the pixel unit, and a portion of the first metal trace; A circuit board is formed on the surface of the substrate away from the driving transistor; the circuit board includes connection terminals; A connector; one end of the connector is formed on the surface of the substrate facing the driving transistor and electrically connected to the first metal trace, and the other end is formed on the surface of the substrate away from the driving transistor and electrically connected to the circuit board. and A protective cover is fixed around the connection terminal, and the connection terminal is housed within the protective cover; A protective film layer covers the protective cover, the encapsulation layer, the first metal trace, the connector, at least a portion of the substrate, and at least a portion of the circuit board; When the protective cover is removed, the protective film layer forms an opening, and the connection terminal is exposed from the opening.
2. The display panel as described in claim 1, characterized in that, The thickness of the protective film is less than 30 μm.
3. The display panel as described in claim 1, characterized in that, The moisture permeability (WVTR) of the protective membrane layer is <1*10⁻⁶. -2 g / (m 2 *24h).
4. The display panel as described in claim 1, characterized in that, Part of the substrate and part of the circuit board are exposed from the opening.
5. The display panel as described in claim 1, characterized in that, All the pixel units within the multiple display panels are equally spaced.
6. The display panel as described in claim 1, characterized in that, The display panel further includes a second metal trace, which is formed on the substrate and electrically connected to the driving transistor. The encapsulation layer covers the second metal trace, and the protective film layer covers the second metal trace.
7. A splicing display panel, characterized in that, It includes a plurality of display panels as described in any one of claims 1-6, each of the display panels including a first end and a second end, the connector being located at the second end; the first end of one of the display panels is spliced to the second end of another adjacent display panel.
8. A method for manufacturing a display panel, characterized in that, Including the following steps: A display panel intermediate is provided; the display panel intermediate includes a substrate, a driving transistor, a pixel unit, a first metal trace, a packaging layer, a circuit board, and a connector. The driving transistor, the first metal trace, the packaging layer, and the circuit board are all formed on the substrate. The pixel unit is formed on the driving transistor and electrically connected to the corresponding driving transistor. The packaging layer covers the driving transistor, the pixel unit, and part of the first metal trace. The circuit board is formed on the surface of the substrate away from the driving transistor and includes a connection terminal. One end of the connector is formed on the surface of the substrate facing the driving transistor and is electrically connected to the first metal trace. The connector is bent such that the other end of the connector is formed on the surface of the substrate away from the driving transistor and is electrically connected to the circuit board. A protective cover is provided and the protective cover is fixed around the connection terminal; the connection terminal is housed within the protective cover; The display panel intermediate body, to which the protective cover is fixed, is coated with a protective film to form a protective film layer; the protective film layer covers the encapsulation layer, the first metal trace, the connector, the substrate, the circuit board and the protective cover; Remove the protective cover and the protective film layer formed on the protective cover to form an opening in the protective film layer, through which the connection terminal is exposed.
9. The method for manufacturing a display panel as described in claim 8, characterized in that, The thickness of the protective film layer is less than 30 μm; or The moisture permeability (WVTR) of the protective membrane layer is <1*10⁻⁶. -2 g / (m 2 *24h).
10. The method for manufacturing a display panel as described in claim 8, characterized in that, The protective cover is fixed around the connection terminal by adhesive blocks formed by dispensing. The adhesive blocks are right-angled triangles, with the hypotenuse of the triangle facing the protective film layer.
11. The method for manufacturing a display panel as described in any one of claims 8-10, characterized in that, The entire surface is coated using at least one of the following methods: Perylene vacuum coating and atomic layer deposition vacuum coating.
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