Two-dimensional electron gas charge density control
By introducing a P-type GaN structure and an isolation injection region into the GaN device, the problem of 2DEG charge density control was solved, improving transistor performance and manufacturing efficiency, and enabling high-frequency and miniaturized transistors.
Patent Information
- Application Number
- CN202210706855.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-06-22
- Filing Date
- 2022-06-21
- Publication Date
- 2025-12-19
- Estimated Expiration
- 2042-06-21
AI Technical Summary
Existing technologies struggle to effectively control the charge density of two-dimensional electron gas (2DEG) in gallium nitride (GaN) devices, impacting transistor performance and manufacturing efficiency.
By introducing a P-type GaN structure, an isolation injection region, or an isolation implant that penetrates the P-type GaN structure into the GaN device, an isolated charge control structure is formed to selectively reduce the charge density in the 2DEG layer.
This allows for modification of the transistor threshold voltage and reduction of the output capacitance, thereby increasing the operating frequency and reducing the transistor size and die area.
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Figure CN115513278B_ABST
Abstract
Description
[0001] Cross Reference to Related Applications
[0002] This application claims the benefit of U.S. Provisional Application No. 63 / 213,655, filed June 22, 2021, entitled “TWO-DIMENSIONAL ELECTRON GAS CHARGE DENSITY CONTROL,” the entire contents of which are incorporated herein by reference for all purposes. TECHNICAL FIELD
[0003] The described embodiments relate generally to compound semiconductor devices, and more specifically, embodiments of the invention relate to two-dimensional electron gas charge density control in gallium nitride (GaN) devices. BACKGROUND
[0004] In semiconductor technology, gallium nitride (GaN) is a compound semiconductor material used to form various devices, such as high power and / or high voltage transistors. These devices can be formed by growing epitaxial layers on silicon, silicon carbide, sapphire, gallium nitride, or other substrates. Often, heteroepitaxial junctions of aluminum gallium nitride (AlGaN) and GaN are used to form these devices. This structure is known to form a high electron mobility two-dimensional electron gas (2DEG) at the interface of the two materials. The electron gas can have a charge density in the 2DEG. In many applications, it can be desirable to control the charge density in the 2DEG. SUMMARY
[0005] In some embodiments, a gallium nitride (GaN) device is disclosed. The GaN device includes a compound semiconductor substrate, a source region formed in the compound semiconductor substrate, a drain region formed in the compound semiconductor substrate and separated from the source region, a two-dimensional electron gas (2DEG) layer formed in the compound semiconductor substrate and extending between the source region and the drain region, a gate region formed on the compound semiconductor substrate and positioned between the source region and the drain region, and a plurality of isolated charge control structures disposed between the gate region and the drain region.
[0006] In some embodiments, each of the plurality of isolated charge control structures is arranged to selectively reduce a charge density in the 2DEG layer under each of the plurality of isolated charge control structures.
[0007] In some embodiments, each of the plurality of isolated charge control structures is disposed on the compound semiconductor substrate.
[0008] In some embodiments, each of the plurality of isolated charge control structures includes a GaN layer.
[0009] In some embodiments, the GaN layer includes a P-type GaN layer.
[0010] In some embodiments, each of the plurality of isolated charge control structures is disposed within the compound semiconductor substrate.
[0011] In some embodiments, each of the plurality of isolated charge control structures includes an isolated implant region.
[0012] In some embodiments, each of the plurality of isolated charge control structures includes an isolated implant region formed through a P-type GaN layer.
[0013] In some embodiments, each of the plurality of isolated charge control structures is formed in the shape of an island.
[0014] In some embodiments, the plurality of isolated charge control structures is disposed proximate to the gate region.
[0015] In some embodiments, the plurality of isolated charge control structures is arranged to reduce an electric field proximate to the gate region.
[0016] In some embodiments, a pattern density of the plurality of isolated charge control structures is constant in a region proximate to the gate region and in a region proximate to the drain region.
[0017] In some embodiments, each of the plurality of isolated charge control structures is formed in the shape of a trapezoid extending from the gate region toward the drain region.
[0018] In some embodiments, each of the plurality of isolated charge control structures is formed in the shape of an ellipse extending from the gate region toward the drain region.
[0019] In some embodiments, a method of controlling a charge density in a two-dimensional electron gas (2DEG) layer in a gallium nitride (GaN) device is disclosed. The method includes providing a compound semiconductor substrate including a first layer and a second layer, the compound semiconductor substrate further including a 2DEG layer formed between the first layer and the second layer; forming an active region; forming a gate region on the compound semiconductor substrate and across the active region; and forming a plurality of isolated charge control structures on the active region, wherein each of the plurality of isolated charge control structures is arranged to selectively reduce a charge density in the 2DEG layer under each of the plurality of isolated charge control structures.
[0020] In some embodiments, in the disclosed method, each of the plurality of isolated charge control structures comprises a p-type GaN layer.
[0021] In some embodiments, in the disclosed method, each of the plurality of isolated charge control structures includes an isolated injection region.
[0022] In some embodiments, a gallium nitride (GaN) device is disclosed. The GaN device includes: a compound semiconductor substrate; a two-dimensional electron gas (2DEG) layer formed in the compound semiconductor substrate; a resistor formed in the compound semiconductor substrate, the resistor including an active region and first and second ohmic contacts; and a plurality of isolated charge control structures formed on at least a portion of the active region, wherein each of the plurality of isolated charge control structures is arranged to reduce the charge density in the 2DEG layer beneath each of the plurality of isolated charge control structures, thereby increasing the resistance of the resistor.
[0023] In some embodiments, each of the plurality of isolated charge control structures of the resistor comprises a P-type GaN layer.
[0024] In some embodiments, the spacing between each adjacent charge control structure of the resistor is less than the minimum manufacturing width of the active region. Attached Figure Description
[0025] Figure 1A A 3D side view of a GaN device using a P-type GaN structure to control 2DEG charge density according to an embodiment of the present disclosure is shown.
[0026] Figure 1B Embodiments according to this disclosure are shown Figure 1A Cross-sectional view of a GaN device;
[0027] Figure 2A A side 3D view of an embodiment of a GaN device patterned using isolation injection according to an embodiment of the present disclosure is shown;
[0028] Figure 2B Embodiments according to this disclosure are shown Figure 2A Cross-sectional view of a GaN device;
[0029] Figure 3A A side 3D view of an embodiment of a GaN device using an isolation injection through a P-type GaN structure, according to an embodiment of the present disclosure;
[0030] Figure 3B Embodiments according to this disclosure are shown Figure 3A Cross-sectional view of a GaN device;
[0031] Figure 4A shows a plan view of a GaN device according to an embodiment of the present disclosure;
[0032] Figure 4B shows 2DEG charge density as a function of position in a GaN device according to an embodiment of the present disclosure; Figure 4A
[0033] Figure 5A shows a plan view of a GaN device according to an embodiment of the present disclosure;
[0034] Figure 5B shows 2DEG charge density as a function of position in a GaN device according to an embodiment of the present disclosure; Figure 5A
[0035] Figure 6A shows a plan view of a GaN device according to an embodiment of the present disclosure;
[0036] Figure 6B shows 2DEG charge density as a function of position in a GaN device according to an embodiment of the present disclosure; Figure 6A
[0037] Figure 7A shows a plan view of a GaN device according to an embodiment of the present disclosure;
[0038] Figure 7B shows 2DEG charge density as a function of position in a GaN device according to an embodiment of the present disclosure; Figure 7A
[0039] Figure 8A shows a plan view of a GaN device according to an embodiment of the present disclosure;
[0040] Figure 8B shows 2DEG charge density as a function of position in a GaN device according to an embodiment of the present disclosure; Figure 8A
[0041] Figure 9A shows a plan view of a GaN device according to an embodiment of the present disclosure;
[0042] Figure 9B shows 2DEG charge density as a function of position in a GaN device according to an embodiment of the present disclosure; Figure 9A
[0043] Figure 10A shows various experimental test structures utilizing charge control structures similar to those of Figure 5A
[0044] Figure 10B shows C-V test results for test structures of Figure 10A
[0045] Figure 11A cross-sectional and plan view of a GaN transistor according to embodiments of the present disclosure are shown;
[0046] Figure 11B 2DEG charge density and electric field as a function of position along the active region of a GaN transistor according to embodiments of the present disclosure are shown; Figure 11A
[0047] Figure 12A cross-sectional and plan view of a GaN transistor according to embodiments of the present disclosure are shown;
[0048] Figure 12B 2DEG charge density and electric field as a function of position along the active region of a GaN transistor according to embodiments of the present disclosure are shown; Figure 12A
[0049] Figure 13A cross-sectional and plan view of a GaN transistor according to embodiments of the present disclosure are shown;
[0050] Figure 13B 2DEG charge density and electric field as a function of position along the active region of a GaN transistor according to embodiments of the present disclosure are shown; Figure 13A
[0051] Figure 14 plan view of a GaN resistor according to embodiments of the present disclosure is shown;
[0052] Figure 15 plan view of a GaN resistor according to embodiments of the present disclosure is shown; and
[0053] Figure 16 plan view of a GaN resistor according to embodiments of the present disclosure is shown;
[0054] Figure 17 cross-sectional view of a GaN device with P-type GaN islands and additional AlGaN layers according to embodiments of the present disclosure is shown;
[0055] Figure 18 cross-sectional view of a GaN device with patterned isolation implants and additional AlGaN layers according to embodiments of the present disclosure is shown; and
[0056] Figure 19 cross-sectional view of a GaN device with P-type GaN islands and patterned implants and additional AlGaN layers according to embodiments of the present disclosure is shown. DETAILED DESCRIPTION
[0057] The structures and related techniques disclosed herein generally relate to controlling the two-dimensional electron gas (2DEG) charge density in gallium nitride (GaN) devices. More specifically, the devices, structures, and related techniques disclosed herein relate to GaN transistors, wherein a P-type GaN structure, isolation implant patterning, and isolation implantation through the P-type GaN structure can be used to control the 2DEG charge density. In various embodiments, 2DEG charge density control can enable modification of the transistor threshold voltage (Vth) and / or reduction of the transistor's output capacitance, thereby achieving a relatively high operating frequency. In some embodiments, 2DEG charge density control can enable a reduction in the size of the GaN transistor. In various embodiments, control of the 2DEG charge density can enable the fabrication of relatively high-value 2DEG resistors in the same region, thereby achieving a reduction in the overall die area. Various inventive embodiments are described herein, including methods, processes, systems, devices, etc.
[0058] Several illustrative embodiments will now be described with reference to the accompanying drawings, which form part of this invention. The following description is merely illustrative and is not intended to limit the scope, applicability, or configuration of this disclosure. In fact, the following description of the embodiments will provide an enlightening description for those skilled in the art to implement one or more embodiments. It should be understood that various changes can be made to the function and configuration of elements without departing from the spirit and scope of this disclosure. In the following description, specific details are set forth for illustrative purposes to provide a thorough understanding of particular inventive embodiments. However, it will be apparent that various embodiments can be practiced without these specific details. The drawings and descriptions are not intended to be limiting. The terms “example” or “exemplary” are used herein to mean “serving as an example, illustration, or description.” Any embodiment or design described herein as “exemplary” or “example” should not be construed as preferred or advantageous relative to other embodiments or designs.
[0059] Figure 1A An isometric view is shown of a GaN device 100A using a p-type GaN structure to control 2DEG charge density according to an embodiment of the present disclosure. Figure 1A As shown, GaN device 100A may include a GaN layer 104, an AlGaN layer 108, and a 2DEG layer 106 formed between the GaN layer and the AlGaN layer. In some embodiments, p-type GaN islands 102 may be added to device 100A, wherein the p-type GaN islands are disposed on the AlGaN layer 108. The p-type GaN islands 102 may deplete charge carriers and reduce the charge density in the 2DEG layer 106. The amount of reduction in 2DEG charge density may depend on the area 112 and spacing 110 of the p-type GaN islands 102. Figure 1BThe patterning of the P-type GaN islands 102 can provide 2DEG charge density control without requiring changes to the manufacturing process, which can require costly and complex manufacturing process changes.
[0060] Figure 1B shows Figure 1A A cross-sectional view 100B of the GaN device 100A shown in Figure 1B As shown in the GaN device 100A shown in Figure 1A , the charge density in the 2DEG layer 106 under the P-type GaN islands 102 (e.g., location 116) can be reduced compared to regions where P-type GaN islands are not present (e.g., location 114). The amount of 2DEG charge density reduction can depend on the area 112 (see Figure 1A ) and the spacing 110 of the P-type GaN islands 102. In some embodiments, the area 112 of each island 102 can be, for example, 1.0 um 2 , and the spacing 110 between each island can be 1.0 um. In various embodiments, the area 112 of the islands 102 can be 1.5 um 2 , the spacing 110 is 1.5 um, while in other embodiments, the area can be between 0.5 and 2.0 um 2 , the spacing is between 0.5 and 2.0 um, and in other embodiments, the area can be between 0.2 and 5.0 um 2 , the spacing is between 0.2 and 5.0 um. As will be appreciated by one of ordinary skill in the art having the benefit of the present disclosure, the area 112 and spacing 110 of the islands 102 can be set to any suitable values. Moreover, as will be appreciated by one of ordinary skill in the art, the 2DEG charge density techniques described above can employ one or more islands, different sizes and shapes for each island, non-uniform spacing between each island, and other properties that can differ from those described herein. Furthermore, as will be appreciated by one of ordinary skill in the art, the P-type GaN layer can have different doping density values.
[0061] To better understand the features and aspects of the 2DEG charge control structures and techniques of GaN devices according to the present disclosure, additional background of the present disclosure is provided in the following sections by discussing several specific implementations of charge control structures of GaN devices according to embodiments of the present disclosure. These embodiments are merely examples, and other embodiments can be used for other compound semiconductor devices, such as, but not limited to, any high electron mobility transistor (HEMT).
[0062] Figure 2A shows Figure 2AAs shown, the GaN device 200A may include a GaN layer 204, an AlGaN layer 208, and a 2DEG layer 206 formed between the GaN layer and the AlGaN layer. In some embodiments, an isolation implantation region 202 may be utilized in the GaN device 200A, wherein the isolation implant can be placed in the active region of the GaN device. The isolation implantation region 202 can create a damaged lattice structure in the underlying AlGaN layer 208 and GaN layer 204, thereby eliminating charge carriers in the 2DEG layer 206. Furthermore, the damaged lattice structure can reduce the piezoelectric effect outside the direct implantation region and can cause a reduction in charge carriers in the adjacent 2DEG region (in Figure 2B (Further discussion follows). In some embodiments, the amount of reduction in 2DEG charge density may depend on the area 212 of the isolation injection region 202 and the spacing 210 (in... Figure 2B (Further discussion in the text).
[0063] Figure 2B Show Figure 2A A cross-sectional view 200B of the GaN device 200A is shown. In some embodiments, 2DEG charge carriers at the location of the isolation injection region 202 can be eliminated because the isolation injector can penetrate the AlGaN layer 208 and at least partially penetrate the GaN layer 204, potentially damaging the crystal structure. Furthermore, the damaged crystal structure can cause a reduction in piezoelectric effect outside the direct injection region and can also cause a reduction in charge carriers in the adjacent region 220. The amount of reduction in 2DEG charge density can depend on the area 212 of the injection region 202 and the spacing 210. The area 212 of the injection region 202 can be, for example, 1.0 μm. 2 The spacing 210 between the injection regions can be 1.0 μm. In some embodiments, the area 212 of the injection region 202 can be 1.5 μm. 2 The interval 210 is 1.5 μm, while in other embodiments, the area can be between 0.5 and 2.0 μm. 2 The area is between 0.5 and 2.0 μm, and in various embodiments, the area can be between 0.2 and 5.0 μm. 2 The spacing between the injection regions 202 and the injection area is between 0.2 and 5.0 μm. As will be understood by those skilled in the art who benefit from this disclosure, the area and spacing of the injection regions 202 can be set to any suitable value. Furthermore, as will be understood by those skilled in the art, the disclosed techniques for varying 2DEG charge density may include one or more injection regions 202, different injection region sizes and shapes, and other characteristics that may differ from those described herein. Additionally, as will be understood by those skilled in the art, the isolation dose and injection energy can have any suitable values.
[0064] Figure 3AAn isometric view of an embodiment of a GaN device 300A using isolated implant regions through a P-type GaN structure according to embodiments of the disclosure is shown. In the illustrated embodiment, isolated implant regions 302 through a P-type GaN structure 320 can be used to control the charge density in a 2DEG layer 306 of the GaN device 300A. As shown in Figure 3A GaN device 300A can include a GaN layer 304, an AlGaN layer 308, and a 2DEG layer 306 formed between the GaN layer and the AlGaN layer. In some embodiments, isolated implant regions 302 can be formed by implanting through a P-type GaN structure 320. Isolated implant regions 302 can be utilized in an active region of GaN device 300A to reduce the charge density in the 2DEG layer 306. In the illustrated embodiment, due to the presence of the P-type GaN structure 320, the isolated implant regions 302 can penetrate less into the substrate, and thus the resulting lattice structure damage can not completely eliminate the charge carriers in the 2DEG layer 306. The amount of 2DEG charge density reduction can depend on the area 312 and spacing 310 of the isolated implant regions 302 (further discussed in Figure 2B ).
[0065] Figure 3B A cross-sectional view 300B of GaN device 300A is shown. In Figure 3B , a GaN layer 304, an AlGaN layer 308, and a 2DEG layer 306 are shown. Regions of 2DEG charge density reduction 324 in the 2DEG layer 306 are aligned with isolated implant regions 302, while regions of increased charge density 322 in the 2DEG layer are positioned between isolated implant regions. Charge carriers in the 2DEG layer 306 where isolated implant regions 302 are located can be reduced because the isolated implants through the P-type GaN structure 320 can pass through the AlGaN layer 308 and damage the lattice structure, however, in this embodiment, the isolated implants can penetrate into the GaN layer, but not as deep as a direct implant on the AlGaN surface. The less penetration can reduce the implant-based strain reduction compared to a direct implant on the AlGaN surface. In this way, isolated implant regions 302 can cause a reduction in the carrier charge in the 2DEG layer 306 proximate to the isolated implant regions 302, but not a complete elimination of the carriers.
[0066] The amount of 2DEG charge density reduction can depend on the area 312 (see Figure 3A ) and spacing 310 of the isolated implant regions 302. The area 312 of the isolated implant regions 302 can be, for example, 1.0 um 2 , while the spacing 310 between isolated implant regions can be 1.0 um. In some embodiments, the area 312 of the isolated implant regions 302 can be 1.5 um 2The interval 310 is 1.5 μm, while in other embodiments, the area can be between 0.5 and 2.0 μm. 2 The area is between 0.5 and 2.0 μm, and in various embodiments, the area can be between 0.2 and 5.0 μm. 2 The spacing between the isolation injection regions 302 and 310 is between 0.2 and 5.0 μm. As will be understood by those skilled in the art to which this disclosure pertains, the area 312 and spacing 310 of the isolation injection region 302 can be set to any suitable value. Furthermore, as will be understood by those skilled in the art, the 2DEG charge density modification technique disclosed above can include one or more isolation injection regions, different sizes and shapes for the isolation injection regions, and other characteristics that may differ from those described herein. Additionally, as will be understood by those skilled in the art, the isolation dose and injection energy can have any suitable values.
[0067] Figure 4A A plan view of a GaN device 400A according to an embodiment of the present disclosure is shown. The GaN device 400A may include a gate 402 and an active region 406, wherein a 2DEG charge control structure 404 is added to the active region. The charge control structure 404 may have an area 408 and a spacing 410. The charge control structure may be formed in the shape of islands. The values of the area 408 and the spacing 410 may vary. In some embodiments, the structure 404 may be a P-type GaN structure similar to that of device 100A, while in other embodiments, the structure may be an isolation injection region similar to that of device 200A, and in various embodiments, the structure may be an isolation injection region through a P-type GaN structure similar to that of device 300A. The number of areas 408, spacing 410, and structures 404 can be used to control the 2DEG charge density, as shown in FIG400B. In the illustrated embodiment, the density of the islands may be constant in the regions near and far from the gate 402.
[0068] like Figure 4B As shown in Figure 400B, a first curve 422 illustrates the 2DEG charge density varying with position in the active region 406 with the presence of the charge control structure 404, while a second curve 420 shows the charge density (for reference) without the charge control structure 404. As can be seen in curve 422, the charge density decreases where the structure 404 is present and increases in the region without the structure 404. The area 408 of the structure 404 can be, for example, 1.0 μm. 2 The spacing 410 between structures 404 can be 1.0 μm. In some embodiments, the area 408 can be 1.5 μm. 2 The interval 410 is 1.5 μm, while in other embodiments, the area can be between 0.5 and 2.0 μm. 2The area is between 0.5 and 2.0 μm, and in various embodiments, the area can be between 0.2 and 5.0 μm. 2 The spacing between the areas is between 0.2 and 5.0 μm. As will be appreciated by those skilled in the art to which this disclosure pertains, the area 408 and spacing 410 of structure 404 can be set to any suitable value. Furthermore, as will be appreciated by those skilled in the art, structure 404 can have different sizes and shapes, such as, but not limited to, squares, rectangles, circles, triangles, or trapezoids, and can have other properties that may differ from those described herein.
[0069] Figure 5A A plan view of a GaN device 500A according to an embodiment of the present disclosure is shown. The GaN device 500A may include a gate 502 and an active region 506, wherein a 2DEG charge control structure 504 has been added to the active region. The structure 504 may have a variable area 508 and spacing 510. The structure 504 may be a P-type GaN structure similar to device 100A, an isolation injection region similar to device 200A, or an isolation injection region through a P-type GaN structure similar to device 300A. The number of areas 508, spacings 510, and structures 504 can be used to control the 2DEG charge density, such as... Figure 5B As shown. Figure 5B As shown in Figure 500B, the 2DEG charge density varies with position within the active region. First graph 522 shows the 2DEG charge density with structure 504, while graph 520 shows the 2DEG charge density without structure 504. In the illustrated embodiment, the density of the charge control structure (island) can be reduced in the region near the gate 502 and increased in the region far from the gate 502.
[0070] As shown in Figure 500B, the charge density decreases where structure 504 is present and increases in the region without structure 504. A lower density of structure 504 is present in the region near the gate 502, which can generate a higher charge density in those regions. The area 508 of structure 504 can be, for example, 1.0 μm. 2 The spacing 510 between structures 504 can be 1.0 μm. In some embodiments, the area 508 can be 1.5 μm. 2 The interval 510 is 1.5 μm, while in other embodiments, the area can be between 0.5 and 2.0 μm. 2 The area is between 0.5 and 2.0 μm, and in various embodiments, the area can be between 0.2 and 5.0 μm. 2between 0.2 and 5.0 um. As will be appreciated by one of ordinary skill in the art having the benefit of the present disclosure, the areas 508 and the spacing 510 of the structures 504 can be set to any suitable values. Further, as will be appreciated by one of ordinary skill in the art, the structures 504 can have different sizes and shapes, such as, but not limited to, square, rectangular, circular, triangular, or trapezoidal, and can have other characteristics that can differ from those described herein.
[0071] Figure 6A A plan view of a GaN device 600A is shown, in accordance with embodiments of the present disclosure. The GaN device 600A can include a gate 602 and an active region 606, with 2DEG charge control structures 604 added to the active region. The structures 604 can have areas 608 and spacing 610 that can vary. The structures 604 can be P-type GaN structures similar to device 100A, isolated implant regions similar to device 200A, or isolated implant regions through P-type GaN structures similar to device 300A. The areas 608, the spacing 610, and the number of structures 604 can be used to control the 2DEG charge density, as shown in Figure 6B Figure 6B The graph 600B shows the 2DEG charge density as a function of position in the active region, as shown in
[0072] As can be seen in the first graph 622, the 2DEG charge density is reduced where the structures 604 are present, and increased in regions without structures 604. In regions of the active region 606 that are far from the gate 602, there are lower densities of structures 604, which can result in higher charge densities in those regions. The areas 608 of the structures 604 can be, for example, 1.0 um 2 , and the spacing 610 between the structures 604 can be 1.0 um. In some embodiments, the areas 608 can be 1.5 um 2 , the spacing 610 is 1.5 um, and in other embodiments, the areas can be between 0.5 and 2.0 um 2 , the spacing is between 0.5 and 2.0 um, and in various embodiments, the areas can be between 0.2 and 5.0 um 2 between 0.2 and 5.0 um. As will be appreciated by one of ordinary skill in the art having the benefit of the present disclosure, the areas 608 and the spacing 610 of the structures 604 can be set to any suitable values. Further, as will be appreciated by one of ordinary skill in the art, the structures 604 can have different sizes and shapes, such as, but not limited to, square, rectangular, circular, triangular, or trapezoidal, and can have other characteristics that can differ from those described herein.
[0073] Figure 7A A plan view of a GaN device 700A is shown, in accordance with embodiments of the present disclosure. The GaN device 700A can include a gate 702 and an active region 706, with 2DEG charge control structures 704 added to the active region. The structures 704 can have areas 708 and spacing 710 that can vary. The structures 704 can be P-type GaN structures similar to device 100A, isolated implant regions similar to device 200A, or isolated implant regions through P-type GaN structures similar to device 300A. The areas 708, the spacing 710, and the number of structures 704 can be used to control the 2DEG charge density, as shown in FIG. 700B. As will be appreciated by one of ordinary skill in the art having the benefit of the present disclosure, the structures 704 can be added to the active region 706 in any suitable manner, such as, but not limited to, by ion implantation, by epitaxial growth, or by any other suitable method. Figure 7B FIG. 700B shows the 2DEG charge density as a function of position in the active region 706. The first plot 722 shows the 2DEG charge density with the structures 704, while the second plot 720 shows the 2DEG charge density without the structures 704. In the illustrated embodiment, the density of charge control structures (islands) can be reduced in regions proximal to the gate 702 and increased in regions distal to the gate 702.
[0074] As can be seen in FIG. 700B, the charge density is reduced where the structures 704 are present, and increased in regions without the structures 704. In regions proximal and distal to the gate 702, there is a lower density of 704, which can result in a higher charge density in those regions. The areas 708 of the structures 704 can be, for example, 1.0 um 2 , while the spacing 710 between the structures 704 can be 1.0 um. In some embodiments, the areas 708 can be 1.5 um 2 , the spacing 710 is 1.5 um, while in other embodiments, the areas can be between 0.5 and 2.0 um 2 , the spacing is between 0.5 and 2.0 um, and in various embodiments, the areas can be between 0.2 and 5.0 um 2between 0.2 and 5.0 um. As will be appreciated by one of ordinary skill in the art having the benefit of the present disclosure, the areas 708 and the spacing 710 of the structures 704 can be set to any suitable values. Further, as will be appreciated by one of ordinary skill in the art, the structures 704 can have different sizes and shapes, such as, but not limited to, square, rectangular, circular, triangular, or trapezoidal, and can have other characteristics that can be different than those described herein.
[0075] Figure 8A A plan view of a GaN device 800A is shown, in accordance with embodiments of the present disclosure. The GaN device 800A can include a gate 802 and an active region 806, with 2DEG charge control structures 804 added to the active region. The structures 804 can have areas 808 and spacing 810 that can vary. The structures 804 can be P-type GaN structures similar to device 100A, isolated implant regions similar to device 200A, or isolated implant regions through P-type GaN structures similar to device 300A. The areas 808, the spacing 810, and the number of structures 804 can be used to control the 2DEG charge density, as shown in Figure 8B Figure 8B
[0076] As can be seen in the first plot 822, the charge density is reduced where the structures 804 are present, and increased in regions without structures 804. In regions where there are lower density structures 804, the charge density can be higher than regions with higher density structures 804. The areas 808 of the structures 804 can be, for example, 1.0 um 2 , and the spacing 810 between structures 804 can be 1.0 um. In some embodiments, the areas 808 can be 1.5 um 2 , the spacing 810 is 1.5 um, and in other embodiments, the areas can be between 0.5 and 2.0 um 2 , the spacing is between 0.5 and 2.0 um, and in various embodiments, the areas can be between 0.2 and 5.0 um 2 between 0.2 and 5.0 um, with a spacing between 0.2 and 5.0 um. As will be appreciated by one of ordinary skill in the art having the benefit of the present disclosure, the area and spacing of the structures can be set to any suitable values. Further, as will be appreciated by one of ordinary skill in the art, the structures 804 can have different sizes and shapes, such as, but not limited to, squares, rectangles, circles, triangles, or trapezoids, and can have other characteristics that can differ from those described herein.
[0077] Figure 9A A plan view of a GaN device 900A is shown, in accordance with embodiments of the present disclosure. The GaN device 900A can include a gate 902 and an active region 906, with 2DEG charge control structures 904 added to the active region. The structures 904 can have an area 908 and a spacing 910 that can vary. The structures 904 can be P-type GaN structures similar to device 100A, isolated implant regions similar to device 200A, or isolated implant regions through P-type GaN structures similar to device 300A. The area 908, spacing 910, and number of structures 904 can be used to control the 2DEG charge density, as shown in FIG. 900B. As will be appreciated by one of ordinary skill in the art having the benefit of the present disclosure, the area 908 and spacing 910 can be set to any suitable values. Further, as will be appreciated by one of ordinary skill in the art, the structures 904 can have different sizes and shapes, such as, but not limited to, squares, rectangles, circles, triangles, or trapezoids, and can have other characteristics that can differ from those described herein. Figure 9B FIG. 900B shows the 2DEG charge density as a function of position in the active region 906. The first graph 922 shows the charge density in the 2DEG layer with structures 904, while the second graph 920 shows the charge density without structures 904.
[0078] As can be seen in Figure 9A and 9B the charge density is reduced where the structures 904 are present, and increased in regions without structures 904. In regions where there are structures 904 of lower density, the charge density can be higher, while in regions with structures of higher density, the charge density can be relatively lower. The area 908 of the structures 904 can be, for example, 1.0 um 2 , while the spacing 910 between structures 904 can be 1.0 um. In some embodiments, the area 908 can be 1.5 um 2 , the spacing 910 is 1.5 um, while in other embodiments, the area can be between 0.5 and 2.0 um 2 , the spacing is between 0.5 and 2.0 um, and in various embodiments, the area can be between 0.2 and 5.0 um 2 , with a spacing between 0.2 and 5.0 um. As will be appreciated by one of ordinary skill in the art having the benefit of the present disclosure, the area 908 and spacing 910 of the structures 904 can be set to any suitable values. Further, as will be appreciated by one of ordinary skill in the art, the structures 904 can have different sizes and shapes, such as, but not limited to, squares, rectangles, circles, triangles, or trapezoids, and can have other characteristics that can differ from those described herein.
[0079] Figure 10A A series of charge density modification coupons 1000A are shown utilizing a 2DEG charge control structure similar to Figure 5A Figure 10B C-V test results 1000B are shown for the coupons of Figure 10A Figure 10B In Figure 10A , the capacitance as a function of gate-to-source voltage (Vgs) is plotted for each of the coupons in Figure 10B . As can be seen in the C-V plot of
[0080] Figure 11A Cross-sectional and plan views of a GaN transistor 1100A are shown in accordance with embodiments of the disclosure. In Figure 11A , a cross-sectional view of a GaN transistor is shown having a source region 1104, a gate region 1102, a drift region 1106, a drain region 1108, and a 2DEG layer 1122. A plan view of an enlarged section 1120 is also shown, in which a gate 1110, an active region 1112, and a charge control region 1114 are shown. The charge control region has a stepped trapezoidal shape. The charge control region 1114 can be P-type GaN, an isolated implant region, and / or a combination of P-type GaN and isolated implant structure. Figure 11B 2DEG charge density and electric field as a function of position along the active region of the GaN transistor 1100A are shown. As Figure 11B indicated, due to the presence of the charge control region 1114, the 2DEG charge density 1127 decreases proximal to the gate region 1102. The electric field 1125 decreases in the region proximal to the gate region 1102 due to the decrease in charge density compared to the electric field (1129) without the charge control structure. In various embodiments, the decrease in 2DEG charge density proximal to the gate of the transistor can enable a decrease in gate length, and can enable a decrease in die area. As will be appreciated by one of ordinary skill in the art having the benefit of the present disclosure, the charge control structure can be a continuous structure and / or can be in the shape of an island. Further, as will be appreciated by one of ordinary skill in the art, the charge control structure can have different sizes and spacings.
[0081] Figure 12A A cross-sectional view and a plan view of a GaN transistor 1200A according to embodiments of the disclosure are shown. In Figure 12A A cross-sectional view of a GaN transistor 1200A having a source region 1204, a gate region 1202, a drift region 1206, a drain region 1208, and a 2DEG layer 1222 is shown. A plan view of an enlarged section 1220 is also shown, where the gate 1210, the active region 1212, and the charge control region 1214 are shown. In this embodiment, the charge control region 1214 has a triangular or trapezoidal shape. The charge control region 1214 can be P-type GaN, an isolated implant structure, and / or a combination of P-type GaN and an isolated implant structure. Figure 12B A 2DEG charge density and an electric field as a function of position along the active region are shown. As Figure 12B As shown in the cross-sectional view, the 2DEG charge density 1227 decreases proximal to the gate region 1202 due to the presence of the charge control region 1214. The electric field 1225 decreases in the region proximal to the gate region 1202 due to the decrease in charge density compared to the electric field (1229) without the charge control structure. As will be appreciated by one of ordinary skill in the art having the benefit of the present disclosure, the charge control structure can be a continuous structure and / or can be in the shape of an island. Further, as will be appreciated by one of ordinary skill in the art, the charge control structure can have different sizes and spacing.
[0082] Figure 13A A cross-sectional view and a plan view of a GaN transistor 1300A according to embodiments of the disclosure are shown. In Figure 13A A cross-sectional view of a GaN transistor having a source region 1304, a gate region 1302, a drift region 1306, a drain region 1308, and a 2DEG layer 1322 is shown. A plan view of an enlarged section 1320 is also shown, where the gate 1310, the active region 1312, and the charge control region 1314 are shown. In this embodiment, the charge control region has an elliptical shape. The charge control region can be P-type GaN, an isolated implant structure, and / or a combination of P-type GaN and an isolated implant structure. Figure 13B A 2DEG charge density and an electric field as a function of position along the active region are shown. As Figure 13B As shown in the cross-sectional view, the 2DEG charge density 1327 decreases proximal to the gate region 1302 due to the presence of the charge control region 1314. The electric field 1325 decreases in the region proximal to the gate region 1302 due to the decrease in charge density compared to the electric field (1329) without the charge control structure. As will be appreciated by one of ordinary skill in the art having the benefit of the present disclosure, the charge control structure can be a continuous structure and / or can be in the shape of an island. Further, as will be appreciated by one of ordinary skill in the art, the charge control structure can have different sizes and spacing.
[0083] Figure 14 A plan view of a GaN resistor 1400 according to embodiments of the disclosure is shown. The GaN resistor 1400 can include ohmic contact regions 1402, active regions 1408, and isolation implant regions 1404. In some embodiments, the ohmic contact regions 1402 can be metal contact regions. The active regions 1408, which have a dog bone shape in this embodiment, can enable the formation of a 2DEG in the substrate, where the resistance value of the resistor can be set by the minimum fabrication active region width 1412. The width of the minimum fabrication active region width 1412 can be set by the minimum fabrication spacing between the implant regions 1404. In the illustrated embodiment, a P-type GaN charge control structure 1406 can be added to the resistor in order to form a relatively high value resistor. The charge control structure can have a minimum fabrication spacing 1410. The value of the spacing 1410 can be lower than the active region width 1412, thus enabling the formation of a relatively high value resistor. In this way, the manufacturing limitations on the minimum spacing of the implant regions can be circumvented. Furthermore, this technique can allow for the formation of relatively high value resistors without the high cost and complex changes to the manufacturing equipment. Moreover, the use of a P-type GaN charge control structure can enable improved manufacturing control over the value of the resistor compared to resistors formed without the charge control structure. For example, if the minimum fabrication design rules are set at 10 nm for a certain active width, this technique can enable the fabrication of a resistor having a resistance value that can equal that of a resistor having an active width of 8 nm. As will be appreciated by one of ordinary skill in the art having benefit of the disclosure, the minimum fabrication design rules for active width and spacing can vary for various semiconductor fabrication processes.
[0084] Figure 15 A plan view of a GaN resistor 1500 according to embodiments of the disclosure is shown. The GaN resistor 1500 can include ohmic contact regions 1502, active regions 1508, and isolation implant regions 1504. In some embodiments, the ohmic contact regions 1502 can be metal contact regions. In the illustrated embodiment, the active regions 1508, which have a rectangular shape, can have a non-minimum fabrication width 1512. As will be appreciated by one of ordinary skill in the art, a non-minimum fabrication feature size is a feature size that does not use the minimum feature size of the fabrication process. A P-type GaN charge control structure 1506 can be added to the resistor in order to form a relatively high value resistor. The charge control structure can have a minimum fabrication spacing 1510. Thus, a relatively high value resistor can be formed even in the case of a non-minimum width of the active regions. Moreover, the use of a P-type GaN charge control structure can enable improved manufacturing control over the value of the resistor compared to resistors formed without the charge control structure.
[0085] Figure 16A plan view of a GaN resistor 1600 is shown, according to embodiments of the disclosure. The GaN resistor 1600 can include ohmic contact regions 1602, active regions 1608, and isolation implant regions 1604. In some embodiments, the ohmic contact regions can be metal contact regions. The active regions, which can have a dog bone shape, can enable the formation of 2DEG in the substrate, where the value of the resistor can be determined by the minimum fabrication width of the active regions 1612. The width of the minimum fabrication active region width 1612 can be set by the minimum fabrication spacing between the implant regions 1604. In the illustrated embodiment, a P-type GaN charge control structure 1606 can be added to the resistor in order to form a relatively high value resistor. The P-type GaN structure can be in the form of multiple islands. The charge control structure can have a minimum fabrication spacing 1610. In some embodiments, the spacing 1610 can be less than the minimum active region width 1612, thus enabling the formation of a relatively high value resistor. In this way, the fabrication limitations on the minimum spacing of the implant regions can be circumvented, and this technique can allow the formation of a relatively high value resistor without the high cost and complex changes to the fabrication equipment. Furthermore, the use of a P-type GaN charge control structure can enable improved fabrication control of the resistor value compared to a resistor formed without the charge control structure.
[0086] Figure 17 A cross-sectional view of a GaN device 1700 is shown. The GaN device 1700 can include a GaN layer 1704, a first AlGaN layer 1708, and a 2DEG layer 1706 formed between the GaN layer 1704 and the first AlGaN layer 1708. The GaN device 1700 can also include islands 1702. In some embodiments, the islands 1702 can be formed of P-type GaN material. The GaN device 1700 can also include a second AlGaN layer 1705 formed on the first AlGaN layer 1708. In the illustrated embodiment, the second AlGaN layer 1705 can be removed in some areas, such as area 1720. As discussed above, the 2DEG charge density under the P-type GaN islands 1702 (e.g., location 1716) can be reduced compared to areas without P-type GaN islands (e.g., location 1714). The addition of the second AlGaN layer 1705 on the first AlGaN layer 1708 in area 1722 can increase the charge density in the 2DEG layer 1706 under the second AlGaN layer 1705 (e.g., location 1718). As previously mentioned, the presence of P-type GaN islands in area 1722 can reduce the 2DEG charge density under the islands (e.g., location 1712), however, due to the presence of the second AlGaN layer 1705 over location 1712, the 2DEG charge density in location 1712 can be higher than the 2DEG charge density in location 1716. Thus, this approach can allow control of the 2DEG charge density in various locations in a GaN substrate and / or GaN wafer.
[0087] The amount of 2DEG charge density increase due to the presence of the second AlGaN layer 1705 can depend on the thickness of the second AlGaN layer 1705. In some embodiments, the thickness of the second AlGaN layer 1705 can be, for example, 50 nm. In various embodiments, the thickness of the second AlGaN layer 1705 can be, for example, 100 nm, while in other embodiments, the thickness can be between 5 to 10 nm, and in other embodiments, the thickness can be between 150 to 250 nm. As will be appreciated by one of ordinary skill in the art with the benefit of this disclosure, the thickness of the second AlGaN layer 1705 can be set to any suitable value. Moreover, as will be appreciated by one of ordinary skill in the art, the 2DEG charge density control techniques described above can employ one or more islands, different sizes and shapes for each island, non-uniform spacing between each island, and other characteristics that can be different than those described herein. Furthermore, as will be appreciated by one of ordinary skill in the art, the P-type GaN layer can have different doping density values. Moreover, the second AlGaN layer 1705 can have different Al and GaN concentrations. Furthermore, a third AlGaN layer can be formed on the second AlGaN layer 1705 for controlling the 2DEG charge density. In some embodiments, multiple AlGaN layers can be used to control the 2DEG charge density.
[0088] Figure 18 A cross-sectional view of a GaN device 1800 according to embodiments of the disclosure is shown. As Figure 18As shown in the middle, GaN device 1800 can include GaN layer 1804, first AlGaN layer 1808, and 2DEG layer 1806 formed between GaN layer 1804 and first AlGaN layer 1808. GaN device 1800 can include isolation implant regions 1802. GaN device 1800 can also include second AlGaN layer 1805 formed on first AlGaN layer 1808. In the illustrated embodiment, second AlGaN layer 1805 can be removed in some regions, such as region 1820. As discussed above, isolation implant regions 1802 can be utilized in GaN device 1800, where an isolation implant can be placed in active regions of GaN device 1800. Isolation implant regions 1802 can create a damaged lattice structure in underlying first AlGaN layer 1808 and GaN layer 1804, thereby eliminating charge carriers in 2DEG layer 1806. In addition, the damaged lattice structure can reduce the piezoelectric effect outside of the direct implant regions, and can cause a reduction in charge carriers in adjacent 2DEG regions. The addition of second AlGaN layer 1805 on first AlGaN layer 1808 in region 1822 can increase the charge density in 2DEG layer 1806 below the regions where second AlGaN layer 1805 is present, such as location 1818. As previously discussed, the presence of isolation implant regions 1802 can eliminate 2DEG charge density in those regions, such as location 1812.
[0089] Similar to the above discussion in Figure 2A and 2BAs discussed in the text, 2DEG charge carriers can be eliminated where an isolation injection region 1802 is present, wherein the isolation injector used to form the isolation injection region 1802 can penetrate through the second AlGaN layer 1805 and the first AlGaN layer 1808. In some embodiments, the isolation injector can penetrate into the GaN layer 1804. The addition of the second AlGaN layer 1805 can increase the 2DEG charge density below the region having the second AlGaN layer 1805. The amount of increase in 2DEG charge density can depend on the thickness of the second AlGaN layer 1805. In some embodiments, the thickness of the second AlGaN layer 1805 can be, for example, 50 nm. In various embodiments, the thickness of the second AlGaN layer 1805 can be, for example, 100 nm, while in other embodiments, the thickness can be between 5 and 10 nm, and in other embodiments, the thickness can be between 150 and 250 nm. As will be understood by those skilled in the art to which this disclosure pertains, the thickness of the second AlGaN layer 1805 can be set to any suitable value. Furthermore, as those skilled in the art will understand, the 2DEG charge density control techniques described above may employ one or more isolation injection regions, different sizes and shapes for each isolation injection region, non-uniform spacing between each isolation injection region, and other characteristics that may differ from those described herein. Furthermore, as those skilled in the art will understand, the isolation injection regions may have different depth values. Furthermore, the second AlGaN layer 1805 may have different Al and GaN concentrations. Furthermore, a third AlGaN layer may be formed on the second AlGaN layer 1805 for controlling the 2DEG charge density. In some embodiments, multiple AlGaN layers may be used to control the 2DEG charge density.
[0090] Figure 19 A cross-sectional view is shown of an embodiment of a GaN device 1900 with a second AlGaN layer using an isolation injection region through a P-type GaN structure, according to an embodiment of the present disclosure. Figure 19 As shown, the GaN device 1900 may include a GaN layer 1904, a first AlGaN layer 1908, and a 2DEG layer 1906 formed between the GaN layer 1904 and the first AlGaN layer 1908. The GaN device 1900 may include an isolation implantation region 1902 that penetrates the P-type GaN structure. The GaN device 1900 may also include a second AlGaN layer 1905 formed on the first AlGaN layer 1908. In the illustrated embodiment, the second AlGaN layer 1905 may be removed in some regions, such as region 1920. Similar to the above... Figure 3A and 3BAs described above, isolation implants 1902 through the P-type GaN structure can be formed by implanting through the P-type GaN structure. Isolation implants 1902 through the P-type GaN structure can be used in the active region of GaN device 1900 to reduce the charge density in 2DEG layer 1906. In the illustrated embodiment, due to the presence of the P-type GaN structure, the isolation implants can penetrate less into the substrate, and thus the resulting lattice structure damage can not completely eliminate the charge carriers in 2DEG layer 1906. Adding a second AlGaN layer 1905 on first AlGaN layer 1908 in region 1922 can increase the charge density in 2DEG layer 1906 below the region in which second AlGaN layer 1905 is present, e.g., location 1912.
[0091] Adding a second AlGaN layer 1905 on first AlGaN layer 1908 can increase the 2DEG charge density below the region with the second AlGaN layer 1905. The amount of increase in 2DEG charge density can depend on the thickness of second AlGaN layer 1905. In some embodiments, the thickness of second AlGaN layer 1905 can be, for example, 50 nm. In various embodiments, the thickness of second AlGaN layer 1905 can be, for example, 100 nm, while in other embodiments, the thickness can be between 5 and 10 nm, and in other embodiments, the thickness can be between 150 and 250 nm. As will be appreciated by one of ordinary skill in the art having the benefit of the present disclosure, the thickness of second AlGaN layer 1905 can be set to any suitable value. Moreover, as will be appreciated by one of ordinary skill in the art, the 2DEG charge density control techniques described above can employ one or more isolation implant regions through the P-type GaN region, employ different sizes and shapes for each region, employ non-uniform spacing between each region, and employ other characteristics that can be different from those described herein. Furthermore, as will be appreciated by one of ordinary skill in the art, the isolation implant regions through the P-type GaN region can have different depth values. Moreover, second AlGaN layer 1905 can have different Al and GaN concentrations. In addition, a third AlGaN layer can be formed on second AlGaN layer 1905 for controlling 2DEG charge density. In some embodiments, multiple AlGaN layers can be used to control 2DEG charge density.
[0092] Although 2DEG charge control structures for GaN devices are described and shown herein with respect to one particular configuration of GaN devices, embodiments of the present disclosure are suitable for use with other configurations of GaN devices and non-GaN devices. For example, any semiconductor device can be used with embodiments of the present disclosure. In some cases, embodiments of the present disclosure are particularly suitable for use with silicon and other compound semiconductor devices.
[0093] For simplicity, various internal components, such as details of the substrate, various dielectric and metal layers, contacts, other components of the GaN transistor 100 (see FIG. 1), are not shown in the figures.
[0094] In the foregoing specification, embodiments of the disclosure have been described with reference to numerous specific details that can vary from implementation to implementation. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense. The sole and exclusive indicator of the scope of the disclosure, and what is intended by the applicants to be the scope of the disclosure, is the literal and equivalent scope of the claims that issue from this application, in whatever form that issued claim can be in, including any subsequent correction. Combinations of specific embodiments are contemplated, and can be made without departing from the spirit and scope of embodiments of the disclosure.
[0095] In addition, spatially relative terms, such as "bottom", "top", and the like, can be used herein for ease of describing the elements and / or features of the devices as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and / or operation in addition to the orientations depicted in the figures. For example, if a device is inverted, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. The device can be otherwise oriented (for example, rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
[0096] The terms "and", "or", and "and / or", as used herein, can include a variety of meanings that also are expected to depend at least in part upon the context in which such terms are used. Typically, "or" if used to associate separate items will be intended to mean either disjunctive (A or B) or conjunctive (A and B) sense. In addition, the term "one or more" as used herein can be used to describe any feature, structure, or characteristic in the singular or can be used to describe some combination of features, structures or characteristics. However, it should be noted that this is merely an illustrative example and claimed subject matter is not limited to this example. Furthermore, if the term "at least one" is used in the context of a list of items (for example, A, B, or C), there can be one or more instances of A, B, or C. For example, A, B, and C or A, B, and C or A, B, C, AB, AC, BC, AA, AAB, ABC, AABBCCC, etc.
[0097] References throughout this specification to "one example," "an example," "certain examples," or "exemplary implementation" mean that a particular feature, structure, or characteristic can be included in at least one feature and / or example of claimed subject matter. Thus, the appearance of the phrase "in one example" or "an example" or "in certain examples" or "in some implementations" or similar phrases in various places throughout this specification are not necessarily all referring to the same feature, example, and / or limitation. Furthermore, the particular features, structures, or characteristics can be combined in one or more examples and / or features.
[0098] In the preceding detailed description, numerous specific details are set forth to provide a thorough understanding of the claimed subject matter. However, one having ordinary skill in the art will understand that the claimed subject matter can be practiced without these specific details. In other instances, methods and devices that would be known by one of ordinary skill have not been described in detail in order to avoid obscuring the claimed subject matter. Accordingly, one skilled in the art will recognize that the claimed subject matter is not limited to the specific examples disclosed, but rather, the overall scope of the claimed subject matter includes all aspects and embodiments falling within the scope of the appended claims and their equivalents.
Claims
1. A gallium nitride (GaN) device comprising: a compound semiconductor substrate; a source region formed in the compound semiconductor substrate; a drain region formed in the compound semiconductor substrate and separated from the source region; a two-dimensional electron gas (2DEG) layer formed in the compound semiconductor substrate and extending between the source region and the drain region; a gate region formed on the compound semiconductor substrate and positioned between the source region and the drain region; and a plurality of isolated charge control structures disposed between the gate region and the drain region, wherein the 2DEG layer has a reduced charge density under each of the plurality of isolated charge control structures and an increased charge density in regions not under the plurality of isolated charge control structures.
2. The GaN device of claim 1, wherein each of the plurality of isolated charge control structures is disposed on the compound semiconductor substrate.
3. The GaN device of claim 2, wherein each of the plurality of isolated charge control structures comprises a GaN layer.
4. The GaN device of claim 3, wherein the GaN layer comprises a P-type GaN layer.
5. The GaN device of claim 1, wherein each of the plurality of isolated charge control structures is disposed within the compound semiconductor substrate.
6. The GaN device of claim 5, wherein each of the plurality of isolated charge control structures comprises an isolated implant region.
7. The GaN device of claim 4, wherein each of the plurality of isolated charge control structures comprises an isolated implant region formed through the P-type GaN layer.
8. The GaN device of claim 1, wherein each of the plurality of isolated charge control structures is formed in the shape of an island.
9. The GaN device of claim 1, wherein the plurality of isolated charge control structures are disposed proximal to the gate region.
10. The GaN device of claim 9, wherein the plurality of isolated charge control structures are arranged to reduce an electric field proximal to the gate region.
11. The GaN device of claim 8, wherein a pattern density of the plurality of isolated charge control structures is constant in a region proximal to the gate region and in a region proximal to the drain region.
12. The GaN device of claim 1, wherein each of the plurality of isolated charge control structures is formed in the shape of a trapezoid extending from the gate region toward the drain region.
13. The GaN device of claim 3, wherein each of the plurality of isolated charge control structures is formed in the shape of an ellipse extending from the gate region toward the drain region.
14. A method of controlling a charge density in a two-dimensional electron gas (2DEG) layer in a gallium nitride (GaN) device, the method comprising: providing a compound semiconductor substrate comprising a first layer and a second layer and further comprising a 2DEG layer formed between the first layer and the second layer; forming an active region; forming a gate region on and across the compound semiconductor substrate; and forming a plurality of isolated charge control structures on the active region, wherein the 2DEG layer has a reduced charge density under each of the plurality of isolated charge control structures and an increased charge density in areas not under the plurality of isolated charge control structures.
15. The method of claim 14, wherein each of the plurality of isolated charge control structures comprises a P-type GaN layer.
16. The method of claim 14, wherein each of the plurality of isolated charge control structures comprises an isolated implant region.
17. A gallium nitride (GaN) device comprising: a compound semiconductor substrate; a two-dimensional electron gas (2DEG) layer formed in the compound semiconductor substrate; a resistor, formed in the compound semiconductor substrate, the resistor comprising an active region and first and second ohmic contacts; and a plurality of isolated charge control structures formed on at least a portion of the active region, wherein the 2DEG layer has a reduced charge density under each of the plurality of isolated charge control structures and an increased charge density in areas not under the plurality of isolated charge control structures, thereby causing an increase in resistance of the resistor.
18. The GaN device of claim 17, wherein each of the plurality of isolated charge control structures comprises a P-type GaN layer.
19. The GaN device of claim 17, wherein a spacing between each adjacent charge control structure is below a minimum fabrication width of the active region.
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