Vertical light-emitting diode die package with an electrical detection position

Abstract

A vertical light-emitting diode die package having an electrical detection position includes a light-emitting diode die and a package carrier. The light-emitting diode die has a semiconductor epitaxial structure, an interface lateral extension structure, a die conductive base structure, an N-type electrode located above the semiconductor epitaxial structure, and a P-type shunt detection electrode located on the interface lateral extension structure. The die conductive base structure has a P-type main electrode on the lower side. The package carrier includes a plurality of electrode contacts, through which the N-type electrode, the P-type shunt detection electrode, and the P-type main electrode are connected, so that the process quality of an alternative substrate adhesive layer in the semiconductor epitaxial structure and the die conductive base structure and a carrier die bonding adhesive layer between the P-type main electrode and the package carrier can be evaluated by detecting electrical characteristics. Moreover, the present invention also connects the plurality of electrode contacts above the package carrier to achieve simple and accurate electrical characteristic testing.

Description

Technical Field

[0001] The present invention relates to a die structure of a light-emitting diode, and more particularly to a vertical light-emitting diode die having an electrical detection point and a corresponding package thereof. Background Art

[0002] A light-emitting diode (LED) is a light source that can generate high brightness by the recombination of electrons and holes in a semiconductor. The product can be used in high-intensity sterilization (ultraviolet light), automotive headlights and taillights (blue, yellow, and red light), projector light sources (blue, green, and red), and infrared security detection (infrared). In addition to high luminous intensity and luminous density, excellent high-power LED components also require good reliability. Taking the automotive headlight module as an example, once an LED fails, it will affect night safety. According to the high standards of automotive LEDs, even a trace failure rate of 1 ppm needs to be improved in the automotive industry. Therefore, accurate optoelectronic property detection of components is very important.

[0003] As Figure 1 shown, in an embodiment, when a vertical LED die 1 is SMD packaged, the P electrode 2 is bonded to the die bonding conductive base 4 of the package substrate 3 through a carrier die bonding adhesive layer 4A, and the N electrode 5 is electrically connected to the wire bonding end point 7 through wire bonding with a gold wire 6. The die bonding conductive base 4 and the wire bonding end point 7 are respectively electrically connected to the anode (Anode) 9A and cathode (Cathode) 9B located on the other side of the package substrate 3 through a conductive metal 8.

[0004] For a vertical LED, the main structure of the vertical LED die 1 includes three parts: a semiconductor epitaxial structure 1A, an interface structure 1B, and a die conductive base structure 1C from top to bottom.

[0005] Among them, the semiconductor epitaxial structure 1A is, from top to bottom, an N-type semiconductor, a light-emitting layer, and a P-type semiconductor in sequence. The die conductive base structure 1C is, from top to bottom, a structural metal layer, a replacement substrate adhesive layer 1C1, and a high thermal conductivity replacement substrate in sequence. The interface structure 1B generally has local or overall metal to connect the P-type semiconductor of the semiconductor epitaxial structure 1A and the structural metal layer of the die conductive base structure 1C in an ohmic contact manner. The P electrode 2 is located below the high thermal conductivity replacement substrate.

[0006] The grain conductive base structure 1C mainly uses the high thermal conductivity alternative substrate below as the main support structure. It uses the alternative substrate adhesive layer 1C1 to bond with the upper structural metal layer in a wafer-level manner during the wafer manufacturing process. Usually, the metal eutectic bonding method (such as AuSn eutectic bonding) is used for metal bonding. There are yield problems in its flat bonding process. If uneven surfaces, holes, or contamination are formed during the bonding process due to poor raw materials and processes, the impedance will increase abnormally, resulting in uneven current in the grain under high-current operation, causing local hot spots, and leading to reduced light efficiency and reliability.

[0007] In addition, for the vertical LED grain 1 and the packaging carrier board 3, the carrier board die bonding adhesive layer 4A needs to be used to achieve conductive die bonding. (Usually, the metal eutectic bonding method is also used for metal die bonding and conduction bonding. If the bottom of the vertical LED grain is uneven and there is particle contamination, it will also cause the resistance of the bottom interface to increase under high-current operation, forming local hot spots and leading to component burnout.

[0008] Finally, for the optoelectronic property measurement of the components that need to go through the vertical LED packaging process, the anode 9A and the cathode 9B can be used as test contacts and cooperate with a test instrument for detection to meet the high standards of automotive LEDs.

[0009] However, when detecting the vertical LED grain 1 conventionally, when an abnormally high voltage electrical characteristic (high Vf) is found, which is the overall electrical characteristic of the semiconductor epitaxial structure, the interface structure, and the grain conductive base structure, it is impossible to confirm whether the source of the abnormality is the semiconductor epitaxial structure part or the alternative substrate adhesive layer and the carrier board die bonding adhesive layer 4A of the grain conductive base structure part.

[0010] In addition, for the diode characteristics of the micro voltage and current of the semiconductor layer, due to the noise influence of the grain conductive base structure, it is impossible to accurately measure its small electrical characteristics in the forward bias and reverse bias, making it difficult to judge the epitaxial quality. Summary of the Invention

[0011] Therefore, the main object of the present invention is to disclose a vertical light-emitting diode grain package with multiple electrical test position contacts to meet the precise electrical characteristic tests of each layer between the semiconductor epitaxial structure, the interface structure, the grain conductive base structure, and the packaging carrier board.

[0012] The present invention relates to a vertical light-emitting diode die package with an electrically detectable position, which comprises a light-emitting diode die and a packaging carrier plate. The light-emitting diode die has a die conductive base structure, an interface transverse extension structure, a semiconductor epitaxial structure, an N-type electrode, and a P-type shunt detection electrode. The die conductive base structure has a P-type main electrode located on the lower side, and the P-type main electrode is electrically connected to the packaging carrier plate in a planar die-bonding and conductive manner. The interface transverse extension structure of the present invention is composed of a high-concentration P-type semiconductor layer, an ohmic contact layer, and a highly conductive metal layer stacked in sequence. The interface transverse extension structure is disposed on a side of the die conductive base structure away from the P-type main electrode, and the semiconductor epitaxial structure and the P-type shunt detection electrode are respectively disposed on the upper plane of the interface transverse extension structure. Ohmic contact is achieved between the semiconductor epitaxial structure and the die conductive base structure through the interface transverse extension structure.

[0013] The N-type electrode is disposed on a side of the semiconductor epitaxial structure away from the die conductive base structure. The die conductive base structure of the present invention further has a structural metal layer, a substitute substrate adhesive layer, and a highly thermally conductive substitute substrate. The structural metal layer is located below the interface transverse extension structure, and the highly thermally conductive substitute substrate is adhered to the lower side of the structural metal layer through the substitute substrate adhesive layer. The P-type main electrode is disposed below the highly thermally conductive substitute substrate. The highly conductive metal layer at the lowermost part of the interface transverse extension structure needs to be a material with stable chemical properties and conducive to ohmic contact to be connected to the structural metal layer at the uppermost part of the die conductive base structure, and the structural metal layer needs to be a material with stable chemical properties and conducive to subsequent metal eutectic bonding.

[0014] The highly thermally conductive substitute substrate is located within the die conductive base structure as the main structural support layer, and the highly thermally conductive substitute substrate is connected to the structural metal layer above including the semiconductor epitaxial structure through metal eutectic bonding by the substitute substrate adhesive layer. The P-type main electrode is below the highly thermally conductive substitute substrate.

[0015] The encapsulation carrier has an upper plane and a lower plane located on both sides. An anode and a cathode are provided on the lower plane, and a first main component electrode, a second main component electrode, a third main component electrode, a first electrical test position contact, a second electrical test position contact, and a third electrical test position contact are provided on the upper plane. The N-type electrode and the first main component electrode are electrically connected by a first die bonding metal, the P-type shunt detection electrode and the second main component electrode are electrically connected by a second die bonding metal, and the P-type main electrode is electrically connected by directly bonding to the third main component electrode through a carrier die bonding adhesive layer. The first electrical test position contact is electrically connected to the first main component electrode and the cathode, the second electrical test position contact is electrically connected to the second main component electrode, and the third electrical test position contact is electrically connected to the third main component electrode and the anode.

[0016] Accordingly, the first electrical test position contact is electrically connected to the N-type electrode through the first main component electrode, the second electrical test position contact is electrically connected to the P-type shunt detection electrode through the second main component electrode, and the electrical characteristics between the N-type electrode and the P-type shunt detection electrode are the electrical characteristics of the semiconductor epitaxial structure and the interface lateral extension structure.

[0017] Therefore, by detecting at the first electrical test position contact and the second electrical test position contact, the electrical characteristics of the semiconductor epitaxial structure and the interface lateral extension structure can be obtained. In particular, the precise electrical values of the semiconductor epitaxial structure (diode) under forward bias and reverse bias can be accurately measured, and the epitaxial process quality of the semiconductor epitaxial structure can be more effectively evaluated.

[0018] Moreover, the third electrical test position contact is electrically connected to the P-type main electrode through the third main component electrode. Therefore, by detecting at the second electrical test position contact and the third electrical test position contact, the electrical characteristics of the die conductive base structure and the carrier die bonding adhesive layer between the P-type main electrode and the third main component electrode can be obtained, and then the process quality of the alternative substrate adhesive layer and the carrier die bonding adhesive layer can be evaluated. Description of the Drawings

[0019] Figure 1 is a schematic cross-sectional view of a conventional light-emitting diode packaging structure;

[0020] Figure 2 is a schematic circuit diagram of the packaging structure of the first embodiment of the present invention;

[0021] Figure 3 is a schematic cross-sectional view of the packaging structure of the first embodiment of the present invention;

[0022] Figure 4, is a schematic cross-sectional view of the grain structure according to an embodiment of the present invention;

[0023] Figure 5 , is a schematic cross-sectional view of the grain structure according to another embodiment of the present invention;

[0024] Figure 6 , is a schematic cross-sectional view of the grain structure according to another embodiment of the present invention;

[0025] Figure 7 , is a top view schematic diagram of the encapsulation carrier board according to the first embodiment of the present invention;

[0026] Figure 8 , is a bottom view schematic diagram of the encapsulation carrier board according to the first embodiment of the present invention;

[0027] Figure 9 , is a circuit schematic diagram of the encapsulation structure according to the second embodiment of the present invention;

[0028] Figure 10 , is a schematic cross-sectional view of the encapsulation structure according to the second embodiment of the present invention;

[0029] Figure 11 , is a top view schematic diagram of the encapsulation carrier board according to the second embodiment of the present invention. Detailed implementation manners

[0030] For a more in-depth understanding and recognition of the features, objectives, and effects of the present invention, a preferred embodiment is listed below and described in conjunction with the accompanying drawings as follows:

[0031] Please refer to Figure 2 and Figure 3 As shown, it is the first embodiment of the present invention, which includes a light-emitting diode chip 10 and an encapsulation carrier board 30. The light-emitting diode chip 10 has a chip conductive base structure 11, an interface lateral extension structure 12, a semiconductor epitaxial structure 13, an N-type electrode 14, and a P-type shunt detection electrode 15. The chip conductive base structure 11 has a P-type main electrode 16 located on the lower side. The interface lateral extension structure 12 is provided on the side of the chip conductive base structure 11 away from the P-type main electrode 16. The semiconductor epitaxial structure 13 and the P-type shunt detection electrode 15 are respectively disposed on the upper plane of the interface lateral extension structure 12. Ohmic contact is achieved between the semiconductor epitaxial structure 13 and the chip conductive base structure 11 through the interface lateral extension structure 12. The N-type electrode 14 is provided on the side of the semiconductor epitaxial structure 13 away from the chip conductive base structure 11.

[0032] The packaging carrier 30 has an upper plane 301 and a lower plane 302 located on both sides. An anode 313 and a cathode 311 are provided on the lower plane 302, and a first main component electrode 41, a second main component electrode 42, a third main component electrode 43, a first electrical test position contact 51, a second electrical test position contact 52, and a third electrical test position contact 53 are provided on the upper plane 301. The N-type electrode 14 and the first main component electrode 41 are electrically connected by a first die bonding metal 61 of a die. The P-type shunt detection electrode 15 and the second main component electrode 42 are electrically connected by a second die bonding metal 62 of a die. The P-type main electrode 16 is electrically connected by directly bonding to the third main component electrode 43 through a die bonding adhesive layer 431 (die bonding conductive adhesive or metal) of the carrier. The first electrical test position contact 51 is electrically connected to the first main component electrode 41 and the cathode 311. The second electrical test position contact 52 is electrically connected to the second main component electrode 42. The third electrical test position contact 53 is electrically connected to the third main component electrode 43 and the anode 313.

[0033] In the actual structure, the packaging carrier 30 can be selected from ceramic substrates (aluminum nitride, alumina, silicon carbide), copper substrates, BT (Bismaleimide Triazine) boards, etc. The packaging carrier 30 can be a single-layer board or a multi-layer board. The first main component electrode 41 and the cathode 311 are electrically connected through a first carrier metal conduction metal 71 penetrating the packaging carrier 30. The third main component electrode 43 and the anode 313 are electrically connected through a second carrier metal conduction metal 73 penetrating the packaging carrier 30. In addition, the packaging carrier 30 can be a multi-layer board structure. The electrical connection methods between the first electrical test position contact 51 and the first main component electrode 41, between the second electrical test position contact 52 and the second main component electrode 42, and between the third electrical test position contact 53 and the third main component electrode 43 can use metal conductive layers 303, 304, 305 (such as Figure 3 drawn) to make electrical connections, and the metal conductive layers 303, 304, 305 can also be formed on the upper plane 301 of the packaging carrier 30 (such as Figure 7 shown).

[0034] Please refer to Figure 4As shown, in one embodiment, the semiconductor epitaxial structure 13 includes a P-type semiconductor 13A, an active layer 13B, and an N-type semiconductor 13C stacked in sequence. The N-type electrode 14 is located on the N-type semiconductor 13C, and the die conductive base structure 11 further has a high thermal conductivity replacement substrate 11A, a replacement substrate adhesive layer 11B, and a structural metal layer 11C stacked in sequence. The P-type semiconductor 13A and the P-type shunt detection electrode 15 are located at different positions on the interface lateral extension structure 12 respectively. The interface lateral extension structure 12 includes a high-conductivity metal layer 12A, an ohmic contact layer 12B, and a high-concentration P-type semiconductor conductive layer 12C stacked in sequence, and the P-type shunt detection electrode 15 is located outside the edge of the interface lateral extension structure 12. The high-conductivity metal layer 12A is located above the structural metal layer 11C, and the P-type semiconductor 13A and the P-type shunt detection electrode 15 are located on the high-concentration P-type semiconductor conductive layer 12C respectively. In this embodiment, which is commonly used for quaternary (aluminum, gallium, indium, phosphorus) LEDs, the high-concentration P-type semiconductor conductive layer 12C can be p-GaP, and the ohmic contact layer 12B can be ohmic contact metal 12B1 with a transparent material 12B2, and the ohmic contact metal 12B1 is in contact connection with the upper and lower layers in a plurality of columnar (BeAu columnar) structures (such as Figure 4 the diagonal frame shown), or the ohmic contact metal 12B1 can also be an ohmic contact conduction block; the high-conductivity metal layer 12A is Ag / TiW / Pt.

[0035] Please refer to Figure 5 As shown, in another embodiment, the P-type shunt detection electrode 15 can be directly located on the ohmic contact layer 12B. This structure is usually used for nitride blue LEDs (aluminum, gallium, indium, nitrogen), and the high-concentration P-type semiconductor conductive layer 12C can be p-GaN or p-InGaN; the ohmic contact layer 12B is ITO, and the high-conductivity metal layer 12A is Ag and TiW.

[0036] Please refer to Figure 6 As shown, in another embodiment, the P-type shunt detection electrode 15 can also be directly located on the high-conductivity metal layer 12A. This structure is usually used for nitride blue LEDs, and the high-concentration P-type semiconductor conductive layer 12C can be p-GaN or p-InGaN; the ohmic contact layer 12B is Ag, and the high-conductivity metal layer 12A is TiW or Pt or a mixture thereof.

[0037] The vertical light-emitting diode die with electrical detection of the P-type shunt detection electrode 15 and the packaged carrier board 30 with a detection position are designed as follows. Refer to Figure 7As shown, the upper plane 301 of the encapsulation carrier 30 may have a die bonding base 33 to serve as the third electrode 43 of the main component. The P-type main electrode 16 of the light-emitting diode die 10 ( Figure 7 not exposed) is conductively die-bonded to the die bonding base 33. The N-type electrode is electrically connected to the first electrode 41 of the main component through the first wire bonding metal 61 of the die, and the P-type shunt detection electrode 15 is electrically connected to the second electrode 42 of the main component through the second wire bonding metal 62 of the die. Also, the upper plane 301 of the encapsulation carrier 30 may have two different wire bonding ends 34A and 34B, which are respectively used as the first electrode 41 and the second electrode 42 of the main component.

[0038] Please refer again to Figure 8 As shown, in addition to providing the cathode 311 and the anode 313, the lower plane 302 of the encapsulation carrier 30 may also be provided with a build-up layer 315. The height of the build-up layer 315 is the same as that of the cathode 311 and the anode 313, which can meet the requirements of subsequent processes.

[0039] Please refer to Figure 9 and Figure 10 As shown, this is the second embodiment of the present invention. Compared with the first embodiment, the encapsulation carrier 30 further includes a first auxiliary component electrode 81, a second auxiliary component electrode 84, and an electrical test fourth position contact 54. Among them, the first auxiliary component electrode 81 is electrically connected to the first electrical test position contact 51, the second auxiliary component electrode 84 is electrically connected to the fourth electrical test position contact 54, and a Zener diode 85 is electrically connected between the first auxiliary component electrode 81 and the second auxiliary component electrode 84. In actual implementation, the first auxiliary component electrode 81 and the first electrical test position contact 51 are electrically connected through the metal conductive layer 303, and the second auxiliary component electrode 84 and the fourth electrical test position contact 54 are electrically connected through a metal conductive layer 306.

[0040] Furthermore, the Zener diode 85 can be a bidirectional Zener diode, which includes a unidirectional Zener diode 85A and a unidirectional Zener diode 85B arranged in different directions (as Figure 9 drawn). Or only the unidirectional Zener diode 85A can be used. If it is a unidirectional Zener diode 85A, the unidirectional Zener diode 85A needs to be connected in parallel with the light-emitting diode die 10 with the opposite polarity.

[0041] In the second embodiment of the present invention, the light-emitting diode packaging structure circuit has four test contacts, namely the first electrical test position contact 51, the second electrical test position contact 52, the third electrical test position contact 53, and the fourth electrical test position contact 54. As Figure 9 shown, where the first electrical test position contact 51 and the fourth electrical test position contact 54 are selected for testing, which can be used to test whether the Zener diode 85 is operating normally. Selecting the second electrical test position contact 52 and the third electrical test position contact 53 for testing can obtain the electrical characteristics of the alternative substrate adhesive layer 11B and the carrier die bonding adhesive layer 431 between the P-type main electrode 16 and the packaging carrier 30.

[0042] Selecting the first electrical test position contact 51 and the second electrical test position contact 52 for testing can accurately detect the characteristics of the micro voltage and current of the semiconductor epitaxial structure 13 under forward bias and reverse bias.

[0043] And in the presence of the Zener diode 85, the small current forward Vf of the light-emitting diode die 10 can also be measured, as well as whether the leakage current of the light-emitting diode die 10 under reverse bias increases abnormally. The reason for the increase in reverse bias leakage current is the expansion of semiconductor defects, which can be mechanical stress and thermal stress in the packaging process, or the product is subjected to severe testing such as entering a high-temperature furnace for aging or applying an ESD test, etc.

[0044] After the testing is completed, the second electrical test position contact 52, the third electrical test position contact 53, and the fourth electrical test position contact 54 can be electrically connected together through a conductive metal 90. The conductive metal 90 can be a gold wire using a wire bonding process or formed by a semiconductor thin film.

[0045] In addition, in order to protect the components on the packaging carrier 30, after the testing is completed, as Figure 3 shown, it can also include a packaging material 91, and the packaging material 91 covers the upper plane 301 of the packaging carrier 30, thereby protecting the components on the packaging carrier 30.

[0046] Alternatively, as Figure 10 shown, it can also include a first packaging material 92 and a second packaging material 93. First, the first packaging material 92 covers the light-emitting diode die 10, the first wire bonding metal 61 of the die, the second wire bonding metal 62 of the die, the Zener diode 85, the first main element electrode 41, the second main element electrode 42, the third main element electrode 43, the first sub-element electrode 81, and the second sub-element electrode 84.

[0047] Testing can be performed using the yet-to-be-encapsulated first electrical test position contact 51, second electrical test position contact 52, third electrical test position contact 53, and fourth electrical test position contact 54, which can solve the problem that during the conventional encapsulation process, the first wire bonding metal 61 and the second wire bonding metal 62 of the die may be indirectly pulled by the encapsulant 91 (as shown in Figure 3 ), or the first encapsulant 92 (as shown in Figure 10 ), which may damage the light-emitting diode die 10, causing microcracks or film peeling, resulting in failure or instability.

[0048] After the testing is completed, similarly, the second electrical test position contact 52, the third electrical test position contact 53, and the fourth electrical test position contact 54 can be electrically connected together through the conductive metal 90. Finally, the second encapsulant 93 is allowed to cover the conductive metal 90, the first electrical test position contact 51, the second electrical test position contact 52, the third electrical test position contact 53, and the fourth electrical test position contact 54, thus completing the overall encapsulation process.

[0049] In addition, if the component fails, the second encapsulant 93 can be separately removed and the conductive metal 90 can be removed or made open-circuited, which will not damage the light-emitting diode die 10, so it can be retested to find the true cause of the component failure.

[0050] Please refer to Figure 11 shown in the top view schematic diagram of the encapsulation carrier of the second embodiment of the present invention. Compared with Figure 7 it, the fourth electrical test position contact 54, the first sub-component electrode 81, the second sub-component electrode 84, and the Zener diode 85 are also provided. The Zener diode 85 is electrically connected to the first sub-component electrode 81 and the second sub-component electrode 84. The first sub-component electrode 81 and the first main-component electrode 41 are formed by the same wire bonding end point 34A, and the other wire bonding end point 34B is the second main-component electrode 42. The second sub-component electrode 84 is formed by another wire bonding end point 34C, and the second sub-component electrode 84 and the fourth electrical test position contact 54 are electrically connected through the metal conductive layer 306.

[0051] As described above, the features of the present invention at least include:

[0052] 1. The P-type shunt detection electrode is located on the interface lateral extension structure at the interface between the semiconductor epitaxial structure and the die conductive base structure. As long as the second electrical test position contact is connected to the P-type shunt detection electrode, the respective electrical characteristics of the semiconductor epitaxial structure and the die conductive base structure can be measured to achieve accurate testing of the semiconductor component characteristics and further improve the reliability.

[0053] 2. The first electrical test position contact, the second electrical test position contact, and the third electrical test position contact are centrally arranged on the upper plane of the encapsulation carrier board, which facilitates the probe to contact and measure from top to bottom, being more convenient and accurate. Moreover, after testing, the connection of the endpoints of multiple test points is simple and stable, without affecting the characteristics of the LED component.

[0054] 3. In the second embodiment, by adding the fourth electrical test position contact, the electrical characteristics of the light-emitting diode die under reverse bias can be measured in the presence of the Zener diode. Also, it is possible to determine whether there is reverse bias leakage current after applying high-temperature aging and ESD testing, which helps to improve the reliability of the light-emitting diode die 10.

[0055] 4. In the second embodiment, the function of the Zener diode can be tested to avoid the failure of the overall component due to the failure of the Zener diode.

Claims

1. A vertical light-emitting diode die package having an electrically detectable position, characterized in that, it comprises: a light-emitting diode die having a die conductive base structure, an interface lateral extension structure, a semiconductor epitaxial structure, an N-type electrode and a P-type shunt detection electrode, wherein the die conductive base structure has a P-type main electrode on the lower side, the interface lateral extension structure is provided on a side of the die conductive base structure away from the P-type main electrode, the semiconductor epitaxial structure and the P-type shunt detection electrode are respectively provided on the upper plane of the interface lateral extension structure, an ohmic contact is achieved between the semiconductor epitaxial structure and the die conductive base structure through the interface lateral extension structure, and the N-type electrode is provided on a side of the semiconductor epitaxial structure away from the die conductive base structure; the die conductive base structure further has a structural metal layer, a replacement substrate adhesive layer and a high thermal conductivity replacement substrate, the structural metal layer is located below the interface lateral extension structure, the high thermal conductivity replacement substrate is adhered to the lower side of the structural metal layer by the replacement substrate adhesive layer, and the P-type main electrode is provided below the high thermal conductivity replacement substrate; a packaging carrier having an upper side plane and a lower side plane on both sides, an anode and a cathode are provided on the lower side plane, and a main component first electrode, a main component second electrode, a main component third electrode, an electrical test first position contact point, an electrical test second position contact point and an electrical test third position contact point are provided on the upper side plane, wherein the N-type electrode and the main component first electrode are electrically connected by a die first bonding wire metal, the P-type shunt detection electrode and the main component second electrode are electrically connected by a die second bonding wire metal, the P-type main electrode is electrically connected by directly bonding to the main component third electrode through a carrier die bonding adhesive layer, and the electrical test first position contact point is electrically connected to the main component first electrode and the cathode, the electrical test second position contact point is electrically connected to the main component second electrode, and the electrical test third position contact point is electrically connected to the main component third electrode and the anode.

2. The vertical light-emitting diode die package according to claim 1, characterized in that, the packaging carrier further comprises a sub-component first electrode, a sub-component second electrode and an electrical test fourth position contact point, wherein the sub-component first electrode is electrically connected to the electrical test first position contact point, the sub-component second electrode is electrically connected to the electrical test fourth position contact point, and a Zener diode is electrically connected between the sub-component first electrode and the sub-component second electrode.

3. The vertical light-emitting diode die package according to claim 2, characterized in that, the Zener diode is a unidirectional diode, and the Zener diode is connected in parallel with the light-emitting diode die in the opposite polarity.

4. The vertical light-emitting diode die package according to claim 2, characterized in that, the electrical test second position contact point, the electrical test third position contact point and the electrical test fourth position contact point are electrically connected together through a conductive metal.

5. The vertical light-emitting diode die package according to claim 4, wherein, it further includes a packaging material, and the packaging material covers and packages the upper side plane of the packaging carrier board.

6. The vertical light-emitting diode die package according to claim 2, wherein, it further includes a first packaging material, and the first packaging material covers the light-emitting diode die, the first wire bonding metal of the die, the second wire bonding metal of the die, the Zener diode, the first electrode of the main element, the second electrode of the main element, the third electrode of the main element, the first electrode of the auxiliary element, and the second electrode of the auxiliary element.

7. The vertical light-emitting diode die package according to claim 6, wherein, the second electrical test position contact, the third electrical test position contact, and the fourth electrical test position contact are electrically connected through a conductive metal.

8. The vertical light-emitting diode die package according to claim 7, wherein, it further includes a second packaging material, and the second packaging material covers the conductive metal, the first electrical test position contact, the second electrical test position contact, the third electrical test position contact, and the fourth electrical test position contact.

9. The vertical light-emitting diode die package according to claim 1, wherein, the first electrode of the main element and the cathode are electrically connected through a first conductive metal of the carrier board that penetrates the packaging carrier board, and the third electrode of the main element and the anode are electrically connected through a second conductive metal of the carrier board that penetrates the packaging carrier board.

10. The vertical light-emitting diode die package according to claim 1, wherein, the semiconductor epitaxial structure includes a P-type semiconductor, an active layer, and an N-type semiconductor stacked in sequence, wherein the N-type electrode is located on the N-type semiconductor, and the P-type semiconductor and the P-type shunt detection electrode are located at different positions of the interface lateral extension structure.

11. The vertical light-emitting diode die package according to claim 10, wherein, the interface lateral extension structure includes a high-conductive metal layer, an ohmic contact layer, and a high-concentration P-type semiconductor conductive layer stacked in sequence, and the P-type shunt detection electrode is located outside the edge of the interface lateral extension structure.

12. The vertical light-emitting diode die package according to claim 11, wherein, the high-conductive metal layer is located above the structural metal layer, and the P-type semiconductor and the P-type shunt detection electrode are respectively located on the high-concentration P-type semiconductor conductive layer.

13. The vertical light-emitting diode die package according to claim 11, wherein, the high-conductive metal layer is located above the structural metal layer, the P-type semiconductor is located on the high-concentration P-type semiconductor conductive layer, and the P-type shunt detection electrode is located on the ohmic contact layer.

14. The vertical light-emitting diode die package according to claim 11, wherein, the high-conductive metal layer is located above the structural metal layer, the P-type semiconductor is located on the high-concentration P-type semiconductor conductive layer, and the P-type shunt detection electrode is located on the high-conductive metal layer.

15. The vertical light-emitting diode die package according to claim 11, wherein, the ohmic contact layer is composed of an ohmic contact metal and a transparent material, and the ohmic contact metal is in a plurality of columnar structures.

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