Circuit board and method for manufacturing the same

Abstract

A circuit board and a manufacturing method thereof, the method comprising providing a circuit substrate, comprising a first dielectric layer, a first circuit layer, a first copper layer, a metal protective layer, a second dielectric layer and a second circuit layer, wherein along the stacking direction of the circuit substrate, the projection of the metal protective layer covers part of the first circuit layer, and the projection of the second circuit layer is located outside the metal protective layer; slotting the second dielectric layer to expose the metal protective layer; removing the metal protective layer to form a receiving cavity; providing a first component, loading it into the receiving cavity; providing a second component, loading it into the receiving cavity and placing it on the first component; providing a first copper-clad laminate, pressing it onto the surface of the second circuit layer, the first copper-clad laminate comprising a third dielectric layer and a second copper layer, the third dielectric layer filling the receiving cavity; patterning the first copper layer to form a third circuit layer electrically connected to the first component, and patterning the second copper layer to form a fourth circuit layer electrically connected to the second component, thereby obtaining a circuit board.

Description

Technical Field

[0001] The present invention relates to a printed circuit board technology, and in particular to a circuit board and a manufacturing method thereof. Background Art

[0002] With the multifunctionalization of electronic devices, the installation area of ​​the packaging structure in the electronic devices is further compressed. Therefore, the circuit board after packaging must meet the requirements of being light, thin and short, as well as the requirements of being multifunctional.

[0003] However, most existing circuit board packaging structures are large in size, have a small number of installed electronic components, and have low space utilization, making it difficult to meet the above requirements. Summary of the invention

[0004] In view of this, in order to overcome at least one of the above-mentioned defects, it is necessary to provide a method for manufacturing a circuit board.

[0005] In addition, the present invention also provides a circuit board manufactured by the above manufacturing method.

[0006] The present invention provides a method for manufacturing a circuit board, comprising the steps of:

[0007] A circuit substrate is provided, comprising a first dielectric layer, a first circuit layer embedded in and exposed in a first surface of the first dielectric layer, a first copper layer arranged on the first surface and covering the first circuit layer, a metal protective layer arranged on a second surface of the first dielectric layer facing away from the first circuit layer, at least one second dielectric layer formed on the second surface, and a second circuit layer arranged on a side of each second dielectric layer facing away from the first dielectric layer, wherein the second dielectric layer covers the metal protective layer, and along the stacking direction of the circuit substrate, the projection of the metal protective layer covers a portion of the first circuit layer, and the projection of the second circuit layer is located outside the metal protective layer.

[0008] Opening a groove on each of the second dielectric layers to expose the metal protection layer;

[0009] The metal protection layer is removed to form a receiving cavity.

[0010] At least one first component is provided and loaded into the accommodating cavity.

[0011] At least one second component is provided, which is loaded into the receiving cavity and placed on the first component.

[0012] A first copper-clad laminate is provided and pressed onto a side of the second circuit layer away from the first circuit layer. The first copper-clad laminate comprises a third dielectric layer and a second copper layer. The third dielectric layer is filled in the accommodating cavity.

[0013] And, patterning the first copper layer to form a third circuit layer, the third circuit layer is electrically connected to the first component, patterning the second copper layer to form a fourth circuit layer, the fourth circuit layer is electrically connected to the second component, so as to obtain the circuit board.

[0014] In the implementation manner of the present application, the production of the circuit substrate includes the following steps:

[0015] A carrier is provided. The carrier includes a substrate layer and a peeling layer located on at least one surface of the substrate layer. The first copper layer is formed on at least one surface of the peeling layer away from the substrate layer.

[0016] The first circuit layer is formed on a surface of the first copper layer facing away from the carrier board.

[0017] A second copper clad laminate is provided, wherein the second copper clad laminate includes the first dielectric layer and a third copper layer located on the second surface of the first dielectric layer. The second copper clad laminate is covered and pressed on the surface of the first circuit layer facing away from the carrier board, and the first circuit layer is embedded in the first dielectric layer.

[0018] A portion of the third copper layer is removed to form the metal protection layer, and along the stacking direction of the carrier board, the projection of the metal protection layer covers a portion of the first circuit layer.

[0019] At least one third copper clad laminate is provided, each of the third copper clad laminates comprises the second dielectric layer and a fourth copper layer located on the surface of the second dielectric layer, the third copper clad laminate is covered on the second surface of the first dielectric layer and pressed, the metal protective layer is embedded in the second dielectric layer, the fourth copper layer is patterned to form the second circuit layer, and along the stacking direction of the carrier board, the projection of each second circuit layer is located on the outside of the metal protective layer.

[0020] And, the carrier board is removed to obtain the circuit substrate.

[0021] In an embodiment of the present application, the second circuit layer includes a bottom circuit layer and an electroplated circuit layer, the bottom circuit layer is located on a surface of the second dielectric layer, and the electroplated circuit layer is located on a surface of the bottom circuit layer away from the second dielectric layer; the method for manufacturing the circuit substrate further includes:

[0022] The electroplating circuit layer is formed by electroplating on the surface of the fourth copper layer.

[0023] And, patterning the fourth copper layer to form the bottom wiring layer, thereby obtaining the second wiring layer.

[0024] In the implementation manner of the present application, before forming the third circuit layer and the fourth circuit layer, the manufacturing method further includes the step of forming a via hole.

[0025] In the implementation manner of the present application, a laser is used to create grooves on each of the second dielectric layers.

[0026] In the implementation manner of the present application, the electrical connection end of each of the first elements faces the third circuit layer, and the electrical connection end of each of the second elements faces the fourth circuit layer.

[0027] In the embodiment of the present application, after the first element is loaded into the accommodating cavity, the manufacturing method further includes:

[0028] A colloid is coated on a surface of the first element that is away from the first dielectric layer.

[0029] In the implementation mode of the present application, it also includes:

[0030] At least one fifth circuit layer is formed by adding layers on a side of the third circuit layer and / or the fourth circuit layer away from the first dielectric layer, and each of the fifth circuit layers is electrically connected to the third circuit layer and / or the fourth circuit layer.

[0031] In the embodiment of the present application, the specific steps of removing the metal protective layer include:

[0032] A dry film is coated on a surface of the third circuit layer that is away from the first circuit layer.

[0033] The dry film is exposed and developed to remove the metal protection layer exposed to the dry film.

[0034] and removing the dry film.

[0035] In the implementation manner of the present application, the first circuit layer is in contact with and electrically connected to the third circuit layer.

[0036] The present invention also provides a circuit board, which includes: a circuit substrate, a receiving cavity, at least one first element, at least one second element, a third dielectric layer and a fourth circuit layer. The circuit substrate includes: a first dielectric layer, including a first surface and a second surface arranged oppositely; a first circuit layer, embedded in and exposed to the first surface of the first dielectric layer; at least one second dielectric layer, arranged on the second surface of the first dielectric layer; a second circuit layer, arranged on the side of each second dielectric layer away from the first dielectric layer; a third circuit layer, arranged on the first surface and covering part of the first circuit layer; the receiving cavity is arranged through each second dielectric layer, along the stacking direction of the circuit substrate, the projection of the receiving cavity covers part of the first circuit layer, and the second circuit layer is located outside the receiving cavity; each of the first elements is arranged in the receiving cavity, and each of the first elements is electrically connected to the third circuit layer; each of the second elements is arranged in the receiving cavity and placed on the first element; the third dielectric layer is arranged on the side of the second circuit layer away from the first circuit layer, and the third dielectric layer extends into the receiving cavity; the fourth circuit layer is arranged on the side of the third dielectric layer away from the second circuit layer, and the fourth circuit layer is electrically connected to the second element.

[0037] Compared with the prior art, the manufacturing method of the circuit board provided by the present invention buries the first circuit layer in the circuit substrate, which can effectively prevent the first circuit layer from being oxidized; a metal protective layer is provided, which can effectively avoid damaging the first circuit layer in the process of forming the accommodating cavity, and can also improve the depth control accuracy of the accommodating cavity; in the process of forming the accommodating cavity, there is no glue stripping process, which can prevent the surface of the first circuit layer from being contaminated by residual glue; multiple components can be accommodated in the accommodating cavity, and double-sided conduction can be achieved, which improves the component installation density of the circuit board, improves the space utilization rate of the circuit board, and is conducive to meeting the multifunctionality and lightness, thinness and miniaturization of the circuit board. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 A schematic structural diagram of a carrier board and a first copper layer provided in an embodiment of the present invention.

[0039] Figure 2 and Figure 3 For Figure 1 The schematic diagram of forming a first circuit layer on the surface of the first copper layer is shown.

[0040] Figure 4 For Figure 3 The schematic diagram of the second copper clad laminate being pressed onto the surface of the first circuit layer is shown.

[0041] Figure 5 and Figure 6 To remove Figure 4 A schematic diagram showing a portion of the third copper layer forming a metal protection layer.

[0042] Figure 7 and Figure 8 For Figure 6 The schematic diagram of the second circuit layer is shown by adding layers on the surface of the first dielectric layer.

[0043] Fig. 9 For Figure 8 A schematic diagram of removing the circuit substrate from the carrier is shown.

[0044] Fig.10 A schematic structural diagram of a circuit substrate provided in one embodiment of the present invention.

[0045] Fig.11 For Fig.10 A schematic diagram of a groove is shown in the second dielectric layer to expose the metal protection layer.

[0046] Fig.12 and Fig.13 To remove Fig.11 Schematic diagram of a metal protective layer formed into a receiving cavity.

[0047] Fig.14 For Fig.13 A schematic diagram of installing a first component in the accommodating cavity is shown.

[0048] Fig.15 For Fig.14 A schematic diagram of arranging a colloid on a first element is shown.

[0049] Fig.16 For Fig.15 A schematic diagram of a second element being arranged on the colloid in the containing cavity is shown.

[0050] Fig.17 For Fig.16 The schematic diagram shown is that the first copper clad laminate is pressed onto the surface of the second dielectric layer facing away from the first circuit layer.

[0051] Fig.18 For Fig.17 Schematic diagram of drilling holes on the first copper clad laminate and the third copper clad laminate shown.

[0052] Fig.19 For patterning Fig.18 The first copper layer and the fourth copper layer are schematic diagrams of forming the third circuit layer and the fourth circuit layer respectively.

[0053] Fig. 20 A schematic diagram of the structure of a circuit board provided in one embodiment of the present invention.

[0054] Main component symbols

[0055] Circuit board 100 Carrier board 20

[0056] Circuit substrate 10 Base material layer 21

[0057] First dielectric layer 11 Stripping layer 22

[0058] First surface 111 Dry films 30, 30a, 30b

[0059] Second surface 112 Second copper clad plate 40

[0060] First circuit layer 12 Third copper layer 41

[0061] First copper layer 13 Third copper clad plate 50

[0062] Metal protection layer 14 Fourth copper layer 51

[0063] Second dielectric layer 15 Accommodating cavity 60

[0064] Second circuit layer 16 First element 71

[0065] Bottom circuit layer 161 Second component 72

[0066] Electroplating circuit layer 162 Colloid 73

[0067] The third circuit layer 17 The first copper clad plate 80

[0068] Through holes 171, 181 Third dielectric layer 81

[0069] Conductive pillars 172, 182 Second copper layer 82

[0070] Fourth circuit layer 18 Fourth dielectric layer 90

[0071] Fifth circuit layer 19 Direction a

[0072] The following specific implementation manner will further illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0073] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0074] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0075] An embodiment of the present invention provides a method for manufacturing a circuit board 100, and the method specifically includes the following steps:

[0076] Step S1, see Figures 1 to 10 , a circuit substrate 10 is provided, the circuit substrate 10 includes a first dielectric layer 11, a first circuit layer 12, a first copper layer 13, a metal protective layer 14, at least one second dielectric layer 15 and at least one second circuit layer 16. The first dielectric layer 11 includes a first surface 111 and a second surface 112 arranged opposite to each other, the first circuit layer 12 is embedded in and exposed to the first surface 111 of the first dielectric layer 11, the first copper layer 13 is located on the first surface 111 and covers the first circuit layer 12. The metal protective layer 14 is located on the second surface 112, and along the stacking direction a of the circuit substrate 10, the metal protective layer 14 covers a part of the first circuit layer 12. The second dielectric layer 15 is located on the side of the first dielectric layer 11 away from the first circuit layer 12, and the second circuit layer 16 is located on the side of the second dielectric layer 15 away from the first dielectric layer 11, and along the direction a, the projection of the second circuit layer 16 is located outside the metal protective layer 14.

[0077] The first circuit layer 12 is embedded in the first dielectric layer 11 , and the first copper layer 13 covers the first circuit layer 12 exposed on the surface of the first dielectric layer 11 , which can effectively prevent the first circuit layer 12 from being oxidized and damaged.

[0078] The material of the first dielectric layer 11 may be, but is not limited to, one of polyimide (PI), glass fiber epoxy resin (FR4), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethylene (PE) and the like.

[0079] In some embodiments, the first circuit substrate 10 may also be a multi-layer circuit substrate, that is, the first circuit substrate 10 further includes at least one other circuit layer buried in the first dielectric layer 11 and stacked with the first circuit layer 12 .

[0080] In this embodiment, the circuit substrate 10 can be manufactured by the following steps:

[0081] Step S11: Please refer to Figure 1 , a carrier board 20 is provided, wherein the carrier board 20 includes a substrate layer 21 and a peeling layer 22 located on at least one surface of the substrate layer 21 , and a first copper layer 13 is formed on a surface of the peeling layer 22 away from the substrate layer 21 .

[0082] The base material layer 21 is a carrier plate for forming the circuit substrate 10, and the material of the base material layer 21 is not limited. The peeling layer 22 serves to temporarily bond the base material layer 21 and the first copper layer 13, and the peeling layer 22 is an insulating material, and the peeling layer 22 can be made of a colloid that is easily separated or removed in subsequent processing.

[0083] In this embodiment, the peeling layers 22 are disposed on two opposite surfaces of the substrate layer 21 , and the first copper layer 13 is formed on the surface of each of the peeling layers 22 .

[0084] Step S12: Please refer to Figure 2 as well as Figure 3 A first circuit layer 12 is formed on a surface of the first copper layer 13 facing away from the carrier 20 .

[0085] Specifically, the surface of the first copper layer 13 is covered with a dry film 30 , which is then exposed and developed, and then electroplated on the surface of the first copper layer 13 to form the first circuit layer 12 , and finally the undeveloped dry film 30 is removed.

[0086] Step S13: Please refer to Figure 4 , providing a second copper clad laminate 40, the second copper clad laminate 40 includes a first dielectric layer 11 and a third copper layer 41 located on the surface of the first dielectric layer 11, and the second copper clad laminate 40 is covered and pressed on the surface of the first circuit layer 12 away from the carrier 20, and the first circuit layer 12 is embedded in the first dielectric layer 11.

[0087] In this embodiment, the number of the second copper clad laminates 40 is two, and the second copper clad laminates 40 are respectively pressed onto the surfaces of the first circuit layer 12 on two opposite surfaces of the carrier 20 .

[0088] Step S14: Please refer to Figure 5 and Figure 6 , a portion of the third copper layer 41 is removed to form the metal protection layer 14 . Along the direction a, the projection of the metal protection layer 14 covers a portion of the first circuit layer 12 .

[0089] A dry film 30a is covered on the surface of the third copper layer 41. The dry film 30a is used to remove part of the third copper layer 41 after exposure and development, and the remaining part of the third copper layer 41 (i.e., the metal protective layer 14) is projected along the direction a so that the projection of the metal protective layer 14 covers part of the first circuit layer 12. In the subsequent step of forming the accommodating cavity 60, the metal protective layer 14 protects the first circuit layer 12 from being damaged.

[0090] Step S15: Please refer to Figure 7 and Figure 8 , combined with reference Fig. 9 , at least one third copper clad laminate 50 is provided, each of the third copper clad laminates 50 includes the second dielectric layer 15 and the fourth copper layer 51 located on the surface of the second dielectric layer 15, the third copper clad laminate 50 is covered and pressed on the surface of the first dielectric layer 11 away from the carrier 20, and the metal protective layer 14 is embedded in the second dielectric layer 15. The fourth copper layer 51 is patterned to form the second circuit layer 16, and along the direction a, the projection of each second circuit layer 16 is located outside the metal protective layer 14.

[0091] In this embodiment, the number of the third copper-clad laminates 50 is two, and a layer of the second circuit layer 16 can be formed by laminating a layer of the third copper-clad laminate 50 on the surface of the first dielectric layer 11. Figure 8 Then, a third copper clad plate 50 is laminated in the same manner to form another second circuit layer 16, as shown in FIG. Figure 8 and Fig. 9 shown.

[0092] It can be understood that two adjacent second circuit layers 16 and the second circuit layer 16 and the first circuit layer 12 can be electrically connected to each other through a via hole (not shown).

[0093] Furthermore, the second circuit layer 16 includes a bottom circuit layer 161 and a plated circuit layer 162, wherein the bottom circuit layer 161 is located on the surface of the second dielectric layer 15, and the plated circuit layer 162 is located on the surface of the bottom circuit layer 161 away from the second dielectric layer 15; in this embodiment, the manufacturing method of the second circuit layer 16 includes:

[0094] The surface of the fourth copper layer 52 is covered with dry film 30a, exposed and developed, and electroplated to form the electroplated circuit layer 162 and the bottom circuit layer 161, thereby obtaining the second circuit layer 16. In this embodiment, the electroplated circuit method is used to make the thickness of the second circuit layer 16 meet the actual circuit thickness requirements.

[0095] Step S16: Please refer to Fig. 9 and Fig.10 , remove the carrier board 20 to obtain the circuit substrate 10.

[0096] In this embodiment, after removing the carrier board 20 , the number of the circuit substrates 10 obtained is two.

[0097] Furthermore, the manufacturing step of the circuit substrate 10 further includes the step of forming a via hole (not shown) to electrically connect the first circuit layer 12 with the second circuit layer 16 formed subsequently. The step of forming the via hole may be performed before or after the step of removing the carrier 20.

[0098] Step S2: Please refer to Fig.11 , a groove is formed on each of the second dielectric layers 15 to expose the metal protection layer 14 .

[0099] A portion of the first circuit layer 12 is covered by the metal protection layer 14 , so that when the second dielectric layer 15 is removed, the first circuit layer 12 is prevented from being damaged, thereby protecting the first circuit layer 12 .

[0100] In the projection area of ​​the metal protection layer 14 on the second dielectric layer 15 , the second dielectric layer 15 may be removed by laser to form a precursor of the accommodating cavity 60 , thereby preventing the first circuit layer 12 from being etched by the laser.

[0101] Step S3: Please refer to Fig.12 and Fig.13 , the metal protection layer 14 is removed to form a receiving cavity 60 .

[0102] The surface of the second circuit layer 16 away from the first circuit layer 12 is covered with a dry film 30b, the dry film 30b is exposed and developed, the metal protective layer 14 exposed to the dry film 30b is removed, and then the dry film 30b is removed to form the accommodating cavity 60. The accommodating cavity 60 penetrates all the second dielectric layers 15, wherein the second surface 112 of the first dielectric layer 11 constitutes the bottom of the accommodating cavity 60. In addition, the surface of the metal protective layer 14 is relatively flat, and when the metal protective layer 14 is removed to form the accommodating cavity 60, the depth of the accommodating cavity 60 can be more accurately controlled.

[0103] It can be understood that in other embodiments, the accommodating cavity 60 can also be formed by machining.

[0104] Step S4: Please refer to Fig.14 , provide at least one first element 71 and load it into the accommodating cavity 60.

[0105] The electrical connection end of the first element 71 faces the first circuit layer 12 to facilitate electrical connection in subsequent steps.

[0106] Step S5: Please refer to Fig.15 and Fig.16 , provide at least one second element 72, load it into the accommodating cavity 60 and place it on the first element 71.

[0107] The electrical connection end of the second element 72 faces away from the first circuit layer 12 .

[0108] In this embodiment, before the second element 72 is installed, the manufacturing method further includes:

[0109] The surface of the first element 71 away from the first circuit layer 12 is coated with a colloid 73. Specifically, the colloid 73 may be an insulating glue, which may further fix the first element 71 and the second element 72, and provide stability for the first element 71 and the second element 72 in the accommodation cavity 60.

[0110] Step S6: Please refer to Fig.17 , providing a first copper clad laminate 80, which is pressed onto the side of the second circuit layer 16 away from the first circuit layer 12, the first copper clad laminate 80 includes a third dielectric layer 81 and a second copper layer 82, and the third dielectric layer 81 is filled in the accommodating cavity 60.

[0111] The third dielectric layer 81 flows and fills the area between the second circuit layers 16 and the accommodating cavity 60. The second circuit layer 16, the first component 71 and the second component 72 are all embedded in the third dielectric layer 81. The third dielectric layer 81 can fix the first component 71 and the second component 72.

[0112] In this embodiment, the third dielectric layer 81 can be selected from at least one of prepreg, epoxy resin, polyurethane, phenolic resin, urea-formaldehyde resin, melamine-formaldehyde resin, unsaturated resin, polyimide and the like.

[0113] Step S7: Please refer to Figures 18 to 20 , patterning the first copper layer 13 to form a third circuit layer 17, the third circuit layer 17 is electrically connected to the first component 71, patterning the second copper layer 82 to form a fourth circuit layer 18, the fourth circuit layer 18 is electrically connected to the second component 72, thereby obtaining the circuit board 100.

[0114] In this embodiment, a dry film is covered on the surface of the first copper layer 13, and then exposed, developed, and electroplated to form a third circuit layer 17. The third circuit layer 17 is in contact with a portion of the first circuit layer 12, and two circuits, the buried first circuit layer 12 and the third circuit layer 17 located on the surface of the first dielectric layer 11, are produced on the same dielectric layer. It is avoided to add another insulating layer between the two circuit layers, and the two circuit layers do not need to be provided with a conductive hole for electrical connection, so the production process is simpler, the efficiency of circuit board production is improved, the cost is lower, and it is beneficial to reduce the overall thickness of the circuit board, making the circuit board thinner.

[0115] In this embodiment, before forming the third circuit layer 17 , the method further includes forming a through hole 171 on the first copper layer 13 and the first dielectric layer 11 , and forming a conductive column 172 in the through hole 171 to electrically connect the third circuit layer 17 to the first element 71 .

[0116] A dry film is covered on the surface of the second copper layer 82, and a fourth circuit layer 18 is formed by exposure, development, and electroplating. Before forming the fourth circuit layer 18, the method also includes forming a through hole 181 on the second copper layer 82 and the third dielectric layer 81, and forming a conductive column 182 in the through hole 181 to electrically connect the fourth circuit layer 18 to the second component 72.

[0117] In this implementation, please refer to Fig. 20 , the manufacturing method further comprises:

[0118] A fourth copper-clad laminate (not shown) is laminated on the side of the third circuit layer 17 and / or the fourth circuit layer 18 away from the first dielectric layer 11, and the fourth copper-clad laminate includes a fourth dielectric layer 90 and a fifth copper layer (not shown), and the fifth copper layer is patterned to form a fifth circuit layer 19, and the fifth circuit layer 19 is electrically connected to the third circuit layer 17 and / or the fourth circuit layer 18. It can be understood that a multi-layer fifth circuit layer 19 can be formed by the above-mentioned layer-building method to meet actual needs.

[0119] See also Fig.19The present invention also provides a circuit board 100, which includes: a circuit substrate 10, a receiving cavity 60, at least one first component 71, at least one second component 72, a third dielectric layer 81 and a fourth circuit layer 18. The circuit substrate 10 includes: a first dielectric layer 11, a first circuit layer 12, at least one second dielectric layer 15, a second circuit layer 16 and a third circuit layer 17. The first dielectric layer 11 includes a first surface 111 and a second surface 112 that are oppositely arranged; the first circuit layer 12 is embedded in and exposed to the first surface 111 of the first dielectric layer 11; the second dielectric layer 15 is arranged on the second surface 112 of the first dielectric layer 11; the second circuit layer 12 is arranged on the side of each second dielectric layer 15 away from the first dielectric layer 11; the third circuit layer 17 is arranged on the first surface 111 and covers part of the first circuit layer 12. The accommodating cavity 60 is arranged to penetrate each of the second dielectric layers 15. Along the stacking direction of the circuit substrate 10, the projection of the accommodating cavity 60 covers part of the first circuit layer 12, and the second circuit layer 16 is located on the outside of the accommodating cavity 60; each of the first components 71 is arranged in the accommodating cavity 60, and each of the first components 71 is electrically connected to the third circuit layer 17; each of the second components 72 is arranged in the accommodating cavity 60 and placed on the first component 71; the third dielectric layer 81 is arranged on the side of the second circuit layer 16 away from the first circuit layer 12, and the third dielectric layer 81 extends into the accommodating cavity 60; the fourth circuit layer 18 is arranged on the side of the third dielectric layer 81 away from the second circuit layer 16, and the fourth circuit layer 18 is electrically connected to the second component 72.

[0120] In this implementation, please refer to Fig. 20 At least one fourth dielectric layer 90 and at least one fifth circuit layer 19 may be formed on the side of the third circuit layer 17 and the fourth circuit layer 18 away from the first dielectric layer 11, and each of the fifth circuit layers 19 may be electrically connected to the third circuit layer 17 or the fourth circuit layer 18.

[0121] In the manufacturing method of the circuit board 100 provided by the present invention, the first circuit layer 12 is buried in the circuit substrate 10, which can effectively prevent the first circuit layer 12 from being oxidized; the metal protective layer 14 is provided, which can effectively avoid damaging the first circuit layer 12 during the process of forming the accommodating cavity 60, and can also improve the depth control accuracy of the accommodating cavity 60; in the process of forming the accommodating cavity 60, there is no stripping process, which can prevent the surface of the first circuit layer 12 from being contaminated by residual glue; multiple components can be accommodated in the accommodating cavity 60, and double-sided conduction can be achieved, thereby improving the component installation density of the circuit board 100 and the space utilization rate of the circuit board 100, which is conducive to meeting the multifunctionality and lightness, thinness and miniaturization of the circuit board 100.

Claims

1. A method for manufacturing a circuit board, characterized in that: Includes steps: A circuit substrate is provided, the circuit substrate comprising a first dielectric layer, a first circuit layer embedded in and exposed in a first surface of the first dielectric layer, a first copper layer provided on the first surface and covering the first circuit layer, a metal protective layer provided on a second surface of the first dielectric layer away from the first circuit layer, at least one second dielectric layer formed on the second surface, and a second circuit layer provided on a side of each second dielectric layer away from the first dielectric layer, the second dielectric layer covers the metal protective layer, along the stacking direction of the circuit substrate, the projection of the metal protective layer covers a portion of the first circuit layer, and the projection of the second circuit layer is located outside the metal protective layer; Opening a groove on each of the second dielectric layers to expose the metal protection layer; Removing the metal protective layer to form a receiving cavity; Providing at least one first element and placing it into the accommodating cavity; Providing at least one second element, loading it into the receiving cavity and placing it on the first element; Providing a first copper-clad laminate, and pressing it to the side of the second circuit layer away from the first circuit layer, the first copper-clad laminate comprising a third dielectric layer and a second copper layer, and the third dielectric layer is filled in the accommodating cavity; as well as The first copper layer is patterned to form a third circuit layer, the third circuit layer is electrically connected to the first component, and the third circuit layer is in contact with a portion of the first circuit layer, the third circuit layer is electrically connected to the first circuit layer, and the second copper layer is patterned to form a fourth circuit layer, the fourth circuit layer is electrically connected to the second component, thereby obtaining the circuit board, The production of the circuit substrate comprises the following steps: Providing a carrier board, the carrier board comprising a substrate layer and a peeling layer located on at least one surface of the substrate layer, and forming the first copper layer on at least one surface of the peeling layer away from the substrate layer; forming the first circuit layer on a surface of the first copper layer facing away from the carrier; Providing a second copper-clad laminate, the second copper-clad laminate comprising the first dielectric layer and a third copper layer located on the second surface of the first dielectric layer, covering and laminating the surface of the first circuit layer away from the carrier board with the second copper-clad laminate, and the first circuit layer being embedded in the first dielectric layer; Removing part of the third copper layer to form the metal protection layer, wherein along the stacking direction of the carrier board, the projection of the metal protection layer covers part of the first circuit layer; Providing at least one third copper-clad laminate, each of the third copper-clad laminates comprises the second dielectric layer and a fourth copper layer located on the surface of the second dielectric layer, the third copper-clad laminate is covered on the second surface of the first dielectric layer and pressed together, the metal protective layer is embedded in the second dielectric layer, the fourth copper layer is patterned to form the second circuit layer, and along the stacking direction of the carrier board, the projection of each second circuit layer is located outside the metal protective layer; and Removing the carrier board to obtain the circuit substrate; The second circuit layer includes a bottom circuit layer and an electroplated circuit layer, the bottom circuit layer is located on the surface of the second dielectric layer, and the electroplated circuit layer is located on the surface of the bottom circuit layer away from the second dielectric layer; the manufacturing method of the circuit substrate also includes: Forming the electroplated circuit layer by electroplating on the surface of the fourth copper layer; and The fourth copper layer is patterned to form the bottom wiring layer, thereby obtaining the second wiring layer.

2. The method for manufacturing a circuit board according to claim 1, wherein: Before forming the third circuit layer and the fourth circuit layer, the manufacturing method further includes a step of forming a via hole.

3. The method for manufacturing a circuit board according to claim 1, wherein: A laser is used to create grooves on each of the second dielectric layers.

4. The method for manufacturing a circuit board according to claim 1, wherein: The electrical connection end of each of the first elements faces the third circuit layer, and the electrical connection end of each of the second elements faces the fourth circuit layer.

5. The method for manufacturing a circuit board according to claim 1, wherein: After the first element is placed in the accommodating cavity, the manufacturing method further includes: A colloid is coated on a surface of the first element that is away from the first dielectric layer.

6. The method for manufacturing a circuit board according to claim 1, wherein: Also includes: At least one fifth circuit layer is formed by adding layers on a side of the third circuit layer and / or the fourth circuit layer away from the first dielectric layer, and each of the fifth circuit layers is electrically connected to the third circuit layer and / or the fourth circuit layer.

7. The method for manufacturing a circuit board according to claim 1, characterized in that: The specific steps of removing the metal protective layer include: Covering the surface of the third circuit layer away from the first circuit layer with a dry film; exposing and developing the dry film to remove the metal protective layer exposed to the dry film; and The dried film is removed.

8. A circuit board manufactured by the method for manufacturing a circuit board according to claim 1, characterized in that: include: A circuit substrate, the circuit substrate comprising: A first dielectric layer includes a first surface and a second surface that are oppositely disposed; a first circuit layer, embedded in and exposed to the first surface of the first dielectric layer; At least one second dielectric layer, disposed on the second surface of the first dielectric layer; A second circuit layer is provided on a side of each of the second dielectric layers away from the first dielectric layer; and a third circuit layer, disposed on the first surface and in contact with a portion of the first circuit layer, the third circuit layer being electrically connected to the first circuit layer; An accommodating cavity is arranged through each of the second dielectric layers, and along the stacking direction of the circuit substrates, the projection of the accommodating cavity covers part of the first circuit layer, and the second circuit layer is located outside the accommodating cavity; At least one first element, each of which is disposed in the accommodation cavity and is electrically connected to the third circuit layer; at least one second element, each of which is disposed in the accommodation cavity and placed on the first element; A third dielectric layer is disposed on a side of the second circuit layer away from the first circuit layer, and the third dielectric layer extends into the accommodating cavity; and The fourth circuit layer is arranged on a side of the third dielectric layer away from the second circuit layer, and the fourth circuit layer is electrically connected to the second element.

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