Power supply system, method of controlling a power supply system, and electronic device

Abstract

Provided are a power supply system, a method for controlling the power supply system, and an electronic device. The power supply system includes: a power supply chip configured to convert a first power supply voltage into a second power supply voltage, the power supply chip including an enable terminal; and a voltage dividing circuit, a voltage dividing terminal of the voltage dividing circuit being connected to the enable terminal, the voltage dividing circuit being configured to output, when the power supply chip is operating normally, a first voltage greater than or equal to a threshold voltage of the enable terminal, and to provide, when the power supply chip is operating abnormally, a second voltage less than the threshold voltage to the enable terminal.

Description

Technical Field

[0001] This application relates to the field of power supply technology, and more specifically, to a power supply system, a method for controlling the power supply system, and an electronic device. Background Technology

[0002] The power supply system provides power to various types of loads in electronic devices. When the power chip outputs abnormally, it is necessary to promptly control the power chip to stop enabling, in order to avoid damage to the power chip or the load.

[0003] The enabling and output anomaly handling of power supply chips are typically performed using control units such as MCUs. In response to an anomaly feedback from the power supply chip, the MCU initiates an interrupt routine, adjusting the input voltage at the enable terminal of the power supply chip to deactivate it. This control method is logically complex, resource-intensive, and has a slow response time. Summary of the Invention

[0004] This application provides a power supply system, a method for controlling the power supply system, and an electronic device. The various aspects involved in the embodiments of this application are described below.

[0005] In a first aspect, a power supply system is provided, comprising: a power chip for converting a first power supply voltage into a second power supply voltage, the power chip including an enable terminal; and a voltage divider circuit, the voltage divider terminal of the voltage divider circuit being connected to the enable terminal, the voltage divider circuit being configured to: when the power chip is operating normally, the voltage divider terminal outputs a first voltage greater than or equal to a threshold voltage of the enable terminal; and when the power chip is operating abnormally, provide a second voltage less than the threshold voltage to the enable terminal.

[0006] Secondly, a method for controlling a power supply system is provided, the power supply system comprising: a power chip for converting a first power supply voltage into a second power supply voltage, the power chip including an enable terminal; and a voltage divider circuit, the voltage divider terminal of the voltage divider circuit being connected to the enable terminal; the method comprising: when the power chip is operating normally, the voltage divider terminal outputs a first voltage greater than or equal to a threshold voltage of the enable terminal; and when the power chip is operating abnormally, the voltage divider terminal provides a second voltage less than the threshold voltage to the enable terminal.

[0007] Thirdly, an electronic device is provided, including a load device and a power supply system as described in the first aspect, the power supply system being used to supply power to the load device.

[0008] The power supply system provided in this application embodiment uses a voltage divider circuit connected to the enable pin of the power chip. This voltage divider circuit can output different voltages to the enable pin according to different states of the power chip, thereby enabling the power chip to stop enabling in a timely manner when the power chip outputs abnormally. This power supply system effectively improves the problems of high resource consumption and slow response speed inherent in MCU-based control methods by structural improvements to the external hardware circuitry of the power chip. Attached Figure Description

[0009] Figure 1 It is a schematic diagram of the power supply system.

[0010] Figure 2 yes Figure 1 A schematic diagram of the power supply system's handling process when an output abnormality occurs.

[0011] Figure 3 This is a schematic structural diagram of the power supply system provided in the embodiments of this application.

[0012] Figure 4 This is a schematic structural diagram of a power supply system provided in another embodiment of this application.

[0013] Figure 5 This is a circuit diagram of the first pin of the power supply chip in the power supply system provided in the embodiments of this application.

[0014] Figure 6 yes Figure 4 A schematic diagram of the MCU in the power supply system when it is in push-pull output mode.

[0015] Figure 7 yes Figure 4 A schematic diagram of the MCU in the power supply system in pull-up output mode.

[0016] Figure 8 This is a schematic flowchart of a method for controlling a power supply system provided in an embodiment of this application.

[0017] Figure 9 This is a schematic structural diagram of the electronic device provided in the embodiments of this application. Detailed Implementation

[0018] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0019] With the development of technology, modern electronic devices are being used more and more widely, and they are possessing more and more functions. The electronic devices mentioned in the embodiments of this application can be electrical devices composed of microelectronic devices. These electronic devices can be composed of electronic components such as integrated circuits, transistors, and vacuum tubes, and are devices that utilize electronic technology (including software) to function.

[0020] Electronic devices can be referred to as terminals, portable terminals, mobile terminals, communication terminals, portable communication terminals, portable mobile terminals, touchscreens, etc. For example, electronic devices can be smartphones, portable phones, game consoles, televisions, display units, head-up displays for vehicles, laptops, personal computers (PCs), personal media players (PMPs), personal digital assistants (PDAs), power banks (portable chargers), drones, e-readers, smart electronic devices (such as watches, bracelets, smart glasses, robot vacuums, etc.), and small electronic products (such as wireless headphones, Bluetooth speakers, electric toothbrushes, rechargeable wireless mice), etc. Electronic devices can also be portable communication terminals with wireless communication capabilities and pocket-sized designs. Furthermore, electronic devices can be flexible devices or flexible display devices. Electronic devices can communicate with external electronic devices such as servers, or perform operations through interoperability with external electronic devices. For example, an electronic device can send images captured by a camera and / or location information detected by a sensor unit to a server via a network.

[0021] Electronic devices typically include a power supply system to supply power to the loads within the electronic device. This power supply system typically includes a battery and a power chip, etc. The battery can be a lithium-ion battery or a lithium polymer battery. Of course, new types of batteries, such as graphene batteries, can also be used. This application does not specifically limit the use of such batteries.

[0022] The power chip can receive the battery's power supply voltage, perform at least one voltage conversion, and output the converted voltage to power the load in the electronic device.

[0023] The aforementioned power supply chip can be a DC power supply chip, an AC power supply chip, or an AC / DC conversion chip, to perform voltage conversion or rectification operations.

[0024] The voltage conversion mentioned in the embodiments of this application can be either boost or buck, and the embodiments of this application do not limit it in this way.

[0025] The load mentioned in the embodiments of this application can be various types of devices in electronic devices, such as processors, storage units, display components, and cameras. The embodiments of this application do not specifically limit this.

[0026] During the power supply process, the status of the power supply chip needs to be monitored. In case of abnormal output, the power supply must be cut off promptly to avoid irreversible damage to the load. By monitoring the output voltage of the power supply chip in real time, when the output is abnormal, such as irregular fluctuations or exceeding the preset voltage range, the input to the power supply chip can be cut off or the connection between the load and the power supply chip can be disconnected to prevent damage to the load due to abnormal output. This direct voltage detection method is complex to operate, requiring the addition of voltage detection devices and control loops to the existing power supply system, which impacts hardware costs.

[0027] It should be noted that most power chips include a power good (PG) pin, which is generally used to indicate whether the chip's output is normal.

[0028] Monitoring and protecting the power chip's output anomalies can be based on feedback from the aforementioned PG pin. The following section combines... Figure 1 The method will be illustrated with detailed examples. Figure 1 The power supply system 10 includes a power chip 11 and a micro controller unit (MCU) 12.

[0029] The power chip 11 includes an enable pin (i.e., Figure 1 The EN pin in the middle), the power good pin (i.e. Figure 1 The PG pin in the circuit, the power input pin (i.e. Figure 1 The IN pin and the power output pin (i.e.) Figure 1 (OUT pin in the middle).

[0030] The voltage provided by an external device (such as a battery) is input to the power chip 11 through the IN pin, processed, and then output to the load through the OUT pin, thereby powering the load.

[0031] The EN pin is the input terminal for the control signal of power supply chip 11. By controlling the input voltage of the EN pin, the power supply chip 11 can be turned on and off. For example, when the enable threshold voltage V of power supply chip 11... th When the voltage is 1.2V, if a voltage greater than 1.2V is input to the EN pin, the power chip 11 can start voltage conversion; when the input voltage of the EN pin is less than the threshold voltage of 1.2V, the power chip 11 stops outputting.

[0032] The PG pin uses an open-drain output pin of an internal comparator, whose output indicates whether the power supply chip 11 is operating normally. The state of the PG pin is controlled by the power management chip itself. When the chip output is normal, the PG pin is in a high-impedance state; when the chip output is abnormal, the PG pin is pulled low.

[0033] Therefore, the power chip output anomaly monitoring and protection based on PG pin feedback mentioned above can be achieved as follows: In response to a PG pin state change, when the PG pin state indicates an output anomaly in the power chip, the input voltage of the EN pin is pulled low, thereby shutting down the power chip. In other words, closed-loop control based on PG pin feedback can be implemented using an MCU12. Please refer to further details. Figure 1 The following is a detailed explanation of this control method.

[0034] MCU12 includes IO_1 and IO_2 ports. IO_1 is connected to the EN pin of power supply chip 11 to provide voltage to the EN pin. As mentioned earlier, when this voltage is greater than a threshold voltage, the power supply chip is enabled; when this voltage is less than the threshold voltage, the power supply chip stops working. In other words, chip protection in case of power supply chip output abnormalities can be achieved by adjusting the output voltage of IO_1.

[0035] The IO_2 port is connected to the PG pin, allowing the MCU12 to obtain the status of the PG pin or receive status parameters sent by the PG pin. As mentioned earlier, when the PG pin is in a high-impedance state, it indicates that the power supply chip 11 is working normally; when the PG pin is in a low-impedance state, it indicates that the power supply chip output is abnormal.

[0036] Therefore, in this method, MCU12 can adjust the input voltage of EN pin by reducing it when the power chip output is abnormal, based on the state of PG pin, so that the voltage is lower than the threshold voltage, thereby stopping the chip from being enabled.

[0037] Figure 1 The system shown has two operating modes. In one operating mode, the IO_2 port of MCU12 is configured as an interrupt input.

[0038] When the power chip is running normally, MCU12 controls the IO_1 port to output a high level. At this time, the EN pin of the power chip 11 is set to a high level, thereby enabling the power chip to output.

[0039] When the power chip output is abnormal, according to the internal circuit logic of the power chip 11, the PG pin is set to a low level, but the IO_2 port of MCU12 detects the low level and triggers an interrupt.

[0040] The MCU12 enters the interrupt service routine, sets the IO_1 port to a low level, thereby making the voltage on the EN pin less than the threshold voltage, and thus shutting down the output of the power chip.

[0041] The output exception handling process in this working mode is as follows: Figure 2 As shown, the time interval from the malfunction of power chip 11 to the EN pin on power chip 11 being pulled low depends on the timing of the corresponding interrupt from the MCU. In a typical application, this time is approximately 173.3 ns.

[0042] It's important to note that when an MCU executes each interrupt, it needs to respond with a corresponding handler function. This handler function is typically stored in the MCU's registers, but the MCU's storage resources are very limited. Furthermore, the number of interrupt sources supported by an MCU is usually limited. For example, the 8051 series MCUs only include two external interrupt sources and one serial port input / output interrupt source. When a large number of devices are connected to this MCU, it will lead to a severe shortage of terminal resources. Using the power supply chip's PG pin as a separate interrupt input is clearly not an optimal approach.

[0043] Therefore, as an alternative operating mode, to conserve MCU interrupt resources as much as possible, the MCU's IO_2 port can be configured as a normal input. The MCU checks the status of the IO_2 port at regular intervals to determine whether the power supply chip is functioning correctly at any given moment. For example, when the MCU detects that the IO_2 port is currently high, it can determine that the power supply chip is operating normally, and no intervention is needed to enable the chip. Conversely, when the MCU detects that the IO_2 port is currently low, it can determine that the power supply chip is malfunctioning. In this case, the output voltage of the IO_1 port can be pulled low, causing the voltage on the EN pin to fall below the threshold voltage, thereby shutting down the power supply chip.

[0044] In the methods described above, the polling approach is used to detect whether the power supply chip is operating correctly. This method is affected by the frequency with which the MCU polls the IO_2 port. It should be understood that an MCU contains multiple IO ports; therefore, the MCU does not only check the state of the IO_2 port, but frequently switches between multiple ports or checks the port's state at fixed time intervals. Simultaneously, the MCU is usually configured to execute other instructions. Therefore, in this case, the frequency with which the MCU polls the IO_2 port is often not very high, resulting in a slower process for the MCU to detect changes in the PG pin state of the power supply chip. In some scenarios with special requirements, such as devices with high voltage stability requirements, failure to respond promptly may lead to device damage. Therefore, in this operating mode, the MCU's time for handling anomalies may not meet the requirements.

[0045] In the power supply system mentioned above, the MCU adjusts the voltage of the EN pin in response to the feedback from the PG pin of the power chip, so as to control the power chip to stop enabling when the power chip is abnormal. This method has complex control logic, consumes a lot of resources, and takes a long time.

[0046] This application provides a power supply system, a method for controlling the power supply system, and an electronic device to solve the above-mentioned problems.

[0047] The power supply system provided in the embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0048] Figure 3 This is a schematic structural diagram of a power supply system provided in an embodiment of this application. The power supply system 30 includes a power chip 31 and a voltage divider circuit 32.

[0049] The power chip 31, also known as a power management chip, includes input pins and output pins. The input pin (also called the IN pin) can be connected to an external voltage source such as a battery to receive a first power supply voltage.

[0050] The power chip 31 includes a voltage conversion circuit for converting the received first power supply voltage into a second power supply voltage and outputting it through an output pin (also known as an OUT pin).

[0051] In some embodiments, the power chip 31 is a DC / DC power chip configured to perform DC voltage conversion, that is, to step down or step up the first power supply voltage to obtain a second power supply voltage, and output it through the OUT pin.

[0052] Alternatively, in some embodiments, the power chip 31 may also be an AC (AC / AC) power chip for converting AC voltage, such as rectifying and / or stepping down (or stepping up) the first AC power supply voltage to obtain a second power supply voltage, and outputting the second power supply voltage through the OUT pin.

[0053] Alternatively, in some embodiments, the power chip 31 can also be an AC / AC or AC / DC power chip to convert AC voltage to DC voltage. For example, the power chip 31 can convert a first DC power supply voltage to a second AC power supply voltage; or, it can convert a first AC power supply voltage to a second DC power supply voltage. It should be understood that the DC / AC or AC / DC power chip can also adjust the voltage value while performing AC / DC conversion, for example, by boosting or bucking the input first power supply voltage.

[0054] In this embodiment, the power supply chip 31 has an enable pin (also known as an EN pin). The EN pin has a certain threshold voltage, which allows the power supply chip 31 to be turned on (also known as enabled) and off based on the threshold voltage. For example, when the input voltage V of the enable pin... en Greater than or equal to the threshold voltage V th When the enable pin's input voltage V is reached, the power chip can be started, thereby converting between the first and second power supply voltages; and when the enable pin's input voltage V... en Less than the threshold voltage V th At this time, power chip 31 is turned off.

[0055] It should be noted that the threshold voltage V mentioned above... th The specific value can vary depending on the power chip model or configuration, as shown above. Figure 1 The threshold voltage V of the power chip 11 in the middle th It is 1.2V.

[0056] Continue reading Figure 3 The power supply system 30 in the above embodiments of this application further includes a voltage divider circuit 32. The voltage divider circuit 32 has a voltage divider terminal 321 connected to the EN pin of the power chip 31, for providing input voltage to the power chip 31.

[0057] The voltage divider circuit is configured such that when the power chip 31 is working normally, the voltage divider terminal 321 outputs a first voltage to the EN pin, which is greater than or equal to the threshold voltage of the enable terminal, thereby maintaining the normal operation of the power chip 31; and when the power chip 31 is malfunctioning, the output voltage of the voltage divider terminal 321 is reduced from the first voltage to a second voltage, which is configured to be less than the threshold voltage of the EN pin, thereby stopping the enable of the power chip 31.

[0058] The power supply system provided in this application embodiment uses a voltage divider circuit connected to the enable pin of the power chip. This voltage divider circuit can output different voltages to the enable pin according to different states of the power chip, thereby enabling the power chip to stop enabling in a timely manner when the power chip outputs abnormally. This power supply system effectively improves the problems of high resource consumption and slow response speed inherent in MCU-based control methods by structural improvements to the external hardware circuitry of the power chip.

[0059] Please refer to the following: Figure 4 In some embodiments of this application, the power chip 31 further includes a first pin 311, which can be a pin with multiple states. For example, the first pin can have a high-resistance state and a low-resistance state (or a pull-down state). The high-resistance state can also be understood as an off state or a cut-off state. When in the high-resistance state, the first pin is disconnected from the internal circuitry of the power chip 31. The low-resistance state can also be understood as a conducting state; when the first pin is in the low-resistance state, it is connected to the internal circuitry.

[0060] The first pin 311 can be a newly introduced pin to enable control of the power supply chip 31, or it can reuse an existing pin in the power supply chip 31. For example, the first pin 311 can be the power good (PG) pin in the power supply chip.

[0061] The following is combined Figure 5 Taking the first pin 311 as the PG pin as an example, the specific implementation of the first pin will be explained in more detail.

[0062] Figure 5 yes Figure 1 A schematic diagram of the circuitry for the PG pin of the power supply chip. (See diagram below.) Figure 5 As shown, the PG pin is an open-drain output pin of an internal comparator. The output of the PG pin indicates whether the chip's output is normal. An open-drain circuit refers to a circuit that outputs from the drain of a MOSFET. An open-drain output can only output a low level; a pull-up resistor is required to output a high level.

[0063] The PG pin is controlled by the power management chip itself and can have three states. It will turn off the MOSFET, in which case the PG pin remains in a high-impedance state. If an external pull-up resistor is connected to the internal bias supply VCC pin (a pin of the power management chip), the PG pin will be pulled high after a 200µs delay when the voltage VFB signal at the feedback pin is higher than 92% of the reference voltage VREF. The resistance from the power supply to the device pin is the pull-up resistor; this pin is high when no sensor is connected or when it is in a high-impedance state. During normal operation, when the voltage VFB signal at the feedback pin is lower than 87% of the reference voltage VREF, the PG pin will be pulled low after a 50µs delay. If the input voltage at the EN pin drops (e.g., below the EN pin threshold voltage of 1.2V), the PG pin will be pulled low immediately. The PG pin will also be pulled low immediately if over-temperature protection (OTP), under-voltage lockout (UVLO), or output over-voltage protection occurs.

[0064] When the voltage at the EN pin is greater than or equal to its threshold voltage, the EN pin controls the power supply chip to perform voltage conversion and output a second power supply voltage. At this time, the PG pin is in a high-impedance state. When the voltage at the EN pin of the power supply chip is less than its threshold voltage, the power supply chip stops providing output voltage, and the PG pin is pulled low.

[0065] Please refer to the following again. Figure 4 The voltage divider circuit in the embodiments of this application will be described in more detail. Figure 4 The voltage divider circuit 32 shown includes a first resistor 322 and a second resistor 323 connected in series. The voltage divider terminal 321 mentioned above is located between the first resistor 322 and the second resistor 323 and is connected to the EN pin of the power supply chip.

[0066] The voltage divider circuit further includes an input terminal 324 disposed at the first end of the first resistor 322, wherein the first end of the first resistor 322 is the side of the first resistor 322 away from the voltage divider terminal 321.

[0067] Input terminal 324 is used to receive external input voltage V. IO The input voltage V IO After passing through the first resistor 322, the voltage is output from the voltage divider terminal 321 to the EN pin of the power chip 31; the second end of the second resistor 323, which is away from the voltage divider terminal 321, is connected to the first pin 311 of the power chip 31.

[0068] Among them, the input voltage V at input terminal 324 IOThe voltage can be provided by an external voltage source, such as a battery or other power chip in an electronic device. As a typical example, the input voltage can be provided by an MCU; that is, input terminal 324 is connected to one of the MCU's output terminals to receive voltage V. IO .

[0069] The following is combined Figure 4 This paper provides a detailed introduction to the protection scheme of the power supply system when the power chip output is abnormal.

[0070] When the power supply chip 31 is working normally, the first pin 311 is in a high-impedance state. At this time, it can be considered that the branch between the second resistor 323 and the first pin 311 is in an open-circuit state. The voltage input to the EN pin of the power supply chip is the same as the input voltage V at the input terminal 324. IO same.

[0071] It should be understood that, in this case, to ensure that the power supply chip 31 can function properly, the input voltage V should be... IO The value is set to be greater than or equal to the threshold voltage V. TH This ensures that when the first pin 311 is in a high-impedance state, the input voltage of the EN pin is always greater than its threshold voltage.

[0072] When the power chip 31 outputs an abnormality, the first pin 311 is pulled low to a low-impedance state. At this time, the branch of the second resistor 323 connected to the first pin 311 is conductive, thus the output voltage of the voltage divider terminal 321 is obtained by the voltage division of the first resistor 322 and the second resistor 323. To ensure that the power chip can stop working immediately under this situation, the output voltage of the voltage divider terminal 321 after the voltage division by the second resistor 323 should be less than the threshold voltage, that is, the following condition must be met:

[0073]

[0074] In the above formula, R1 is the resistance value of the first resistor 322, R2 is the resistance value of the second resistor 323, and V IO The input voltage, V received at input terminal 324 EN The voltage received by the EN pin of the power supply chip, V TH This is the threshold voltage for power supply chip 31.

[0075] In other words, Figure 4 In the power supply system shown, the resistance values ​​R1 and R2 of the first resistor 322 and the second resistor 323, and the input voltage V of the voltage divider circuit 32 IO The value of should at least satisfy the following conditions:

[0076]

[0077] VIO ≥V TH

[0078] exist Figure 4 In the power supply system shown, the resistance values ​​R1 and R2 of the first and second resistors, as well as the input voltage of the voltage divider circuit, are reasonably configured according to the state change of the first pin. This allows the second resistor to perform voltage division when the chip malfunctions, reducing the input voltage of the EN pin and stopping the power chip from being enabled.

[0079] As mentioned earlier, in power chip 31, the state of the PG pin changes with the operating state of power chip 31.

[0080] Specifically, when the power chip is not powered on, the PG pin is in a low-impedance state; when the voltage V on the EN pin... EN Increase to greater than or equal to the threshold voltage V TH When the power chip 31 starts operating normally, the PG pin is in a high-impedance state, and the branch containing the second resistor is disconnected. When the power chip 31 outputs an abnormality, the PG pin is pulled low to a low-impedance state. At this time, the second resistor divides the voltage, reducing the voltage of the EN pin to the threshold voltage V. TH As a result, the power chip is turned off.

[0081] As can be seen from the above description, during the startup phase of the power chip and when the output needs to be shut down due to an abnormality, the PG pin is in a low-resistance state, and the branch containing the second resistor in the voltage divider circuit is in a conducting state. That is, in both of these states, the input voltage of the EN pin is the voltage after voltage division.

[0082] However, as described above, during the startup phase of the power chip, the output voltage of the voltage divider circuit should be greater than or equal to the threshold voltage of the EN pin to enable the power chip to start; while during the shutdown phase of the chip, the output voltage should be less than the threshold voltage of the EN pin to disable the power chip.

[0083] In other words, the input voltage V of the voltage divider circuit IO With the resistance values ​​R1 and R2 of the first and second resistors fixed, during the chip's startup phase, the output voltage of the voltage divider terminal 321 should be greater than or equal to the threshold voltage of the EN pin to enable the chip normally, i.e., the following conditions must be met:

[0084]

[0085] To ensure that the chip enable is stopped in case of a chip malfunction, the output voltage of voltage divider 321 should be less than the threshold voltage of the EN pin, even if the above parameters meet the following conditions:

[0086]

[0087] Obviously, when R1, R2 and V IO When both values ​​are fixed, the above two conditions cannot be met simultaneously, meaning the power chip cannot start normally or cannot be shut down when it is malfunctioning.

[0088] Therefore, as a further technical solution to this problem, in some embodiments of this application, the first resistor 322 and / or the second resistor 323 in the voltage divider circuit 32 are variable resistors.

[0089] Taking a variable resistor as an example, during the startup phase of power chip 31, the resistance value of the second resistor is increased from R2 to R'2 to improve the voltage division ratio of the second resistor. At this time, the input voltage of the EN pin... Greater than its threshold voltage V TH The power chip is then activated and gradually increases the output second power supply voltage.

[0090] After entering normal operating mode, the first pin will be set to a floating state internally. At this time, the input voltage of the EN pin will change from... Jump to V IO (This has no impact on the operating status of the power chip), and the power chip starts up normally.

[0091] After the power chip is operating normally, the resistance of the second resistor is reduced from R'2 to R2, decreasing the voltage division ratio of the second resistor. This allows the voltage at the EN pin to drop below the threshold voltage when the power chip outputs abnormally.

[0092] As another implementation method, the first resistor can also be set as a variable resistor. That is, during the startup phase of the power chip, the resistance value of the first resistor is reduced, so that the second resistor can receive more voltage and increase the input voltage of the EN pin; after the power chip starts up normally, the resistance value of the first resistor is increased, so that when the power chip output is abnormal, the voltage of the EN pin is pulled down below the threshold voltage due to the voltage division of the second resistor.

[0093] As another possible implementation, both the first and second resistors can be set as variable resistors, that is, the resistance values ​​of the first and second resistors can be adjusted simultaneously. For example, during the startup phase of the power chip, the resistance value of the first resistor can be decreased and the resistance value of the second resistor can be increased, so that the second resistor receives more voltage; after the power chip starts up, the resistance value of the first resistor can be increased and the resistance value of the second resistor can be decreased, so that when the power chip output is abnormal, the voltage of the EN pin can be pulled down below the threshold voltage, causing the chip to stop working.

[0094] In some implementations, the input voltage of the voltage divider circuit can be set differently at different operating stages. This resolves the contradiction mentioned above regarding the setting of the voltage divider circuit's resistance value during the startup phase and the shutdown phase when the chip outputs an abnormality.

[0095] Specifically, during the startup phase of the power chip, the input voltage of the voltage divider circuit can be set to the first voltage V. CC1 This ensures that after voltage division by the second resistor in the voltage divider circuit, the output voltage at the voltage divider terminal is still greater than the threshold voltage of the EN pin, allowing the chip to start normally. After the chip is working normally, the input voltage of the voltage divider circuit is set to the second voltage V. CC2 This ensures that when the power chip outputs abnormally, the voltage across the second resistor is less than the threshold voltage of the EN pin. It should also be noted that the second voltage must be at least greater than or equal to the threshold voltage of the EN pin.

[0096] In other words, in this case, the aforementioned first voltage V IO1 Second voltage V IO2 The values ​​of the first resistor R1 and the second resistor R2 should meet the following conditions:

[0097]

[0098]

[0099] V IO2 ≥V TH

[0100] There are many ways to adjust the input voltage of a voltage divider circuit, and this application does not limit this in any specific way. Any method that can adjust the input voltage of a voltage divider circuit is acceptable.

[0101] The following is combined Figure 6 The embodiment shown illustrates the method for adjusting the input voltage of the voltage divider circuit described above. Figure 6 The power supply system includes a power chip 61, a voltage divider circuit 62, and an MCU 63. The power chip and the voltage divider circuit can be the power chip 31 and the voltage divider circuit 32 in any of the embodiments described above. Their specific structures and working methods will not be described here.

[0102] The MCU63 has an output terminal 631, which is connected to the input terminal 625 of the voltage divider circuit 62 to provide input voltage to the voltage divider circuit 62.

[0103] The MCU63 has an internal voltage conversion circuit 632 for converting the MCU's input voltage V. CC Converted to output voltage V IOThen, this voltage is supplied to the input terminal of the voltage divider circuit.

[0104] The following is about Figure 6 The operation of the power supply system in the above describes the working process during the enable phase and the shutdown phase in case of output abnormality. Before the power chip 61 is enabled, the MCU 63 configures the output terminal 631 to push-pull output mode. At this time, the output voltage of the output terminal 631 is V. CC At this time, the PG pin is in a low-impedance state, and the voltage V on the EN pin is... EN The voltage is obtained by dividing the voltage between the first and second resistors:

[0105]

[0106] In order for the power chip to start, the voltage on the EN pin should be greater than the threshold voltage of the EN pin, i.e.: V EN ≥V th

[0107] Therefore, the resistance value of the second resistor should satisfy:

[0108]

[0109] Assume R1 = 1kΩ, V CC =3.3V, V TH When the voltage is 1.2V, R2 should be greater than or equal to 580Ω.

[0110] When the voltage at the EN pin is greater than the threshold voltage V TH Afterwards, the power chip starts up and gradually increases the output voltage. Once it enters normal operating mode, it sets the PG pin to a floating state. At this time, V EN Will from Jump to V CC At this point, the power chip starts up normally.

[0111] Subsequently, the MCU63 configures the output to pull-up input mode (or uses an external pull-up resistor) to monitor the operating status of the power supply chip, such as... Figure 7 As shown.

[0112] When the power chip output state is abnormal, the PG pin is set to a low level. At this time, the branch containing the second resistor is turned on, and the second resistor divides the voltage; and, Figure 7 In the pull-up output mode of the MCU63 shown, a pull-up resistor R3 is added to the voltage conversion circuit 632. Then, the input voltage of the EN pin and the input voltage V of the voltage divider circuit will... IO The voltage is obtained by dividing R1, R2, and R3, that is:

[0113]

[0114]

[0115] In order for the power chip to be turned off at this time, the voltage on the EN pin should be less than the threshold voltage, i.e., V. EN <V th

[0116] Therefore, the resistance value of R2 should satisfy:

[0117]

[0118] Meanwhile, in order for the MCU63 to read the low level, the voltage VIO at the output of the MCU63 should be less than its threshold voltage V. TH_IO ,Right now:

[0119]

[0120] For example, when R1 = 1kΩ, R3 = 40kΩ, V CC =3.3V, V TH_IO =1.1V, V TH When the voltage is 1.2V, R2 should be less than 19kΩ.

[0121] from Figure 6 and Figure 7 The example shown illustrates that by adjusting the output voltage of the MCU63 at different operating stages of the power chip, the voltage divider circuit can achieve different output voltages under different operating conditions.

[0122] The above text combined Figures 1-7 The system embodiments of this application are described in detail below, in conjunction with... Figure 8 This application describes in detail the embodiments of the control method. It should be understood that the description of the method embodiments corresponds to the description of the system embodiments; therefore, any parts not described in detail can be referred to the preceding apparatus embodiments.

[0123] Figure 8 This is a schematic flowchart illustrating a method for controlling a power supply system according to an embodiment of this application. Figure 8 The method described above is applied to a power supply system, which includes: a power chip for converting a first power supply voltage into a second power supply voltage, the power chip including an enable terminal; and a voltage divider circuit whose output terminal is connected to the enable terminal of the power chip. This power supply system can be any of the power supply systems described in the preceding embodiments.

[0124] Figure 8 The method includes steps S810, S820a, and S820b, which are described in detail below.

[0125] In step S810, the operating state of the power chip is determined.

[0126] In step S820a, when the power supply chip is working normally, the voltage divider circuit outputs a first voltage that is greater than or equal to the threshold voltage of the enable terminal.

[0127] In step S820b, when the power chip malfunctions, the voltage divider circuit outputs a second voltage less than the threshold voltage to the enable terminal.

[0128] Optionally, the power chip includes a first pin, which is in a high-impedance state when the power chip output is normal and in a low-impedance state when the power chip output is abnormal.

[0129] The voltage divider circuit includes a first resistor and a second resistor connected in series. The first end of the first resistor is connected to the input terminal of the voltage divider circuit, and the second end is connected to the first end of the second resistor. The second end of the second resistor is connected to the first pin, and the output terminal of the voltage divider circuit is located between the first resistor and the second resistor.

[0130] Optionally, during the startup phase of the power chip, the first pin is in a low-resistance state.

[0131] Optionally, the first resistor and / or the second resistor are adjustable resistors; the method further includes: during the startup phase of the power chip, decreasing the resistance value of the first resistor and / or increasing the resistance value of the second resistor; and / or, when the power chip outputs normally, increasing the resistance value of the first resistor and / or decreasing the resistance value of the second resistor.

[0132] Optionally, the method further includes: increasing the input voltage at the input terminal of the voltage divider circuit during the startup phase of the power chip; and / or decreasing the input voltage at the input terminal of the voltage divider circuit when the power chip outputs normally.

[0133] Optionally, the first pin is the PG pin of the power supply chip.

[0134] This application also provides an electronic device. Figure 9 This is a schematic structural diagram of the electronic device 90. (For example...) Figure 9 As shown, the electronic device 90 includes a load device 91 and a power supply system 92, wherein the power supply system 92 is used to supply power to the load device 91, and the power supply system can be any of the power supply systems in the preceding embodiments.

[0135] It should be understood that in the various embodiments of this application, "first," "second," etc., are used to distinguish different objects, rather than to describe a specific order. The order of the above-mentioned process numbers does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0136] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0137] In the embodiments provided in this application, it should be understood that when a part is referred to as "connected" or "linked" to another part, it means that the part can be "directly connected" and also "electrically connected," with another element involved. Furthermore, the term "connected" also means that the parts are "physically connected" and "wirelessly connected." Additionally, when a part is referred to as "containing" an element, unless otherwise stated, it means that the part may include, but does not exclude, the other element.

[0138] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0139] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0140] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A power supply system, characterized in that, include: A power chip for converting a first power supply voltage into a second power supply voltage, the power chip including an enable terminal; A voltage divider circuit, wherein the voltage divider terminal is connected to the enable terminal, and the voltage divider circuit is configured as follows: When the power chip is working properly, the voltage divider outputs a first voltage that is greater than or equal to the threshold voltage of the enable terminal; When the power chip malfunctions, a second voltage lower than the threshold voltage is provided to the enable terminal. The power chip includes a first pin. When the power chip outputs normally, the first pin is in a high-impedance state; when the power chip outputs abnormally, the first pin is in a low-impedance state. The voltage divider circuit includes an input terminal for connecting to a voltage source outside the power supply system to receive the input voltage; The voltage divider circuit also includes a first resistor and a second resistor connected in series. The first end of the first resistor is connected to the input terminal, and the second end is connected to the first end of the second resistor. The second end of the second resistor is connected to the first pin. The voltage divider terminal of the voltage divider circuit is located between the first resistor and the second resistor.

2. The power supply system according to claim 1, characterized in that, During the startup phase of the power chip, the first pin is in a low-resistance state.

3. The power supply system according to claim 2, characterized in that, The first resistor and / or the second resistor are adjustable resistors; The power supply system is configured as follows: During the startup phase of the power chip, the resistance value of the first resistor is decreased and / or the resistance value of the second resistor is increased; and / or, When the power chip output is normal, increase the resistance value of the first resistor and / or decrease the resistance value of the second resistor.

4. The power supply system according to any one of claims 1 or 2, characterized in that, The power supply system is configured as follows: During the startup phase of the power chip, the input voltage at the input terminal of the voltage divider circuit is increased; and / or When the power chip output is normal, reduce the input voltage at the input terminal of the voltage divider circuit.

5. The power supply system according to any one of claims 1 or 2, characterized in that, The first pin is the PG pin of the power supply chip.

6. A method for controlling a power supply system, characterized in that, The power supply system includes: A power chip for converting a first power supply voltage into a second power supply voltage, the power chip including an enable terminal; A voltage divider circuit, wherein the voltage divider terminal of the voltage divider circuit is connected to the enable terminal; The method includes: When the power chip is working properly, the voltage divider outputs a first voltage that is greater than or equal to the threshold voltage of the enable terminal; When the power chip malfunctions, the voltage divider terminal provides a second voltage, which is less than the threshold voltage, to the enable terminal; The power chip includes a first pin. When the power chip outputs normally, the first pin is in a high-impedance state; when the power chip outputs abnormally, the first pin is in a low-impedance state. The voltage divider circuit includes an input terminal for connecting to a voltage source outside the power supply system to receive the input voltage; The voltage divider circuit also includes a first resistor and a second resistor connected in series. The first end of the first resistor is connected to the input terminal, and the second end is connected to the first end of the second resistor. The second end of the second resistor is connected to the first pin. The voltage divider terminal of the voltage divider circuit is located between the first resistor and the second resistor.

7. The method according to claim 6, characterized in that, During the startup phase of the power chip, the first pin is in a low-resistance state.

8. The method according to claim 7, characterized in that, The first resistor and / or the second resistor are adjustable resistors; The method further includes: During the startup phase of the power chip, the resistance value of the first resistor is decreased and / or the resistance value of the second resistor is increased; and / or, When the power chip output is normal, increase the resistance value of the first resistor and / or decrease the resistance value of the second resistor.

9. The method according to claim 6 or 7, characterized in that, The method further includes: During the startup phase of the power chip, the input voltage at the input terminal of the voltage divider circuit is increased; and / or When the power chip output is normal, reduce the input voltage at the input terminal of the voltage divider circuit.

10. The method according to claim 6 or 7, characterized in that, The first pin is the PG pin of the power supply chip.

11. An electronic device, characterized in that, include: Load devices; The power supply system as described in any one of claims 1-5 is used to supply power to the load device.

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