Method for handling offset circuit board

Abstract

The present invention discloses a method for processing a misaligned circuit board, which relates to the technical field of circuit board production and aims to solve the problem that the existing methods can only determine whether there is a layer deviation but cannot specifically determine the amount of layer deviation when detecting layer deviation. The method for determining layer deviation of a circuit board includes making a marking ring-pressing-layer deviation detection-classification. The method can specifically obtain the layer deviation data of the circuit board, which is convenient for subsequent processing of the circuit board according to the data; the whole-plate structure of the circuit board includes a plurality of evenly arranged single-plate areas and a cutting area arranged around the single-plate area, and the marking ring is located in the cutting area. The structure has the beneficial effect of improving detection efficiency and avoiding damage to the single board of the circuit board; the method for processing a misaligned circuit board includes fully misaligned circuit board processing and half misaligned circuit board processing. The method performs classification processing of the circuit board according to the layer deviation data of the whole plate of the circuit board, which reduces the waste of the circuit board and saves costs.

Description

Technical Field

[0001] The invention relates to the technical field of circuit board production, and in particular to a method for processing an offset circuit board. Background Art

[0002] PCB is one of the most important components used for electrical connection of electronic components in electronic equipment. For multi-layer PCB made by lamination process, detecting the alignment consistency of two adjacent layers (whether there is interlayer offset) is a key indicator for judging the quality of finished PCB. If the offset between layers reaches a certain level, it will cause the drilling of offset holes and cause a short circuit, making the circuit board scrapped.

[0003] The invention with announcement number CN105072830B discloses a layer deviation detection method. The invention sets two kinds of rings (compensation copper ring and copper ring) in each layer deviation detection area of ​​the circuit copper layer, so that two different sets of rings are formed on the pre-stacked structure and the multi-layer board. The copper ring without tensile coefficient compensation is used to detect whether each board layer in the pre-stacked structure is deviated after melting / riveting, and the compensation copper ring with tensile coefficient compensation is used to detect whether each board layer in the multi-layer board is deviated after pressing. Therefore, it can be applied to detect the layer deviation of the pre-stacked structure with core boards with different tensile coefficients, provide quality assurance for subsequent production, and provide a basis for solving abnormal layer deviation, thereby improving production efficiency and quality.

[0004] However, when detecting layer deviation, the above device can only determine whether there is layer deviation, but cannot specifically determine the amount of layer deviation, making it difficult to determine which circuit boards have layer deviations within the acceptable range and which have layer deviations within the unacceptable range and need to be scrapped. Summary of the invention

[0005] In view of the shortcomings of the prior art, the first object of the present invention is to provide a method for determining layer deviation of a circuit board, which can specifically obtain layer deviation data of the circuit board, thereby facilitating subsequent processing of the circuit board based on the data.

[0006] The first object of the present invention is achieved by the following technical solutions:

[0007] A method for judging layer deviation of a circuit board comprises the following steps:

[0008] S1: Making a marking ring: etching a marking ring at the same position on the surface of each main substrate, and the diameter of the marking ring is the same;

[0009] S2: Lamination: The main substrates are aligned and multiple layers are laminated to form the inner layer board;

[0010] S3: Layer deviation detection: The inner layer board is placed in an x-ray detector to detect layer deviation. If the marking rings on the main substrates of each layer completely overlap, there is no layer deviation; if the marking rings on the main substrates of each layer are misaligned, there is layer deviation;

[0011] The x-ray detector scans the positions of the three farthest marking rings among the marking rings on each layer of the main substrate, and makes a registration ring, which surrounds the three farthest marking rings and is tangent to them respectively;

[0012] The system obtains the diameter of the alignment ring and calculates the difference between the diameters of the alignment ring and the marking ring. This difference is the real-time layer deviation.

[0013] The standard layer deviation is pre-set in the system, and the real-time layer deviation is compared with the standard layer deviation. If the real-time layer deviation is less than or equal to the standard layer deviation, there is no deviation; if the real-time layer deviation is greater than the standard layer deviation, there is a deviation.

[0014] S4: Classification: Output the circuit boards with and without deviation separately.

[0015] By adopting the above technical solution, since the x-ray detector can detect the position of the contour line of each marking ring, but cannot reflect the position of the center of each marking ring, therefore, each marking ring is set to the same diameter and is located at the same position on each layer of the main substrate. If the main substrates of each layer are completely aligned, the contour lines of each marking ring are completely aligned. If there is a misalignment between the main substrates, the outer contour of the marking ring is misaligned. When there is a misalignment between the main substrates of each layer, the marking ring farthest apart can best reflect the degree of misalignment. The alignment ring made by the common tangent circle of the three farthest marking rings is scanned to obtain the diameter of the alignment ring by scanning the outer contour of the alignment ring. The difference between the diameter of the alignment ring and the diameter of the marking ring represents the discrete degree of the marking ring on each layer of the main substrate, thereby expressing the degree of misalignment between the main substrates of each layer. The above method specifically quantifies the layer deviation degree of the circuit board, which is convenient for personnel to make accurate judgments and classifications, so as to facilitate the corresponding subsequent processing for different layer deviation amounts.

[0016] In a preferred example, the present invention can be further configured as follows: the standard layer deviation value is smaller than the diameter of the marking ring.

[0017] By adopting the above technical solution, the marking circles of each layer on the qualified circuit board are in a concentric or intersecting state. When the marking circles are in a completely separated state, it can be directly judged that the layer is unqualified, which further improves the detection efficiency and facilitates the verification of the detection results.

[0018] In a preferred example, the present invention can be further configured as follows: a circuit board is provided with a plurality of marking rings, and the plurality of marking rings are respectively close to edges of different sides of the circuit board.

[0019] By adopting the above technical solution, when the circuit board is offset, the position where the circuit board has the largest offset must be close to the edge of the circuit board. By setting multiple marking rings and making them all located at the edge of the circuit board, the layer deviation degree of the circuit board can be reflected to the greatest extent, and the offset trend of the circuit board can be obtained through the offset changes of the marking rings at different positions, which is convenient for making corresponding adjustments to the pressing equipment. At the same time, the circuit boards can be accurately classified according to different offsets, which is convenient for subsequent processing of the circuit boards.

[0020] In a preferred example, the present invention can be further configured as follows: in S3, the offset circuit board is marked, and the real-time layer deviation values ​​at the marking rings at different positions are marked.

[0021] By adopting the above technical solution, the real-time layer deviation value at the marked position is used by personnel for analysis and classification of circuit boards with deviations, which is beneficial to controlling the layer deviation of the circuit board.

[0022] The second object of the present invention is to provide a circuit board whole-plate structure, which has the beneficial effects of improving detection efficiency and avoiding damage to the circuit board.

[0023] The second object of the present invention is achieved by the following technical solutions:

[0024] A circuit board full-page structure comprises a plurality of evenly arranged single-board areas and cutting areas arranged around the single-board areas. The circuit board full-page is a rectangular plate, and the marking ring described in any one of claims 1 to 4 is located in the cutting area.

[0025] By adopting the above technical scheme, during the alignment, lamination and other processing steps between the layers of the circuit board, the edge of the entire circuit board is prone to the greatest degree of misalignment, wear, etc., which makes it difficult to directly use the circuit board here. This place is set as a cutting area and used as the margin of the entire plate. It is removed after the final processing of the entire circuit board is completed, thereby ensuring the quality of the processed circuit board; and because the outline of the marking ring is etched, it will affect the thickness of the copper layer on the surface of the main substrate. The marking ring is set in the cutting area and removed together with the cutting area after the processing is completed, further ensuring the quality of the circuit board single board after the final separation.

[0026] In a preferred example, the present invention can be further configured as follows: the marking rings are provided at four locations, and the marking rings are located at the four corners of the circuit board respectively.

[0027] By adopting the above technical solution, the cutting area at the four corners of the entire circuit board is the largest, and the etching and processing of the marking ring can be avoided to the greatest extent in the single board area to avoid damage to the single board area. At the same time, when misalignment occurs between the main substrates of each layer, the misalignment degree and offset at the four corners of the entire circuit board are the largest, and the detected layer deviation data is more accurate.

[0028] The third object of the present invention is to provide a method for processing offset circuit boards, which can classify and process circuit boards according to the layer offset data of the entire circuit board, thereby reducing the waste of circuit boards and saving costs.

[0029] The third object of the present invention is achieved by the following technical solutions:

[0030] A method for processing an offset circuit board, including fully offset circuit board processing and half offset circuit board processing,

[0031] A fully deflected circuit board is a circuit board where all the marking circles are deflected. A fully deflected circuit board is considered scrapped as a whole.

[0032] A semi-biased circuit board is a circuit board with at least one non-biased position in each marking circle. The processing method of the semi-biased circuit board includes:

[0033] Make a connection: Draw a straight line from the marked circle with the smallest real-time layer deviation to the marked circle with the largest real-time layer deviation;

[0034] Make a perpendicular line: Make a perpendicular line between the lines;

[0035] Detection and removal: Take the circuit board through which the vertical line passes for electrical detection. If the circuit is well connected, all the circuit boards through which the vertical line passes and on the side of the marked circle where the vertical line is close to the smallest real-time layer deviation are qualified, and the remaining circuit boards are scrapped;

[0036] If the circuit is short-circuited, take the 1 / 4 point on the side of the marking ring with the smallest real-time layer deviation, draw a vertical line through the point, and take the circuit board through which the vertical line passes for electrical testing. If the circuit is well connected, all the circuit boards through which the vertical line passes and on the side of the real-time marking ring with the smallest layer deviation are qualified, and the rest of the circuit boards are scrapped;

[0037] Repeat the above steps until there is no complete circuit board between the vertical line and the marking circle with the smallest real-time layer deviation, and the entire circuit board is scrapped.

[0038] By adopting the above technical solution, the misalignment of the circuit board generally includes translational deviation and rotational deviation. The real-time layer deviation detected at each marking ring after translational deviation is consistent. When different marking rings on the entire circuit board are partially offset and partially non-offset, it means that the deviation of the circuit board is not only caused by the translation between the main substrates of each layer in the plane of the main substrate, but also by misaligned rotation. Cutting and utilizing the qualified parts of the entire half-deflected circuit board greatly reduces the number of scrapped circuit boards, avoids the scrapping of the entire circuit board, reduces the waste of raw materials and processes, and saves costs.

[0039] In a preferred example, the present invention can be further configured as follows: the circuit board on the side with the larger real-time layer deviation on both sides of the connection is selected for electrical detection.

[0040] By adopting the above technical solution, the offset of the circuit board on the side with larger real-time layer deviation is greater than the offset of the circuit board on the other side of the connecting line. If the circuit board on this side does not short-circuit, the vertical line and the circuit board on the side of the marking circle with the smallest real-time layer deviation will definitely not short-circuit, further preventing the influx of unqualified products.

[0041] In summary, the present application includes at least one of the following beneficial technical effects:

[0042] 1. The difference between the diameter of the alignment ring and the diameter of the marking ring indicates the degree of discreteness of the marking rings on each layer of the main substrate, thereby quantifying the degree of layer deviation of the circuit board, which is convenient for personnel to make accurate judgments and classifications, and thus facilitates subsequent processing corresponding to different layer deviations;

[0043] 2. Set the marking ring in the cutting area and remove it together with the cutting area after processing, which further ensures the quality of the final separated circuit board;

[0044] 3. Separate the qualified parts of the half-biased circuit board and cut them for use, which greatly reduces the number of scrapped circuit boards, avoids the scrapping of the entire circuit board, reduces the waste of raw materials and processes, and saves costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 It is a schematic structural diagram of the entire circuit board in the first embodiment of the present invention.

[0046] Figure 2 Schematic diagram of the layer deviation detection process in the first embodiment of the present invention

[0047] Figure 3 It is a flow chart of the circuit board layer deviation judgment method in the first embodiment of the present invention.

[0048] Figure 4It is a flow chart of the circuit board half-bias processing method in the second embodiment of the present invention.

[0049] In the figure: 1. Single board area; 2. Cutting area; 3. Marking ring; 4. Alignment ring. DETAILED DESCRIPTION

[0050] The present invention is further described in detail below in conjunction with the accompanying drawings.

[0051] Embodiment 1

[0052] Reference Figure 1 , is a circuit board layer deviation judgment method disclosed by the present invention, which comprises the following steps:

[0053] S1: Making a marking ring 3: Etching a marking ring 3 at the same position on the surface of each main substrate, the diameter of the marking ring 3 is the same. Each main substrate includes two layers of mutually bonded copper-clad boards, the blanking area of ​​the copper-clad boards is calculated according to the size after the single boards of multiple circuit boards are spliced ​​together, the single board splicing area of ​​the multi-layer circuit board is the single board area 1, and the single board area 1 is surrounded by cutting areas 2 of equal width, the width of the cutting area 2 is 5mm, the overall shape of the copper-clad board is rectangular, there are four marking rings 3, which are etched on the surface of one side of the main substrate, and are located in the cutting areas 2 at the four corners of the main substrate, the depth of the marking ring 3 is less than the thickness of the copper foil on the surface of the main substrate, and the diameter of the marking ring 3 in this embodiment is 3.5mm.

[0054] S2: Main substrate lamination: Align the main substrates and laminate multiple layers to form inner layer boards.

[0055] S3: Layer deviation detection: put the inner layer board into the x-ray detector to detect the layer deviation. Set the detection position, the diameter data of the marking ring 3 and the standard layer deviation value in the x-ray detector in advance. The value of the standard layer deviation is generally smaller than the diameter of the marking ring 3. When the marking rings 3 are completely separated, the layer deviation can be directly judged as unqualified, which further improves the detection efficiency and facilitates the verification of the detection results. The standard layer deviation value in this embodiment is 0.85μm. The x-ray detector detects the deviation degree of the marking ring 3 at each position and analyzes it. The analysis and data processing process is as follows:

[0056] If it is detected that the marking rings 3 on each layer of the main substrate are completely overlapped, there is no deviation;

[0057] If the marking rings 3 on each layer of the main substrate are misaligned, the analysis continues: the x-ray detector scans the positions of the three marking rings 3 that are farthest apart among the marking rings 3 on each layer of the main substrate, and makes a registration ring 4, which surrounds all the marking rings 3 and is tangent to the three marking rings 3 that are farthest apart; the system obtains the diameter of the registration ring 4, and calculates the difference between the diameter of the registration ring 4 and the marking ring 3, and this difference is the real-time layer deviation;

[0058] Compare the real-time layer deviation with the standard layer deviation. If the real-time layer deviation is less than or equal to the standard layer deviation, there is no deviation; if the real-time layer deviation is greater than the standard layer deviation, there is deviation. The circuit board without deviation is a qualified circuit board, and the circuit board with deviation needs to be further classified. Therefore, in this step, the circuit board with deviation is marked, and the real-time layer deviation value at the marking ring 3 at different positions is marked;

[0059] S4: Classification: Output the circuit boards with and without deviation separately.

[0060] The implementation principle of this embodiment is as follows: since the x-ray detector can detect the position of the contour line of each marking ring 3, but cannot reflect the position of the center of each marking ring 3, therefore, each marking ring 3 is set to have the same diameter and is located at the same position on each layer of the main substrate. If the main substrates of each layer are completely aligned, the contour lines of each marking ring 3 are completely aligned. If there is a misalignment between the main substrates, the outer contour of the marking ring 3 is misaligned. When there is a misalignment between the main substrates of each layer, the marking ring 3 that is farthest apart can best reflect the degree of misalignment. The alignment ring 4 is made by the tangent circle of the farthest marking ring 3. The diameter of the alignment ring 4 is obtained by scanning the outer contour of the alignment ring 4. The difference between the diameter of the alignment ring 4 and the diameter of the marking ring 3 represents the discreteness of the marking ring 3 on each layer of the main substrate, thereby expressing the degree of misalignment between the layers of the main substrates.

[0061] The above method specifically quantifies the layer deviation degree of the circuit board, which is convenient for personnel to make accurate judgments and classifications, thereby facilitating corresponding subsequent processing for different layer deviation amounts.

[0062] Embodiment 2

[0063] This embodiment of the present invention discloses a method for processing a deviated circuit board, which includes processing a fully deviated circuit board and processing a half-deviated circuit board. A fully deviated circuit board is a circuit board in which all marking rings 3 are deviated. The fully deviated circuit board is processed as the entire board is scrapped.

[0064] A half-biased circuit board is a circuit board in which at least one of the marking circles 3 has no bias. The method for processing the half-biased circuit board includes:

[0065] (1) Draw a line: Draw a straight line from the marked circle 3 with the smallest real-time layer deviation to the marked circle 3 with the largest real-time layer deviation;

[0066] (2) Draw a perpendicular line: Draw a perpendicular line between the connecting lines;

[0067] (3) Inspection and removal: Take the circuit board on the side with the larger real-time layer deviation on both sides of the connection line where the vertical line passes through for electrical inspection. If the circuit is well connected, all the circuit boards on the side where the vertical line passes through and the side where the vertical line is close to the marking ring 3 with the smallest real-time layer deviation are qualified, and the remaining circuit boards are scrapped;

[0068] If the circuit is short-circuited, take the 1 / 4 point on the side of the marking circle 3 with the smallest real-time layer deviation, draw a vertical line through the point, and take the circuit board on the side with the larger real-time layer deviation on both sides of the connecting line through which the vertical line passes for electrical detection. If the circuit is well connected, all the circuit boards on the side of the real-time marking circle 3 with the smallest layer deviation through which the vertical line passes are qualified, and the rest of the circuit boards are scrapped;

[0069] Repeat the above steps until there is no complete circuit board between the vertical line and the marking circle 3 with the smallest real-time layer deviation, and the entire circuit board is scrapped.

[0070] The implementation principle of this embodiment is as follows: the misalignment of the circuit board generally includes translational deviation and rotational deviation. The real-time layer deviation detected at each marking ring 3 after the translational deviation is consistent. When different marking rings 3 on the entire circuit board are partially offset and partially non-offset, it means that the deviation of the circuit board is not only caused by the translation between the main substrates of each layer in the plane of the main substrate, but also by misaligned rotation; the offset of the circuit board on the side with a larger real-time layer deviation is greater than the offset of the circuit board on the other side of the connection line. If the circuit board on this side does not have a short circuit, the vertical line and the circuit board on the side of the marking ring 3 with the smallest real-time layer deviation will definitely not have a short circuit, further preventing the influx of unqualified products. The qualified part of the entire half-biased circuit board is cut and utilized, which greatly reduces the number of scrapped circuit boards, avoids the scrapping of the entire circuit board, reduces the waste of raw materials and processes, and saves costs.

[0071] The embodiments of this specific implementation method are all preferred embodiments of the present invention, and are not intended to limit the protection scope of the present invention. Therefore, any equivalent changes made based on the structure, shape, and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for processing an offset circuit board, comprising: etching a marking ring (3) at the same position on the surface of each main substrate, wherein the diameter of the marking ring (3) is the same, and the characteristics are: Including full bias circuit board processing and half bias circuit board processing, A fully deflected circuit board is a circuit board where all the marking rings (3) are deflected. A fully deflected circuit board is treated as a whole and is scrapped. The semi-biased circuit board is a circuit board having at least one non-biased position in each marking ring (3). The method for processing the semi-biased circuit board comprises: (1) Draw a line: Draw a straight line from the marked circle (3) with the smallest real-time layer deviation to the marked circle (3) with the largest real-time layer deviation; (2) Draw a perpendicular line: Draw a perpendicular line between the connecting lines; (3) Inspection and removal: Take the circuit board through which the vertical line passes and conduct electrical inspection. If the circuit is well connected, all the circuit boards through which the vertical line passes and on the side of the marking circle (3) where the vertical line is close to the smallest real-time layer deviation are qualified, and the remaining circuit boards are scrapped; If the circuit is short-circuited, take the 1 / 4 point on the side of the marking circle (3) with the smallest real-time layer deviation, draw a vertical line through the point, and take the circuit board through which the vertical line passes for electrical testing. If the circuit is well connected, all the circuit boards through which the vertical line passes and on the side of the real-time marking circle (3) with the smallest layer deviation are qualified, and the remaining circuit boards are scrapped; Repeat the above steps until there is no complete circuit board between the vertical line and the marking circle (3) with the smallest real-time layer deviation, and the entire circuit board is scrapped.

2. A method for processing an offset circuit board according to claim 1, characterized in that: Select the circuit board on the side with larger real-time layer deviation on both sides of the connection for electrical testing.

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