OPC Correction Method

By establishing the first model and using the standard model and the second model for OPC correction, considering the graphical transfer factor of the hard mask, the problem of small OPC correction process window in the prior art is solved, and a higher graphical transfer accuracy and process window are achieved.

CN115576168BActive Publication Date: 2025-06-06SHANGHAI HUALI MICROELECTRONICS CORP
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Patent Information

Application Number
CN202211343909.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-10-31
Publication Date
2025-06-06
Estimated Expiration
2042-10-31

AI Technical Summary

Technical Problem

The prior art failed to effectively consider the graphics transfer factors of the hard mask in OPC correction, resulting in a smaller process window.

Method used

By establishing the first model, considering the graph transfer characteristics of the hard mask, OPC correction is performed using the standard model and the second model, and multiple model verifications are carried out on the filtered graphs to ensure that the graphs meet the specifications of each model.

Benefits of technology

Improved the process window for OPC correction to ensure that the graphics can more accurately meet design requirements during the transfer from the hard mask to the wafer.

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    Figure CN115576168B_ABST
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Abstract

The present invention provides an OPC correction method, comprising: preparing an OPC test pattern on a hard mask according to a hard mask transfer characteristic, performing photolithography on a wafer using the hard mask, and establishing a first model according to photolithography pattern data; inputting an initial metal layer; providing a standard model and a second model; performing OPC correction on the initial metal layer using the standard model and the second model in sequence to obtain a corrected metal layer; selecting a pattern sensitive to the first model from the corrected metal layer as a first pattern, a pattern less affected by the first model as a second pattern, and the remaining initial metal layer as a third pattern; performing OPC correction on the first pattern using the first model to obtain a fourth pattern; performing OPC correction on the second pattern using the first model to obtain a fifth pattern; performing OPC correction on the fourth pattern and the fifth pattern using the standard model; and using the third pattern, the fourth pattern and the fifth pattern as corrected target patterns.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an OPC correction method. Background Art

[0002] The key to model-based OPC correction is to establish an accurate lithography process model. A reliable OPC model can simulate the lithography process more accurately and obtain data that is closest to the actual wafer.

[0003] In the prior art, (1) OPC uses a semi-empirical simplified lithography model, and some complex processes in the simulation are replaced by simplified empirical formulas; (2) the test patterns collected to establish the model are limited, and the measurement data collected is limited, which cannot cover the diversity of design patterns; (3) the OPC model mainly considers the optical and etch processes, simplifying the complex changes in lithography. Therefore, a single OPC model cannot accurately simulate all graphics. The OPC correction of the prior art is generally based on the correction of a model. In the OPC correction of the 28nm technology node and the following key levels, a process model will be added. The process model is obtained by making a certain offset to the focus and dose (lithography energy) on the basis of the main model, which improves the process window to a certain extent.

[0004] However, in the prior art, when two models are used for OPC correction, the pattern transfer factor of the hard mask is still not taken into account, that is, the pattern distortion from the hard mask to the wafer is not taken into account, resulting in a smaller process window. Summary of the invention

[0005] The object of the present invention is to provide an OPC correction method, which can take into account the pattern transfer factor of the hard mask, that is, can take into account the pattern distortion from the hard mask template to the wafer, so as to improve the process window.

[0006] In order to achieve the above object, the present invention provides an OPC correction method, comprising:

[0007] S1: preparing an OPC test pattern on a hard mask according to the hard mask transfer characteristics, performing photolithography on a wafer using the hard mask, collecting photolithography pattern data on the wafer, and establishing a first model according to the photolithography pattern data;

[0008] S2: input initial metal layer;

[0009] S3: providing a standard model and a second model, wherein the second model is offset in both focus and lithography energy relative to the standard model;

[0010] S4: performing OPC correction on the initial metal layer using the standard model and the second model in sequence to obtain a corrected metal layer;

[0011] S5: selecting a pattern sensitive to the first model from the corrected metal layer as a first pattern, selecting a pattern less affected by the first model as a second pattern, and using the remaining initial metal layer as a third pattern;

[0012] S6: performing OPC correction on the first graphic using the first model to obtain a fourth graphic;

[0013] S7: performing OPC correction on the second graphic using the first model to obtain a fifth graphic;

[0014] S8: performing OPC correction on the fourth graphic and the fifth graphic using the standard model;

[0015] S9: Verify the third graphic, the fourth graphic and the fifth graphic using the first model, the standard model and the second model. If they all meet the specifications of the first model, the standard model and the second model, the third graphic, the fourth graphic and the fifth graphic are used as the corrected target graphics.

[0016] Optionally, in the OPC correction method, the OPC test pattern includes a regular pattern and a plurality of pairs of patterns with two line ends facing each other, each pair of patterns has a different line width and a fixed spacing between the line ends.

[0017] Optionally, in the OPC correction method, the number of times the OPC correction is performed on the initial metal layer using the standard model is 8 to 15 times.

[0018] Optionally, in the OPC correction method, the number of times the OPC correction is performed on the initial metal layer using the second model is 3 to 5 times.

[0019] Optionally, in the OPC correction method, the first graphic includes a graphic with a line spacing of 45nm to 60nm, and is affected by a rounded corner effect and has an upper through-hole layer and / or a lower through-hole layer.

[0020] Optionally, in the OPC correction method, the second graphic includes a graphic that is subject to MRC restrictions during OPC correction and has two opposite line ends.

[0021] Optionally, in the OPC correction method, the number of times the first model is used to perform OPC correction on the first graphic is 1 to 3 times, and the correction amount is -3nm to 3nm.

[0022] Optionally, in the OPC correction method, the number of times the OPC correction is performed on the second graphic using the first model is 1 to 2 times, and the correction amount is -1.5 nm to 1.5 nm.

[0023] Optionally, in the OPC correction method, the number of times the OPC correction is performed on the fourth graphic and the fifth graphic using the standard model is 1 to 2 times.

[0024] Optionally, the OPC correction method further includes: if the specifications of the first model, the standard model or the second model are not met, executing steps S4 to S8 until the first model, the standard model and the second model are all verified.

[0025] The OPC correction method provided by the present invention includes: preparing an OPC test pattern on a hard mask according to the hard mask transfer characteristics, performing photolithography on a wafer using the hard mask, collecting photolithography pattern data on the wafer, and establishing a first model according to the photolithography pattern data; inputting an initial metal layer; providing a standard model and a second model, wherein the second model shifts both the focus and the photolithography energy relative to the standard model; performing OPC correction on the initial metal layer using the standard model and the second model in sequence; selecting a pattern in the initial metal layer that is sensitive to the first model as the first pattern, selecting a pattern that is less affected by the first model as the second pattern, and using the remaining initial metal layer as the third pattern; performing OPC correction on the first pattern using the first model to obtain a fourth pattern; performing OPC correction on the second pattern using the first model to obtain a fifth pattern; performing OPC correction on the fourth pattern and the fifth pattern using the standard model; verifying the third pattern, the fourth pattern and the fifth pattern using the first model, the standard model and the second model, and if the specifications of the first model, the standard model and the second model are met, the third pattern, the fourth pattern and the fifth pattern are used as the corrected target pattern. The present invention establishes a first model for the graphic transfer factors of the hard mask, uses the standard model and the second model to perform OPC correction, and then uses the first model to perform OPC processing on the screened graphics again, taking the graphic transfer factors of the hard mask into account in the OPC correction, that is, taking into account the graphic distortion of the pattern from the hard mask template to the wafer, thereby improving the process window. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 4 is a flow chart of an OPC correction method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0027] The specific implementation of the present invention will be described in more detail below in conjunction with the schematic diagram. The advantages and features of the present invention will become clearer based on the following description. It should be noted that the drawings are all in a very simplified form and are not in exact proportions, and are only used to facilitate and clearly assist in explaining the purpose of the embodiments of the present invention.

[0028] Hereinafter, the terms "first", "second", etc. are used to distinguish between similar elements and are not necessarily used to describe a particular order or chronological sequence. It is to be understood that these terms used in this manner are interchangeable where appropriate. Similarly, if the method described herein includes a series of steps, the order of these steps presented herein is not necessarily the only order in which these steps can be performed, and some of the steps described may be omitted and / or some other steps not described herein may be added to the method.

[0029] Please refer to Figure 1 The present invention provides an OPC correction method, comprising:

[0030] S1: preparing an OPC test pattern on a hard mask according to the hard mask transfer characteristics, performing photolithography on a wafer using the hard mask, collecting photolithography pattern data on the wafer, and establishing a first model according to the photolithography pattern data;

[0031] S2: input initial metal layer;

[0032] S3: providing a standard model and a second model, wherein the second model is offset in both focus and lithography energy relative to the standard model;

[0033] S4: performing OPC correction on the initial metal layer using the standard model and the second model in sequence to obtain a corrected metal layer;

[0034] S5: selecting a pattern sensitive to the first model from the corrected metal layer as a first pattern, selecting a pattern less affected by the first model as a second pattern, and using the remaining initial metal layer as a third pattern;

[0035] S6: performing OPC correction on the first graphic using the first model to obtain a fourth graphic;

[0036] S7: performing OPC correction on the second graphic using the first model to obtain a fifth graphic;

[0037] S8: performing OPC correction on the fourth and fifth graphics using the standard model;

[0038] S9: The third graphic, the fourth graphic and the fifth graphic are verified using the first model, the standard model and the second model. If they all meet the specifications of the first model, the standard model and the second model, the third graphic, the fourth graphic and the fifth graphic are used as the corrected target graphics.

[0039] In an embodiment of the present invention, the OPC test pattern includes a conventional pattern and a plurality of pairs of patterns with two line ends facing each other, each pair of patterns having different line widths and a fixed spacing between the line ends. The first model is established as follows: (a) preparing an OPC test mask with an OPC test pattern. In addition to conventional patterns such as Proximity (proximity test pattern) / Linearity (linear test pattern), the OPC test pattern also needs to prepare a specific pattern that is sensitive to the hard mask, for example, a plurality of pairs of patterns with two line ends facing each other, each pair of patterns having different line widths and a fixed spacing between the line ends; (b) exposing under the conditions of the standard model; (c) measuring wafer data on the hard mask substrate, including line width and spacing between lines; (d) analyzing wafer data, including analyzing whether the line width and the distance between lines are within the specification. If not, continue to adjust the parameters of the model such as focal length and etching dose until the wafer data is within the specification, that is, including analyzing whether the line width and the distance between lines are within the specification, and then establish the first model according to the model parameters at this time.

[0040] Preferably, the number of times the initial metal layer is subjected to OPC correction using the standard model is 8 to 15 times. For example, it may be 10 times, that is, the initial metal layer is subjected to OPC for 10 times under the standard model. In other embodiments of the present invention, it may be other numbers, depending on the specific process.

[0041] Preferably, the number of times the initial metal layer is OPC-corrected using the second model is 3 to 5 times. For example, it may be 4 times, that is, the initial metal layer is OPC-corrected 10 times under the second model. In other embodiments of the present invention, it may be other numbers, depending on the specific process.

[0042] Preferably, the first pattern includes a pattern with a line spacing of 45nm to 60nm, and is affected by the rounded effect and has an upper via layer and / or a lower via layer. That is, if the line spacing of a part of the pattern is 45nm to 60nm, is affected by the rounded effect, and the part of the pattern has an upper via layer and / or a lower via layer, then the part of the pattern is the first pattern.

[0043] Preferably, the second pattern includes a pattern which is subject to MRC restriction during OPC correction and has two line ends facing each other.

[0044] Preferably, the number of times the first model is used to perform OPC correction on the first pattern is 1 to 3 times, and the correction amount is -3nm to 3nm. For example, it can be 10 times, that is, the initial metal layer is continuously OPC-cycled 2 times under the first model, and the correction amount each time is between -3nm and 3nm. In other embodiments of the present invention, it can also be other numbers, depending on the specific process.

[0045] Preferably, the number of times the first model is used to perform OPC correction on the second pattern is 1 to 2 times, and the correction amount is -1.5nm to 1.5nm. For example, it can be 10 times, that is, the initial metal layer is continuously OPCed 2 times under the second model, and the correction amount each time is between -1.5nm and 1.5nm. In other embodiments of the present invention, it can also be other numbers, depending on the specific process.

[0046] Preferably, the number of times the fourth and fifth graphics are subjected to OPC correction using the standard model is 1 to 2 times. For example, it may be 2 times, that is, the fourth and fifth graphics are subjected to OPC correction for 2 consecutive times under the standard model. In other embodiments of the present invention, it may be other numbers, depending on the specific process.

[0047] Furthermore, the OPC correction method further includes: verifying the third pattern, the fourth pattern and the fifth pattern using the first model, the standard model and the second model, and if the specifications of the first model, the standard model or the second model are not met, executing steps S4 to S8 until the verification using the first model, the standard model and the second model is passed. The OPC correction is performed in blocks, and then the multiple blocks are combined together to form the final target pattern after OPC correction.

[0048] In summary, in the OPC correction method provided in an embodiment of the present invention, a first model is established for the graphic transfer factors of the hard mask, and after OPC correction is performed using the standard model and the second model, the screened graphics are processed by OPC again using the first model, and the graphic transfer factors of the hard mask are taken into account in the OPC correction, that is, the graphic distortion of the pattern from the hard mask template to the wafer is taken into account, thereby improving the process window.

[0049] The above is only a preferred embodiment of the present invention and does not limit the present invention in any way. Any technician in the relevant technical field, without departing from the scope of the technical solution of the present invention, makes any form of equivalent replacement or modification to the technical solution and technical content disclosed in the present invention, which does not depart from the content of the technical solution of the present invention and still falls within the protection scope of the present invention.

Claims

1. An OPC correction method, It is characterized in that include: S1: preparing an OPC test pattern on a hard mask according to the hard mask transfer characteristics, performing photolithography on a wafer using the hard mask, collecting photolithography pattern data on the wafer, and establishing a first model according to the photolithography pattern data; S2: input initial metal layer; S3: providing a standard model and a second model, wherein the second model is offset in both focus and lithography energy relative to the standard model; S4: performing OPC correction on the initial metal layer using the standard model and the second model in sequence to obtain a corrected metal layer; S5: selecting a pattern sensitive to the first model from the corrected metal layer as a first pattern, selecting a pattern less affected by the first model as a second pattern, and using the remaining initial metal layer as a third pattern; S6: performing OPC correction on the first graphic using the first model to obtain a fourth graphic; S7: performing OPC correction on the second graphic using the first model to obtain a fifth graphic; S8: performing OPC correction on the fourth graphic and the fifth graphic using the standard model; S9: verifying the third figure, the fourth figure and the fifth figure using the first model, the standard model and the second model, and if they all meet the specifications of the first model, the standard model and the second model, the third figure, the fourth figure and the fifth figure are used as the corrected target figures; The first pattern includes a pattern with a line spacing of 45nm to 60nm, and is affected by a rounded corner effect and has an upper via layer and / or a lower via layer; The number of times of performing OPC correction on the first pattern by using the first model is 1 to 3 times, and the correction amount is -3nm to 3nm; The number of times the OPC correction is performed on the second pattern using the first model is 1 to 2 times, and the correction amount is -1.5 nm to 1.5 nm.

2. The OPC correction method according to claim 1, It is characterized in that The OPC test pattern includes a regular pattern and a plurality of pairs of patterns with two line ends facing each other, each pair of patterns has a different line width and a fixed distance between the line ends.

3. The OPC correction method according to claim 1, It is characterized in that The number of times the OPC correction is performed on the initial metal layer using the standard model is 8 to 15 times.

4. The OPC correction method according to claim 1, It is characterized in that The number of times the OPC correction is performed on the initial metal layer using the second model is 3 to 5 times.

5. The OPC correction method according to claim 1, It is characterized in that The second pattern includes a pattern that is subject to MRC restriction during OPC correction and has two line ends facing each other.

6. The OPC correction method according to claim 1, It is characterized in that The number of times the OPC correction is performed on the fourth graphic and the fifth graphic using the standard model is 1 to 2 times.

7. The OPC correction method according to claim 1, It is characterized in that Also includes: If the specifications of the first model, the standard model or the second model are not met, steps S4 to S8 are performed until the first model, the standard model and the second model are all verified.

Citation Information

Patent Citations

  • OPC correction method for improving process hot spots of a metal layer

    CN109240049A

  • Optical proximity correction method

    WO2013097541A1