Method of forming a connection pad and semiconductor structure

Abstract

The application provides a forming method of a connecting pad, which comprises the following steps: providing a substrate; sequentially forming a conductive layer, a first pattern definition layer and a second pattern definition layer on the surface of the substrate; sequentially forming three groups of patterns which are 120 DEG crossed with each other on the second pattern definition layer, and the crossed parts of the three groups of patterns form a hexagonal pattern definition structure on the second pattern definition layer; transferring the pattern definition structure downward, etching and removing part of the first pattern definition layer, and the remaining first pattern definition layer forms a columnar structure, and the bottom of the columnar structure is circular under the action of etching loading effect; and etching the conductive layer by taking the remaining first pattern definition layer as a mask, and the remaining conductive layer forms a circular connecting pad. Through the above design, the connecting pad can be ensured to be circular, so that the connecting pad has a larger boundary window in the process of capacitive patterning, and the problem of capacitor leakage caused by breakdown can be avoided.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor device manufacturing methods, and in particular to a connection pad forming method and a semiconductor structure. BACKGROUND

[0002] In the existing capacitor tube manufacturing scheme of a semiconductor structure, due to the exposure limit, the current immersion lithography process usually adopts two layers of masks to form linear patterns in two directions, the linear patterns in two directions enclose a blank parallelogram pattern, the pattern is transferred downward through dry etching, and finally an array of connection pads in a roughly hexagonal arrangement is formed.

[0003] However, taking a single connection pad as an example, the hole corresponding to the connection pad in the pattern transfer process changes from the original parallelogram to an ellipse and is transferred downward. Due to the etching load effect, the top of the hole is constantly subjected to plasma action and presents a regular circular shape, while the bottom of the hole is mainly subjected to the bombardment of etching gas, causing the bottom of the hole to maintain its original elliptical shape, thereby causing the connection pad to be elliptical. The long axis direction and the short axis direction of the elliptical connection pad are of different sizes, which causes a lack of margin in the short axis direction during the capacitor patterning process, and the etching cannot stop on the connection pad, causing breakdown, thereby causing problems such as capacitor leakage. SUMMARY

[0004] One main object of the present application is to overcome at least one of the above-mentioned defects of the prior art, and to provide a connection pad forming method capable of ensuring that the bottom of the connection pad is circular, thereby providing the capacitor with a larger margin.

[0005] Another main object of the present application is to overcome at least one of the above-mentioned defects of the prior art, and to provide a semiconductor structure for forming a capacitor hole via the above-mentioned forming method.

[0006] To achieve the above-mentioned objects, the present application adopts the following technical solutions:

[0007] According to one aspect of the present application, a method for forming a connection pad is provided, which comprises: providing a substrate; sequentially forming a conductive layer, a first pattern definition layer and a second pattern definition layer on the surface of the substrate; sequentially forming a first group of patterns, a second group of patterns and a third group of patterns which are 120°-crossed with each other on the second pattern definition layer, the crossing portions of the three groups of patterns form a hexagonal pattern definition structure on the second pattern definition layer; transferring the pattern definition structure downward, etching to remove part of the first pattern definition layer, and the remaining first pattern definition layer forms a columnar structure, and under the effect of etching loading, the bottom of the columnar structure is circular; etching the conductive layer with the remaining first pattern definition layer as a mask, and the remaining conductive layer forms a circular connection pad.

[0008] According to one embodiment of the present application, the first group of patterns, the second group of patterns and the third group of patterns correspond to a first group of grooves, a second group of grooves and a third group of grooves respectively, so that the pattern definition structure is a first hole; in the step of transferring the pattern definition structure downward, the first hole is transferred downward by reverse selection, so that the part of the first pattern definition layer which does not correspond to the first hole is etched and removed, and the remaining first pattern definition layer forms the columnar structure corresponding to the first hole.

[0009] According to one embodiment of the present application, the step of forming the second pattern definition layer on the surface of the substrate comprises: forming a second passivation layer on the surface of the substrate; forming a first anti-reflection layer on the surface of the second passivation layer, and the first anti-reflection layer and the second passivation layer together form the second pattern definition layer, and the three groups of grooves are formed in the first anti-reflection layer.

[0010] According to one embodiment of the present application, after the first anti-reflection layer forms the three groups of grooves, the first hole at the crossing position of the three groups of grooves is transferred to the second passivation layer to form a hole pattern of the second pattern definition layer.

[0011] According to one embodiment of the present application, the step of forming the first group of grooves on the second pattern definition layer comprises: forming a first mask layer on the surface of the second pattern definition layer; forming a first groove structure on the surface of the first mask layer by a pitch multiplication process; etching the second pattern definition layer with the first mask layer as a mask to transfer the first groove structure to the second pattern definition layer to form the first group of grooves.

[0012] According to one of the embodiments of the present application, the step of forming the first trench structure on the surface of the first mask layer by the pitch multiplication process comprises: forming a first photoresist layer on the surface of the first mask layer; patterning the first photoresist layer to form a first opening; forming a third sacrificial layer on the surface of the first mask layer and the first photoresist layer, the third sacrificial layer covering the sidewall and the bottom wall of the first opening; etching to remove the third sacrificial layer on the surface of the first mask layer and the top of the first photoresist layer, and the remaining third sacrificial layer is the first trench structure.

[0013] According to one of the embodiments of the present application, the step of forming the first mask layer on the surface of the second pattern definition layer comprises: forming a third passivation layer on the surface of the second pattern definition layer; forming a second anti-reflection layer on the surface of the third passivation layer, and the second anti-reflection layer and the third passivation layer together form the first mask layer.

[0014] According to one of the embodiments of the present application, the step of forming the second group of trenches on the second pattern definition layer comprises: forming a second mask layer on the surface of the second pattern definition layer, the second mask layer filling the first group of trenches; forming a second trench structure on the surface of the second mask layer by the pitch multiplication process; etching the second pattern definition layer with the second mask layer as a mask to transfer the second trench structure to the second pattern definition layer to form the second group of trenches.

[0015] According to one of the embodiments of the present application, the step of forming the second trench structure on the surface of the second mask layer by the pitch multiplication process comprises: forming a second photoresist layer on the surface of the second mask layer; patterning the second photoresist layer to form a second opening; forming a fourth sacrificial layer on the surface of the second mask layer and the second photoresist layer, the fourth sacrificial layer covering the sidewall and the bottom wall of the second opening; etching to remove the fourth sacrificial layer on the surface of the second mask layer and the top of the second photoresist layer, and the remaining fourth sacrificial layer is the second trench structure.

[0016] According to one of the embodiments of the present application, the step of forming the second mask layer on the surface of the second pattern definition layer comprises: forming a fourth passivation layer on the surface of the second pattern definition layer, the fourth passivation layer filling the first group of trenches; forming a third anti-reflection layer on the surface of the fourth passivation layer, and the third anti-reflection layer and the fourth passivation layer together form the second mask layer.

[0017] According to one of the embodiments of the present application, the step of forming the third group of trenches on the second pattern definition layer comprises: forming a third mask layer on the surface of the second pattern definition layer, the third mask layer filling the first group of trenches and the second group of trenches; forming a third trench structure on the surface of the third mask layer by a pitch multiplication process; etching the second pattern definition layer with the third mask layer as a mask, transferring the third trench structure to the second pattern definition layer to form the third group of trenches.

[0018] According to one of the embodiments of the present application, the step of forming the third trench structure on the surface of the third mask layer by a pitch multiplication process comprises: forming a third photoresist layer on the surface of the third mask layer; patterning the third photoresist layer to form a third opening; forming a fifth sacrificial layer on the surface of the third mask layer and the third photoresist layer, the fifth sacrificial layer covering the sidewall and bottom wall of the third opening; etching and removing the fifth sacrificial layer on the surface of the third mask layer and the top of the third photoresist layer, the remaining fifth sacrificial layer being the third trench structure.

[0019] According to one of the embodiments of the present application, the step of forming the third mask layer on the surface of the second pattern definition layer comprises: forming a fifth passivation layer on the surface of the second pattern definition layer, the fifth passivation layer filling the first group of trenches and the second group of trenches; forming a fourth anti-reflective layer on the surface of the fifth passivation layer, the fourth anti-reflective layer and the fifth passivation layer together forming the third mask layer.

[0020] According to one of the embodiments of the present application, a pattern transfer layer is formed between the first pattern definition layer and the second pattern definition layer, and the step of etching and removing part of the first pattern definition layer by reverse selection comprises: etching the pattern transfer layer with the second pattern definition layer as a mask, transferring the first hole to the pattern transfer layer to form a hexagonal second hole; forming a sixth passivation layer on the surface of the pattern transfer layer, the sixth passivation layer filling the second hole and being flush with the surface of the pattern transfer layer; removing the remaining pattern transfer layer, so that the sixth passivation layer forms a hexagonal columnar structure on the surface of the first pattern definition layer; etching the first pattern definition layer with the sixth passivation layer as a mask, the remaining first pattern definition layer forming a columnar structure.

[0021] According to one of the embodiments of the present application, the pattern transfer layer comprises a polysilicon contact layer formed on the surface of the first pattern definition layer and a second sacrificial layer formed between the polysilicon contact layer and the second pattern definition layer, and in the step of transferring the first hole to the pattern transfer layer, the first hole is transferred to the second sacrificial layer, and the second hole is formed in the second sacrificial layer.

[0022] According to one of the embodiments of the present application, the three groups of patterns are three groups of convex lines respectively, so that the pattern defining structure is a convex; wherein, in the step of transferring the pattern defining structure downward, the convex is transferred downward, so that the part of the first pattern defining layer not corresponding to the convex is etched and removed, and the remaining first pattern defining layer forms the columnar structure corresponding to the convex.

[0023] According to another aspect of the present application, a semiconductor structure with a connection pad is provided, wherein the connection pad is formed by the method for forming a connection pad and the semiconductor structure as described in the above embodiments.

[0024] From the above technical solutions, the method for forming a connection pad and the semiconductor structure provided by the present application have the following advantages and positive effects:

[0025] The method for forming a connection pad provided by the present application forms a hexagonal pattern by using a three-time exposure process, and in the process of transferring the pattern downward, under the action of etching loading effect, the columnar structure defining the connection pad is changed from the top hexagonal straight edge profile to a circular arc to form a more regular circle, thereby significantly improving the shape of the connection pad. Through the above design, the present application can ensure that the connection pad is circular, so that the connection pad has a larger boundary window in the process of capacitive patterning, and can stop on the connection pad during etching, thereby avoiding the problem of breakdown and causing capacitor leakage. BRIEF DESCRIPTION OF DRAWINGS

[0026] The various objects, features and advantages of the present application will become more apparent from the following detailed description of preferred embodiments of the application considered in conjunction with the drawings. The drawings are not necessarily to scale, the emphasis instead being placed upon illustrating the principles of the application. In the drawings, like reference numerals identify like parts throughout the views. Among other things:

[0027] Figures 1-3 , Figures 5-8 , Figures 10-13 , Figures 15-17 , Figure 19 and Figure 20 are respectively the structure schematic diagrams of the semiconductor structure in several steps of the method for forming a connection pad provided by the present application;

[0028] Figure 4 , Figure 9 , Figure 14 , Figure 18 and Figure 21 are respectively the plan views of the semiconductor structure in several steps of the method for forming a connection pad provided by the present application;

[0029] Figures 22-23is a structural schematic diagram of a semiconductor structure in several steps of another embodiment of the forming method of a connection pad proposed by the present application;

[0030] Figure 24 is Figure 22 is a plan view of a semiconductor structure in the step shown. DETAILED DESCRIPTION

[0031] The typical embodiments embodying the features and advantages of the present application will now be described in detail. It should be understood that the present application can be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and fully convey the scope of the application to those skilled in the art. In the description of the different exemplary embodiments of the present application, reference is made to the accompanying drawings, which form a part hereof, and in which are shown by way of illustration various exemplary structures, systems, and steps in which the present application can be practiced. It is to be understood that other specific arrangements of parts, structures, exemplary devices, systems, and steps can be utilized and that structural and functional modifications can be made without departing from the scope of the present application. Also, while the terms "over," "between," "inner," "outer" and the like can be used in the description of different exemplary features and elements of the present application, these terms are used in the context of the specific exemplary embodiments being discussed and are not intended to limit the scope of the present application. Any use of such terms should be interpreted accordingly.

[0032] In the following description of various example embodiments of the present application, reference is made to the accompanying drawings, which form a part hereof, and in which are shown by way of illustration various example structures, systems, and steps in which the present application can be practiced. It is to be understood that other specific arrangements of parts, structures, example devices, systems, and steps can be utilized and that structural and functional modifications can be made without departing from the scope of the present application. Also, while the terms "over," "between," "inner," "outer" and the like can be used in the description of different exemplary features and elements of the present application, these terms are used in the context of the specific exemplary embodiments being discussed and are not intended to limit the scope of the present application. Any use of such terms should be interpreted accordingly.

[0033] Embodiment one of the forming method of a connection pad

[0034] Reference is made to Figures 1-3 , Figures 5-8 , Figures 10-13 , Figure 15 and Figure 17 , which respectively representatively show structural schematic diagrams of a semiconductor structure in several steps of the forming method of a connection pad proposed by the present application. In this exemplary embodiment, the forming method of a connection pad proposed by the present application is explained by taking the manufacturing process of a capacitor tube of a semiconductor structure formed by an immersion lithography process as an example. It is easy for those skilled in the art to understand that various modifications, additions, substitutions, deletions or other changes can be made to the following detailed embodiments in order to apply the relevant design of the present application to other types of capacitor structures or other processes, and these changes are still within the scope of the principle of the forming method of a connection pad proposed by the present application.

[0035] As Figures 1-3 , Figures 5-8 , Figures 10-13 , Figures 15-17 , Figure 19 and Figure 20As shown, in this embodiment, the method for forming the connecting pad proposed in this invention includes:

[0036] Provide a substrate 100;

[0037] A conductive layer 200, a first pattern definition layer 300, and a second pattern definition layer 500 are sequentially formed on the surface of the substrate 100.

[0038] Three sets of grooves G1, G2, and G3 are sequentially formed on the second pattern definition layer 500. The three sets of grooves G1, G2, and G3 intersect each other at 120°, and the intersection position forms a hexagonal first hole h1 in the second pattern definition layer 500.

[0039] The first hole h1 is moved downward, and part of the first pattern definition layer 300 is removed by etching in a reverse selection manner. The remaining first pattern definition layer 300 forms a second columnar structure 330 corresponding to the first hole h1. Under the effect of etching load, the bottom of the second columnar structure 330 is circular.

[0040] Using the remaining first pattern definition layer 300 as a mask, the conductive layer 200 is etched, and the remaining conductive layer 200 forms a circular connecting pad 210.

[0041] As described above, the method for forming the connector pad proposed in this invention uses a three-exposure process to form a hexagonal first hole h1. During the downward transfer of the first hole h1, under the effect of the etching load, the columnar structure defining the connector pad 210 changes from the straight hexagonal outline at the top to an arc, forming a more regular circle, thereby significantly improving the shape of the connector pad 210. Through the above design, this invention can ensure that the connector pad 210 is circular, giving it a larger boundary window during capacitor patterning. Etching can stop on the connector pad 210, avoiding breakdown and capacitor leakage.

[0042] Optionally, such as Figures 1-3 , Figures 5-8 , Figures 10-13 , Figures 15-17 , Figure 19 and Figure 20 As shown, in this embodiment, the step of "forming a first pattern definition layer 300 on the surface of the conductive layer 200" may specifically include:

[0043] A first passivation layer 310 is formed on the surface of the conductive layer 200;

[0044] A first sacrificial layer 320 is formed on the surface of the first passivation layer 310, and the first sacrificial layer 320 and the first passivation layer 310 together form a first pattern definition layer 300.

[0045] Optionally, such as Figures 1-3, Figures 5-8 , Figures 10-13 , Figures 15-17 , Figure 19 and Figure 20 As shown, in this embodiment, a pattern transfer layer 400 may also be formed between the first pattern definition layer 300 and the second pattern definition layer 500, thereby realizing reverse selective etching during the downward transfer of the first hole h1 in the second pattern definition layer 500. Specifically, the formation of the pattern transfer layer 400 may include the following steps:

[0046] A polysilicon contact layer 410 (Poly-Si) is formed on the surface of the first pattern definition layer 300 (i.e., the surface of the first sacrificial layer 320);

[0047] A second sacrificial layer is formed on the surface of the polysilicon contact layer 410.

[0048] Based on the above-described process design for forming the pattern transfer layer 400, the specific process in the reverse selective etching step will be described in the following description in the order of process and figures. It should be noted that in other embodiments, in order to achieve the transfer of the first hole h1 of the second pattern definition layer 500 to the first pattern definition layer 300 by reverse selective etching to form the second columnar structure 330, the pattern transfer layer in this embodiment may not be provided, and other processes may be used instead, and this embodiment is not limited to this one.

[0049] Optionally, such as Figures 1-3 , Figures 1-3 , Figures 1-3 , Figure 1 , Figure 2 and Figure 3 As shown, in this embodiment, the step of "forming a second pattern definition layer 500 on the surface of the pattern transfer layer 400" may specifically include:

[0050] A second passivation layer 510 is formed on the surface of the pattern transfer layer 400;

[0051] A first anti-reflective layer 520 is formed on the surface of the second passivation layer 510. The first anti-reflective layer 520 and the second passivation layer 510 together form a second pattern definition layer 500. Three sets of trenches G1, G2 and G3 are formed on the first anti-reflective layer 520.

[0052] Optionally, such as Figure 4 As shown, the step of "forming the first set of trenches G1 on the second pattern definition layer 500" may specifically include:

[0053] A first mask layer 610 is formed on the surface of the second pattern definition layer 500;

[0054] The first trench structure 631 is formed on the surface of the first mask layer 610 by a spacing doubling process;

[0055] Using the first mask layer 610 as a mask, the second pattern definition layer 500 is etched to transfer the first trench structure 631 to the second pattern definition layer 500 to form the first set of trenches G1.

[0056] Furthermore, such as Figures 5-8 As shown, based on the above-described process design for forming the first set of trenches G1, in this embodiment, the step of "forming the first mask layer 610 on the surface of the second pattern definition layer 500" may specifically include:

[0057] A third passivation layer 611 is formed on the surface of the second pattern definition layer 500;

[0058] A second anti-reflection layer 612 is formed on the surface of the third passivation layer 611, and the second anti-reflection layer 612 and the third passivation layer 611 together form the first mask layer 610.

[0059] Furthermore, such as Figures 5-8 As shown, based on the above-described process design for forming the first set of trenches G1, in this embodiment, the step of "forming the first trench structure 631 on the surface of the first mask layer 610 through a spacing doubling process" may specifically include:

[0060] A first photoresist layer 620 is formed on the surface of the first mask layer 610;

[0061] The first photoresist layer 620 is patterned to form the first opening 621;

[0062] A third sacrificial layer 630 is formed on the surface of the first mask layer 610 and the first photoresist layer 620, and the third sacrificial layer 630 covers the sidewall and bottom wall of the first opening 621;

[0063] The third sacrificial layer 630 located on the surface of the first mask layer 610 and the top of the first photoresist layer 620 is removed by etching, and the remaining third sacrificial layer 630 is the first trench structure 631.

[0064] Specifically, such as Figures 5-8The diagram illustrates a typical semiconductor structure in the step of "forming a third sacrificial layer 630 on the surfaces of the first mask layer 610 and the first photoresist layer 620". Specifically, in this step, the semiconductor structure includes a substrate 100, a conductive layer 200, a first pattern defining layer 300, a pattern transfer layer 400, a second pattern defining layer 500, a first mask layer 610, a patterned first photoresist layer 620, and a third sacrificial layer 630. The conductive layer 200 is formed on the surface of the substrate 100. The first pattern defining layer 300 is formed on the surface of the conductive layer 200, and sequentially includes a first passivation layer 310 and a first sacrificial layer 320. The pattern transfer layer 400 is formed on the surface of the first sacrificial layer 320, and sequentially includes a polysilicon contact layer 410 and a second sacrificial layer 420. The second pattern defining layer 500 is formed on the surface of the second sacrificial layer 420 and includes a second passivation layer 510 and a first anti-reflection layer 520. A first mask layer 610 is formed on the surface of the second pattern definition layer 500 and includes a third passivation layer 611 and a second anti-reflection layer 612. A first photoresist layer 620 is formed on the surface of the first mask layer 610, and the first photoresist layer 620 is patterned to form a first opening 621. A third sacrificial layer 630 is formed on the surface of the first mask layer 610 and the remaining surface of the first photoresist layer 620, that is, the third sacrificial layer 630 covers the surface of the first mask layer 610 exposed to the first opening 621, and also covers the sidewalls and bottom wall of the first opening 621.

[0065] Furthermore, in this embodiment, the material of the conductive layer 200 may include, but is not limited to, tungsten (W).

[0066] Furthermore, in this embodiment, the first passivation layer 310 may, but is not limited to, include a DLC coating (diamond-like carbon).

[0067] Furthermore, in this embodiment, the material of the first sacrificial layer 320 may include, but is not limited to, silicon nitride (Si3N4).

[0068] Furthermore, in this embodiment, the material of the second sacrificial layer 420 may include, but is not limited to, silicon dioxide (SiO2).

[0069] Furthermore, in this embodiment, the second passivation layer 510 may, but is not limited to, include a DLC coating.

[0070] Furthermore, in this embodiment, the material of the first antireflective layer 520 may include, but is not limited to, silicon oxynitride (SiON).

[0071] Furthermore, in this embodiment, the third passivation layer 611 may, but is not limited to, include a DLC coating.

[0072] Furthermore, in this embodiment, the material of the third sacrificial layer 630 may include, but is not limited to, silicon dioxide.

[0073] Furthermore, in this embodiment, the material of the second antireflective layer 612 may include, but is not limited to, silicon oxynitride.

[0074] like Figure 5 The diagram illustrates a typical semiconductor structure in the step of "forming a first trench structure 631 on the surface of the first mask layer 610". Specifically, in this step, the semiconductor structure includes a substrate 100, a conductive layer 200, a first pattern definition layer 300, a pattern transfer layer 400, a second pattern definition layer 500, a first mask layer 610, and a remaining third sacrificial layer 630. Specifically, via a pitch doubling process, the portion of the third sacrificial layer 630 located on the surface of the first mask layer 610 and the top surface of the first photoresist layer 620 is etched away, and the remaining third sacrificial layer 630 forms the first trench structure 631. Furthermore, during the etching process, the remaining first photoresist layer 620 is completely removed.

[0075] like Figure 6 As shown, this represents a schematic diagram of the semiconductor structure in the step of "transferring the first trench structure 631 to the second pattern definition layer 500 to form the first set of trenches G1". Figure 7 The diagram illustrates a typical plan view of a semiconductor structure during the step of "transferring the first trench structure 631 to the second patterning layer 500 to form a first set of trenches G1". Specifically, in this step, the semiconductor structure includes a substrate 100, a conductive layer 200, a first patterning layer 300, a pattern transfer layer 400, and a second patterning layer 500 on which the first set of trenches G1 is formed. In this step, the first trench structure 631 is transferred to the first anti-reflective layer 520 of the second patterning layer 500 using a dry etching process, thereby forming the first set of trenches G1 on the surface of the first anti-reflective layer 520. Furthermore, during the etching process, the first trench structure 631 (i.e., the remaining third sacrificial layer 630) and the first mask layer 610 are completely removed.

[0076] Optionally, such as Figure 8 As shown, the step of "forming the second set of trenches G2 on the second pattern definition layer 500" may specifically include:

[0077] A second mask layer 710 is formed on the surface of the second pattern definition layer 500, and the second mask layer 710 fills the first set of trenches G1;

[0078] A second trench structure 731 is formed on the surface of the second mask layer 710 by a spacing doubling process;

[0079] Using the second mask layer 710 as a mask, the second pattern definition layer 500 is etched to transfer the second trench structure 731 to the second pattern definition layer 500 to form the second set of trenches G2.

[0080] Furthermore, such as Figure 9 As shown, based on the above-described process design for forming the second set of trenches G2, in this embodiment, the step of "forming the second mask layer 710 on the surface of the second pattern definition layer 500" may specifically include:

[0081] A fourth passivation layer 711 is formed on the surface of the second pattern definition layer 500;

[0082] A third anti-reflection layer 712 is formed on the surface of the fourth passivation layer 711, and the third anti-reflection layer 712 and the fourth passivation layer 711 together form the second mask layer 710.

[0083] Furthermore, such as Figure 9 As shown, based on the above-described process design for forming the second set of trenches G2, in this embodiment, the step of "forming the second trench structure 731 on the surface of the second mask layer 710 through a spacing doubling process" may specifically include:

[0084] A second photoresist layer 720 is formed on the surface of the second mask layer 710;

[0085] The second photoresist layer 720 is patterned to form the second opening 721;

[0086] A fourth sacrificial layer 730 is formed on the surface of the second mask layer 710 and the second photoresist layer 720, and the fourth sacrificial layer 730 covers the sidewall and bottom wall of the second opening 721;

[0087] The fourth sacrificial layer 730 located on the surface of the second mask layer 710 and on top of the second photoresist layer 720 is removed by etching, and the remaining fourth sacrificial layer 730 is the second trench structure 731.

[0088] Specifically, such as Figures 10-13The diagram illustrates a typical semiconductor structure in the step of "forming a second photoresist layer 720 in the second mask layer 710". Specifically, in this step, the semiconductor structure includes a substrate 100, a conductive layer 200, a first pattern definition layer 300, a pattern transfer layer 400, a second pattern definition layer 500 having a first set of trenches G1 formed thereon, a second mask layer 710, and a patterned second photoresist layer 720. The second mask layer 710 is formed on the surface of the second pattern definition layer 500 and fills the first set of trenches G1 on the surface of the first anti-reflective layer 520. The second mask layer 710 includes a fourth passivation layer 711 and a third anti-reflective layer 712. The second photoresist layer 720 is formed on the surface of the second mask layer 710, and the second photoresist layer 720 forms a second opening 721 through patterning.

[0089] Furthermore, in this embodiment, the fourth passivation layer 711 can be formed on the second pattern definition layer 500 by a spin coating process.

[0090] Furthermore, in this embodiment, the material of the third antireflective layer 712 may include, but is not limited to, silicon oxynitride.

[0091] like Figures 10-13 The diagram illustrates a typical semiconductor structure in the step of "forming a fourth sacrificial layer 730 on the surfaces of the second mask layer 710 and the second photoresist layer 720". Specifically, in this step, the semiconductor structure includes a substrate 100, a conductive layer 200, a first pattern definition layer 300, a pattern transfer layer 400, a second pattern definition layer 500 with a first set of trenches G1 formed thereon, a second mask layer 710, a patterned second photoresist layer 720, and a fourth sacrificial layer 730. The fourth sacrificial layer 730 is formed on the surface of the second mask layer 710 and the remaining surface of the second photoresist layer 720; that is, the fourth sacrificial layer 730 covers the surface of the second mask layer 710 exposed to the second opening 721, and also covers the sidewalls and bottom wall of the second opening 721.

[0092] Furthermore, in this embodiment, the material of the fourth sacrificial layer 730 may include, but is not limited to, silicon dioxide.

[0093] like Figures 10-13The diagram illustrates a typical semiconductor structure in the step of "forming a second trench structure 731 on the surface of the second mask layer 710". Specifically, in this step, the semiconductor structure includes a substrate 100, a conductive layer 200, a first pattern definition layer 300, a pattern transfer layer 400, a second pattern definition layer 500 with a first set of trenches G1 formed thereon, a second mask layer 710, and the remaining fourth sacrificial layer 730. Through a pitch doubling process, the portion of the fourth sacrificial layer 730 located on the surface of the second mask layer 710 and the top surface of the second photoresist layer 720 is etched away, and the remaining fourth sacrificial layer 730 forms the second trench structure 731. Furthermore, during the etching process, the remaining second photoresist layer 720 is completely removed.

[0094] like Figure 10 As shown, this represents a schematic diagram of the semiconductor structure in the step of "transferring the second trench structure 731 to the second pattern definition layer 500 to form the second set of trenches G2". Figure 11 The diagram illustrates a plan view of a semiconductor structure during the step of "transferring the second trench structure 731 to the second patterning layer 500 to form a second set of trenches G2". Specifically, in this step, the semiconductor structure includes a substrate 100, a conductive layer 200, a first patterning layer 300, a pattern transfer layer 400, and a second patterning layer 500 on which the first set of trenches G1 and the second set of trenches G2 are formed. In this step, the second trench structure 731 is transferred to the first anti-reflective layer 520 of the second patterning layer 500 using a dry etching process, thereby forming the second set of trenches G2 on the surface of the first anti-reflective layer 520 on which the first set of trenches G1 has already been formed. Furthermore, during the etching process, the second trench structure 731 (i.e., the remaining fourth sacrificial layer 730) and the second mask layer 710 are completely removed. Figure 12 In the planar diagram of the semiconductor structure shown, the first set of trenches G1 and the second set of trenches G2 have an angle of 120°.

[0095] Optionally, such as Figure 13 As shown, the step of "forming the third set of trenches G3 on the second pattern definition layer 500" may specifically include:

[0096] A third mask layer 810 is formed on the surface of the second pattern definition layer 500, and the third mask layer 810 fills the first set of trenches G1 and the second set of trenches G2.

[0097] A third trench structure 831 is formed on the surface of the third mask layer 810 by a spacing doubling process;

[0098] Using the third mask layer 810 as a mask, the second pattern definition layer 500 is etched to transfer the third trench structure 831 to the second pattern definition layer 500 to form the third set of trenches G3.

[0099] Furthermore, such as Figure 14 As shown, based on the above-described process design for forming the third set of trenches G3, in this embodiment, the step of "forming the third mask layer 810 on the surface of the second pattern definition layer 500" may specifically include:

[0100] A fifth passivation layer 811 is formed on the surface of the second pattern definition layer 500;

[0101] A fourth anti-reflection layer 812 is formed on the surface of the fifth passivation layer 811, and the fourth anti-reflection layer 812 and the fifth passivation layer 811 together form a third mask layer 810.

[0102] Furthermore, such as Figure 14 As shown, based on the above-described process design for forming the third set of trenches G3, in this embodiment, the step of "forming the third trench structure 831 on the surface of the third mask layer 810 by a spacing doubling process" may specifically include:

[0103] A third photoresist layer 820 is formed on the surface of the third mask layer 810;

[0104] The third photoresist layer 820 is patterned to form the third opening 821;

[0105] A fifth sacrificial layer 830 is formed on the surface of the third mask layer 810 and the third photoresist layer 820, and the fifth sacrificial layer 830 covers the sidewall and bottom wall of the third opening 821.

[0106] The fifth sacrificial layer 830 located on the surface of the third mask layer 810 and the top of the third photoresist layer 820 is removed by etching, and the remaining fifth sacrificial layer 830 is the third trench structure 831.

[0107] Specifically, such as Figures 15-17The diagram illustrates a typical semiconductor structure in the step of "forming a third photoresist layer 820 on the third mask layer 810". Specifically, in this step, the semiconductor structure includes a substrate 100, a conductive layer 200, a first pattern definition layer 300, a pattern transfer layer 400, a second pattern definition layer 500 having a first set of trenches G1 and a second set of trenches G2, a third mask layer 810, and a patterned third photoresist layer 820. The third mask layer 810 is formed on the surface of the second pattern definition layer 500, and fills the first set of trenches G1 and the second set of trenches G2 on the surface of the first anti-reflective layer 520. The third mask layer 810 includes a fifth passivation layer 811 and a fourth anti-reflective layer 812. The third photoresist layer 820 is formed on the surface of the third mask layer 810, and the third photoresist layer 820 forms a third opening 821 through patterning.

[0108] Furthermore, in this embodiment, the fifth passivation layer 811 can be formed on the second pattern definition layer 500 by a spin coating process.

[0109] Furthermore, in this embodiment, the material of the fourth anti-reflection layer 812 may include, but is not limited to, silicon oxynitride.

[0110] like Figure 15 The diagram illustrates a typical semiconductor structure in the step of "forming a fifth sacrificial layer 830 on the surfaces of the third mask layer 810 and the third photoresist layer 820". Specifically, in this step, the semiconductor structure includes a substrate 100, a conductive layer 200, a first pattern definition layer 300, a pattern transfer layer 400, a second pattern definition layer 500 having a first set of trenches G1 and a second set of trenches G2, a third mask layer 810, a patterned third photoresist layer 820, and a fifth sacrificial layer 830. The fifth sacrificial layer 830 is formed on the surface of the third mask layer 810 and the remaining surface of the third photoresist layer 820; that is, the fifth sacrificial layer 830 covers the surface of the third mask layer 810 exposed to the third opening 821, and also covers the sidewalls and bottom wall of the third opening 821.

[0111] Furthermore, in this embodiment, the material of the fifth sacrificial layer 830 may include, but is not limited to, silicon dioxide.

[0112] like Figure 16The diagram illustrates a representative example of a semiconductor structure in the step of "forming a third trench structure 831 on the surface of the third mask layer 810". Specifically, in this step, the semiconductor structure includes a substrate 100, a conductive layer 200, a first pattern definition layer 300, a pattern transfer layer 400, a second pattern definition layer 500 with a first set of trenches G1 and a second set of trenches G2 formed thereon, a third mask layer 810, and the remaining fifth sacrificial layer 830. Specifically, via a pitch doubling process, the portion of the fifth sacrificial layer 830 located on the surface of the third mask layer 810 and the top surface of the third photoresist layer 820 is etched away, and the remaining fifth sacrificial layer 830 forms the third trench structure 831. Furthermore, during the etching process, the remaining third photoresist layer 820 is completely removed.

[0113] like Figure 17 As shown, this represents a schematic diagram of the semiconductor structure in the step of "transferring the third trench structure 831 to the second pattern definition layer 500 to form the third set of trenches G3". Figure 18 The diagram illustrates a plan view of a semiconductor structure during the step of "transferring the third trench structure 831 to the second patterning layer 500 to form a third set of trenches G3". Specifically, in this step, the semiconductor structure includes a substrate 100, a conductive layer 200, a first patterning layer 300, a pattern transfer layer 400, and a second patterning layer 500 on which the first set of trenches G1, the second set of trenches G2, and the third set of trenches G3 are formed. In this step, the third trench structure 831 is transferred to the first anti-reflective layer 520 of the second patterning layer 500 using a dry etching process, thereby forming the third set of trenches G3 on the surface of the first anti-reflective layer 520 on which the first set of trenches G1 and the second set of trenches G2 have already been formed. Furthermore, during the etching process, the third trench structure 831 (i.e., the remaining fifth sacrificial layer 830) and the third mask layer 810 are completely removed. Figure 19 In the planar diagram of the semiconductor structure shown, the first group of trenches G1 and the third group of trenches G3 have an angle of 120°, and the second group of trenches G2 and the third group of trenches G3 have an angle of 120°, that is, the three groups of trenches G1, G2 and G3 have an angle of 120° with each other.

[0114] Optionally, such as Figure 20 As shown, in this embodiment, the step of "moving the first hole h1 downward and removing part of the first pattern definition layer 300 by reverse selection etching" may specifically include:

[0115] Using the second pattern definition layer 500 as a mask, the pattern transfer layer 400 is etched to transfer the first hole h1 to the pattern transfer layer 400 to form a hexagonal second hole h2;

[0116] A sixth passivation layer 430 is formed on the surface of the pattern transfer layer 400. The sixth passivation layer 430 fills the second hole h2 and is flush with the surface of the pattern transfer layer 400.

[0117] Remove the remaining pattern transfer layer 400 so that the sixth passivation layer 430 forms a hexagonal columnar structure (i.e., the first columnar structure 431) on the surface of the first pattern definition layer 300.

[0118] The first pattern definition layer 300 is etched using the sixth passivation layer 430 as a mask, and the remaining first pattern definition layer 300 forms a columnar structure (i.e., the second columnar structure 330).

[0119] Specifically, such as Figure 21 The diagram illustrates a typical semiconductor structure in the step of "etching the pattern transfer layer 400 using the second pattern definition layer 500 as a mask". Specifically, in this step, the semiconductor structure includes a substrate 100, a conductive layer 200, a first pattern definition layer 300, and a pattern transfer layer 400 with a second hole h2 formed therein. After forming three sets of trenches G1, G2, and G3 in the first anti-reflection layer 520, a second sacrificial layer 420 is formed in the pattern transfer layer 400 at the intersection of the three sets of trenches G1, G2, and G3, thereby forming a hexagonal second hole h in the second sacrificial layer 420.

[0120] like Figures 22-24 The diagram illustrates a typical semiconductor structure in the step of "forming a sixth passivation layer 430 on the surface of the pattern transfer layer 400". Specifically, in this step, the semiconductor structure includes a substrate 100, a conductive layer 200, a first pattern definition layer 300, a pattern transfer layer 400 with a second hole h2 formed therein, and a sixth passivation layer 430. The sixth passivation layer 430 fills the second hole h2. The sixth passivation layer 430 can be formed on the surface of the second sacrificial layer 420 of the pattern transfer layer 400 with the second hole h2, and the sixth passivation layer 430 on top of the second sacrificial layer 420 can be removed using, for example, a chemical mechanical polishing process, leaving the sixth passivation layer 430 filling the second hole h2.

[0121] like Figure 22 As shown, it represents a schematic diagram of the semiconductor structure in the step of "forming the first columnar structure 431", and Figure 23A planar view of the semiconductor structure in this step is shown representatively. Specifically, in this step, the semiconductor structure includes a substrate 100, a conductive layer 200, a first pattern definition layer 300, a remaining pattern transfer layer 400 (i.e., a polysilicon contact layer 410), and a first columnar structure 431. After the second sacrificial layer 420 is completely removed, the sixth passivation layer 430 filling the second hole h2 remains, forming the first columnar structure 431. This achieves reverse rotation etching of the first hole h1 in the second pattern definition layer 500, meaning that the structure ultimately retained during the downward pattern transfer process is the portion not obscured by the mask (second pattern definition layer 500).

[0122] like Figure 24 The diagram illustrates a representative structural schematic of a semiconductor structure during the step of "forming the second columnar structure 330". Specifically, in this step, the semiconductor structure includes a substrate 100, a conductive layer 200, and a second columnar structure 330. The first columnar structure 431, formed using the remaining pattern transfer layer 400 (i.e., the remaining second sacrificial layer 420), is used as a mask to etch away the first pattern definition layer 300. The top of the second columnar structure 330 has the same shape as the first columnar structure 431, i.e., it is hexagonal. Under the effect of the etching load, the hexagonal straight edge of the second columnar structure 330 is transformed into a rounded bottom, forming a more regular circular bottom. Furthermore, in the above step, the remaining pattern transfer layer 400 is completely removed.

[0123] like Figure 22 As shown, it represents a schematic diagram of the semiconductor structure in the step of "forming the connection pad 210", and Figures 22-24 A plan view of the semiconductor structure in this step is representatively shown. Specifically, in this step, the semiconductor structure includes a substrate 100 and the remaining conductive layer 200. Further etching removes the portion of the conductive layer 200 not obscured by the second pillar structure 330, leaving the remaining conductive layer 200 forming a connection pad 210. The shape of the connection pad 210 is consistent with the shape of the bottom of the second pillar structure 330, i.e., it is circular. Additionally, in the above step, the remaining first pattern definition layer 300 is completely removed.

[0124] It should be noted that the methods of forming the connecting pads shown in the accompanying drawings and described in this specification are merely a few examples of many methods of forming that can employ the principles of the present invention. It should be clearly understood that the principles of the present invention are by no means limited to any detail or step of the methods of forming the connecting pads shown in the accompanying drawings or described in this specification.

[0125] Method for forming the connecting pad, implementation method two

[0126] Based on the detailed description of the first embodiment of the method for forming the connecting pad proposed in this invention, the following will be combined with... ​ A second embodiment of this forming method will be described. Wherein, ​ and ​ Schematic diagrams of the semiconductor structure under several steps in the second embodiment of the formation method are shown respectively; ​ It shows ​ The diagram shows a plan view of the semiconductor structure following the steps described above. The following description, in conjunction with the above figures, will explain the process design of the second embodiment of the method for forming the connection pads proposed in this invention, which differs from that of the first embodiment.

[0127] like ​ As shown, in this embodiment, the method for forming the connecting pad proposed in this invention includes:

[0128] Provide a substrate 100;

[0129] A conductive layer 200, a first pattern definition layer 300, and a second pattern definition layer 500 are sequentially formed on the surface of the substrate 100.

[0130] Three sets of protrusions B1, B2, and B3 are sequentially formed on the second pattern definition layer 500. The three sets of protrusions B1, B2, and B3 intersect each other at 120°, and the intersection position forms a hexagonal protrusion b on the second pattern definition layer 500.

[0131] The protrusion b is moved downwards, and the portion of the first pattern definition layer 300 corresponding to the protrusion b is etched away. The remaining first pattern definition layer 300 forms a third columnar structure 340 corresponding to the protrusion b. Under the effect of etching load, the bottom of the third columnar structure 340 is circular.

[0132] Using the remaining first pattern definition layer 300 as a mask, the conductive layer 200 is etched, and the remaining conductive layer 200 forms a circular connecting pad 210.

[0133] Through the above design, in this embodiment, a protrusion b formed in the second pattern definition layer 500 replaces the first hole in the first embodiment, serving as the pattern definition structure for defining the first pattern definition layer 300 and forming a columnar structure in subsequent steps. Furthermore, in this embodiment, the protrusion b (i.e., the intersection of the three sets of protrusions B1, B2, and B3) corresponds to the remaining third columnar structure 340 of the first pattern definition layer 300; that is, the protrusion b corresponds to the position of the finally formed connecting pad. Accordingly, unlike the first embodiment where a direction-selective etching method is required when transferring the first hole downwards, in this embodiment, the downward transfer of the protrusion b is achieved through direct etching, i.e., a forward selection method. Based on this, this embodiment also eliminates the need for structures and related steps, such as the pattern transfer layer in the first embodiment, for implementing a reverse selection method.

[0134] In other words, based on the detailed description of the first and second embodiments above, in various possible embodiments that conform to the design concept of the present invention, the method for forming the connecting pad proposed by the present invention includes:

[0135] Provide a substrate;

[0136] A conductive layer, a first pattern definition layer, and a second pattern definition layer are sequentially formed on the surface of a substrate.

[0137] On the second pattern definition layer, a first group of patterns, a second group of patterns, and a third group of patterns are formed sequentially, intersecting each other at 120°. The intersection of the above three groups of patterns forms a hexagonal pattern definition structure on the second pattern definition layer.

[0138] The pattern definition structure is transferred downwards, and part of the first pattern definition layer is etched away. The remaining first pattern definition layer forms a columnar structure. Under the effect of etching load, the bottom of the columnar structure is circular.

[0139] The remaining first pattern definition layer is used as a mask to etch the conductive layer, and the remaining conductive layer forms a circular connecting pad.

[0140] Semiconductor structure implementation

[0141] Based on the detailed description of several exemplary embodiments of the method for forming the connection pad proposed in this invention, an exemplary embodiment of the semiconductor structure proposed in this invention will be described below.

[0142] In this embodiment, the semiconductor structure proposed by the present invention has a capacitor hole, and the capacitor hole of the semiconductor structure is formed by the method for forming the connecting pad proposed by the present invention and described in detail in the above embodiment.

[0143] It should be noted that the semiconductor structures shown in the accompanying drawings and described in this specification are merely a few examples among many semiconductor structures capable of employing the principles of the present invention. It should be clearly understood that the principles of the present invention are by no means limited to any detail or component of the semiconductor structures shown in the accompanying drawings or described in this specification.

[0144] In summary, the method for forming the connector pad proposed in this invention uses a three-exposure process to form a hexagonal pattern. During the downward transfer of this pattern, under the effect of the etching load, the columnar structure defining the connector pad changes from the straight hexagonal outline at the top to an arc, forming a more regular circle, thereby significantly improving the shape of the connector pad. Through the above design, this invention can ensure that the connector pad is circular, giving it a larger boundary window during capacitor patterning. Etching can stop on the connector pad, avoiding breakdown and capacitor leakage.

[0145] The foregoing has described and / or illustrated exemplary embodiments of the method for forming the connector pad and the semiconductor structure proposed in this invention. However, the embodiments of this invention are not limited to the specific embodiments described herein; rather, components and / or steps of each embodiment may be used independently and separately from other components and / or steps described herein. Each component and / or step of one embodiment may also be used in combination with other components and / or steps of other embodiments. In describing the elements / components / etc. described and / or illustrated herein, the terms “a,” “an,” and “the above” are used to indicate the presence of one or more elements / components / etc. The terms “comprising,” “including,” and “having” are used to indicate an open-ended inclusion and mean that additional elements / components / etc. may exist in addition to those listed. Furthermore, the terms “first” and “second” in the claims and specification are used only as illustrative marks and are not intended to limit the numerical scope of the subject matter.

[0146] Although the method for forming the connection pad and the semiconductor structure proposed in this invention have been described according to different specific embodiments, those skilled in the art will recognize that modifications can be made to the implementation of this invention within the spirit and scope of the claims.

Claims

1. A method of forming a connection pad, characterized by, The application relates to a method for manufacturing a semiconductor device. The method comprises the following steps: providing a substrate; forming a conductive layer, a first pattern definition layer and a second pattern definition layer on the substrate in sequence; forming a first group of patterns, a second group of patterns and a third group of patterns which are 120 degrees apart from each other on the second pattern definition layer in sequence, and forming a hexagonal pattern definition structure on the second pattern definition layer through the intersection of the three groups of patterns; transferring the pattern definition structure downward, etching and removing part of the first pattern definition layer, and forming a columnar structure with the remaining first pattern definition layer, wherein the bottom of the columnar structure is circular due to etching loading effect; 2. The method of forming a connection pad according to claim 1, wherein using the remaining first pattern definition layer as a mask to etch the conductive layer, and forming a circular connection pad with the remaining conductive layer.

3. The method of forming a connection pad according to claim 2, wherein The first group of patterns, the second group of patterns and the third group of patterns correspond to a first group of grooves, a second group of grooves and a third group of grooves respectively, so that the pattern definition structure is a first hole; in the step of transferring the pattern definition structure downward, the first hole is transferred downward through reverse selection, so that the part of the first pattern definition layer which does not correspond to the first hole is etched and removed, and the remaining first pattern definition layer forms the columnar structure corresponding to the first hole. The step of forming the second pattern definition layer on the substrate surface comprises the following steps: forming a second passivation layer on the substrate surface; 4. The method of forming a connection pad according to claim 3, wherein forming a first anti-reflection layer on the surface of the second passivation layer, and the first anti-reflection layer and the second passivation layer jointly form the second pattern definition layer, and the three groups of grooves are formed in the first anti-reflection layer.

5. The method of forming a connection pad according to claim 2, wherein After the first anti-reflection layer forms the three groups of grooves, the first hole at the intersection position of the three groups of grooves is transferred to the second passivation layer, and a hole pattern of the second pattern definition layer is formed. The step of forming the first group of grooves on the second pattern definition layer comprises the following steps: forming a first mask layer on the surface of the second pattern definition layer; forming a first groove structure on the surface of the first mask layer through a pitch multiplication process; 6. The method of forming a connection pad according to claim 5, wherein using the first mask layer as a mask to etch the second pattern definition layer, and transferring the first groove structure to the second pattern definition layer to form the first group of grooves. The step of forming the first groove structure on the surface of the first mask layer through a pitch multiplication process comprises the following steps: forming a first photoresist layer on the surface of the first mask layer; patterning the first photoresist layer to form a first opening; forming a third sacrificial layer on the surface of the first mask layer and the first photoresist layer, and the third sacrificial layer covers the sidewall and bottom wall of the first opening; 7. The method of forming a connection pad according to claim 5, wherein etching and removing the third sacrificial layer on the surface of the first mask layer and the top of the first photoresist layer, and the remaining third sacrificial layer is the first groove structure. The step of forming the first mask layer on the surface of the second pattern definition layer comprises the following steps: forming a third passivation layer on the surface of the second pattern definition layer; 8. The method of forming a connection pad according to claim 2, wherein forming a second anti-reflection layer on the surface of the third passivation layer, and the second anti-reflection layer and the third passivation layer jointly form the first mask layer. The step of forming the second group of grooves on the second pattern definition layer comprises the following steps: forming a second mask layer on the surface of the second pattern definition layer, the second mask layer filling the first group of trenches; forming a second trench structure on the surface of the second mask layer by a pitch multiplication process; etching the second pattern definition layer with the second mask layer as a mask, transferring the second trench structure to the second pattern definition layer to form a second group of trenches.

9. The method of forming a connection pad according to claim 8, wherein, The step of forming a second trench structure on the surface of the second mask layer by a pitch multiplication process comprises: forming a second photoresist layer on the surface of the second mask layer; patterning the second photoresist layer to form a second opening; forming a fourth sacrificial layer on the surface of the second mask layer and the second photoresist layer, the fourth sacrificial layer covering the sidewall and bottom wall of the second opening; etching and removing the fourth sacrificial layer on the surface of the second mask layer and the top of the second photoresist layer, the remaining fourth sacrificial layer being the second trench structure.

10. The method of forming a connection pad according to claim 8, wherein, The step of forming a second mask layer on the surface of the second pattern definition layer comprises: forming a fourth passivation layer on the surface of the second pattern definition layer, the fourth passivation layer filling the first group of trenches; forming a third anti-reflection layer on the surface of the fourth passivation layer, the third anti-reflection layer and the fourth passivation layer together forming the second mask layer.

11. The method of forming a connection pad according to claim 2, wherein The step of forming a third group of trenches on the second pattern definition layer comprises: forming a third mask layer on the surface of the second pattern definition layer, the third mask layer filling the first group of trenches and the second group of trenches; forming a third trench structure on the surface of the third mask layer by a pitch multiplication process; etching the second pattern definition layer with the third mask layer as a mask, transferring the third trench structure to the second pattern definition layer to form a third group of trenches.

12. The method of forming a connection pad according to claim 11, wherein The step of forming a third trench structure on the surface of the third mask layer by a pitch multiplication process comprises: forming a third photoresist layer on the surface of the third mask layer; patterning the third photoresist layer to form a third opening; forming a fifth sacrificial layer on the surface of the third mask layer and the third photoresist layer, the fifth sacrificial layer covering the sidewall and bottom wall of the third opening; etching and removing the fifth sacrificial layer on the surface of the third mask layer and the top of the third photoresist layer, the remaining fifth sacrificial layer being the third trench structure.

13. The method of forming a connection pad according to claim 11, wherein The step of forming a third mask layer on the surface of the second pattern definition layer comprises: forming a fifth passivation layer on the surface of the second pattern definition layer, the fifth passivation layer filling the first group of trenches and the second group of trenches; forming a fourth anti-reflection layer on the surface of the fifth passivation layer, the fourth anti-reflection layer and the fifth passivation layer together forming the third mask layer.

14. The method of forming a gasket of claim 2, wherein, The first pattern definition layer and the second pattern definition layer are formed with a pattern transfer layer, and the step of etching and removing part of the first pattern definition layer by reverse selection comprises: etching the pattern transfer layer with the second pattern definition layer as a mask, transferring the first hole to the pattern transfer layer to form a hexagonal second hole; forming a sixth passivation layer on the surface of the pattern transfer layer, the sixth passivation layer filling the second hole and being flush with the surface of the pattern transfer layer; removing the remaining pattern transfer layer, so that the sixth passivation layer forms a hexagonal column structure on the surface of the first pattern definition layer; etching the first pattern definition layer with the sixth passivation layer as a mask, and the remaining first pattern definition layer forms a column structure.

15. The method of forming a connection pad according to claim 14, wherein, The pattern transfer layer comprises a polysilicon contact layer formed on the surface of the first pattern definition layer and a second sacrificial layer formed between the polysilicon contact layer and the second pattern definition layer; in the step of transferring the first hole to the pattern transfer layer, the first hole is transferred to the second sacrificial layer, and the second hole is formed in the second sacrificial layer.

16. The method of forming a gasket of claim 1, wherein, The three groups of patterns are three groups of convex strips respectively, so that the pattern definition structure is a convex; in the step of transferring the pattern definition structure downward, the convex is transferred downward, so that the part of the first pattern definition layer not corresponding to the convex is etched and removed, and the remaining first pattern definition layer forms the column structure corresponding to the convex.

17. A semiconductor structure having a connection pad, characterized by The connection pad is formed by the method for forming the connection pad according to any one of claims 1-16.

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