An electrostatic protection circuit and a chip
By introducing a control module into the electrostatic protection circuit, detecting whether the chip is electrostatic and adjusting the working state of the electrostatic protection module, the problem of leakage in the traditional electrostatic protection circuit is solved, and more effective electrostatic protection and leakage current reduction is achieved.
Patent Information
- Application Number
- CN202110758321.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-07-05
- Publication Date
- 2025-06-10
- Estimated Expiration
- 2041-07-05
AI Technical Summary
Traditional electrostatic protection circuits have leakage problems, making it difficult to effectively protect the integrated circuit from static damage.
Design an electrostatic protection circuit, including an electrostatic protection module and a control module. The control module is used to detect whether static electricity occurs in the protected chip, and output a high-level signal when static electricity occurs, triggering the static protection module to release the static current, and output a low level when static electricity does not occur to reduce the static leakage current.
The electrostatic protection of the protected chip is achieved, while the static leakage current of the electrostatic protection module is reduced, avoiding leakage problems.
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Figure CN115588667B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of integrated circuit technology, and particularly to an electrostatic protection circuit and a chip. Background Art
[0002] Currently, the semiconductor manufacturing process is becoming more and more advanced. As the channel length becomes shorter, the junction depth becomes shallower, the application of silicide, the application of lightly doped drain (LDD), and the oxide layer becomes thinner, the window of electrostatic discharge (ESD) design becomes smaller and the challenges faced by ESD protection design become greater. To protect integrated circuits from the harm of static electricity, integrated circuits are usually electrostatically protected. However, traditional electrostatic protection circuits have problems such as leakage. Summary of the Invention
[0003] The purpose of this application is to provide an electrostatic protection circuit and a chip, which can solve the problem of leakage in the electrostatic protection circuit in the traditional technology.
[0004] To solve the above problems, according to the first aspect of this application, an electrostatic protection circuit is provided. The electrostatic protection circuit includes an electrostatic protection module and a control module.
[0005] The electrostatic protection module is located inside the chip to be protected and is connected to the circuit to be protected; and
[0006] The control module is connected to the electrostatic protection module, and is used to output a high level to the electrostatic protection module to trigger the electrostatic protection module to discharge the static current when electrostatic occurs in the chip to be protected, and output a low level to the electrostatic protection module to reduce the static leakage current of the electrostatic protection module when electrostatic does not occur in the chip to be protected.
[0007] In the embodiments of the present application, the electrostatic protection circuit includes an electrostatic protection module and a control module. The control module is connected to the electrostatic protection module. The control module is used to detect whether electrostatic occurs on the chip to be protected, and when electrostatic occurs on the chip to be protected, output a high-level signal to the electrostatic protection module as a trigger signal to trigger the electrostatic protection module to discharge the electrostatic current, thereby protecting the chip to be protected from electrostatic; specifically, the control module can be connected to the branch with a static leakage current in the electrostatic protection module. When the control module does not detect that electrostatic occurs on the chip to be protected, it outputs a low level to the branch with a static leakage current in the electrostatic protection module, so that when the chip to be protected does not have electrostatic, the voltage drop across the branch with a static leakage current can be reduced, thereby reducing the static leakage current generated by the electrostatic protection module. The electrostatic protection circuit can not only protect the chip to be protected from electrostatic, but also reduce its own leakage current.
[0008] Further, the electrostatic protection module includes:
[0009] A silicon controlled rectifier, having an anode, a cathode and a trigger terminal, the control module is connected between the anode and the cathode of the silicon controlled rectifier; and
[0010] A diode string, including a plurality of serially connected diodes, the anode of the diode string is connected to the trigger terminal of the silicon controlled rectifier, and the cathode of the diode string is connected to the control module; when electrostatic occurs on the chip to be protected, the control module outputs a high level to the cathode of the diode string to trigger the silicon controlled rectifier to discharge the electrostatic current; when the chip to be protected does not have electrostatic, the control module outputs a low level to the cathode of the diode string to reduce the voltage drop across the diode string.
[0011] Further, the trigger voltage of the silicon controlled rectifier increases with the increase in the number of diodes.
[0012] Further, the number of diodes ranges from 2 to 3.
[0013] Further, the trigger voltage of the silicon controlled rectifier is less than the maximum voltage of the electrostatic protection design window.
[0014] Further, the holding voltage of the silicon controlled rectifier is greater than the power supply voltage of the chip to be protected.
[0015] Further, the equivalent circuit of the thyristor rectifier includes a first triode, a second triode, and a first resistor. The emitter of the first triode is the anode of the thyristor rectifier. The base of the first triode is connected to the anode of the diode string and the collector of the second triode. The collector of the first triode is connected to the base of the second triode and one end of the first resistor. The emitter of the second triode is connected to the other end of the first resistor and serves as the cathode of the thyristor rectifier.
[0016] Further, the first triode is a PNP triode, and the second triode is an NPN triode.
[0017] Further, the control module includes:
[0018] A trigger unit, connected between the anode and the cathode of the thyristor rectifier, for generating a high-level signal when electrostatic discharge occurs in the protected chip and generating a low-level signal when no electrostatic discharge occurs in the protected chip; and
[0019] A buffer unit, connected between the cathode of the thyristor rectifier and the cathode of the diode string, and the input end of the buffer unit is connected to the output end of the trigger unit.
[0020] Further, the trigger unit includes a second resistor and a capacitor. One end of the capacitor is connected to the anode of the thyristor rectifier. The other end of the capacitor is connected to one end of the second resistor and serves as the output end of the trigger unit. The other end of the second resistor is connected to the cathode of the thyristor rectifier.
[0021] Further, the buffer unit includes an NMOS transistor. The source of the NMOS transistor is connected to the cathode of the thyristor rectifier. The gate of the NMOS transistor is connected to the output end of the trigger unit. The drain of the NMOS transistor is connected to the cathode of the diode string.
[0022] According to the second aspect of the present application, the present application provides a chip, including a protected circuit and the above-mentioned electrostatic protection circuit.
[0023] Further, the protected circuit includes a power supply terminal, a ground terminal, and a signal transmission terminal. The electrostatic protection circuit is connected between any two of the power supply terminal, the ground terminal, and the signal transmission terminal to perform electrostatic protection on the protected circuit.
[0024] Further, the protected circuit includes a power supply terminal, a ground terminal, and a signal transmission terminal. The electrostatic protection circuit is connected between any two of the power supply terminal, the ground terminal, and the signal transmission terminal to perform electrostatic protection on the protected circuit.
[0025] Furthermore, the chip includes a plurality of the electrostatic protection circuits, and the electrostatic protection circuits are connected between the power supply terminal and the ground terminal, between the power supply terminal and the signal transmission terminal, and between the ground terminal and the signal transmission terminal.
[0026] Furthermore, the chip includes a logic chip, an analog chip or a memory chip.
[0027] Furthermore, the chip includes a DRAM chip.
[0028] The above technical solution of the present application has the following beneficial technical effects:
[0029] 1. The present application provides an electrostatic protection circuit, which includes an electrostatic protection module and a control module. In the embodiment of the present application, the electrostatic protection circuit includes an electrostatic protection module and a control module. The control module is connected to the electrostatic protection module. The control module is used to detect whether the chip to be protected has static electricity, and when the chip to be protected has static electricity, output a high-level signal to the electrostatic protection module as a trigger signal to trigger the electrostatic protection module to discharge the static electricity current, so as to perform electrostatic protection on the chip to be protected; specifically, the control module can be connected to the branch with a static leakage current in the electrostatic protection module. When the control module does not detect that the chip to be protected has static electricity, it outputs a low level to the branch with a static leakage current in the electrostatic protection module, so that when the chip to be protected does not have static electricity, the voltage drop across the branch with a static leakage current can be reduced, thereby reducing the static leakage current generated by the electrostatic protection module. The electrostatic protection circuit can not only perform electrostatic protection on the chip to be protected, but also reduce its own leakage current. Description of the Drawings
[0030] Figure 1 A voltage-current characteristic diagram of an SCR in an ESD device;
[0031] Figure 2 Is a design window diagram of an ESD;
[0032] Figure 3 Is an equivalent circuit diagram of a DTSCR;
[0033] Figure 4 Is a structural block diagram of the electrostatic protection circuit provided in an embodiment of the present application;
[0034] Figure 5 Is an equivalent circuit diagram of a DTSCR provided in an embodiment of the present application;
[0035] Figure 6 Is an equivalent circuit diagram of the electrostatic protection circuit provided in an embodiment of the present application;
[0036] Figure 7It is a structural block diagram of a chip provided in an embodiment of the present application.
[0037] Reference numerals:
[0038] 10, electrostatic protection circuit; 20, circuit to be protected; 110, control module; 120, electrostatic protection module; 111, trigger unit; 112, buffer unit; 121, silicon controlled rectifier; 122, diode string. Detailed implementation manners
[0039] To facilitate the understanding of the present application, the present application will be described more comprehensively below with reference to the relevant drawings. Embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided so that the disclosure of the present application is thorough and comprehensive.
[0040] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs. The terms used herein in the description of the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application.
[0041] It can be understood that the terms "first", "second", etc. used in the present application can be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, without departing from the scope of the present application, a first resistor can be called a second resistor, and similarly, a second resistor can be called a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.
[0042] It can be understood that in the following embodiments, "connection", if there is an electrical signal or data transfer between the connected circuits, modules, units, etc., should be understood as "electrical connection", "communication connection", etc.
[0043] As used herein, the singular forms "a", "an" and "the" may also include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprises / include" or "has" etc. specify the presence of the stated features, wholes, steps, operations, components, parts or combinations thereof, but do not preclude the presence or addition of one or more other features, wholes, steps, operations, components, parts or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the related listed items.
[0044] At present, the ESD devices commonly used for electrostatic protection of integrated circuits usually include diodes, metal-oxide-semiconductor field-effect transistors (MOS), silicon controlled rectifiers (SCR), etc. However, the conventional SCR has a high trigger voltage, a low holding voltage, and is prone to latch-up, and is not suitable for electrostatic protection of dynamic random access memory (DRAM) products. The voltage-current characteristics of the conventional SCR are as Figure 1 shown, and it has deviated from the ESD design window as Figure 2 shown. In order to apply the SCR to the electrostatic protection of DRAM products, a diode-string-triggered silicon controlled rectifier (DTSCR) is used to replace the SCR in the traditional technology. The equivalent circuit diagram of the DTSCR is as Figure 3 shown, which includes a diode string D and a conventional SCR (the circuit diagram in the dotted box is the equivalent circuit diagram of the SCR). However, the DTSCR has a leakage problem in the branch where the diode string D is located, and the leakage path is as shown by the arrow direction in Figure 3 .
[0045] Please refer to Figure 4 , Figure 4 which is the structural block diagram of the electrostatic protection circuit provided by an embodiment of the present application. The electrostatic protection circuit includes a control module 110 and an electrostatic protection module 120. The electrostatic protection module 120 is located inside the protected chip ( Figure 1 not shown), and the electrostatic protection module 120 is connected to the protected circuit ( Figure 1 not shown). The control module 110 is connected to the electrostatic protection module 120. The control module 110 is used to output a high level to the electrostatic protection module 120 to trigger the electrostatic protection module 120 to discharge the electrostatic current when the protected chip is subjected to electrostatic, and output a low level to the electrostatic protection module 120 to reduce the static leakage current of the electrostatic protection module 120 when the protected chip is not subjected to electrostatic.
[0046] Specifically, the chip to be protected can be a logic chip, an analog chip, a memory chip, etc. When the chip to be protected is a memory chip, it can be a DRAM chip specifically. The circuit to be protected can be a functional circuit inside the chip to be protected. The electrostatic protection module 120 is located inside the chip to be protected, and the electrostatic protection module 120 is connected to the circuit to be protected. The control module 110 is connected to the electrostatic protection module 120. The control module 110 is used to detect whether electrostatic occurs on the chip to be protected, and when electrostatic occurs on the chip to be protected, it outputs a high-level signal to the electrostatic protection module 120 as a trigger signal to trigger the electrostatic protection module 120 to discharge the electrostatic current, thereby protecting the chip to be protected from electrostatic; specifically, the control module 110 can be connected to the branch with a static leakage current in the electrostatic protection module 120. When the control module 110 does not detect electrostatic on the chip to be protected, it outputs a low level to the branch with a static leakage current in the electrostatic protection module 120, so that when the chip to be protected does not have electrostatic, the voltage drop across the branch with a static leakage current can be reduced, thereby reducing the static leakage current generated by the electrostatic protection module 120. The electrostatic protection circuit in this embodiment can not only protect the chip to be protected from electrostatic, but also reduce its own leakage current.
[0047] In one embodiment, please refer to Figures 5 - 6 , the electrostatic protection module 120 includes a silicon controlled rectifier 121 and a diode string 122. The silicon controlled rectifier 121 has an anode (Anode) X1, a cathode (Cathode) X2 and a trigger terminal X3. The control module 110 is connected between the anode X1 and the cathode X2 of the silicon controlled rectifier 121. The silicon controlled rectifier 121 can be any silicon controlled rectifier well-known to those skilled in the art or a device improved therefrom.
[0048] The diode string 122 includes a plurality of serially connected diodes, which are connected end to end in sequence. The cathodes and anodes led out by the two diodes at the first end and the last end are respectively used as the cathode and anode of the diode string 122. The number of diodes can be set according to requirements. The anode of the diode string 122 is connected to the trigger terminal X3 of the thyristor rectifier 121, and the cathode of the diode string 122 is connected to the control module 110. When electrostatic discharge occurs in the protected chip, the control module 110 outputs a high level to the cathode of the diode string 122 as a trigger signal, and triggers the thyristor rectifier 121 to work through the diode string 122, thereby discharging the static current generated when electrostatic discharge occurs in the protected chip. Specifically, when electrostatic discharge occurs in the protected chip, the voltage difference across the diode string 122 is greater than the threshold voltage for the diode string 122 to conduct. The diode string 122 conducts first, and then triggers the SCR. The SCR then quickly passes a large current, thereby discharging the static electricity. Since the conduction voltage required for the diode string 122 to conduct first is relatively low, it has a relatively small trigger voltage. When no electrostatic discharge occurs in the protected chip, the control module 110 outputs a low level to the cathode of the diode string 122, greatly reducing the voltage drop across the diode string 122, thereby reducing the leakage current of the branch where the diode string 122 is located.
[0049] In this embodiment, a DTSCR is used to protect the protected chip against electrostatic discharge, so that the thyristor rectifier 121 in the electrostatic protection circuit has the advantages of low trigger voltage, adjustable trigger voltage, and holding voltage greater than the power supply voltage of the protected chip, avoiding the occurrence of latch-up, and having high electrostatic protection ability. It is especially suitable for electrostatic protection of chips with low operating voltages in advanced processes. The protected chip can be a DRAM chip. Moreover, by improving the traditional DTSCR, when no electrostatic discharge occurs in the protected chip, the control module 110 outputs a low level to the cathode of the diode string 122 in the DTSCR to reduce the voltage drop across the diode string 122, thereby reducing the leakage current of the DTSCR.
[0050] In one embodiment, the trigger voltage of the thyristor rectifier 121 increases as the number of diodes increases. The trigger voltage magnitude can be adjusted according to the operating voltage of the protected chip. The trigger voltage of the thyristor rectifier 121 is proportional to the number of diodes. Therefore, the number of diodes in the diode string 122 can be set according to the operating voltage of the protected chip. When the protected chip is a DRAM chip, its operating voltage can be 1.1V or 1.2V. According to its operating voltage, the number of diodes can be set in the range of 2 to 3, so as to meet the requirements of the DRAM chip. Of course, in order to meet the needs of the operating voltages of other chips, the number of diodes in the diode string 122 can also be set to other values according to actual needs.
[0051] In one embodiment, the trigger voltage of the thyristor 121 is less than the maximum voltage of the electrostatic protection design window. Refer to Figure 2 , the maximum value Vmax of the electrostatic protection design window (ESD design window) can be set according to the operating voltage of the chip to be protected. Subsequently, the trigger voltage Vt1 of the thyristor 121 can be set to be less than the maximum value Vmax of the electrostatic protection design window, so that the trigger point (Vt1, It1) of the thyristor 121 is within the electrostatic protection design window.
[0052] In one embodiment, the holding voltage of the thyristor 121 is greater than the power supply voltage of the chip to be protected. Still referring to Figure 2 , the minimum value of the electrostatic protection design window can be set to the power supply voltage Vdd of the chip to be protected. Furthermore, the holding voltage Vh of the thyristor 121 can be set to be greater than the power supply voltage Vdd of the chip to be protected, so that the holding point (Vh, Ih) of the thyristor is within the electrostatic protection design window. The holding voltage of the thyristor 121 being greater than the power supply voltage of the chip to be protected can avoid the occurrence of latch-up.
[0053] In one embodiment, refer to Figure 6 , the equivalent circuit of the thyristor 121 includes a first triode Q3, a second triode Q4, and a first resistor R1. The emitter of the first triode Q3 is the anode X1 of the thyristor 121. The base of the first triode Q3 is connected to the anode of the diode string 122 and the collector of the second triode Q4. The collector of the first triode Q3 is connected to the base of the second triode Q4 and one end of the first resistor R1. The emitter of the second triode Q4 is connected to the other end of the first resistor R1 and then serves as the cathode X2 of the thyristor 121. In this embodiment, the connection of the base of the first triode Q3 and the collector of the second triode Q4 serves as the trigger terminal X3 of the thyristor 121.
[0054] Optionally, the first triode Q3 is a PNP triode, and the second triode Q4 is an NPN triode.
[0055] In this embodiment, when static electricity occurs in the protected chip, the control module 110 outputs a high level to the cathode of the diode string 122, so that the diode string 122 is turned on first, and then the first transistor Q3 and the second transistor Q4 in the thyristor rectifier 121 are triggered to turn on in sequence, thereby forming multiple static discharge channels to discharge the static current generated by the protected chip. Specifically, when static electricity occurs in the protected chip, the voltage difference across the diode string 122 is greater than the threshold voltage for the diode string 122 to turn on, and the diode string 122 is turned on first, thereby triggering the first transistor Q3 and the second transistor Q4 in the SCR to turn on in sequence, and then the SCR quickly passes a large current, thereby releasing static electricity. Because the turn-on voltage required to turn on the diode string 122 first is relatively low, it has a smaller trigger voltage.
[0056] In one embodiment, still refer to Figure 6 The control module 110 includes a trigger unit 111 and a buffer unit 112. The trigger unit 111 is connected between the anode X1 and the cathode X2 of the thyristor rectifier 121, and is used to generate a high level signal when static electricity occurs in the protected chip, and to generate a low level signal when static electricity does not occur in the protected chip. The buffer unit 112 is connected between the cathode X2 of the thyristor rectifier 121 and the cathode of the diode string 122, and the input end of the buffer unit 112 is connected to the output end of the trigger unit 111.
[0057] Specifically, the trigger unit 111 generates a high-level signal when static electricity occurs in the protected chip, and the input end of the buffer unit 112 receives the high-level signal output by the trigger unit 111 and outputs the high-level signal to the diode string 122. The trigger unit 111 generates a low-level signal when static electricity does not occur in the protected chip, and the input end of the buffer unit 112 receives the low-level signal output by the trigger unit 111 and outputs the low-level signal to the diode string 122.
[0058] In one embodiment, the trigger unit 111 includes a second resistor R2 and a capacitor C. One end of the capacitor C is connected to the anode X1 of the thyristor rectifier 121, and the other end of the capacitor C is connected to one end of the second resistor R2 and serves as the output end of the trigger unit 111. The other end of the second resistor R2 is connected to the cathode X2 of the thyristor rectifier 121.
[0059] In this embodiment, the trigger unit 111 is an RC circuit, which is used to detect whether electrostatic discharge occurs on the chip to be protected. When electrostatic discharge occurs on the chip to be protected, a transient current passes through the RC circuit, causing the capacitor C to conduct, thereby pulling the potential of the output terminal of the trigger unit 111 to the same potential as the cathode X2 of the thyristor rectifier 121. When electrostatic discharge does not occur on the chip to be protected, the capacitor C in the RC circuit does not conduct, which is equivalent to a short circuit, and the output terminal of the trigger unit 111 is pulled to the same potential as the anode X1 of the thyristor rectifier 121 by the second resistor R2.
[0060] In one embodiment, the buffer unit 112 includes an NMOS transistor Mn2. The source of the NMOS transistor Mn2 is connected to the cathode X2 of the thyristor rectifier 121, the gate of the PMOS transistor Mp2 is connected to the output terminal of the trigger unit 111, and the drain of the PMOS transistor Mp2 is connected to the cathode of the diode string 122.
[0061] In this embodiment, when electrostatic discharge occurs on the chip to be protected, the trigger unit 111 outputs a high level to the input terminal of the buffer unit 112. Figure 6 wherein, point a is at a high potential, causing the NMOS transistor Mn2 to conduct; point c is at a high potential, that is, the buffer unit 112 outputs a high level to the cathode of the diode string 122, and the diode string 122 conducts forward, thereby triggering the thyristor rectifier 121 to discharge the electrostatic current. When electrostatic discharge does not occur on the chip to be protected, the trigger unit 111 outputs a low level to the input terminal of the buffer unit 112. Figure 6 wherein, point a is at a low potential, causing the NMOS transistor Mn2 to turn off; point c is at a low potential, that is, the buffer unit 112 outputs a low level to the cathode of the diode string 122, thereby reducing the voltage drop across the diode string 122 and causing the diode string 122 to be cut off, thereby greatly reducing the leakage current.
[0062] This application also provides a chip. The chip includes a circuit to be protected and the electrostatic protection circuit in any of the above embodiments. The electrostatic protection circuit can discharge the electrostatic current when electrostatic discharge occurs on the chip to ensure that the circuit to be protected is not damaged, and the static leakage current of the electrostatic protection circuit itself is small or even zero, so that the loss of the chip is not increased when electrostatic discharge does not occur on the chip.
[0063] In one embodiment, the circuit to be protected includes a power supply terminal (VDD), a ground terminal (VSS), and a signal transmission terminal. The electrostatic protection circuit is connected between any two of the power supply terminal, the ground terminal, and the signal transmission terminal to perform electrostatic protection on the circuit to be protected. Among them, the signal transmission terminal of the circuit to be protected may include an input terminal (Input) and an output terminal (Output).
[0064] In one embodiment, please refer to Figure 7, the chip includes a plurality of electrostatic protection circuits 10, and the electrostatic protection circuits 10 are connected between the power supply terminal and the ground terminal of the protected circuit 20, between the power supply terminal and the signal transmission terminal, and between the ground terminal and the signal transmission terminal; specifically, the electrostatic protection circuits 10 can be connected between the power supply terminal and the input terminal, between the input terminal and the ground terminal, between the power supply terminal and the output terminal, between the output terminal and the ground terminal, and between the power supply terminal and the ground terminal. Moreover, the anode and cathode of the electrostatic protection circuit 10 can be reversely connected to discharge the reverse electrostatic current, which can be set according to actual requirements. In this embodiment, the reverse connection is relative to the forward connection. For example, when the forward connection is that the anode of the electrostatic protection circuit 10 is connected to the power supply terminal of the protected circuit 20 and the cathode of the electrostatic protection circuit 10 is connected to the ground terminal of the protected circuit 20, the reverse connection is that the anode of the electrostatic protection circuit 10 is connected to the ground terminal of the protected circuit 20 and the cathode of the electrostatic protection circuit 10 is connected to the power supply terminal of the protected circuit 20.
[0065] In one embodiment, the chip may include a logic chip, an analog signal, a memory chip, and so on.
[0066] In one embodiment, the chip may include a DRAM chip.
[0067] In the description of this specification, the descriptions referring to terms such as "some embodiments", "other embodiments", "ideal embodiments", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.
[0068] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of concise description, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered to be within the scope described in this specification.
[0069] The above-described embodiments only represent several implementation manners of the present application, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the appended claims.
Claims
1. An electrostatic protection structure, characterized in that, it includes: an electrostatic protection module, located inside the chip to be protected and connected to the circuit to be protected; and a control module, connected to the electrostatic protection module, for outputting a high level to the electrostatic protection module to trigger the electrostatic protection module to discharge the electrostatic current when electrostatic occurs in the chip to be protected, and outputting a low level to the electrostatic protection module to reduce the static leakage current of the electrostatic protection module when no electrostatic occurs in the chip to be protected; wherein, the electrostatic protection module includes: a thyristor rectifier, having an anode, a cathode and a trigger terminal, and the control module is connected between the anode and the cathode of the thyristor rectifier; and a diode string, including a plurality of serially connected diodes, the anode of the diode string is connected to the trigger terminal of the thyristor rectifier, and the cathode of the diode string is connected to the control module; when electrostatic occurs in the chip to be protected, the control module outputs a high level to the cathode of the diode string to trigger the thyristor rectifier to discharge the electrostatic current; when no electrostatic occurs in the chip to be protected, the control module outputs a low level to the cathode of the diode string to reduce the voltage drop across the diode string.
2. The electrostatic protection structure according to claim 1, characterized in that, the trigger voltage of the thyristor rectifier increases with the increase in the number of diodes.
3. The electrostatic protection structure according to claim 1, characterized in that, the number of diodes ranges from 2 to 3.
4. The electrostatic protection structure according to claim 1, characterized in that, the trigger voltage of the thyristor rectifier is less than the maximum voltage of the electrostatic protection design window.
5. The electrostatic protection structure according to claim 1, characterized in that, the holding voltage of the thyristor rectifier is greater than the power supply voltage of the chip to be protected.
6. The electrostatic protection structure according to claim 2, characterized in that, the equivalent circuit of the thyristor rectifier includes a first triode, a second triode and a first resistor, the emitter of the first triode is the anode of the thyristor rectifier, the base of the first triode is connected to the anode of the diode string and the collector of the second triode, the collector of the first triode is connected to the base of the second triode and one end of the first resistor, and the emitter of the second triode is connected to the other end of the first resistor and then serves as the cathode of the thyristor rectifier.
7. The electrostatic protection structure according to claim 6, characterized in that, the first triode is a PNP triode and the second triode is an NPN triode.
8. The electrostatic protection structure according to claim 6, characterized in that, the control module includes: a trigger unit, connected between the anode and the cathode of the thyristor rectifier, for generating a high level signal when electrostatic occurs in the chip to be protected and generating a low level signal when no electrostatic occurs in the chip to be protected; and a buffer unit, connected between the cathode of the thyristor rectifier and the cathode of the diode string, and the input end of the buffer unit is connected to the output end of the trigger unit.
9. The electrostatic protection structure according to claim 8, wherein, the trigger unit includes a second resistor and a capacitor, one end of the capacitor is connected to the anode of the thyristor rectifier, the other end of the capacitor is connected to one end of the second resistor and serves as the output end of the trigger unit, and the other end of the second resistor is connected to the cathode of the thyristor rectifier.
10. The electrostatic protection structure according to claim 8, wherein, the buffer unit includes an NMOS transistor, the source of the NMOS transistor is connected to the cathode of the thyristor rectifier, the gate of the NMOS transistor is connected to the output end of the trigger unit, and the drain of the NMOS transistor is connected to the cathode of the diode string.
11. A chip, wherein, it includes a circuit to be protected and the electrostatic protection structure according to any one of claims 1-8.
12. The chip according to claim 11, wherein, the circuit to be protected includes a power supply terminal, a ground terminal and a signal transmission terminal, and the electrostatic protection structure is connected between any two of the power supply terminal, the ground terminal and the signal transmission terminal to perform electrostatic protection on the circuit to be protected.
13. The chip according to claim 12, wherein, the circuit to be protected includes a power supply terminal, a ground terminal and a signal transmission terminal, and the electrostatic protection structure is connected between any two of the power supply terminal, the ground terminal and the signal transmission terminal to perform electrostatic protection on the circuit to be protected.
14. The chip according to claim 13, wherein, the chip includes a plurality of the electrostatic protection structures, and the electrostatic protection circuits are connected between the power supply terminal and the ground terminal, between the power supply terminal and the signal transmission terminal, and between the ground terminal and the signal transmission terminal.
Citation Information
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