Output circuit and pump compensation control method

Abstract

The present invention discloses an output circuit and a control method thereof. The output circuit includes an output driver, a voltage regulator, a control circuit, and a charge pump circuit. The output driver includes a signal input terminal, a signal output terminal, and a first power receiving terminal. The voltage regulator is coupled to the first power receiving terminal of the output driver, the control circuit is coupled to the signal input terminal of the output driver, and the charge pump circuit is coupled to the control circuit and the first power receiving terminal of the output driver.

Description

Technical Field

[0001] The present invention relates to an output circuit and a control method thereof, and in particular to an output circuit and a related control method utilizing pump compensation. Background Art

[0002] Voltage regulators, such as low-dropout (LDO) regulators, are widely used in integrated circuits (ICs) as power supplies. Because the output voltage supplied by a voltage regulator has minimal ripple, they are often used to provide a stable voltage source for circuit operation. However, when the load circuit of the voltage regulator draws current rapidly during high-speed operation, a significant voltage drop can occur in the output voltage of the voltage regulator, causing the load circuit to operate abnormally.

[0003] To solve this problem, a large capacitor can be used to stabilize the output voltage of the voltage regulator. This large capacitor needs to supply sufficient charge to reduce ripple in the output voltage, and therefore requires a capacitance value of at least nanofarads (nF). Such a large capacitance value cannot be implemented within an integrated circuit. Therefore, an off-chip capacitor is usually required and coupled to the output of the voltage regulator.

[0004] Please refer to Figure 1 , Figure 1 To match an off-chip capacitor C IO A schematic diagram of an output circuit 10 is provided. Figure 1 As shown, the output circuit 10 includes an output driver 102 and a low dropout regulator 104. The output driver 102 can be used to output an input / output (I / O) output signal to an external transmission line having a capacitive load C L The low-dropout regulator 104 can generate an I / O power voltage VDDIO based on a power voltage AVDD from a power supply device 110 and supply the I / O power voltage VDDIO to the output driver 102. IO The output terminal of the low dropout regulator 104 is coupled to stabilize the I / O power supply voltage VDDIO. In this example, the power supply voltage AVDD can be 3.3V and the I / O power supply voltage VDDIO can be 1.8V, and the capacitive load C L If the low dropout voltage regulator 104 is used to drive five similar output drive devices and the ripple on the I / O power supply voltage VDDIO is required to be less than 5% of the voltage value, the off-chip capacitor C IOThe capacitance value must be greater than 10 nanofarads. This capacitance value is too large to make it difficult to implement the compensation capacitor inside the integrated circuit.

[0005] However, off-chip capacitors often occupy a large area, resulting in increased system costs. Therefore, it is necessary to provide a circuit system that does not require off-chip capacitors for the voltage regulator. Summary of the Invention

[0006] Therefore, the main object of the present invention is to provide an output circuit and a related control method thereof, which can utilize a pump compensation method to provide compensation charge to assist the operation of the voltage regulator without using an off-chip capacitor.

[0007] One embodiment of the present invention discloses an output circuit comprising an output driver, a voltage regulator, a control circuit, and a charge pump circuit. The output driver comprises a signal input terminal, a signal output terminal, and a first power supply terminal. The voltage regulator is coupled to the first power supply terminal of the output driver. The control circuit is coupled to the signal input terminal of the output driver. The charge pump circuit is coupled to the control circuit and the first power supply terminal of the output driver.

[0008] Another embodiment of the present invention discloses a method for controlling an output circuit, the output circuit including an output driver and a charge pump circuit. The output driver is configured to process an input / output (I / O) signal switching between a first voltage level and a second voltage level. The charge pump circuit is configured to: receive a compensation charge from a voltage source when the I / O signal is at the first voltage level; and supply the compensation charge to the output driver when the I / O signal is at the second voltage level. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 A schematic diagram of an output circuit configured with an off-chip capacitor.

[0010] Figure 2 FIG. 1 is a schematic diagram of an output circuit according to an embodiment of the present invention.

[0011] Figure 3 The waveform diagram shows the comparison of I / O power supply voltage with and without pump compensation.

[0012] Figure 4 is a schematic diagram of an exemplary embodiment of an output circuit and a charge pump circuit.

[0013] Figure 5 FIG. 4 is a schematic diagram of another exemplary embodiment of an output circuit and a charge pump circuit.

[0014] Figure 6A schematic diagram of an exemplary embodiment of a control circuit for a charge pump circuit with four switch structures.

[0015] Figure 7A 、 Figure 7B 、 Figure 7C and Figure 7D The diagram shows the operation of the switch in the charge pump circuit according to the embodiment of the present invention.

[0016] Figure 8 Schematic diagram of a pump compensation process according to an embodiment of the present invention.

[0017] The description of the accompanying drawings is as follows:

[0018] 10, 20 output circuit

[0019] 102, 202 output drive device

[0020] 104 Low Dropout Regulator

[0021] 110, 210 power supply device

[0022] C IO Off-chip capacitors

[0023] C L Capacitive load

[0024] AVDD, AVDD_LDO, AVDD_PUMP supply voltage

[0025] VDDIO I / O supply voltage

[0026] GND ground voltage

[0027] 204 Voltage Regulator

[0028] 206 Control Circuit

[0029] 208 Charge Pump Circuit

[0030] S1, S2, S3, S4 switches

[0031] C PUMP Pump capacitor

[0032] I1, I2 inverters

[0033] 602 Delay Circuit

[0034] 80 Pump Compensation Process

[0035] Steps 800-806 DETAILED DESCRIPTION

[0036] Please refer to Figure 2 , Figure 2 FIG. 1 is a schematic diagram of an output circuit 20 according to an embodiment of the present invention. Figure 2 As shown, the output circuit 20 includes an output driver 202, a voltage regulator 204, a control circuit 206, and a charge pump circuit 208. The output driver 202 can be used to output an input / output (I / O) output signal to an external transmission line having a capacitive load C L . More specifically, the output circuit 20 can be located at the output end of an integrated circuit (IC). A signal input end of the output driver device 202 can receive an I / O internal signal from an internal module of the integrated circuit, and the output driver device 202 outputs the corresponding I / O output signal to a transmission line connected to the integrated circuit through a signal output end. The output driver device 202 also includes a first power receiving end and a second power receiving end. The voltage regulator 204 is coupled to the first power receiving end of the output driver device 202, and can be used to generate an I / O power supply voltage VDDIO and supply the I / O power supply voltage VDDIO to the output driver device 202 through the first power receiving end. The second power receiving end of the output driver device 202 can be a ground end for receiving a ground voltage GND. The voltage regulator 204 can also receive a power supply voltage AVDD from a power supply device 210. In one embodiment, the voltage regulator 204 can be a low-dropout regulator (LDO regulator).

[0037] The control circuit 206 is coupled to the signal input terminal of the output driver device 202 and is configured to receive internal I / O signals and transmit them to the output driver device 202 for processing. Based on the internal I / O signals to be transmitted to the output driver device 202, the control circuit 206 generates control signals for controlling the charge pump circuit 208. The charge pump circuit 208 is coupled to the control circuit 206 and also to the first power supply terminal of the output driver device 202. Under the control of the control circuit 206, the charge pump circuit 208 outputs a compensation charge to the first power supply terminal of the output driver device 202 based on the internal I / O signals of the output driver device 202. Because the compensation charge output by the charge pump circuit 208 can be used to stabilize the I / O power supply voltage VDDIO supplied by the voltage regulator 204, an off-chip capacitor for the I / O power supply voltage VDDIO can be omitted.

[0038] Specifically, the output driver 202 may be used to output an I / O output signal to drive an external capacitive load C LIn this example, the output driver 202 is used to drive a digital output interface, wherein the I / O output signal output by the output driver 202 is a digital signal switched between two voltage levels, such as Figure 2 When the I / O output signal switches from a lower level to a higher level, the output driver 202 responds to the capacitive load C L When the I / O output signal switches from a high level to a low level, the capacitive load C L To discharge the capacitive load C L The charge is provided by the voltage regulator 204 through the I / O power supply voltage VDDIO. However, due to the insufficient bandwidth of the voltage regulator 204, the voltage regulator 204 cannot quickly supply enough charge to the output driver 202 to control the capacitive load C L In particular, when the I / O signal is a high-speed signal, the charge pump circuit 208 can immediately provide compensation charge to the output driver 202, thereby avoiding excessive voltage drop on the I / O power supply voltage VDDIO. In other words, the charge pump circuit 208 can achieve a similar Figure 1 The off-chip capacitor C IO Therefore, the output circuit 20 does not need to be equipped with additional off-chip capacitors.

[0039] Please refer to Figure 3 , Figure 3 The waveform diagram of the I / O power supply voltage VDDIO with and without pump compensation is shown in Figure 2. Figure 3 As shown, the I / O power supply voltage VDDIO can be set to 1.8V. When the system is provided with a charge pump circuit 208 coupled to the first power receiving terminal, pump compensation can be performed to maintain the level of the I / O power supply voltage VDDIO at a good level. More specifically, when the I / O output signal rises and the capacitive load C L When extracting charge from the output driver 202, the pumping operation of the charge pump circuit 208 can quickly supply charge, so that the I / O power supply voltage VDDIO immediately returns to its original level, thereby maintaining the I / O power supply voltage VDDIO at 1.8V with only a small ripple. In contrast, in the case without the pump compensation of the charge pump circuit and the charge compensation of the off-chip capacitor, when the capacitive load C L When charge is drawn from the output driver 202, the I / O power supply voltage VDDIO drops rapidly and takes a long time to return to its original level. This is because the charge is provided only by the regulator 204 (e.g., a low-dropout regulator). If the I / O power supply voltage VDDIO drops too low, the I / O output signal cannot be properly transmitted.

[0040] Figure 4FIG2 is a schematic diagram of an exemplary embodiment of the output circuit 20 and the charge pump circuit 208, illustrating how the charge pump circuit 208 performs a pumping operation to generate a compensation charge for the I / O power supply voltage VDDIO. In this example, the voltage regulator 204 may be a low-dropout voltage regulator that receives a power supply voltage AVDD_LDO from a power supply device (not shown) and outputs the I / O power supply voltage VDDIO to the output driver device 202. The charge pump circuit 208 may receive a power supply voltage AVDD_PUMP from the same or a different power supply device, wherein the level of the power supply voltage AVDD_PUMP may be the same as or different from the level of the power supply voltage AVDD_LDO.

[0041] like Figure 4 As shown, the charge pump circuit 208 includes two switches S1 and S2 and a pump capacitor C PUMP The switch S1 is coupled to the control circuit 206 and a voltage source for supplying the power supply voltage AVDD_PUMP. The switch S2 is coupled to the control circuit 206 and the first power receiving terminal of the output driver 202, so that the charge pump circuit 208 can supply compensation charge to stabilize the I / O power supply voltage VDDIO. PUMP is coupled between switches S1 and S2. More specifically, the pump capacitor C PUMP One end of is coupled between switches S1 and S2, and the pump capacitor C PUMP The other end is coupled to the ground.

[0042] The control circuit 206 can output a control signal to control the switches S1 and S2 according to the I / O internal signal of the output driver 202. More specifically, when the I / O internal signal switches from a high level to a low level, the capacitive load C L Discharge is required. At this time, the switch S1 can be turned on and the switch S2 can be turned off, and the pump capacitor C PUMP Start charging through the power supply voltage AVDD_PUMP, so that the charge is stored in the pump capacitor C PUMP When the I / O internal signal switches from low level to high level, the capacitive load C L It needs to be charged through the output driver 202. At this time, the switch S1 can be closed and the switch S2 can be opened to store the voltage stored in the pump capacitor C PUMP The charge is output to the output driver 202 to quickly charge the capacitive load C L In this case, the charge pump circuit 208 can quickly provide compensation charge to the output driver 202, thereby achieving the effect of stabilizing the I / O power supply voltage VDDIO.

[0043] Figure 5FIG2 is a schematic diagram of another exemplary embodiment of the output circuit 20 and the charge pump circuit 208. Similarly, the voltage regulator 204 may be a low-dropout voltage regulator that receives a power supply voltage AVDD_LDO from a power supply device (not shown) and outputs the I / O power supply voltage VDDIO to the output driver 202. The charge pump circuit 208 may receive a power supply voltage AVDD_PUMP from the same or a different power supply device, wherein the level of the power supply voltage AVDD_PUMP may be the same as or different from the level of the power supply voltage AVDD_LDO.

[0044] like Figure 5 As shown, the charge pump circuit 208 includes four switches S1-S4 and a pump capacitor C PUMP The implementation of switches S1 and S2 is similar to Figure 4 The structure shown is not described in detail here. The switch S3 is coupled to the control circuit 206 and the voltage source for supplying the power voltage AVDD_PUMP, and the switch S4 is coupled to the control circuit 206 and the ground terminal. PUMP is coupled between the switches S1 to S4. Specifically, the pump capacitor C PUMP One end of is coupled between switches S1 and S2, and the pump capacitor C PUMP The other end is coupled between switches S3 and S4.

[0045] In this example, the control circuit 206 can output a control signal to control the switches S1 to S4 according to the I / O internal signal of the output driver 202. Figure 6 , Figure 6 FIG. 2 is a schematic diagram of an exemplary embodiment of a control circuit 206 with a charge pump circuit 208 configured with four switches. Figure 6 As shown, the control circuit 206 includes inverters I1 and I2 and a delay circuit 602. In detail, the control circuit 206 can receive the I / O internal signal of the output driver 202 and output the I / O internal signal as a control signal for the switch S2. The inverter I1 can invert the control signal for the switch S2 to generate a control signal for the switch S1. The delay circuit 602 can delay the control signal for the switch S1 to generate a control signal for the switch S4. The inverter I2 can invert the control signal for the switch S4 to generate a control signal for the switch S3. In this example, the charge pump circuit 208 can receive a power supply voltage AVDD from the power supply device 210, wherein the power supply voltage AVDD is used to provide charge to the pump capacitor C in the charge pump circuit 208. PUMP , and also supplies power to control the normal operation of the voltage regulator 204.

[0046] Figures 7A to 7DFIG. 2 shows the operation of switches S1 to S4 in the charge pump circuit 208 according to an embodiment of the present invention. Figures 7A to 7D The waveforms of the I / O internal signals processed by the output driver 202 and the control signals for the switches S1 to S4 are shown. When these control signals are at a "high" level, the corresponding switches are turned on, and when they are at a "low" level, the corresponding switches are turned off. The waveform of the I / O power supply voltage VDDIO is also shown in FIG. Figures 7A to 7D , used to illustrate the improvement that can be achieved by the pump compensation of the charge pump circuit 208.

[0047] Figure 7A Phase 1 is shown, when the I / O internal signal of the output driver 202 is at a low level. In this phase, switches S1 and S4 are turned on and switches S2 and S3 are turned off, so that the pump capacitor C PUMP The device is coupled between the power supply device 210 and the ground terminal, and can receive compensation charges from the power supply device 210 via the power supply voltage AVDD.

[0048] Figure 7B Phase 2 is shown, when the I / O internal signal of the output driver 202 switches from a low level to a high level. In this phase, switches S2 and S4 are turned on and switches S1 and S3 are turned off. More specifically, switches S1 and S2 change state as the I / O internal signal switches, while switches S3 and S4 remain in their previous state due to the delay time generated by the delay circuit 602. Since switch S2 is turned on, the voltage stored in the pump capacitor C PUMP The compensation charge can be supplied to the power receiving terminal of the output driving device 202 through the switch S2 to reduce the voltage drop on the I / O power supply voltage VDDIO.

[0049] Figure 7C Phase 3 is shown, at which time the I / O internal signal of the output driver 202 is still at a high level. In this phase, switches S2 and S3 are turned on and switches S1 and S4 are turned off. More specifically, switches S3 and S4 transition after the delay time of the delay circuit 602, and since the I / O internal signal does not switch between phases 2 and 3, switches S1 and S2 remain in their previous states. PUMP The lower end of the power supply device 210 is switched from the ground end to the power supply device 210 , and the voltage level rising from the ground voltage GND to the power supply voltage AVDD is coupled to the power receiving end of the output driving device 202 , thereby supplying more charges to the output driving device 202 .

[0050] Figure 7DPhase 4 is shown, at which time the I / O internal signal of the output driver 202 switches from a high level to a low level. In this phase, switches S1 and S3 are turned on and switches S2 and S4 are turned off. More specifically, switches S1 and S2 transition as the I / O internal signal switches, while switches S3 and S4 remain in their previous states due to the delay time generated by the delay circuit 602. Phase 4 can be considered a reset phase, used to reset the pump capacitor C PUMP After Phase 4 is completed, the pump compensation process can return to Phase 1 and start the next cycle.

[0051] In this example, the charge pump circuit 208 can supply charge in phase 2 and phase 3, which is Figure 4 In this case, a capacitor with a smaller capacitance value can provide enough charge to reduce the voltage drop of the I / O power supply voltage VDDIO. For example, if the power supply voltage AVDD is equal to 3.3V and the I / O power supply voltage VDDIO is equal to 1.8V, and the capacitive load C driven by the output driver 202 is L When the capacitance value is equal to 100 picofarad (pF), the pump capacitor C PUMP The capacitance value can be calculated as follows:

[0052] C PUMP =C L ×VDDIO / (2×AVDD)=27.27pF;

[0053] That is, the pump capacitor C is 27.27pF. PUMP The charge pump circuit of the present invention is sufficient to stabilize the I / O power supply voltage VDDIO, and its charge compensation capability is equivalent to that of an off-chip capacitor of tens of nanofarads (nF). Thus, the charge pump circuit of the present invention can completely replace the off-chip capacitor, eliminating the need for off-chip capacitors and the pads used to connect the off-chip capacitors.

[0054] It is worth noting that the delay circuit 602 included in the control circuit 206 can separate the switching operations of switches S1 and S2 from those of switches S3 and S4. The delay circuit 602 generates a delay time, allowing the charge to be output at two different time points (e.g., Phase 2 and Phase 3 described above). If the same amount of compensation charge were supplied to the output driver 202 at the same time, the I / O power supply voltage VDDIO could rise to an excessively high level. Therefore, the delay time of the delay circuit 602 allows the pump compensation charge to be supplied more gradually, thereby maintaining the I / O power supply voltage VDDIO at a stable target level and preventing it from rising excessively.

[0055] Delay circuit 602 can be implemented in any manner. In one embodiment, delay circuit 602 may include a delay chain composed of multiple inverters. Alternatively or additionally, control circuit 206 may include various control logics to generate appropriate control signals to control switches S1-S4. The implementation of delay circuit 602 and / or control circuit 206 is not intended to limit the scope of the present invention. In one embodiment, delay circuit 602 may be omitted from control circuit 206.

[0056] It's worth noting that the charge pump circuit of the present invention operates differently from conventional charge pumps. Conventional charge pumps typically output a predetermined voltage level by receiving a periodic signal (such as a clock signal), controlling the output voltage to a specific level based on the clock signal's duty cycle and the input voltage. In contrast, the charge pump circuit of the present invention operates by receiving a digital I / O internal signal that randomly switches between "high" and "low" levels, often in a manner different from that of a clock signal. Therefore, charge is only output when the output driver device intends to charge a capacitive load, such as when the I / O output signal switches to a high level.

[0057] It should also be noted that the present invention is intended to provide an output circuit that uses pump compensation to replace off-chip capacitors. Those skilled in the art may make modifications or variations accordingly, and are not limited to these. For example, pump compensation can be used for various signal terminals that need to drive large capacitive loads, not limited to the aforementioned I / O interfaces. Such signal terminals can be any type of transmission interface, such as a Universal Serial Bus (USB), an Inter-Integrated Circuit (I2C), a Serial Peripheral Interface (SPI), a Low Voltage Differential Signaling (LVDS) interface, etc. In the above embodiment, the charge pump circuit can be a two-switch structure having switches S1-S2 or a four-switch structure having switches S1-S4. In another embodiment, switches S1-S2 can be omitted and only switches S3-S4 can be provided in the charge pump circuit. This embodiment can also be achieved by appropriate switching.

[0058] In addition, the above voltage values ​​are only examples for illustration and should not be used to limit the scope of the present invention. Figure 6In the embodiment, the charge pump circuit 208 and the voltage regulator 204 receive the same supply voltage AVDD from the same power supply device 210. However, in alternative embodiments, these circuit blocks may receive their supply voltages from different power supplies or power terminals. It should be noted that the supply voltage received by the charge pump circuit can be at any suitable level to supply charge to and store charge in the pump capacitor. When the supply voltage received by the charge pump circuit is at a higher level, a smaller pump capacitor may be sufficient to supply the same amount of compensation charge to stabilize the I / O supply voltage.

[0059] In a preferred embodiment, the amount of compensation charge provided by the charge pump circuit is well controlled. Based on the size of the capacitive load driven by the output driver, the charge pump circuit can supply an appropriate amount of compensation charge to achieve a stable I / O power supply voltage with minimal ripple and without excessive voltage boost. For example, the pump capacitor can be a variable capacitor, and a training process can be used to determine the optimal capacitance value of the pump capacitor to accommodate various capacitive loads.

[0060] The above implementation and operation of the output circuit and the charge pump circuit can be summarized as a pump compensation process 80, such as Figure 8 The pump compensation process 80 can be implemented in a charge pump circuit (such as the charge pump circuit 208 in the above embodiment) to supply compensation charge to an output driver device for processing an I / O signal. Figure 8 As shown, the pump compensation process 80 includes the following steps:

[0061] Step 800: Start.

[0062] Step 802: Receive compensation charge from a voltage source when the I / O signal is at a first voltage level.

[0063] Step 804 : Supplying compensation charge to the output driver when the I / O signal is at a second voltage level.

[0064] Step 806: End.

[0065] It is worth noting that the steps of the pump compensation process 80 can be used for a charge pump circuit having a two-switch structure. If a four-switch structure is used in conjunction with a delay circuit, the operation of supplying compensation charge can be performed in multiple stages. It should also be noted that the I / O signal mentioned in the pump compensation process 80 can be the above-mentioned I / O internal signal or I / O output signal. Generally speaking, the waveform of the I / O internal signal is similar to that of the I / O output signal, and they have the same signal transition time and different voltage levels. The relevant implementation method is shown in FIG. Figures 7A to 7D And related paragraphs, I will not repeat them here.

[0066] In summary, the present invention provides an output circuit and a related control method using pump compensation. In the output circuit, the output driver device can drive a capacitive load by outputting an I / O output signal and receiving power supply from a voltage regulator. The charge pump circuit is coupled to the power receiving terminal of the output driver device for receiving power from the voltage regulator, and is used to provide compensation charge to the output driver device to charge the capacitive load. The charge pump circuit can be controlled according to the I / O internal signal processed by the output driver device, so that the compensation charge can be output when the I / O internal signal switches to a high voltage level and the capacitive load needs to be charged. The pumping operation of the charge pump circuit can generate and output sufficient charge to the output driver device, so the use of off-chip capacitors can be omitted, and the pads for connecting off-chip capacitors can also be omitted.

[0067] The foregoing description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.

Claims

1. An output circuit comprising: an output driving device comprising a signal input terminal, a signal output terminal and a first power receiving terminal, for outputting a digital signal through the signal output terminal; a voltage stabilizer coupled to the first power receiving terminal of the output driving device, for supplying power to the output driving device through the first power receiving terminal; a control circuit coupled to the signal input terminal of the output driving device; as well as a charge pump circuit coupled to the control circuit and the first power receiving terminal of the output driving device, for outputting a compensation charge to the output driving device through the same first power receiving terminal; The charge pump circuit is used for outputting the compensation charge to the first power receiving terminal of the output driving device according to an input-output internal signal of the output driving device.

2. The output circuit according to claim 1, wherein: The charge pump circuit includes: a first switch coupled to the control circuit and a voltage source; a second switch coupled to the control circuit and the first power receiving end of the output driving device; and A pump capacitor is coupled between the first switch and the second switch.

3. The output circuit according to claim 2, wherein: The control circuit is used for generating a control signal for controlling the first switch and the second switch according to the input and output internal signals of the output driving device.

4. The output circuit according to claim 1, wherein: The output driving device further includes a second power receiving terminal, and the charge pump circuit includes: a first switch coupled to the control circuit and a voltage source; a second switch coupled to the control circuit and the first power receiving end of the output driving device; a third switch coupled to the control circuit and the voltage source; a fourth switch coupled to the control circuit and the second power receiving end of the output driving device; and A pump capacitor is coupled between the first switch, the second switch, the third switch, and the fourth switch.

5. The output circuit according to claim 4, wherein: The control circuit is used for generating control signals for controlling the first switch, the second switch, the third switch and the fourth switch according to the input and output internal signals of the output driving device.

6. The output circuit according to claim 1, wherein: The voltage regulator is a low dropout voltage regulator.

7. The output circuit according to claim 1, wherein: The output driving device is used for driving a digital output interface.

8. A method for controlling an output circuit, the output circuit comprising an output driver and a charge pump circuit, the output driver configured to process an input / output signal switching between a first voltage level and a second voltage level, the charge pump circuit configured to perform the following steps: receiving a compensation charge from a voltage source when the input-output signal is at the first voltage level; and supplying the compensation charge to the output driving device when the input-output signal is at the second voltage level; in, The input / output signal is a digital signal.

9. The method according to claim 8, wherein The second voltage level is higher than the first voltage level.

Images