A GaN HEMT epitaxial structure based on silicon substrate

Abstract

The invention discloses a GaN HEMT epitaxial structure based on a silicon substrate, belonging to the field of semiconductor technology, comprising a silicon substrate, on the surface of which a buffer layer, an AlGaN stress control layer and an N-type semiconductor layer are epitaxially grown in sequence, wherein the buffer layer is a CdS buffer layer, the N-type semiconductor layer comprises a low-quality GaN layer epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer epitaxially grown on the upper surface of the low-quality GaN layer, and a channel layer and an AlGaN barrier layer are epitaxially grown in sequence on the surface of the N-type semiconductor layer. The invention adopts CdS as a buffer material to form a buffer layer between the Si substrate and the GaN material to reduce the lattice mismatch and thermal mismatch between Si and GaN; reduces defects in the epitaxially grown N-type semiconductor layer, improves the crystal quality and the quality of the high electron mobility transistor, thereby reducing the current collapse effect of the device and improving the dynamic effect of the device.

Description

Technical Field

[0001] The invention belongs to the field of semiconductor technology, and in particular relates to a GaN HEMT epitaxial structure based on a silicon substrate. Background Art

[0002] In the past few decades, silicon, as an important basic semiconductor material, has played an extremely important role in the development of electronic integrated circuits and discrete devices. However, with the arrival of the Moore's limit of silicon materials, due to the limitations of its material properties, mainly the low bandgap width and electron drift rate, it has restricted its application in higher voltage and higher frequency situations, and it is becoming increasingly difficult to further reduce the size of circuits. Under such conditions, gallium nitride, as a third-generation semiconductor material, has a wider bandgap width (gallium nitride Eg=3.4eV, silicon Eg=1.12eV) and a higher electron drift rate (the electron drift rate of gallium nitride is 2.5 times that of silicon), which ensures that it has a higher breakdown electric field strength and is suitable for the preparation of high-voltage and high-frequency power devices. It is widely used in power electronic devices, radio frequency devices and optoelectronic devices, and is an ideal material for emerging fields such as electric vehicles, 5G base stations, and satellites.

[0003] Although GaN is an excellent semiconductor material, it is difficult to obtain large-scale commercial GaN single crystals due to the difficulty in material preparation. It is also impossible to obtain GaN devices through homoepitaxial growth. Using silicon material as the substrate for epitaxial growth of GaN devices is the most common practice in the industry. However, the inventor believes that there is a 16.9% lattice mismatch between silicon and GaN materials. A higher lattice mismatch will cause a higher defect density in the device. Heteroepitaxial growth of GaN materials on silicon substrates faces technical challenges of large lattice mismatch and high stress between silicon and GaN. The thermal expansion coefficient of GaN is 6.2×10 -6 / K, the thermal expansion coefficient of silicon is 2.6×10 -6 / K, there is also a mismatch in thermal expansion coefficients between the two. The large difference in thermal expansion coefficients makes the GaN thin film material on the silicon substrate very easy to crack, with high defect density, high interface electron localization state, and large warping / bending. As a result, the (Al)GaN epitaxial film has low quality and poor material uniformity. The leakage channel formed by the defects causes device performance failure, affects the breakdown characteristics of the device, and produces fine cracks during the epitaxial growth process due to the large lattice mismatch stress. For this reason, it is necessary to design a GaN HEMT epitaxial structure based on a silicon substrate.

[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art. Summary of the invention

[0005] Through research, the inventors found that heteroepitaxial gallium nitride materials on silicon substrates are affected by the large lattice mismatch, high stress, and large difference in thermal expansion coefficient between the silicon substrate and the gallium nitride material. This can cause the GaN thin film material on the silicon substrate to be extremely easy to crack, have a high defect density, a high localized interface electron state, and a large warping / bending, leading to technical problems such as low quality of the (Al)GaN epitaxial film and poor material uniformity.

[0006] In view of at least one of the above technical problems, the present disclosure provides a GaN HEMT epitaxial structure based on a silicon substrate, and the specific technical solution is as follows:

[0007] A GaN HEMT epitaxial structure based on a silicon substrate comprises a silicon substrate, on the surface of which a buffer layer, an AlGaN stress control layer and an N-type semiconductor layer are epitaxially grown in sequence, wherein the buffer layer is a CdS buffer layer, the N-type semiconductor layer comprises a low-quality GaN layer epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer epitaxially grown on the upper surface of the low-quality GaN layer, and on the surface of the N-type semiconductor layer a channel layer and an AlGaN barrier layer are epitaxially grown in sequence. In the present invention, CdS is used as a buffer material to form a buffer layer between the Si substrate and the GaN material to reduce the lattice mismatch and thermal mismatch between Si and GaN, reduce defects in the N-type semiconductor layer epitaxially grown thereafter, improve the crystal quality and the quality of a high electron mobility transistor, thereby reducing the current collapse effect of the device and improving the dynamic effect of the device.

[0008] In some embodiments of the present disclosure, the buffer layer is a ZnS / CdS / ZnO multilayer structure buffer layer.

[0009] In some embodiments of the present disclosure, the thickness of the silicon substrate is 300-1500 mm.

[0010] In some embodiments of the present disclosure, the thickness of the CdS buffer layer is 5 to 500 nm.

[0011] In some embodiments of the present disclosure, the thickness of the AlGaN stress control layer is 0.1-3 μm.

[0012] In some embodiments of the present disclosure, the composition of Al in the AlGaN stress control layer is greater than or equal to 5% and less than 100%.

[0013] In some embodiments of the present disclosure, the low-quality GaN layer is a doped or undoped GaN layer.

[0014] In some embodiments of the present disclosure, the high-quality GaN layer is an undoped GaN layer.

[0015] In some embodiments of the present disclosure, the high-quality GaN layer is a doped GaN layer, and the doping concentration in the doped GaN layer is lower than that in the low-quality GaN layer and lower than 10E19 / cm 3 .

[0016] Compared with the prior art, the present invention has the following beneficial effects:

[0017] The present invention adopts CdS material to form a buffer layer between the Si substrate and the GaN material to reduce the lattice mismatch and thermal mismatch between Si and GaN, reduce defects in the epitaxially grown N-type semiconductor layer, improve the crystal quality and the quality of the high electron mobility transistor, thereby reducing the current collapse effect of the device and improving the dynamic effect of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a schematic diagram of the structure of Example 1 in the structure of the present invention;

[0019] Figure 2 It is a schematic diagram of the structure of Example 3 in the structure of the present invention.

[0020] Explanation of the numbers in the figure: 1. Silicon substrate; 2. Buffer layer; 3. AlGaN stress control layer; 41. Low-quality GaN layer; 42. High-quality GaN layer; 5. Channel layer; 6. AlGaN barrier layer. DETAILED DESCRIPTION

[0021] In order to better understand the purpose, structure and function of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments.

[0022] The serial numbers assigned to the components herein are only used to distinguish the objects described and do not have any order or technical meaning. The "connection" mentioned in this disclosure includes direct and indirect "connections" unless otherwise specified. In the description of this application, it should be understood that the orientation or position relationship indicated by the orientation terms "upper" and "lower" is based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing this application and brief description, and does not indicate or imply that the device or unit referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation on this application.

[0023] As shown in the attached figure Figure 1 to Figure 2As shown, a GaN HEMT epitaxial structure based on a silicon substrate is designed, comprising a silicon substrate 1, on the surface of which a buffer layer 2, an AlGaN stress control layer 3 and an N-type semiconductor layer are epitaxially grown in sequence, wherein the buffer layer 2 is a CdS buffer layer, the N-type semiconductor layer comprises a low-quality GaN layer 41 epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer 42 epitaxially grown on the upper surface of the low-quality GaN layer, and on the surface of the N-type semiconductor layer, a channel layer 5 and an AlGaN barrier layer 6 are epitaxially grown in sequence. The present invention adopts CdS material to form a buffer layer between the Si substrate and the GaN material to reduce the lattice mismatch and thermal mismatch between Si and GaN, reduce defects in the N-type semiconductor layer epitaxially grown thereafter, and improve the crystal quality and the quality of the high electron mobility transistor. In addition, the current collapse effect of the device is reduced and the dynamic effect of the device is improved.

[0024] The working principle of the present disclosure is: to grow high-quality GaN material on a silicon substrate, a material between the two can be used as a buffer layer. The material used as the buffer layer needs to meet three conditions: first, Si is a single-element semiconductor material, and GaN is a compound semiconductor material, so the buffer layer material needs to complete the transition from single-element material to compound material; second, the material is crystalline, and the lattice type is consistent with GaN. Third, the lattice constant is between Si and GaN. First, CdS is a compound semiconductor material, which can be well transitioned from Si single-element material substrate to GaN compound material; second, CdS and GaN are both crystalline materials, and the crystal structure belongs to the sphalerite structure; third, the ZnS lattice constant is 0.382 nanometers, and the CdS lattice constant is 0.4160 nanometers. Both are between Si (lattice constant: 0.543095 nanometers) and GaN (lattice constant: 0.3189 nanometers), which can be used to transition the lattice mismatch between Si and GaN; fourth, the thermal expansion coefficient of CdS is 6.6×10 -6 / K, the thermal expansion coefficient of ZnS is 4.74×10 -6 / K~6.2×10 -6 / K, their thermal expansion coefficient is between Si and GaN materials. Therefore, CdS can be used as the first buffer layer material between Si substrate and GaN material.

[0025] In the above implementation, three embodiments are listed to implement the above technical solution:

[0026] Example 1

[0027] like Figure 1As shown, this embodiment discloses a GaN HEMT epitaxial structure based on a silicon substrate, comprising a silicon substrate 1, the thickness of the silicon substrate 1 is 300 mm, a buffer layer 2, an AlGaN stress control layer 3 and an N-type semiconductor layer are epitaxially grown in sequence on the surface of the silicon substrate 1, wherein the buffer layer 2 is a CdS buffer layer, the thickness of the CdS buffer layer is 5 nm, the thickness of the AlGaN stress control layer 3 is 0.1 μm, and the Al component of the AlGaN stress control layer 3 is 5%; the N-type semiconductor layer comprises a low-quality GaN layer 41 epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer 42 epitaxially grown on the upper surface of the low-quality GaN layer; a channel layer 5 and an AlGaN barrier layer 6 are epitaxially grown in sequence on the surface of the N-type semiconductor layer. The present invention adopts CdS material to form a buffer layer between the Si substrate and the GaN material to reduce the lattice mismatch and thermal mismatch between Si and GaN, reduce the defects in the N-type semiconductor layer epitaxially grown thereafter, and improve the crystal quality and the quality of the high electron mobility transistor. This reduces the current collapse effect of the device and improves the dynamic effect of the device.

[0028] Example 2

[0029] The present embodiment discloses a GaN HEMT epitaxial structure based on a silicon substrate, comprising a silicon substrate 1, the thickness of the silicon substrate 1 is 1300 nm, a buffer layer 2, an AlGaN stress control layer 3 and an N-type semiconductor layer are epitaxially grown in sequence on the surface of the silicon substrate 1, wherein the buffer layer 2 is a CdS buffer layer, the thickness of the CdS buffer layer is 500 nm, the thickness of the AlGaN stress control layer 3 is 3 μm, and the Al component of the AlGaN stress control layer 3 is 60%; the N-type semiconductor layer comprises a low-quality GaN layer 41 epitaxially grown on the upper surface of the AlGaN stress control layer and a GaN layer epitaxially grown on the upper surface of the AlGaN stress control layer. The high-quality GaN layer 42 on the upper surface of the low-quality GaN layer, the low-quality GaN layer 41 is a doped GaN layer, and the high-quality GaN layer 42 is a non-doped GaN layer; the channel layer 5 and the AlGaN barrier layer 6 are sequentially epitaxially grown on the surface of the N-type semiconductor layer. The present invention adopts CdS material to form a buffer layer between the Si substrate and the GaN material to reduce the lattice mismatch and thermal mismatch between Si and GaN, reduce the defects in the epitaxially grown N-type semiconductor layer, and improve the crystal quality and the quality of the high electron mobility transistor. In addition, the current collapse effect of the device is reduced and the dynamic effect of the device is improved.

[0030] Example 3

[0031] like Figure 2As shown, this embodiment discloses a GaN HEMT epitaxial structure based on a silicon substrate, including a silicon substrate 1, the thickness of the silicon substrate 1 is 1500 mm, and a buffer layer 2, an AlGaN stress control layer 3 and an N-type semiconductor layer are epitaxially grown on the surface of the silicon substrate 1 in sequence, wherein the buffer layer 2 is a ZnS / CdS / ZnO multilayer structure buffer layer, that is, the structure is Si / CdS / ZnS / ZnO / GaN, and the lattice constants of this structure are respectively: Si (lattice constant: 0.543095 nanometers) / CdS (lattice constant: 0.4160 nanometers) / ZnS (lattice constant: 0.382 nanometers) / ZnO (lattice constant: 0.3249 nanometers) / GaN (lattice constant: 0.3189 nanometers). This structure makes the lattice constant gradually change from the largest Si substrate to the smallest GaN, and the stress The AlGaN stress control layer 3 has a thickness of 2.7 μm, and the Al content of the AlGaN stress control layer 3 is 99%. The N-type semiconductor layer includes a low-quality GaN layer 41 epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer 42 epitaxially grown on the upper surface of the low-quality GaN layer. The low-quality GaN layer 41 is a doped GaN layer, and the high-quality GaN layer 42 is a doped GaN layer. The low-quality GaN layer 41 is a doped GaN layer, and the high-quality GaN layer 42 is a doped GaN layer. The doping concentration in the doped GaN layer is lower than that in the low-quality GaN layer 41 and lower than 10E19 / cm 3 ; A channel layer 5 and an AlGaN barrier layer 6 are sequentially epitaxially grown on the surface of the N-type semiconductor layer. The present invention adopts CdS material to form a buffer layer between the Si substrate and the GaN material to reduce the lattice mismatch and thermal mismatch between Si and GaN, reduce defects in the epitaxially grown N-type semiconductor layer, and improve the crystal quality and the quality of the high electron mobility transistor. In addition, the current collapse effect of the device is reduced and the dynamic effect of the device is improved.

[0032] It is to be understood that the present invention is described by some embodiments, and it is known to those skilled in the art that various changes or equivalent substitutions may be made to these features and embodiments without departing from the spirit and scope of the present invention. In addition, under the teachings of the present invention, these features and embodiments may be modified to adapt to specific circumstances and materials without departing from the spirit and scope of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are within the scope of protection of the present invention.

Claims

1. A GaN HEMT epitaxial structure based on a silicon substrate, characterized in that: The invention comprises a silicon substrate (1), on the surface of which a buffer layer (2), an AlGaN stress control layer (3) and an N-type semiconductor layer are epitaxially grown in sequence, wherein the N-type semiconductor layer comprises a low-quality GaN layer (41) epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer (42) epitaxially grown on the upper surface of the low-quality GaN layer, and on the surface of the N-type semiconductor layer a channel layer (5) and an AlGaN barrier layer (6) are epitaxially grown in sequence; The buffer layer (2) comprises a multilayer structure buffer layer of ZnS / CdS / ZnO or a CdS buffer layer; When the buffer layer (2) is a multilayer structure buffer layer of ZnS / CdS / ZnO, the structure is Si / CdS / ZnS / ZnO / GaN, and the structure makes the lattice constant gradually change from the largest Si substrate to the smallest GaN, the stress is gradually released, and the crystal quality of the epitaxial GaN is improved; The lattice constant of Si is 0.543095 nanometers, the lattice constant of CdS is 0.4160 nanometers, the lattice constant of ZnS is 0.382 nanometers, the lattice constant of ZnO is 0.3249 nanometers, and the lattice constant of GaN is 0.3189 nanometers.

2. The GaN HEMT epitaxial structure based on a silicon substrate according to claim 1, characterized in that: The thickness of the silicon substrate (1) is 300-1500 mm.

3. The GaN HEMT epitaxial structure based on a silicon substrate according to claim 1, characterized in that: The thickness of the CdS buffer layer is 5-500 nm.

4. The GaN HEMT epitaxial structure based on a silicon substrate according to claim 1, characterized in that: The thickness of the AlGaN stress control layer (3) is 0.1-3 μm.

5. The GaN HEMT epitaxial structure based on silicon substrate according to claim 1, characterized in that: The Al content in the AlGaN stress control layer (3) is greater than or equal to 5% and less than 100%.

6. The GaN HEMT epitaxial structure based on a silicon substrate according to claim 1, characterized in that: The low-quality GaN layer (41) is a doped or undoped GaN layer.

7. The GaN HEMT epitaxial structure based on silicon substrate according to claim 1, characterized in that: The high-quality GaN layer (42) is a non-doped GaN layer.

8. The GaN HEMT epitaxial structure based on a silicon substrate according to claim 1, characterized in that: The high-quality GaN layer (42) is a doped GaN layer, and the doping concentration in the doped GaN layer is lower than that in the low-quality GaN layer (41) and is lower than 10E19 / cm 3 .

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