A radar video display system
By working collaboratively among the modules in the radar primary video display system, the problems of complex software implementation and inconvenient maintenance of timing logic in the radar display and control system are solved, achieving stable and easy-to-maintain radar primary information video display.
Patent Information
- Application Number
- CN202211272909.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-10-18
- Publication Date
- 2025-10-31
- Estimated Expiration
- 2042-10-18
AI Technical Summary
In existing radar display and control systems, the software implementation of displaying video on the radar at one time has high requirements for computer hardware and software configuration, and the timing logic implementation is complex and inconvenient to maintain.
The system employs a persistence control module, a bus expansion module, a video output module, a VDMA module, a program control module, a memory, and a data interface module. The data interface module receives radar video data, the program control module writes the data to the memory and generates an interrupt, the bus expansion module divides the video stream data, the video transmission module converts the display data, the persistence control module performs persistence processing, the bus expansion module stores the data, and the program control module cancels interrupts to avoid timing conflicts.
It achieves stability and ease of maintenance for radar information video display, avoids write operation timing conflicts through interrupt mechanism to ensure normal system operation, and each module is a general-purpose IP module for easy maintenance.
Smart Images
Figure CN115685085B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of video display technology, and more specifically, to a radar-based single-video display system. Background Technology
[0002] In radar display and control systems, a single-view video display is required to achieve typical display screens such as PPI display and B-screen display. Currently, this is mainly implemented using software or timing logic. Software implementation has high requirements for computer hardware and software configuration, while timing logic implementation of single-view radar information video display requires complex programming and is inconvenient to maintain. Summary of the Invention
[0003] The technical problem to be solved by the present invention is to provide a radar one-time video display system, which aims to solve at least one of the above-mentioned technical problems.
[0004] The technical solution of the present invention to solve the above-mentioned technical problems is as follows: a radar single-video display system, comprising: a afterglow control module, a bus expansion module, a video output module, a VDMA module, a program control module, a memory, and a data interface module;
[0005] The VDMA module is connected to the bus expansion module, the persistence control module, and the program control module, respectively. The program control module is connected to the memory and the data interface module, respectively. The video output module is connected to the bus expansion module, and the bus expansion module is connected to the persistence control module.
[0006] The data interface module is used to receive radar video data transmitted by the radar and send the radar video data to the program control module.
[0007] The program control module is used to write the received radar video data into the memory and generate an interrupt;
[0008] The bus expansion module is used to divide the radar video data read from the memory into two identical first video stream data and second video stream data, transmit the first video stream data to the video output module, and transmit the second video stream data to the afterglow control module.
[0009] The video transmission module is used to convert the first video stream data into video data that meets the display requirements of the display, and send it to the display for display.
[0010] The persistence control module is used to perform persistence processing on the second video stream data to obtain the third video stream data, and send the third video stream data to the bus expansion module;
[0011] The bus expansion module is also used to store the third video stream data to the memory according to the interrupt;
[0012] The program control module is also configured to cancel the interruption after receiving the third video stream data, so that the program control module can continue to receive radar video data.
[0013] The beneficial effects of this invention are as follows: The radar video display process is as follows: the data interface module receives radar video data transmitted by the radar and sends the radar video data to the program control module. The program control module writes the received radar video data into the memory. The bus expansion module divides the radar video data read from the memory into two identical first video stream data and second video stream data. The first video stream data is transmitted to the video output module, and the second video stream data is transmitted to the persistence control module. The video transmission module converts the first video stream data into video data that meets the display requirements and sends it to the display. The persistence control module controls the second video stream data... The video stream data undergoes persistence processing to obtain a third video stream data, which is then sent to the bus expansion module. The bus expansion module stores the third video stream data in the memory. During a single video display, after the memory stores radar video data once, an interrupt is generated by the program control module. At this time, the third video stream data can be stored in the memory, and then the interrupt can be canceled. By setting the interrupt, it can be ensured that reading video data from the memory and writing video data do not occur simultaneously, avoiding timing conflicts in write operations and ensuring the normal operation of the radar information video display system. In addition, all modules involved in this solution are general-purpose IP modules, which are easy to implement and maintain.
[0014] Based on the above technical solution, the present invention can be further improved as follows.
[0015] Furthermore, the system also includes a timing control module, which is connected to the video output module;
[0016] The timing control module is used to generate timing signals that meet the display requirements of the display, and control the timing of the video data sent from the video output module to the display according to the timing signals, so that the video data is displayed on the display according to the timing signals.
[0017] The beneficial effect of adopting the above-mentioned further solution is that, through the timing control module, the displayed video data can be guaranteed to be synchronized in timing.
[0018] Furthermore, the aforementioned VDMA module includes a VDMA read channel and a VDMA write channel. Specifically, the bus expansion module is used to transmit the first video stream data to the video output module through the VDMA read channel, and to transmit the second video stream data to the persistence control module through the VDMA write channel.
[0019] The advantage of adopting the above-mentioned further solution is that by reading and writing video data through the VDMA read channel and the VDMA write channel respectively, the data transmission process can be guaranteed to be uninterrupted.
[0020] Furthermore, the aforementioned program control module is specifically used to store the third video stream data to the memory via the first HP interface.
[0021] The beneficial effect of adopting the above-mentioned further solution is that using the HP interface to transmit data can improve data transmission stability and transmission rate.
[0022] Furthermore, the aforementioned program control module communicates with the VDMA module and the data interface module respectively via the GP interface.
[0023] The advantage of adopting the above-mentioned further solution is that the GP interface is a universal AXI (advanced extensible interface) interface, and the transmission rate of each channel corresponding to the GP interface is up to 500MB / s, which can provide a channel for high-speed transmission of control information.
[0024] Furthermore, the aforementioned data interface module is specifically used to receive radar video data transmitted by the radar via AXIDMA, and to send the radar video data to the program control module via the second HP interface.
[0025] The beneficial effects of adopting the above-mentioned further solutions are that the AXIDMA method can stably receive data, and the HP interface can improve the stability and rate of data transmission.
[0026] Furthermore, the aforementioned memory is a DDR3 memory.
[0027] The advantage of adopting the above-mentioned further solutions is that DDR3 memory provides higher operating performance and lower voltage.
[0028] Furthermore, the aforementioned memory and the program control module are located on the PS terminal.
[0029] The advantage of adopting the above-mentioned further solution is that placing the memory and the program control module on the PS terminal can ensure the stability of data processing and facilitate maintenance.
[0030] Furthermore, the aforementioned afterglow control module is specifically used to decrement the non-zero bytes in each frame of the second video stream data by 1 to obtain the third video stream data.
[0031] The beneficial effect of adopting the above-mentioned further solution is that, after afterglow processing, the video stream data written to the memory can have a simulated afterglow display effect.
[0032] Additional aspects and advantages of this application will be set forth in part in the description which follows, and will become apparent from the description or may be learned by practice of this application. Attached Figure Description
[0033] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments of the present invention will be briefly introduced below.
[0034] Figure 1 This is a schematic diagram of a radar single-video display system provided in one embodiment of the present invention. Detailed Implementation
[0035] The principles and features of the present invention are described below. The examples given are only for explaining the present invention and are not intended to limit the scope of the present invention.
[0036] The technical solution of the present invention and how the technical solution of the present invention solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of the present invention will now be described with reference to the accompanying drawings.
[0037] The solution provided in this invention can be applied to any application scenario that requires the simultaneous display of radar video data. This invention provides a possible implementation method, such as... Figure 1 As shown, a radar primary video display system is provided, including: a afterglow control module, a bus expansion module, a video output module, a VDMA module, a program control module, a memory, and a data interface module;
[0038] The VDMA module is connected to the bus expansion module, the persistence control module, and the program control module, respectively. The program control module is connected to the memory and the data interface module, respectively. The video output module is connected to the bus expansion module, and the bus expansion module is connected to the persistence control module.
[0039] The data interface module is used to receive radar video data transmitted by the radar and send the radar video data to the program control module.
[0040] The program control module is used to write the received radar video data into the memory and generate an interrupt;
[0041] The bus expansion module is used to divide the radar video data read from the memory into two identical first video stream data and second video stream data, transmit the first video stream data to the video output module, and transmit the second video stream data to the afterglow control module.
[0042] The video transmission module is used to convert the first video stream data into video data that meets the display requirements of the display, and send it to the display for display.
[0043] The persistence control module is used to perform persistence processing on the second video stream data to obtain the third video stream data, and send the third video stream data to the bus expansion module;
[0044] The bus expansion module is also used to store the third video stream data to the memory according to the interrupt;
[0045] The program control module is also configured to cancel the interruption after receiving the third video stream data, so that the program control module can continue to receive radar video data.
[0046] The system of this invention provides a radar video display process as follows: the data interface module receives radar video data transmitted by the radar and sends the radar video data to the program control module. The program control module writes the received radar video data into the memory. The bus expansion module divides the radar video data read from the memory into two identical first video stream data and second video stream data. The first video stream data is transmitted to the video output module, and the second video stream data is transmitted to the persistence control module. The video transmission module converts the first video stream data into video data that meets the display requirements and sends it to the display. The persistence control module then processes the second video stream data... The video stream data undergoes persistence processing to obtain a third video stream data, which is then sent to the bus expansion module. The bus expansion module stores the third video stream data in the memory. During a single video display, after the memory stores radar video data once, an interrupt is generated by the program control module. At this time, the third video stream data can be stored in the memory, and then the interrupt can be canceled. By setting the interrupt, it can be ensured that reading video data from the memory and writing video data do not occur simultaneously, avoiding timing conflicts in write operations and ensuring the normal operation of the radar information video display system. In addition, all modules involved in this solution are general-purpose IP modules, which are easy to implement and maintain.
[0047] The following specific embodiments further illustrate the solution of the present invention. In one embodiment, a radar single-video display system includes: a persistence control module, a bus expansion module, a video output module, a VDMA module, a program control module, a memory, and a data interface module.
[0048] The VDMA module is connected to the bus expansion module, the persistence control module, and the program control module, respectively. The program control module is connected to the memory and the data interface module, respectively. The video output module is connected to the bus expansion module, and the bus expansion module is connected to the persistence control module.
[0049] The data interface module is used to receive radar video data transmitted by the radar and send the radar video data to the program control module.
[0050] The program control module is used to write the received radar video data into the memory and generate an interrupt;
[0051] The bus expansion module is used to divide the radar video data read from the memory into two identical first video stream data and second video stream data, transmit the first video stream data to the video output module, and transmit the second video stream data to the afterglow control module.
[0052] The video transmission module is used to convert the first video stream data into video data that meets the display requirements of the display, and send it to the display for display.
[0053] The persistence control module is used to perform persistence processing on the second video stream data to obtain the third video stream data, and send the third video stream data to the bus expansion module;
[0054] The bus expansion module is also used to store the third video stream data to the memory according to the interrupt;
[0055] The program control module is also configured to cancel the interruption after receiving the third video stream data, so that the program control module can continue to receive radar video data.
[0056] Optionally, the system further includes a timing control module, which is connected to the video output module;
[0057] The timing control module is used to generate timing signals that meet the display requirements of the display, and control the timing of the video data sent from the video output module to the display according to the timing signals, so that the video data is displayed on the display according to the timing signals.
[0058] Among them, the afterglow control module, video output module, timing control module, and bus expansion module do not need to communicate with the program control module and work independently according to the timing sequence.
[0059] Optionally, the data interface module can be connected to the program control module via a dual-port RAM.
[0060] Optionally, the VDMA module includes a VDMA read channel and a VDMA write channel. The bus expansion module is specifically used to transmit the first video stream data to the video output module through the VDMA read channel, and to transmit the second video stream data to the persistence control module through the VDMA write channel.
[0061] Optionally, the VDMA module can be connected to the bus expansion module, afterglow control module, and video output module via the AXIS bus to form a radar primary information video stream data channel.
[0062] Optionally, the video output module and the timing control module can be connected via a video control data bus.
[0063] Optional, the memory is DDR3 memory.
[0064] Optionally, the memory and the program control module are located at the PS end, the PS (Processing System) end.
[0065] The DDR3 memory and program control module are implemented on the PS side. The PS side can be configured with a DDR3 memory interface, a CACHE cache, a GP interface, and an HP interface. The CACHE cache is implemented internally on the PS side and is used to store radar video data.
[0066] The PS end writes graphic data, including cache update data (newly stored radar video data in DDR3), to the video buffer in the DDR3 memory via the DDR3 memory interface to display background graphics. The PS end communicates with the VDMA module data interface via the HP interface to enable VDMA to read and write data in the video buffer in DDR3. The PS end communicates with the control interface and data interface module of the VDMA module via the GP interface to set parameters of the VDMA module and data interface module, start data transmission, and receive interrupt signals from the VDMA module and data interface module to control system operation.
[0067] In this application, the program control module can also be used to set the parameters of the VDMA module. After the VDMA module receives the parameters set by the program control module and starts working, it can autonomously read and write video buffer data according to the timing sequence, exchange data with the program control module through the HP interface, and exchange data with the bus expansion module and the afterglow control module through the AXIS bus. Simultaneously, after writing one frame of video data, an interrupt is generated to notify the control software running in the program control module. The control software then updates the cache data to the video buffer in the interrupt routine (i.e., stores the new radar video data in the video buffer), thus realizing the rendering of the graphic display screen.
[0068] Optionally, the above-mentioned program control module is specifically used to control the program via the first HP interface (…). Figure 1 The HP0 shown herein stores the third video stream data in the memory. See also Figure 1 As shown, the third video stream data is written from the VDMA write channel and then written back to the DDR3 memory display buffer via the HP0 port of the program control module.
[0069] Optionally, the aforementioned data interface module is specifically used to receive radar video data transmitted by the radar via AXIDMA, and to transmit the data through the second HP interface (…). Figure 1 The HP2 module (described in the text) sends the radar video data to the program control module. After processing by the program control module, graphic display screen data is generated and written into the DDR3 memory display buffer; it is then read out through the VDMA module read channel, and works in conjunction with the bus expansion module, afterglow control module, video output module, and timing control module to realize the radar primary information video display function.
[0070] Optionally, the aforementioned video output module is specifically used to convert the first video stream data into video data (which may be RGB video data) that meets the display requirements of the monitor.
[0071] Optionally, the system may further include a control program, which is stored in DDR3 memory and runs in the program control module. The control program configures the operating parameters of the VDMA module and then initiates VDMA transmission. The operating parameters include the number of video buffers, their addresses, the number of pixels per row, the field count, enabling read / write channels, and selecting master for both write and read channel synchronization. The VDMA control module reads video data from the video buffer according to the read channel synchronization sequence and sends it to the bus expansion module and video output module via AXIS video data to generate the display data required by the display input. Simultaneously, the VDMA module, according to the write channel synchronization sequence, writes the AXIS video data, which has been relayed by the bus expansion module and processed by the persistence control module, back to the video buffer, thus updating the simulated persistence display data of the radar's primary video display data.
[0072] Optionally, the program control module implements arbitration for read and write operations on the video buffer, i.e., determining whether the video buffer is currently in a read or write operation. For program control module writes (writing new radar video data to the video buffer via the program control module) and VDMA writes (writing afterglow processed video data to the video buffer via the VDMA module), the control program needs to cooperate in implementation. The control program's write operation to the data buffer is a single-byte operation, implemented through cache to improve efficiency. The VDMA write operation to the video buffer is a burst-progressive continuous address write operation with a fixed synchronization timing. Therefore, an interrupt is generated after the VDMA finishes writing one frame of video buffer data. The control program responds to the interrupt during the synchronization gap of the VDMA write operation to the video buffer. At this time, the VDMA is not writing to the video buffer, and cache synchronization can be performed to update the data in the cache to the video buffer. Cache updates only require setting the update range (e.g., update time interval) and then initiating the update, requiring only a few instructions. This can be completed before the VDMA writes the next frame of video buffer data, and the interrupt routine ends. The above operations ensure that writing to the program control module and writing to the video buffer by VDMA will not occur simultaneously, avoiding timing conflicts in write operations and ensuring the normal operation of the radar primary information video display system.
[0073] It should be understood that the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of methods and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.
[0074] The above description is merely a preferred embodiment of the present invention and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of disclosure in this invention is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the above-described concept. For example, technical solutions formed by substituting the above features with (but not limited to) technical features with similar functions disclosed in this invention.
Claims
1. A radar single-video display system, characterized in that, include: Afterglow control module, bus expansion module, video output module, VDMA module, program control module, memory and data interface module; The VDMA module is connected to the bus expansion module, the persistence control module, and the program control module, respectively. The program control module is connected to the memory and the data interface module, respectively. The video output module is connected to the bus expansion module, and the bus expansion module is connected to the persistence control module. The data interface module is used to receive radar video data transmitted by the radar and send the radar video data to the program control module. The program control module is used to write the received radar video data into the memory and generate an interrupt; The bus expansion module is used to divide the radar video data read from the memory into two identical first video stream data and second video stream data, transmit the first video stream data to the video output module, and transmit the second video stream data to the afterglow control module. The video output module is used to convert the first video stream data into video data that meets the display requirements of the display, and send it to the display for display. The persistence control module is used to perform persistence processing on the second video stream data to obtain the third video stream data, and send the third video stream data to the bus expansion module; The bus expansion module is also used to store the third video stream data to the memory according to the interrupt; The program control module is also configured to cancel the interruption after receiving the third video stream data, so that the program control module can continue to receive radar video data.
2. The system according to claim 1, characterized in that, It also includes a timing control module, which is connected to the video output module; The timing control module is used to generate timing signals that meet the display requirements of the display, and control the timing of the video data sent from the video output module to the display according to the timing signals, so that the video data is displayed on the display according to the timing signals.
3. The system according to claim 1, characterized in that, The VDMA module includes a VDMA read channel and a VDMA write channel. The bus expansion module is specifically used to transmit the first video stream data to the video output module through the VDMA read channel, and to transmit the second video stream data to the persistence control module through the VDMA write channel.
4. The system according to any one of claims 1 to 3, characterized in that, The program control module is specifically used to store the third video stream data to the memory via the first HP interface.
5. The system according to any one of claims 1 to 3, characterized in that, The program control module communicates with the VDMA module and the data interface module via the GP interface.
6. The system according to any one of claims 1 to 3, characterized in that, The data interface module is specifically used to receive radar video data transmitted by the radar via AXIDMA, and to send the radar video data to the program control module via the second HP interface.
7. The system according to any one of claims 1 to 3, characterized in that, The memory is a DDR3 memory.
8. The system according to any one of claims 1 to 3, characterized in that, The memory and the program control module are located on the PS terminal.
9. The system according to any one of claims 1 to 3, characterized in that, The afterglow control module is specifically used to decrement the non-zero bytes in each frame of the second video stream data by 1 to obtain the third video stream data.
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