A method for improving the brightness of an inverted LED chip

Abstract

The present application relates to the field of LED, specifically relates to a kind of method for improving flip LED chip brightness, comprising the following steps: step 2: the first silicon dioxide layer is divided into reserved part and etching part;Photoresist is covered in reserved part;The structure of the obtained sapphire substrate, epitaxial layer, first silicon dioxide layer and photoresist is Wafer2;Step 3: using BOE etching Wafer2, obtains Wafer3;Silver mirror reflection layer is sputtered on the surface of Wafer3;Step 5: stripping photoresist.The beneficial effects of the present application are that: while etching the first silicon dioxide layer, the photoetching topography of silver mirror reflection layer is formed, and sputtering silver mirror radiation layer on the above photoetching topography can make the subsequent reserved silver mirror reflection layer edge adhere to the reserved part.Also, the step of photoetching silver mirror reflection layer is reduced.

Description

Technical Field

[0001] This invention relates to the field of LEDs, and more specifically to a method for improving the brightness of flip-chip LEDs. Background Technology

[0002] LED (Light Emitting Diode) is a solid-state semiconductor device that converts electrical energy into light energy. As a new type of light-emitting device, LEDs have advantages such as high luminous efficiency, energy saving, long lifespan, short response time, and environmental friendliness, thus being called the most promising next-generation light source and extremely common in the lighting field. With continuous economic development, automobiles have become increasingly common in households as a means of transportation. In the past decade or so, the trend of using LEDs for automotive lighting has become increasingly significant. From a process perspective, all LED chips for automotive lighting adopt a flip-chip structure, mainly because flip-chips eliminate the need for wire bonding, reducing the size of the package module, and are suitable for various packaging substrate materials. From the perspective of end-user usage, since cars need to drive at night and have high brightness requirements, the need to improve the brightness of automotive LED chips is becoming increasingly urgent.

[0003] In flip-chip LEDs, the silver mirror reflective layer has a certain impact on the brightness of the flip-chip LED. In a flip-chip LED, the P-type semiconductor layer is located on the N-layer side closest to the substrate. The silver mirror reflectes the light originally emitted by the P-type semiconductor layer towards the substrate, causing the light to be emitted in a direction away from the substrate. The direction of the N-layer away from the substrate is the correct direction for the flip-chip LED to emit light. The aforementioned silver mirror reflective layer thus improves the brightness of the flip-chip LED.

[0004] However, in traditional flip-chip LED manufacturing processes, the area of ​​the silver mirror reflective layer formed by vapor deposition is relatively small (please refer to the instruction manual). Figure 1 The silver mirror reflective layer 4) causes the flip-chip LED to emit less light. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a method for improving the brightness of flip-chip LEDs by increasing the area of ​​the silver mirror reflective layer, thereby increasing the luminous intensity.

[0006] To solve the above-mentioned technical problems, the present invention adopts the following technical solution: a method for improving the brightness of flip-chip LEDs, comprising the following steps:

[0007] Step 1: Deposit an epitaxial layer on a sapphire substrate. The epitaxial layer is a stacked N-type semiconductor layer, a quantum well layer, and a P-type semiconductor layer. The resulting sapphire substrate and epitaxial layer structure is Wafer1. Cover the Wafer1 surface with a first silicon dioxide layer.

[0008] Step 2: divide the first silicon dioxide layer into a reserved part and an etching part; cover the photoresist on the reserved part; the structure of the obtained sapphire substrate, epitaxial layer, first silicon dioxide layer and photoresist is Wafer2;

[0009] Step 3: etch Wafer2 using BOE to obtain Wafer3;

[0010] Step 4: sputter a silver mirror reflection layer on the surface of Wafer3;

[0011] Step 5: peel off the photoresist.

[0012] The present application has the beneficial effects that: the first silicon dioxide layer is first covered on the surface of Wafer1, the photoetching topography of the silver mirror reflection layer is formed while the first silicon dioxide layer is etched, and the silver mirror reflection layer is sputtered on the photoetching topography, so that the edge of the subsequently reserved silver mirror reflection layer is attached to the reserved part, thereby increasing the area of the silver mirror reflection layer and the luminous flux of the flip chip LED chip. Moreover, the photoetching topography of the silver mirror reflection layer is naturally formed by etching the first silicon dioxide layer, so that the step of photoetching the silver mirror reflection layer is reduced, and the production efficiency of the flip chip LED chip is improved. BRIEF DESCRIPTION OF DRAWINGS

[0013] Figure 1 Structure diagram of a flip chip LED chip produced by a traditional process;

[0014] Figure 2 Structure diagram of a finished product of a flip chip LED chip produced by the method for improving the brightness of a flip chip LED chip provided in the embodiment;

[0015] Figure 3 Structure diagram of Wafer1 in the method for improving the brightness of a flip chip LED chip provided in the embodiment;

[0016] Figure 4 Structure diagram of Wafer2 in the method for improving the brightness of a flip chip LED chip provided in the embodiment;

[0017] Figure 5 Structure diagram of a semi-finished product of a flip chip LED chip produced by the method for improving the brightness of a flip chip LED chip provided in the embodiment;

[0018] Label explanation:

[0019] 1, sapphire substrate;

[0020] 2, epitaxial layer; 21, N-type semiconductor layer; 22, quantum well layer; 23, P-type semiconductor layer; 24, MESA layer;

[0021] 3, first silicon dioxide layer; 31, reserved part; 32, etching part;

[0022] 4, silver mirror reflecting layer; 5, photoresist; 6, ITO layer. DETAILED DESCRIPTION

[0023] To make the technical contents, purposes and effects of the present application clear, the following will be described in combination with embodiments and the accompanying drawings.

[0024] Please refer to Figures 2-5 A method for improving the brightness of a flip LED chip, comprising the following steps:

[0025] Step 1: depositing an epitaxial layer 2 on a sapphire substrate 1, the epitaxial layer being a stacked N-type semiconductor layer, quantum well layer and P-type semiconductor layer, the structure of the obtained sapphire substrate and epitaxial layer being Wafer 1, and covering a first silicon dioxide layer 3 on the surface of Wafer 1;

[0026] Step 2: dividing the first silicon dioxide layer 3 into a reserved part 31 and an etched part 32, covering photoresist 5 on the reserved part 31, and the structure of the obtained sapphire substrate, epitaxial layer, first silicon dioxide layer and photoresist being Wafer 2;

[0027] Step 3: etching Wafer 2 using BOE to obtain Wafer 3;

[0028] Step 4: sputtering a silver mirror reflecting layer 4 on the surface of Wafer 3 (the structure at this time please refer to the accompanying drawings of the specification); Figure 5 );

[0029] Step 5: peeling off the photoresist 5.

[0030] The traditional process for forming the silver mirror reflecting layer 4 is (please refer to the accompanying drawings of the specification): Figure 1 : forming a photoetching pattern of the silver mirror reflecting layer 4 on the surface of Wafer 1, sputtering the silver mirror reflecting layer 4, and then covering the first silicon dioxide layer 3, but this process usually has a distance of 2-6 um between the edge of the silver mirror reflecting layer 4 and the subsequently reserved first silicon dioxide layer 3 (i.e. the reserved part 31); therefore, the area of the silver mirror reflecting layer 4 is small, which causes the problem of low light-emitting efficiency of the flip LED chip.

[0031] Compared with the traditional process, the present application has the beneficial effects that: the first silicon dioxide layer 3 is first covered on the surface of Wafer 1, the photoetching pattern of the silver mirror reflecting layer 4 is formed at the same time as the etching of the first silicon dioxide layer 3, and sputtering the silver mirror reflecting layer on the above photoetching pattern can make the edge of the subsequently reserved silver mirror reflecting layer 4 adhere to the reserved part 31, so as to increase the area of the silver mirror reflecting layer and increase the light-emitting amount of the flip LED chip. Moreover, the photoetching pattern of the silver mirror reflecting layer 4 is naturally formed by etching the first silicon dioxide layer 3, so as to reduce the step of photoetching the silver mirror reflecting layer 4 and improve the production efficiency of the flip LED chip.

[0032] Further, the step 1 "depositing epitaxial layer on sapphire substrate 1, the epitaxial layer is a stacked N-type semiconductor layer, quantum well layer and P-type semiconductor layer, the structure of the resulting sapphire substrate and epitaxial layer is Wafer1" is specifically:

[0033] Depositing N-type semiconductor layer, quantum well layer and P-type semiconductor layer on sapphire substrate by metal organic chemical vapor deposition method, the structure of the resulting sapphire substrate and epitaxial layer is Wafer1.

[0034] From the above description, a method for forming Wafer1 is provided.

[0035] Further, the step 1 "depositing N-type semiconductor layer, quantum well layer and P-type semiconductor layer on sapphire substrate by metal organic chemical vapor deposition method, the structure of the resulting sapphire substrate and epitaxial layer is Wafer1" is specifically:

[0036] Depositing N-type semiconductor layer, quantum well layer and P-type semiconductor layer on sapphire substrate by metal organic chemical vapor deposition method, photolithography of the edge of N-type semiconductor layer and quantum well layer to expose N-type semiconductor layer, P-type semiconductor layer and quantum well layer are formed into MESA layer by vertical section after photolithography, sapphire substrate and epitaxial layer after photolithography is Wafer1.

[0037] From the above description, photolithography of P-type semiconductor layer 23 and quantum well layer 22 exposes N-type semiconductor layer 21 for electrical connection with external power supply; MESA layer 24 is the junction of positive and negative electrodes, in order to avoid short circuit of epitaxial layer 2, therefore, it is necessary to cover silicon dioxide for insulation protection.

[0038] Further, the step 2 "dividing the first silicon dioxide layer 3 into a reserved part 31 and an etching part 32" is specifically:

[0039] Dividing the first silicon dioxide layer 3 into a reserved part 31 above the edge of Wafer1 and an etching part 32 above the middle of Wafer1; the edge of the etching part 32 is 7um-13um away from MESA layer.

[0040] From the above description, the position and area size of the etching part 32 are defined.

[0041] Further, the step 4 "sputtering silver mirror reflection layer 4 on the surface of Wafer3" is specifically:

[0042] ITO layer 6 is evaporated on the surface of P-type semiconductor layer of Wafer3 to obtain Wafer4, and silver mirror reflection layer 4 is sputtered on the surface of Wafer4.

[0043] From the above description, the flip LED chip further comprises a P pole, the ITO layer 6 is between the P pole and the P-type semiconductor layer, the ITO layer 6 has the function of diffusing current, so that the current flows more uniformly through the P-type semiconductor layer, and the luminous quantity of the flip LED chip is improved.

[0044] Further, the "ITO layer 6 is evaporated in the middle of the surface of the P-type semiconductor layer of Wafer 3" is specifically:

[0045] The ITO layer 6 is evaporated in the middle of the surface of the P-type semiconductor layer of Wafer 3, and the edge of the ITO layer 6 is 2-6um away from the reserved part 2 arranged in step two.

[0046] From the above description, the above description defines the position and area of the ITO layer 6.

[0047] Further, the "first silicon dioxide layer 3 is covered on the surface of Wafer 1" of step 1 is specifically:

[0048] The second silicon dioxide layer is deposited on the surface of Wafer 1, the second silicon dioxide layer within 8.5um from the edge of Wafer 1 is reserved by using photolithography process; the N-type semiconductor layer 21 within 8.5um from the edge of Wafer 1 is etched to 5um from the sapphire substrate by using plasma etching; the first silicon dioxide layer 3 is covered on the surface of the sapphire substrate, the second silicon dioxide layer and the epitaxial layer.

[0049] Further, the thickness of the second silicon dioxide layer is The deposition temperature is 250℃, the silane flow is 900sccm, and the N2O flow is 500sccm.

[0050] Further, the thickness of the first silicon dioxide layer 3 is The deposition temperature is 230℃, the silane flow is 200sccm, and the N2O flow is 1250sccm.

[0051] The application background of the present application is: when it is needed to improve the luminous quantity of the flip LED chip, or when it is needed to simplify the production process of the flip LED.

[0052] Example one

[0053] Please refer to Figure 2 The finished product structure diagram of the flip LED chip produced by the method for improving the brightness of the flip LED chip provided in the present embodiment is shown in the following figure:

[0054] Deposition of N-type semiconductor layer 21, quantum well layer 22 and P-type semiconductor layer 23 on sapphire substrate 1 by metal organic chemical vapor deposition, photoetch the edge of N-type semiconductor layer 21 and quantum well layer 22 to expose N-type semiconductor layer 21, P-type semiconductor layer 23 and quantum well layer 22 form MESA layer 24 by the vertical section after photoetching, sapphire substrate and the epitaxial layer after photoetching are Wafer 1. Figure 3 The structure diagram of Wafer 1 in the method for improving the brightness of flip LED chip provided in the embodiment.

[0055] Deposition of silicon dioxide on the whole Wafer 1 by PECVD, specifically, deposition of second silicon dioxide layer on the surface of Wafer 1, retain the second silicon dioxide layer within 8.5um from the edge of Wafer 1 by photoetching process; etch N-type semiconductor layer 21 within 8.5um from the edge of Wafer 1 to 5um from the sapphire substrate by plasma etching; cover the first silicon dioxide layer 3 on the surface of sapphire substrate, second silicon dioxide layer and epitaxial layer.

[0056] The thickness of second silicon dioxide layer Deposition temperature 250℃, silane flow rate 900sccm, N2O flow rate 500sccm. The thickness of first silicon dioxide layer 3 Deposition temperature 230℃, silane flow rate 200sccm, N2O flow rate 1250sccm.

[0057] Divide the first silicon dioxide layer 3 into a retained part 31 above the edge of Wafer 1 and an etched part 32 above the middle of Wafer 1; the edge of etched part 32 is 10um from MESA layer; cover photoresist 5 on retained part 31; the structure of the obtained sapphire substrate, epitaxial layer, first silicon dioxide layer and photoresist is Wafer 2. Figure 4 The structure diagram of Wafer 2 in the method for improving the brightness of flip LED chip provided in the embodiment.

[0058] Etch Wafer 2 by BOE, the BOE is buffered oxide etching solution; obtain Wafer 3; evaporate ITO layer 6 on the middle of the surface of P-type semiconductor layer of Wafer 3, the edge of ITO layer 6 is 4um from the retained part set in step two; obtain Wafer 4, sputter silver mirror reflecting layer 4 on the surface of Wafer 4 (the structure at this time please refer to the structure diagram of flip LED chip in the method for improving the brightness of flip LED chip provided in the embodiment). Figure 5 Figure 5 The structure diagram of semi-finished product of flip LED chip produced in the method for improving the brightness of flip LED chip provided in the embodiment). Peel off photoresist 5 on retained part 31.

[0059] ​The distance between the silver mirror reflective layer 4 formed by the embodiment one and the MESA layer 24 is 8 um, compared with the traditional process, the edge width of the silver mirror reflective layer 4 is increased by 3 um, the area is increased by 4.2%, and the brightness of the flip LED chip is increased by 1.8%-2.3%.

[0060] The above description is only the embodiment of the present application, and does not limit the patent scope of the present application, and any equivalent transformation or direct or indirect application in the related technical field by using the content of the specification and drawings of the present application is also included in the patent protection scope of the present application.

Claims

1. A method for improving the brightness of a flip-chip LED chip, characterized in that, Comprising the following steps: Step 1: depositing an epitaxial layer on a sapphire substrate 1, the epitaxial layer being a stacked N-type semiconductor layer, quantum well layer and P-type semiconductor layer, the structure of the resulting sapphire substrate and epitaxial layer being Wafer 1, covering the surface of Wafer 1 with a first silicon dioxide layer; Step 2: dividing the first silicon dioxide layer into a reserved part and an etching part; covering the reserved part with photoresist; the structure of the resulting sapphire substrate, epitaxial layer, first silicon dioxide layer and photoresist being Wafer 2; Step 3: etching Wafer 2 using BOE to obtain Wafer 3; Step 4: sputtering a silver mirror reflection layer on the surface of Wafer 3; Step 5: stripping the photoresist; The "depositing an epitaxial layer on a sapphire substrate 1, the epitaxial layer being a stacked N-type semiconductor layer, quantum well layer and P-type semiconductor layer, the structure of the resulting sapphire substrate and epitaxial layer being Wafer 1" of step 1 is specifically: Depositing an N-type semiconductor layer, a quantum well layer and a P-type semiconductor layer on a sapphire substrate in sequence by metal organic chemical vapor deposition, the structure of the resulting sapphire substrate and epitaxial layer being Wafer 1.

2. The method of claim 1, wherein the method further comprises: The "depositing an N-type semiconductor layer, a quantum well layer and a P-type semiconductor layer on a sapphire substrate in sequence by metal organic chemical vapor deposition, the structure of the resulting sapphire substrate and epitaxial layer being Wafer 1" of step 1 is specifically: Depositing an N-type semiconductor layer, a quantum well layer and a P-type semiconductor layer on a sapphire substrate in sequence by metal organic chemical vapor deposition, photoetching the edges of the N-type semiconductor layer and the quantum well layer to expose the N-type semiconductor layer, the P-type semiconductor layer and the quantum well layer being formed into a MESA layer by the vertical section after photoetching, the sapphire substrate and the epitaxial layer after photoetching being Wafer 1.

3. The method of claim 2, wherein the method further comprises: The "dividing the first silicon dioxide layer into a reserved part and an etching part" of step 2 is specifically: Dividing the first silicon dioxide layer into a reserved part above the edge of Wafer 1 and an etching part above the middle of Wafer 1; the edge of the etching part being 7-13 um away from the MESA layer.

4. The method of claim 1, wherein the method further comprises: The "sputtering a silver mirror reflection layer on the surface of Wafer 3" of step 4 is specifically: Evaporating an ITO layer on the middle of the surface of the P-type semiconductor layer of Wafer 3 to obtain Wafer 4, and sputtering a silver mirror reflection layer on the surface of Wafer 4.

5. The method of claim 4, wherein the method further comprises: The "evaporating an ITO layer on the middle of the surface of the P-type semiconductor layer of Wafer 3" is specifically: Evaporating an ITO layer on the middle of the surface of the P-type semiconductor layer of Wafer 3, the edge of the ITO layer being 2-6 um away from the reserved part set in step 2.

6. The method of claim 1, wherein the method further comprises: The "covering the surface of Wafer 1 with a first silicon dioxide layer" of step 1 is specifically: Depositing a second silicon dioxide layer on the surface of Wafer 1, using photoetching to reserve the second silicon dioxide layer within 8.5 um from the edge of Wafer 1; using plasma etching to etch the N-type semiconductor layer within 8.5 um from the edge of Wafer 1 to 5 um from the sapphire substrate; covering the surface of the sapphire substrate, the second silicon dioxide layer and the epitaxial layer with the first silicon dioxide layer.

7. The method of claim 6, wherein the method further comprises: Second silicon dioxide layer thickness 15000 A, deposition temperature 250°C, silane flow 900 seem, N2O flow 500 seem.

8. The method of claim 1, wherein the method further comprises: First silicon dioxide layer thickness 4000 A, deposition temperature 230°C, silane flow 200 seem, N2O flow 1250 seem.

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