An underwater laser communication system with controllable transmission power and automatic gain adjustment

Abstract

This invention discloses an underwater laser communication system with controllable transmission power and automatic gain adjustment, comprising a transmitting module and a receiving module. The transmitting module includes a transmitting core processing module, a transmitting DAC circuit, a dual-channel high-speed comparator circuit, a laser switch circuit, a power voltage-controlled power supply circuit, a digital potentiometer circuit, and a laser emitting tube. The receiving module includes a photodetector tube, a transimpedance amplifier circuit, a voltage-controlled variable gain circuit, an operational amplifier circuit, an integrator circuit, a receiving DAC circuit, a receiving high-speed comparator circuit, and a receiving core processing module. The transmitting module of this invention, by utilizing a dual-channel high-speed comparator circuit in conjunction with a power voltage-controlled power supply circuit and a digital potentiometer circuit, can drive a laser signal with controllable transmission power. Simultaneously, the receiving module, after receiving the laser signal, can automatically adjust the gain to stabilize the pulse signal, thereby achieving a higher communication rate over a longer communication distance.

Description

Technical Field

[0001] The invention belongs to the technical field of underwater wireless communications, and in particular relates to an underwater laser communication system with controllable transmission power and automatic gain adjustment. Background Art

[0002] Underwater wireless communication technology generally includes underwater electromagnetic wave communication, underwater acoustic communication and underwater laser communication. Electromagnetic wave communication has a relatively narrow frequency band and low frequency, which leads to an extremely low rate of information transmission, affecting the immediacy of communication; underwater acoustic communication has a slow propagation speed, a large data delay, limited bandwidth, low communication rate, and is prone to multipath effects, increased bit error rate, low efficiency of information transmission, high power consumption and other defects. Even in a close range, it is difficult to achieve a transmission rate of Mbps, which does not meet the current requirements of the ocean for high-speed transmission during detection. However, underwater laser communication is a relatively new underwater wireless communication technology. This communication method can realize high-speed transmission of large-capacity information underwater, can achieve long-distance transmission, has a low communication delay, and the laser light wave is highly directional and not easy to be intercepted, effectively preventing detection and monitoring. At the same time, the light source is mainly blue-green laser, which has a large penetration depth in seawater, can effectively resist the interference of electromagnetic waves, has a high degree of information confidentiality, and has the characteristics of fast information transmission.

[0003] In order to achieve high-speed and long-distance communication in seawater, the transmitting circuit must first be able to increase the maximum communication rate, and secondly, the receiving circuit must be able to stabilize the signal output after processing. The selection of the laser tube determines the maximum power of the laser emission, while the selection of the laser switch chip determines the maximum communication rate. When the laser emission power cannot be increased, the maximum communication rate can be achieved by changing the laser switch circuit.

[0004] The main factors affecting underwater optical communication systems are absorption, scattering and ocean turbulence, which affect the underwater laser communication distance and bit error rate. Moreover, these attenuations are variable, and the impact on the laser signal is also variable. Different water qualities have different attenuation levels. For example, turbid water has a stronger attenuation ability on laser signals. Summary of the invention

[0005] The first purpose of the present invention is to realize a transmitting module with controllable transmitting power and a receiving module with high gain and automatic gain adjustment in seawater laser communication, and to communicate using blue-green laser as a carrier.

[0006] An underwater laser communication system with controllable transmission power and automatic gain adjustment includes a transmission module and a receiving module. The transmission module includes a transmission end core processing module, a transmission end DAC circuit, a dual-channel high-speed comparator circuit 4, a laser switch circuit, a power voltage-controlled power supply circuit, a digital potentiometer circuit and a laser transmitting tube. The laser core processing module is used to perform PPM modulation on the data to be transmitted, and transmit the obtained analog signal to the dual-channel high-speed comparator; the transmission end DAC circuit is connected to the transmission end core processing module through an SPI bus, and transmits the reference voltage to the dual-channel high-speed comparator; the dual-channel high-speed comparator outputs two control signals to the laser switch circuit; the two control signals control the laser switch circuit to select one of the four power gears, so that the laser switch circuit outputs a laser signal of corresponding power. The laser core processing module outputs a control instruction to the digital potentiometer circuit; the digital potentiometer circuit provides a variable resistance value for adjusting the laser power in the corresponding power gear to the power voltage-controlled power supply circuit; the output interface of the power voltage-controlled power supply circuit is connected to the input interface of the laser switch circuit; the laser switch circuit drives the laser transmitting tube to emit a laser pulse signal.

[0007] The receiving module includes a photoelectric receiving tube, a transimpedance amplifier circuit, a voltage-controlled variable gain circuit, an operational amplifier circuit, an integrator circuit, a receiving end DAC circuit, a receiving end high-speed comparator circuit and a receiving end core processing module. The voltage-controlled variable gain circuit, the operational amplifier circuit and the integrator circuit constitute an automatic gain control circuit. The receiving end DAC circuit is connected to the receiving end core processing module through the SPI bus; the receiving end DAC circuit provides a reference voltage for the receiving end high-speed comparator circuit; the photoelectric receiving tube is used to receive the laser pulse signal from the laser transmitting tube, and convert it into a voltage signal and output it to the transimpedance amplifier circuit; the transimpedance amplifier circuit is used to amplify the input current signal and transmit it to the voltage-controlled variable gain circuit; the voltage signal output by the voltage-controlled variable gain circuit is transmitted to the operational amplifier circuit; the operational amplifier circuit amplifies the voltage signal output by the voltage-controlled variable gain circuit and transmits it to the integrator circuit and the receiving end high-speed comparator circuit; the integrator circuit integrates the input amplified waveform and outputs the integrated signal to the gain control pin of the voltage-controlled variable gain circuit. The receiving end high-speed comparator circuit converts the received signal into a digital signal and sends it to the receiving end core processing module.

[0008] During operation, the voltage-controlled variable gain circuit and the operational amplifier circuit respectively amplify the waveform of the input signal; the integrator circuit integrates the signal output by the operational amplifier circuit to obtain a gain control waveform, and transmits it to the gain control interface of the voltage-controlled variable gain circuit to perform automatic gain control on the input signal.

[0009] Preferably, the dual-channel high-speed comparator circuit includes a first transmitter comparator circuit and a second transmitter comparator circuit. The first transmitter comparator circuit includes a hysteresis comparator U1, a capacitor C15, a capacitor C16, a capacitor C20, a capacitor C24, a resistor R3, a resistor R17, a resistor R19 and a resistor R28. The model of the hysteresis comparator U1 is TLV3603. The second pin of the hysteresis comparator U1 is grounded; the third pin of the hysteresis comparator U1 is connected to one end of the resistor R3, the other end of the resistor R3 is connected to the capacitor C24 and one end of the resistor R19, and the other end of the resistor R19 is grounded; the fourth pin of the hysteresis comparator U1 is connected to one end of the capacitor C20 and one end of the resistor R28, the other end of the capacitor C20 is grounded, and the other end of the resistor R28 is grounded; the fifth pin of the hysteresis comparator U1 is connected to one end of the resistor R17, and the other end of the resistor R17 is grounded; the sixth pin of the hysteresis comparator U1 is connected to one end of the capacitor C15, one end of the capacitor C16 and the positive 5V power supply VCC, the other end of the capacitor C15 is grounded, and the other end of the capacitor C16 is grounded. The first pin of the hysteresis comparator U1 serves as the output of the first transmitter comparator circuit and is connected to the channel 1 switch input of the switch chip U2 in the laser switch circuit; the third pin of the hysteresis comparator U1 serves as the non-inverting input of the first transmitter comparator circuit and is connected to the transmitter core processing module; the fourth pin of the hysteresis comparator U1 serves as the inverting input of the first transmitter comparator circuit and is connected to the output of the transmitter DAC circuit.

[0010] The second transmitting end comparator circuit includes a hysteresis comparator U3, a capacitor C17, a capacitor C18, a capacitor C21, a capacitor C25, a resistor R1, a resistor R18, a resistor R20 and a resistor R29. The model of the hysteresis comparator U3 is TLV3603. The second pin of the hysteresis comparator U3 is grounded; the third pin of the hysteresis comparator U3 is connected to one end of the resistor R1, the other end of the resistor R1 is connected to one end of the resistor R20 and the capacitor C25, and the other end of the resistor R20 is grounded; the fourth pin of the hysteresis comparator U3 is connected to one end of the capacitor C21 and one end of the resistor R29, the other end of the capacitor C21 is grounded, and the other end of the resistor R29 is grounded; the fifth pin of the hysteresis comparator U3 is connected to one end of the resistor R18, and the other end of the resistor R18 is grounded; the sixth pin of the hysteresis comparator U3 is connected to one end of the capacitor C17, one end of the capacitor C18 and the positive 5V power supply VCC, the other end of the capacitor C17 is grounded, and the other end of the capacitor C18 is grounded. The first pin of the hysteresis comparator U3 is used as the output end of the hysteresis comparator U3 of the second transmitter comparator circuit, and is connected to the channel 2 switch input end of the switch chip U2 in the laser switch circuit; the third pin of the hysteresis comparator U3 is used as the non-inverting input end of the second transmitter comparator circuit, and is connected to the transmitter core processing module; the fourth pin of the hysteresis comparator U3 is used as the inverting input end of the hysteresis comparator U3 of the second transmitter comparator circuit, and is connected to the output end of the transmitter DAC circuit.

[0011] Preferably, the transmitter DAC circuit includes a digital-to-analog converter U5, a capacitor C14 and a resistor R16. Capacitor C14 is a filter capacitor. The model of the digital-to-analog converter U5 is DAC8830. The second pin of the digital-to-analog converter U5 is grounded; the third pin of the digital-to-analog converter U5 is connected to a positive 5V power supply VCC and one end of the capacitor C14, and the other end of the capacitor C14 is grounded; the fourth pin of the digital-to-analog converter U5 is connected to one end of the resistor R16, and the other end of the resistor R16 is connected to the positive 5V power supply VCC; the seventh pin of the digital-to-analog converter U5 is connected to the ground; the eighth pin of the digital-to-analog converter U5 is connected to the positive 5V power supply VCC. The fourth, fifth and sixth pins of the digital-to-analog converter U5 are connected to the SPI communication interface of the transmitter core processing module. The first pin of the digital-to-analog converter U5 is used as the output end of the digital-to-analog conversion of the transmitter DAC circuit, and is connected to the fourth pin of the hysteresis comparator U1 of the first transmitter comparator circuit of the dual-way high-speed comparator circuit, the second transmitter of the dual-way high-speed comparator circuit, and the fourth pin of the hysteresis comparator U3 of the comparator circuit.

[0012] Preferably, the power voltage-controlled power supply circuit includes a positive voltage regulator V1, a capacitor C7, a capacitor C8, a capacitor C9, a polarity capacitor E1, a polarity capacitor E2, a resistor R8, a diode D4, a diode D5, and a diode D7. Among them, capacitor C7 is a filter capacitor, capacitor C8 and capacitor C9 are both low-pass filter capacitors, and resistor R8 is a matching resistor. The model of the positive voltage regulator V1 is LM317. The first pin of the positive voltage regulator V1 is connected to one end of the resistor R8, one end of the capacitor C9 and the positive electrode of the diode D5, the other end of the capacitor C9 is grounded, the other end of the resistor R8 is connected to the second pin of the positive voltage regulator V1, and the negative electrode of the diode D5 is connected to the second pin of the positive voltage regulator V1; the second pin of the positive voltage regulator V1 is connected to one end of the capacitor C8, the positive electrode of the polarity capacitor, the positive electrode of the diode D4 and the negative electrode of the diode D7, the positive electrode of the diode D7 is grounded, the negative electrode of the polarity capacitor is grounded, the other end of the capacitor C8 is grounded, and the negative electrode of the capacitor C8 is grounded. The end is grounded; the 3rd pin of the positive voltage regulator V1 is connected to the negative electrode of the polarity capacitor, the positive electrode of the diode D4, the positive 12V power supply VCC and one end of the capacitor C7, the other end of the capacitor C7 is grounded, and the negative electrode of the polarity capacitor is grounded; the 1st pin of the positive voltage regulator V1 is used as the output voltage adjustment pin of the power voltage-controlled power supply circuit, and is connected to the output interface of the variable resistor U4 of the digital potentiometer circuit; the 2nd pin of the positive voltage regulator V1 is used as the output end of the power voltage-controlled power supply circuit, and is used to provide a reference voltage to the laser switch circuit.

[0013] Preferably, the laser switch circuit includes a switch chip U2, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C19, a capacitor C26, a resistor R2, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R9, a resistor R14, a diode D1, a diode D2, and a laser emitting tube LD. The model of the switch chip U2 is IC-HKB; the model of the laser emitting tube LD is PLT5-450B. The first pin of the switch chip U2 is connected to one end of the resistor R4 and one end of the resistor U2, the other end of the resistor R4 is grounded, and the other end of the resistor R2 is connected to the capacitor C26; the second pin of the switch chip U2 is connected to one end of the resistor R5, and the other end of the resistor R5 is grounded; the third pin of the switch chip U2 is connected to one end of the laser emitting tube LD, and the other end of the laser emitting tube LD is connected to one end of the capacitor C4, the cathode of the diode D2 and the positive 6.5V power supply, the other end of the capacitor C4 is connected to the anode of the diode D1 and grounded, and the anode of the diode D2 is connected to the cathode of the diode D1; the fourth pin of the switch chip U2 is connected to one end of the resistor R6, and the other end of the resistor R6 is grounded; the fifth pin of the switch chip U2 is connected to one end of the resistor R9 and one end of the resistor R7, and the resistor The other end of R9 is grounded, and the other end of resistor R7 is connected to capacitor C27; pin 6 of switch chip U2 is connected to one end of capacitor C5, one end of capacitor C6 and ground; pin 7 of switch chip U2 is connected to the other end of capacitor C5, the other end of C6 and the positive 5V power supply VCC; pin 8 of switch chip U2 is connected to one end of capacitor C19, and the other end of capacitor C19 is grounded; pin 1 of switch chip U2 is used as channel 1 switch input, connected to the output end of the first transmitter comparator circuit of the dual high-speed comparator circuit; pin 5 of switch chip U2 is used as channel 2 switch input interface, connected to the output end of the second transmitter comparator circuit of the dual high-speed comparator circuit; pin 8 of switch chip U2 is connected to the reference voltage provided by the power voltage-controlled power supply circuit.

[0014] Preferably, the digital potentiometer circuit includes a variable resistor U4, a capacitor C22, a capacitor C23, a resistor R10, a resistor R12 and a resistor R21. The model of the variable resistor is X9C102. The first pin of the variable resistor U4 is connected to one end of the resistor R12; the other end of the resistor R12 is grounded; the second pin of the variable resistor U4 is connected to one end of the resistor R10, and the other end of the resistor R10 is grounded; the third pin of the variable resistor U4 is connected to the fifth pin of the variable resistor U4; the fourth pin of the variable resistor U4 is connected to ground; the sixth pin of the variable resistor U4 is connected to ground; the seventh pin of the variable resistor U4 is connected to one end of the resistor R21, and the other end of the resistor R21 is grounded; the eighth pin of the variable resistor U4 is connected to one end of the capacitor C22, one end of the capacitor C23 and the positive 5V power supply VCC, and the capacitor C22 is connected to the ground. The other end of the variable resistor U4 is grounded, and the other end of the capacitor C23 is grounded; the 3rd pin of the variable resistor U4 is used as the output end of the variable resistor U4 of the digital potentiometer circuit, and is connected to the output voltage adjustment pin of the positive voltage regulator V1 of the power voltage-controlled power supply circuit; the 1st pin of the variable resistor U4 is used as the counting end of the variable resistor U4 of the digital potentiometer circuit, and is connected to the core processing module of the transmitter; the 2nd pin of the variable resistor U4 is used as the tap moving end of the variable resistor U4 of the digital potentiometer circuit, and is connected to the core processing module of the transmitter; the 7th pin of the variable resistor U4 is used as the chip select end of the digital potentiometer circuit, and is connected to the core processing module of the transmitter.

[0015] Preferably, the core processing module of the transmitting end includes an FPGA chip CTR_BUS, a resistor R26 and a resistor R27. The resistors R26 and R27 are both compensation resistors. The model of the FPGA chip CTR_BUS is EP4CE6. The 1st pin of FPGA chip CTR_BUS is connected to the non-inverting input of hysteresis comparator U1 of the first transmitter comparator circuit of the dual high-speed comparator circuit; the 5th pin of FPGA chip CTR_BUS is connected to the non-inverting input of hysteresis comparator U3 of the second transmitter comparator circuit of the dual high-speed comparator circuit; the 9th pin of FPGA chip CTR_BUS is connected to the 4th pin of digital-to-analog converter U5 of transmitter DAC circuit; the 13th pin of FPGA chip CTR_BUS is connected to the 5th pin of digital-to-analog converter U5 of transmitter DAC circuit; the 17th pin of FPGA chip CTR_BUS is connected to the 6th pin of digital-to-analog converter U5 of transmitter DAC circuit; the 10th pin of FPGA chip CTR_BUS is connected to the 7th pin of variable resistor U4 of digital potentiometer circuit; the 14th pin of FPGA chip CTR_BUS is connected to the 2nd pin of variable resistor U4 of digital potentiometer circuit; the FPGA chip CT Pin 18 of R_BUS is connected to pin 1 of variable resistor U4 of the digital potentiometer circuit; pin 2 of FPGA chip CTR_BUS is connected to one end of resistor R26, and the other end of resistor R26 is grounded; pin 6 of FPGA chip CTR_BUS is connected to one end of resistor R27, and the other end of resistor R27 is grounded; pin 3 of FPGA chip CTR_BUS is grounded; pin 4 of FPGA chip CTR_BUS is grounded; pin 7 of FPGA chip CTR_BUS is grounded; pin 8 of FPGA chip CTR_BUS is grounded; pin 11 of FPGA chip CTR_BUS is grounded; pin 12 of FPGA chip CTR_BUS is grounded; pin 15 of FPGA chip CTR_BUS is grounded; pin 16 of FPGA chip CTR_BUS is grounded; pin 19 of FPGA chip CTR_BUS is grounded; pin 20 of FPGA chip CTR_BUS is grounded.

[0016] Preferably, the voltage-controlled variable gain circuit includes a voltage-controlled variable gain amplifier U7; the operational amplifier circuit includes an operational amplifier U8; and the integrator circuit includes an integrator U9. The model of the voltage-controlled variable gain amplifier U7 is VCA821, the model of the operational amplifier U8 is OPA695, the model of the integrator U9 is OPA820, and the model of the diode D1 is 1N4150. The first pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the capacitor C2, one end of the capacitor C3 and one end of the inductor L1, the other end of the capacitor C2 is grounded, the other end of the capacitor C3 is grounded, and the other end of the inductor L1 is connected to the positive 5V power supply VCC; the second pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the capacitor C19, one end of the capacitor C20 and one end of the resistor R22, the other end of the capacitor C19 is grounded, and the other end of the capacitor C20 is grounded; the third pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the resistor R2 and one end of the resistor R18, the other end of the resistor R2 is grounded, and the other end of the resistor R18 is connected to one end of the capacitor C8; the fourth pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the resistor R4, and the other end of the resistor R4 is connected to the fifth pin of the voltage-controlled variable gain amplifier U7; the sixth pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the resistor R11, and the resistor R1 1 is grounded; the 7th pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the capacitor C17, one end of the capacitor C18 and one end of the inductor L2, the other end of the capacitor C17 is grounded, the other end of the capacitor C18 is grounded, and the other end of the inductor is connected to the negative 5V power supply VEE; the 8th pin of the voltage-controlled variable gain amplifier U7 is connected to the 7th pin of the voltage-controlled variable gain amplifier U7; the 9th pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the resistor R9, and the other end of the resistor R9 is grounded; the 10th pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the capacitor C23 and one end of the resistor R3, the other end of the resistor R3 is connected to the 12th pin of the voltage-controlled variable gain amplifier U7, and the other end of the capacitor C23 is connected to the resistor R6; the 11th pin of the voltage-controlled variable gain amplifier U7 is grounded; the 14th pin of the voltage-controlled variable gain amplifier U7 is connected to the 1st pin of the voltage-controlled variable gain amplifier U7. The 3rd pin of the voltage-controlled variable gain amplifier U7 serves as the non-inverting input terminal of the automatic gain control circuit. The 10th pin of the voltage-controlled variable gain amplifier U7 serves as the output end of the voltage-controlled variable gain amplifier U7 and is connected to the non-inverting input of the operational amplifier U8; the 2nd pin of the voltage-controlled variable gain amplifier U7 serves as the gain control end of the voltage-controlled variable gain amplifier U7 and is connected to the output end of the integrator U9.

[0017] The second pin of the operational amplifier U8 is connected to one end of the resistor R5 and one end of the resistor R14, the other end of the resistor R5 is grounded, and the other end of the resistor R14 is connected to the sixth pin of the operational amplifier U8; the third pin of the operational amplifier U8 is connected to one end of the resistor R6, and the other end of the resistor R6 is connected to the capacitor C23; the fourth pin of the operational amplifier U8 is connected to one end of the capacitor C25, one end of the capacitor C26 and the negative 5V power supply VEE, the other end of the capacitor C25 is grounded, and the other end of the capacitor C26 is grounded; the sixth pin of the operational amplifier U8 is connected to the capacitor C25, one end of the capacitor C26 and the negative 5V power supply VEE, the other end of the capacitor C25 is grounded, and the other end of the capacitor C26 is grounded; One end of resistor R15 and the anode of diode D1, the other end of resistor R15 is connected to capacitor C24; pin 7 of operational amplifier U8 is connected to one end of capacitor C21, one end of capacitor C22 and the positive 5V power supply VCC, the other end of capacitor C21 is grounded, and the other end of capacitor C22 is grounded; pin 3 of operational amplifier U8 serves as the non-inverting input of operational amplifier U8, connected to the output of voltage-controlled variable gain amplifier U7; pin 6 of operational amplifier U8 serves as the output of automatic gain control circuit, and is connected to the inverting input of integrator U9.

[0018] The second pin of the integrator U9 is connected to one end of the capacitor C28 and one end of the resistor R21, the other end of the capacitor C28 is connected to the sixth pin of the integrator U9, and the other end of the resistor R21 is connected to the cathode of the diode D1; the third pin of the integrator U9 is connected to one end of the capacitor C35 and one end of the resistor R23, the other end of the capacitor C35 is grounded, the other end of the resistor R23 is connected to one end of the resistor R16 and one end of the sliding variable resistor RP1, the other end of the resistor R16 is connected to the positive 5V power supply VCC, and the other end of the sliding variable resistor RP1 is grounded; the fourth pin of the integrator U9 is connected to one end of the capacitor C36, one end of the capacitor C37 and the negative 5V power supply VEE, the other end of the capacitor C36 is grounded, and the other end of the capacitor C37 is grounded; the sixth pin of the integrator U9 is connected to the other end of the resistor R22; the seventh pin of the integrator U9 is connected to one end of the capacitor C29, one end of the capacitor C30 and the positive 5V power supply VCC, the other end of the capacitor C29 is grounded, and the other end of the capacitor C30 is grounded. The second pin of the integrator U9 serves as the inverting input terminal of the integrator U9 and is connected to the output terminal of the operational amplifier U8; the sixth pin of the integrator U9 serves as the output terminal of the integrator U9 and is connected to the gain control terminal of the voltage-controlled variable gain amplifier U7.

[0019] Preferably, the transimpedance amplifier circuit includes an operational amplifier U6, a capacitor C1, a capacitor C4, a capacitor C5, a capacitor C9, a capacitor C10, a capacitor C12, a capacitor C13, a capacitor C14, a capacitor C15, a resistor R1, a resistor R8, and a photoelectric receiving tube. The model of the operational amplifier U6 is OPA847, and the model of the photoelectric receiving tube PIN is S5973-02; the second pin of the operational amplifier U6 is connected to the first pin of the photoelectric receiving tube PIN, the third pin of the photoelectric receiving tube is connected to one end of the capacitor C5, one end of the capacitor C4 and the negative 10V power supply VEE, the other end of the capacitor C5 is grounded, and the other end of the capacitor C4 is grounded; the third pin of the operational amplifier U6 is connected to one end of the resistor R8, one end of the capacitor C12 and one end of the capacitor C13, the other end of the resistor R8 is grounded, the other end of the capacitor C12 is grounded, and the other end of the capacitor C13 is connected ground; the 4th pin of the operational amplifier U6 is connected to one end of the capacitor C14, one end of the capacitor C15 and the negative 5V power supply VEE, the other end of the capacitor C14 is grounded, and the other end of the capacitor C15 is grounded; the 6th pin of the operational amplifier U6 is connected to the 2nd pin of the operational amplifier U6; the 7th pin of the operational amplifier U6 is connected to one end of the capacitor C9, one end of the capacitor C10 and the positive 5V power supply VCC, the other end of the capacitor C9 is grounded, and the other end of the capacitor C10 is grounded; the 6th pin of the operational amplifier U6, as the output end of the transimpedance amplifier circuit, is connected to the non-inverting input end of the automatic gain control circuit.

[0020] Preferably, the receiving end DAC circuit comprises a digital-to-analog converter U10, a capacitor C31, a capacitor C32, and a resistor R17. Capacitor C31 is a low-frequency filter capacitor, capacitor C32 is a high-frequency filter capacitor, and resistor R17 is a pull-up resistor. The model of the digital-to-analog converter U10 is DAC8830. The second pin of the digital-to-analog converter U10 is grounded; the third pin of the digital-to-analog converter U10 is connected to one end of the capacitor C31, one end of the capacitor C32, and a positive 3.3V power supply VCC, the other end of the capacitor C31 is grounded, and the other end of the capacitor C32 is grounded; the fourth pin of the digital-to-analog converter U10 is connected to one end of the resistor R17, and the other end of the resistor R17 is connected to a positive 5V power supply VCC; the seventh pin of the digital-to-analog converter U10 is grounded; the eighth pin of the digital-to-analog converter U10 is connected to a positive 5V power supply VCC; the first pin of the digital-to-analog converter U10 is connected to the negative phase input end of the hysteresis comparator U11 of the receiving end high-speed comparator circuit as the output end of the digital-to-analog converter U10. The 4th, 5th and 6th pins of the digital-to-analog converter U10 are connected to the core processing module at the receiving end.

[0021] The receiving end high-speed comparator circuit includes a hysteresis comparator U11, a capacitor C6, a capacitor C7, a capacitor C11, a capacitor C16, a capacitor C27, a resistor R7, a resistor R10, a resistor R12, a resistor R19, a resistor R20, and a resistor R34. The first pin of the hysteresis comparator U11 is connected to one end of the capacitor C27, the other end of the capacitor C27 is connected to one end of the resistor R19, the other end of the resistor R19 is connected to one end of the resistor R20, and the other end of the resistor R20 is grounded; the third pin of the hysteresis comparator U11 is connected to one end of the resistor R10, the other end of the resistor R10 is connected to one end of the resistor R12 and one end of the capacitor C16, and the other end of the resistor R12 is grounded; the fourth pin of the hysteresis comparator U11 is connected to one end of the capacitor C11 and one end of the resistor R34, the other end of the resistor R34 is grounded, and the other end of the capacitor C11 is grounded; the fifth pin of the hysteresis comparator U11 is connected to one end of the resistor R7, and the other end of the resistor R7 is grounded; the sixth pin of the hysteresis comparator U11 is connected to one end of the capacitor C6, one end of the capacitor C7 and the positive 3.3V positive power supply VCC, the other end of the capacitor C6 is grounded, and the other end of the capacitor C7 is grounded. The 4th pin of the hysteresis comparator U11 is used as the inverting input terminal of the hysteresis comparator U11, and is connected to the output terminal of the digital-to-analog converter U10 of the DAC circuit at the receiving end; the 1st pin of the hysteresis comparator U11 is used as the output terminal of the high-speed comparator circuit, and is connected to the core processing module at the receiving end.

[0022] The receiving end core processing module includes an FPGA chip BTB, a resistor R27, a resistor R28, a resistor R29, a resistor R31 and a resistor R33. The resistors R27, R28, R29, R31 and R33 are all compensation resistors. The model of the FPGA chip CTR_BUS is EP4CE6. The 1st pin of the FPGA chip BTB is connected to the 4th pin of the digital-to-analog converter U10 of the DAC circuit at the receiving end; the 5th pin of the FPGA chip BTB is connected to the 6th pin of the digital-to-analog converter U10 of the DAC circuit at the receiving end; the 9th pin of the FPGA chip BTB is connected to the 5th pin of the digital-to-analog converter U10 of the DAC circuit at the receiving end; the 13th pin of the FPGA chip BTB is connected to the output end of the hysteresis comparator U11 of the high-speed comparator circuit at the receiving end; the 17th pin of the FPGA chip BTB is connected to the 6th pin of the operational amplifier U8 of the operational amplifier circuit of the automatic gain control circuit; the 2nd pin of the FPGA chip BTB is connected to one end of the resistor R27, and the other end of R27 is grounded; the 6th pin of the FPGA chip BTB is connected to one end of the resistor R28, and the other end of the resistor R28 is grounded; The 10th pin of FPGA chip BTB is connected to one end of resistor R29, and the other end of resistor R29 is grounded; the 14th pin of FPGA chip BTB is connected to one end of resistor R31, and the other end of resistor R31 is grounded; the 18th pin of FPGA chip BTB is connected to one end of resistor R33, and the other end of resistor R33 is grounded; the 3rd pin of FPGA chip BTB is grounded; the 7th pin of FPGA chip BTB is grounded; the 11th pin of FPGA chip BTB is grounded; the 15th pin of FPGA chip BTB is grounded; the 19th pin of FPGA chip BTB is grounded; the 4th pin of FPGA chip BTB is grounded; the 8th pin of FPGA chip BTB is grounded; the 12th pin of FPGA chip BTB is grounded; the 16th pin of FPGA chip BTB is grounded; the 20th pin of FPGA chip BTB is grounded.

[0023] The present invention has the following beneficial effects:

[0024] 1. The transmitting module of the present invention can drive the laser signal with controllable transmitting power by using a dual-channel high-speed comparator circuit in conjunction with a power voltage-controlled power supply circuit and a digital potentiometer circuit, and realize 4-speed power changes; at the same time, the receiving module can automatically adjust the gain to stabilize the pulse signal after receiving the laser signal, so as to achieve a higher communication rate at a longer communication distance, and provide technical guarantee for realizing applications such as large-scale data signal transmission. It overcomes the defect that the receiving end of the existing communication circuit uses a fixed gain, and the attenuation degree of different water qualities is different, which is not conducive to stabilizing the pulse signal.

[0025] 2. The transmitting module of the present invention can dynamically adjust the laser transmission power during the transmission process, so that the receiving module can detect the intensity changes of the laser signal while receiving the pulse changes of the laser signal, thereby broadening the bandwidth of laser communication, improving the efficiency of laser communication, and facilitating the realization of multi-bit modulation transmission such as 4-OOK or 4-PPM.

[0026] 3. The receiving module of the present invention compares the output level of the automatic gain control circuit with the reference level, calculates the gain control waveform and connects it to the gain control pin, thereby realizing automatic gain control of the laser receiving signal, improving the stability and anti-interference ability of the received signal, and effectively avoiding waveform distortion. When the output voltage is small, the loop gain will be increased. At the same time, when the received signal is too strong, the bit error rate will be affected due to the pulse broadening of the signal, so when the output voltage is large, the loop gain will be reduced. The processed laser pulse signal is converted into a digital pulse signal by the ADC circuit and the high-speed comparator circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 is a system block diagram of the present invention;

[0028] Figure 2 The circuit schematic diagram of the transmitting end DAC circuit in the present invention is

[0029] Figure 3 The circuit schematic diagram of the dual-channel high-speed comparator circuit at the transmitting end of the present invention is

[0030] Figure 4 The circuit schematic diagram of the digital potentiometer circuit in the present invention is

[0031] Figure 5 The circuit diagram of the power voltage-controlled power supply circuit in the present invention is

[0032] Figure 6 The circuit schematic diagram of the laser switch circuit in the present invention is

[0033] Figure 7 The circuit schematic diagram of the transimpedance amplifier circuit in the present invention is

[0034] Figure 8 The circuit principle diagram of the automatic gain control circuit in the present invention is

[0035] Fig. 9 The circuit schematic diagram of the receiving end DAC circuit in the present invention is

[0036] Fig.10 The circuit schematic diagram of the high-speed comparator circuit at the receiving end of the present invention is

[0037] Fig.11 The circuit schematic diagram of the core processing module of the transmitter in the present invention is

[0038] Fig.12 The circuit schematic diagram of the core processing module of the receiving end in the present invention is DETAILED DESCRIPTION

[0039] The present invention will be further described below in conjunction with the accompanying drawings.

[0040] The invention discloses an underwater laser communication system with controllable transmitting power and automatic gain adjustment. The system adopts a Cyclone IV core board and mainly realizes the following functions: driving a laser transmitting module to transmit laser pulses after PPM modulation of transmitting data, and performing PPM demodulation on the received laser pulse signal; using an SPI bus protocol to drive a DAC circuit in a transmitting module to generate a voltage control signal; using an SPI bus protocol to drive a DAC circuit in a receiving module to generate a voltage control signal; using a data line input to control the resistance value of a digital potentiometer; using a data line to output a modulation signal to a dual-channel high-speed comparator of the transmitting module; and using a data line to obtain an output digital signal of a high-speed comparator of a receiving module.

[0041] like Figure 1 As shown, the underwater laser communication system includes a transmitting module 1 and a receiving module 2. The transmitting module 1 includes a transmitting end core processing module 1-1, a transmitting end DAC circuit 1-2, a dual-channel high-speed comparator circuit 4, a laser switch circuit 1-5, a power voltage-controlled power supply circuit 1-6, a digital potentiometer circuit 1-7 and a laser transmitting tube 1-8. After the transmitted data is PPM modulated by the laser core processing module 1-1, the analog signal is transmitted to the dual-channel high-speed comparator 4; the transmitting end DAC circuit 1-2 is connected to the transmitting end core processing module 1-1 through the SPI bus, and the reference voltage is transmitted to the dual-channel high-speed comparator 4; the dual-channel high-speed comparator 4 transmits the output digital signal to the laser switch circuit 1-5; the laser core processing module 1-1 is connected to the digital potentiometer circuit 1-7 using a data line; the digital potentiometer circuit 1-7 provides a variable resistance value for adjusting the laser power to the power voltage-controlled power supply circuit 1-6; the output end of the power voltage-controlled power supply circuit 1-6 is connected to the input end of the laser switch circuit 1-5; the laser switch circuit 1-5 drives the laser transmitting tube 1-8 to emit laser pulses.

[0042] The receiving module 2 includes a photoelectric receiving tube 2-1, a transimpedance amplifier circuit 2-2, a voltage-controlled variable gain circuit 2-3, an operational amplifier circuit 2-4, an integrator circuit 2-5, a receiving-end DAC circuit 2-7, a receiving-end high-speed comparator circuit 2-6, and a receiving-end core processing module 2-8. The voltage-controlled variable gain circuit 2-3, the operational amplifier circuit 2-4, and the integrator circuit 2-5 form an automatic gain control circuit 3 to realize an automatic gain control (AGC) function. The receiving end DAC circuit 2-7 is connected to the receiving end core processing module 2-8 through the SPI bus; the voltage output end of the receiving end DAC circuit 2-7 is connected to the reference voltage input end of the receiving end high-speed comparator circuit 2-6; the photoelectric receiving tube 2-1 converts the laser signal received from the laser transmitting tube 1-8 into a current signal and outputs it to the transimpedance amplifier circuit 2-2; the voltage signal output by the transimpedance amplifier circuit 2-2 is connected to the voltage-controlled variable gain circuit 2-3; the voltage signal output by the voltage-controlled variable gain circuit 2-3 is connected to the operational amplifier circuit 2-4; the output signal of the operational amplifier circuit 2-4 is connected to the integrator circuit 2-5 and the receiving end high-speed comparator circuit 2-6; the integrator circuit 2-5 integrates the input amplified waveform and outputs the integrated signal to the gain control pin of the voltage-controlled variable gain circuit 2-3. The receiving end high-speed comparator circuit 2-6 converts the received signal into a digital signal and sends it to the receiving end core processing module 2-8.

[0043] like Figure 2 As shown, the transmitter DAC circuit 1-2 includes a digital-to-analog converter U5, a capacitor C14 and a resistor R16. Capacitor C14 is a high-frequency filter capacitor, and resistor R16 is a pull-up resistor. The model of the digital-to-analog converter U5 is DAC8830, and it is connected to the transmitter core processing module 1-1 using the SPI bus. The second pin of the digital-to-analog converter U5 is grounded; the third pin of the digital-to-analog converter U5 is connected to the positive 5V power supply VCC and one end of the capacitor C14, and the other end of the capacitor C14 is grounded; the fourth pin of the digital-to-analog converter U5 is connected to one end of the resistor R16, and the other end of the resistor R16 is connected to the positive 5V power supply VCC; the seventh pin of the digital-to-analog converter U5 is connected to the ground; the eighth pin of the digital-to-analog converter U5 is connected to the positive 5V power supply VCC. The fourth, fifth and sixth pins of the digital-to-analog converter U5 are connected to the SPI communication interface (SPI data input terminal DAC8830 SDI, SPI clock input terminal DAC8830 SCLK, SPI chip select terminal DAC8830 CS) of the transmitter core processing module 1-1. Pin 1 of the digital-to-analog converter U5 serves as the output end of the digital-to-analog conversion of the transmitter DAC circuit 1-2, and is connected to pin 4 of the hysteresis comparator U1 of the first transmitter comparator circuit 1-3 of the dual high-speed comparator circuit 4 and pin 4 of the hysteresis comparator U3 of the second transmitter comparator circuit 1-4 of the dual high-speed comparator circuit 4.

[0044] like Figure 3 As shown, the dual-channel high-speed comparator circuit 4 includes a first transmitter comparator circuit 1-3 and a second transmitter comparator circuit 1-4. The first transmitter comparator circuit 1-3 includes a hysteresis comparator U1, a capacitor C15, a capacitor C16, a capacitor C20, a capacitor C24, a resistor R3, a resistor R17, a resistor R19 and a resistor R28. Among them, capacitor C16 is a low-frequency filter capacitor, capacitor C15 is a high-frequency filter capacitor, capacitor C20 is a low-pass filter capacitor, and capacitor C24 is an input capacitor; resistors R3, R17, and R19 are all matching resistors, and resistor R28 is a low-pass filter resistor. The model of the hysteresis comparator U1 is TLV3603. The second pin of the hysteresis comparator U1 is grounded; the third pin of the hysteresis comparator U1 is connected to one end of the resistor R3, the other end of the resistor R3 is connected to the capacitor C24 and one end of the resistor R19, and the other end of the resistor R19 is grounded; the fourth pin of the hysteresis comparator U1 is connected to one end of the capacitor C20 and one end of the resistor R28, the other end of the capacitor C20 is grounded, and the other end of the resistor R28 is grounded; the fifth pin of the hysteresis comparator U1 is connected to one end of the resistor R17, and the other end of the resistor R17 is grounded; the sixth pin of the hysteresis comparator U1 is connected to one end of the capacitor C15, one end of the capacitor C16 and the positive 5V power supply VCC, the other end of the capacitor C15 is grounded, and the other end of the capacitor C16 is grounded. The first pin of the hysteresis comparator U1 serves as the output end of the hysteresis comparator U1 of the first transmitter comparator circuit 1-3, and is connected to the channel 1 switch input end of the switch chip U2 of the laser switch circuit 1-5 (i.e., the first pin of the switch chip U2); the third pin of the hysteresis comparator U1 serves as the non-inverting input end of the hysteresis comparator U1 of the first transmitter comparator circuit 1-3, and is connected to the transmitter core processing module 1-1; the fourth pin of the hysteresis comparator U1 serves as the inverting input end of the hysteresis comparator U1 of the first transmitter comparator circuit 1-3, and is connected to the output end of the transmitter DAC circuit 1-2 (i.e., the first pin of the digital-to-analog converter U5).

[0045] The second transmitter comparator circuit 1-4 includes a hysteresis comparator U3, a capacitor C17, a capacitor C18, a capacitor C21, a capacitor C25, a resistor R1, a resistor R18, a resistor R20 and a resistor R29. Among them, the capacitor C18 is a low-frequency filter capacitor, the capacitor C17 is a high-frequency filter capacitor, the capacitor C21 is a low-pass filter capacitor, and the capacitor C25 are all input capacitors; the resistors R1, R18, and R20 are all matching resistors, and the resistor R29 is a low-pass filter resistor. The model of the hysteresis comparator U3 is TLV3603. The second pin of the hysteresis comparator U3 is grounded; the third pin of the hysteresis comparator U3 is connected to one end of the resistor R1, the other end of the resistor R1 is connected to one end of the resistor R20 and the capacitor C25, and the other end of the resistor R20 is grounded; the fourth pin of the hysteresis comparator U3 is connected to one end of the capacitor C21 and one end of the resistor R29, the other end of the capacitor C21 is grounded, and the other end of the resistor R29 is grounded; the fifth pin of the hysteresis comparator U3 is connected to one end of the resistor R18, and the other end of the resistor R18 is grounded; the sixth pin of the hysteresis comparator U3 is connected to one end of the capacitor C17, one end of the capacitor C18 and the positive 5V power supply VCC, the other end of the capacitor C17 is grounded, and the other end of the capacitor C18 is grounded. The first pin of the hysteresis comparator U3 serves as the output end of the hysteresis comparator U3 of the second transmitter comparator circuit 1-4, and is connected to the channel 2 switch input end of the switch chip U2 of the laser switch circuit 1-5 (i.e., the fifth pin of the switch chip U2); the third pin of the hysteresis comparator U3 serves as the non-inverting input end of the hysteresis comparator U3 of the second transmitter comparator circuit 1-4, and is connected to the transmitter core processing module 1-1; the fourth pin of the hysteresis comparator U3 serves as the inverting input end of the hysteresis comparator U3 of the second transmitter comparator circuit 1-4, and is connected to the output end of the transmitter DAC circuit 1-2 (i.e., the first pin of the digital-to-analog converter U5).

[0046] like Figure 4As shown, the digital potentiometer circuit 1-7 includes a variable resistor U4, a capacitor C22, a capacitor C23, a resistor R10, a resistor R12 and a resistor R21. Among them, the capacitor C22 is a low-frequency filter capacitor, C23 is a high-frequency filter capacitor, and the resistors R10, R12 and R21 are all pull-up resistors. The model of the variable resistor is X9C102. The first pin of the variable resistor U4 is connected to one end of the resistor R12; the other end of the resistor R12 is grounded; the second pin of the variable resistor U4 is connected to one end of the resistor R10, and the other end of the resistor R10 is grounded; the third pin of the variable resistor U4 is connected to the fifth pin of the variable resistor U4; the fourth pin of the variable resistor U4 is connected to ground; the sixth pin of the variable resistor U4 is connected to ground; the seventh pin of the variable resistor U4 is connected to one end of the resistor R21, and the other end of the resistor R21 is grounded; the eighth pin of the variable resistor U4 is connected to one end of the capacitor C22, one end of the capacitor C23 and the positive 5V power supply VCC, the other end of the capacitor C22 is grounded, and the other end of the capacitor C23 is grounded; the variable resistor The third pin of the variable resistor U4 is used as the output end of the variable resistor U4 of the digital potentiometer circuit 1-7, and is connected to the output voltage adjustment pin of the positive voltage regulator V1 of the power voltage-controlled power supply circuit 1-6 (i.e., the first pin of the forward regulator V1); the first pin of the variable resistor U4 is used as the counting end of the variable resistor U4 of the digital potentiometer circuit 1-7, and is connected to the transmitter core processing module 1-1; the second pin of the variable resistor U4 is used as the tap moving end of the variable resistor U4 of the digital potentiometer circuit 1-7, and is connected to the transmitter core processing module 1-1; the 7th pin of the variable resistor U4 is used as the chip select end of the variable resistor U4 of the digital potentiometer circuit 1-7, and is connected to the transmitter core processing module 1-1.

[0047] like Figure 5As shown, the power voltage-controlled power supply circuit 1-6 includes a positive voltage regulator V1, a capacitor C7, a capacitor C8, a capacitor C9, a polar capacitor E1, a polar capacitor E2, a resistor R8, a diode D4, a diode D5, and a diode D7. Among them, the capacitor C7 is a filter capacitor, the capacitor C8 and the capacitor C9 are both low-pass filter capacitors, and the resistor R8 is a matching resistor. The model of the positive voltage regulator V1 is LM317, the model of the diode D4 is 1N4002, the model of the diode D5 is 1N4002, and the model of the diode D7 is SMBJ-5V. The first pin of the positive voltage regulator V1 is connected to one end of the resistor R8, one end of the capacitor C9 and the positive electrode of the diode D5, the other end of the capacitor C9 is grounded, the other end of the resistor R8 is connected to the second pin of the positive voltage regulator V1, and the negative electrode of the diode D5 is connected to the second pin of the positive voltage regulator V1; the second pin of the positive voltage regulator V1 is connected to one end of the capacitor C8, the positive electrode of the polarity capacitor, the positive electrode of the diode D4 and the negative electrode of the diode D7, the positive electrode of the diode D7 is grounded, the negative electrode of the polarity capacitor is grounded, and the other end of the capacitor C8 is grounded; the third pin of the positive voltage regulator V1 is connected to the negative electrode of the polarity capacitor, the positive electrode of the diode D4 The positive pole, positive 12V power supply VCC and one end of capacitor C7, the other end of capacitor C7 is grounded, and the negative pole of the polarity capacitor is grounded; the first pin of the positive voltage regulator V1 is used as the output voltage adjustment pin of the positive voltage regulator V1 of the power voltage-controlled power supply circuit 1-6, and is connected to the high-end output of the variable resistor U4 of the digital potentiometer circuit 1-7 (that is, the third pin of the variable resistor); the second pin of the positive voltage regulator V1 is used as the output end of the positive voltage regulator V1 of the power voltage-controlled power supply circuit 1-6, and is connected to the current controlled reference voltage end of the switch chip U2 of the laser switch circuit 1-5 (that is, the eighth pin of the switch chip U2).

[0048] like Figure 6As shown, the laser switch circuit 1-5 includes a switch chip U2, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C19, a capacitor C26, a resistor R2, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R9, a resistor R14, a diode D1, a diode D2, and a laser transmitting tube LD. Capacitor C4 is a filter capacitor, capacitor C5 is a low-frequency filter capacitor, capacitor C6 is a high-frequency filter capacitor, capacitor C19 is a low-pass filter capacitor, resistors R4, R5, R6, and R9 are all pull-down resistors, capacitors C26 and C27 are all input capacitors, and resistors R2 and R7 are all matching resistors. The model of the switch chip U2 is IC-HKB, the model of the diode D1 is LC03CI, the model of the diode D2 is LC03CI, and the model of the laser transmitting tube LD is PLT5-450B. The first pin of the switch chip U2 is connected to one end of the resistor R4 and one end of the resistor U2, the other end of the resistor R4 is grounded, and the other end of the resistor R2 is connected to the capacitor C26; the second pin of the switch chip U2 is connected to one end of the resistor R5, and the other end of the resistor R5 is grounded; the third pin of the switch chip U2 is connected to one end of the laser emitting tube LD, and the other end of the laser emitting tube LD is connected to one end of the capacitor C4, the cathode of the diode D2 and the positive 6.5V power supply VCC, the other end of the capacitor C4 is connected to the anode of the diode D1 and grounded, and the anode of the diode D2 is connected to the cathode of the diode D1; the fourth pin of the switch chip U2 is connected to one end of the resistor R6, and the other end of the resistor R6 is grounded; the fifth pin of the switch chip U2 is connected to one end of the resistor R9 and one end of the resistor R7, the other end of the resistor R9 is grounded, and the other end of the resistor R7 is connected to the capacitor C27; the switch The 6th pin of the chip U2 is connected to one end of the capacitor C5, one end of the capacitor C6 and ground; the 7th pin of the switch chip U2 is connected to the other end of the capacitor C5, the other end of C6 and the positive 5V power supply VCC; the 8th pin of the switch chip U2 is connected to one end of the capacitor C19, and the other end of the capacitor C19 is grounded; the 1st pin of the switch chip U2 is used as the channel 1 switch input, connected to the output end of the hysteresis comparator U1 of the dual-way high-speed comparator circuit 4 (that is, the 1st pin of the hysteresis comparator U1); the 5th pin of the switch chip U2 is used as the channel 2 switch input, connected to the output end of the hysteresis comparator U3 of the dual-way high-speed comparator circuit 4 (that is, the 1st pin of the hysteresis comparator U3); the 8th pin of the switch chip U2 is used as the current control reference voltage, connected to the output end of the positive voltage regulator V1 of the power voltage-controlled power supply circuit 1-6 (that is, the 2nd pin of the positive voltage regulator V1).

[0049] like Figure 7As shown, the transimpedance amplifier circuit 2-2 includes an operational amplifier U6, capacitors C1, C4, C5, C9, C10, C12, C13, C14, C15, resistor R1, resistor R8, and a photoelectric receiving tube PIN. Capacitors C4, C9, and C14 are all low-frequency filter capacitors; capacitors C5, C10, and C15 are all high-frequency filter capacitors; capacitors C12 and C13 are all low-pass filter capacitors; capacitor C1 is a feedback capacitor; resistor R1 is a feedback resistor; and resistor R8 is a pull-down resistor. The model of the operational amplifier U6 is OPA847, and the model of the photoelectric receiving tube PIN is S5973-02; the second pin of the operational amplifier U6 is connected to the first pin of the photoelectric receiving tube PIN, the third pin of the photoelectric receiving tube is connected to one end of the capacitor C5, one end of the capacitor C4 and the negative 10V power supply VEE, the other end of the capacitor C5 is grounded, and the other end of the capacitor C4 is grounded; the third pin of the operational amplifier U6 is connected to one end of the resistor R8, one end of the capacitor C12 and one end of the capacitor C13, the other end of the resistor R8 is grounded, the other end of the capacitor C12 is grounded, and the other end of the capacitor C13 is grounded; the fourth pin of the operational amplifier U6 is connected to One end of capacitor C14, one end of capacitor C15 and negative 5V power supply VEE, the other end of capacitor C14 is grounded, and the other end of capacitor C15 is grounded; pin 6 of operational amplifier U6 is connected to pin 2 of operational amplifier U6; pin 7 of operational amplifier U6 is connected to one end of capacitor C9, one end of capacitor C10 and positive 5V power supply VCC, the other end of capacitor C9 is grounded, and the other end of capacitor C10 is grounded; pin 6 of operational amplifier U6 serves as the output end of transimpedance amplifier circuit 2-2, and is connected to the non-inverting input end of voltage-controlled variable gain amplifier U7 of automatic gain control circuit 3 (i.e., pin 3 of voltage-controlled variable gain amplifier U7).

[0050] like Figure 8As shown, the automatic gain control circuit 3 includes a voltage-controlled variable gain amplifier U7, an operational amplifier U8, an integrator U9, a capacitor C2, a capacitor C3, a capacitor C8, a capacitor C17, a capacitor C18, a capacitor C19, a capacitor C20, a capacitor C21, a capacitor C22, a capacitor C23, a capacitor C24, a capacitor C25, a capacitor C26, a capacitor C28, a capacitor C29, a capacitor C30, a capacitor C35, a capacitor C36, a capacitor C37, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R9, a resistor R11, a resistor R14, a resistor R15, a resistor R16, a resistor R18, a resistor R21, a resistor R22, a resistor R23, a diode D1, a sliding rheostat RP1, an inductor L1, and an inductor L2. Capacitor C2, capacitor C17, capacitor C26, capacitor C21, capacitor C29, and capacitor C36 are all low-frequency filter capacitors; capacitor C3, capacitor C18, capacitor C22, capacitor C26, capacitor C30, and capacitor C37 are all high-frequency filter capacitors; capacitor C19, capacitor C20, and capacitor C35 are all low-frequency filter capacitors; capacitor C8 and capacitor C23 are all input capacitors; capacitor C24 is an output capacitor; resistors R2, R5, R9, and R11 are all pull-down resistors; resistor R16 is a pull-up resistor; resistor R14 is a feedback resistor; resistors R4, R3, R6, R15, R18, R21, R22, and R23 are all matching resistors; the model of the voltage-controlled variable gain amplifier U7 is VCA821, the model of the operational amplifier U8 is OPA695, the model of the integrator U9 is OPA820, and the model of the diode D1 is 1N4150.

[0051] Function of automatic gain control circuit 3: waveform amplification is performed through a primary amplification circuit centered on voltage-controlled variable gain amplifier U7 and a secondary amplification circuit centered on operational amplifier U8. Integrator U9 integrates the final waveform and connects the gain control waveform to the gain control pin of voltage-controlled variable gain circuit 2-3. Thus, when the output level exceeds the reference voltage, integrator U9 will reduce the loop gain. On the contrary, if the output is too small, integrator U9 will increase the net gain and output voltage, thereby achieving automatic gain.

[0052] The first pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the capacitor C2, one end of the capacitor C3 and one end of the inductor L1, the other end of the capacitor C2 is grounded, the other end of the capacitor C3 is grounded, and the other end of the inductor L1 is connected to the positive 5V power supply VCC; the second pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the capacitor C19, one end of the capacitor C20 and one end of the resistor R22, the other end of the capacitor C19 is grounded, and the other end of the capacitor C20 is grounded; the third pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the resistor R2 and one end of the resistor R18, the other end of the resistor R2 is grounded, and the other end of the resistor R18 is connected to one end of the capacitor C8; the fourth pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the resistor R4, and the other end of the resistor R4 is connected to the fifth pin of the voltage-controlled variable gain amplifier U7; the sixth pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the resistor R11, and the resistor R1 1 is grounded; the 7th pin of the voltage-controlled variable gain amplifier U7 is connected to one end of capacitor C17, one end of capacitor C18 and one end of inductor L2, the other end of capacitor C17 is grounded, the other end of capacitor C18 is grounded, and the other end of the inductor is connected to the negative 5V power supply VEE; the 8th pin of the voltage-controlled variable gain amplifier U7 is connected to the 7th pin of the voltage-controlled variable gain amplifier U7; the 9th pin of the voltage-controlled variable gain amplifier U7 is connected to one end of resistor R9, and the other end of resistor R9 is grounded; the 10th pin of the voltage-controlled variable gain amplifier U7 is connected to one end of capacitor C23 and one end of resistor R3, the other end of resistor R3 is connected to the 12th pin of the voltage-controlled variable gain amplifier U7, and the other end of capacitor C23 is connected to resistor R6; the 11th pin of the voltage-controlled variable gain amplifier U7 is grounded; the 14th pin of the voltage-controlled variable gain amplifier U7 is connected to the 1st pin of the voltage-controlled variable gain amplifier U7. The 3rd pin of the voltage-controlled variable gain amplifier U7 is connected to the output of the operational amplifier U6 of the transimpedance amplifier circuit 2-2 (i.e., the 6th pin of the operational amplifier U6) as the non-inverting input of the automatic gain control circuit 3. The 10th pin of the voltage-controlled variable gain amplifier U7 is connected to the non-inverting input of the operational amplifier U8 of the automatic gain control circuit 3 (i.e., the 6th pin of the operational amplifier U8) as the output of the voltage-controlled variable gain amplifier U7; the 2nd pin of the voltage-controlled variable gain amplifier U7 is connected to the output of the integrator U9 (i.e., the 6th pin of the integrator U9) as the gain control terminal of the voltage-controlled variable gain amplifier U7.

[0053] The second pin of the operational amplifier U8 is connected to one end of the resistor R5 and one end of the resistor R14, the other end of the resistor R5 is grounded, and the other end of the resistor R14 is connected to the sixth pin of the operational amplifier U8; the third pin of the operational amplifier U8 is connected to one end of the resistor R6, and the other end of the resistor R6 is connected to the capacitor C23; the fourth pin of the operational amplifier U8 is connected to one end of the capacitor C25, one end of the capacitor C26 and the negative 5V power supply VEE, the other end of the capacitor C25 is grounded, and the other end of the capacitor C26 is grounded; the sixth pin of the operational amplifier U8 is connected to one end of the resistor R15 and the positive electrode of the diode D1, and the resistor R15 is grounded. The other end of the operational amplifier U8 is connected to capacitor C24; the 7th pin of the operational amplifier U8 is connected to one end of the capacitor C21, one end of the capacitor C22 and the positive 5V power supply VCC, the other end of the capacitor C21 is grounded, and the other end of the capacitor C22 is grounded; the 3rd pin of the operational amplifier U8 serves as the non-inverting input end of the operational amplifier U8, connected to the output end of the voltage-controlled variable gain amplifier U7 (that is, the 10th pin of the voltage-controlled variable gain amplifier U7); the 6th pin of the operational amplifier U8 serves as the output end of the operational amplifier U8, connected to the receiving end core processing module 2-8 and the inverting input end of the integrator U9 (that is, the 2nd pin of the integrator U9).

[0054] The second pin of the integrator U9 is connected to one end of the capacitor C28 and one end of the resistor R21, the other end of the capacitor C28 is connected to the sixth pin of the integrator U9, and the other end of the resistor R21 is connected to the cathode of the diode D1; the third pin of the integrator U9 is connected to one end of the capacitor C35 and one end of the resistor R23, the other end of the capacitor C35 is grounded, the other end of the resistor R23 is connected to one end of the resistor R16 and one end of the sliding variable resistor RP1, the other end of the resistor R16 is connected to the positive 5V power supply VCC, and the other end of the sliding variable resistor RP1 is grounded; the fourth pin of the integrator U9 is connected to one end of the capacitor C36, one end of the capacitor C37 and the negative 5V power supply VEE, the other end of the capacitor C36 is grounded, and the other end of the capacitor C37 is grounded; the sixth pin of the integrator U9 is connected to the other end of the resistor R22; the seventh pin of the integrator U9 is connected to one end of the capacitor C29, one end of the capacitor C30 and the positive 5V power supply VCC, the other end of the capacitor C29 is grounded, and the other end of the capacitor C30 is grounded. The second pin of the integrator U9 serves as the inverting input terminal of the integrator U9, and is connected to the output terminal of the operational amplifier U8 (i.e., the sixth pin of the operational amplifier U8); the sixth pin of the integrator U9 serves as the output terminal of the integrator U9, and is connected to the gain control terminal of the voltage-controlled variable gain amplifier U7 (i.e., the second pin of the voltage-controlled variable gain amplifier U7).

[0055] like Fig. 9As shown, the receiving end DAC circuit 2-7 includes a digital-to-analog converter U10, a capacitor C31, a capacitor C32, and a resistor R17. The capacitor C31 is a low-frequency filter capacitor, the capacitor C32 is a high-frequency filter capacitor, and the resistor R17 is a pull-up resistor. The model of the digital-to-analog converter U10 is DAC8830. The second pin of the digital-to-analog converter U10 is grounded; the third pin of the digital-to-analog converter U10 is connected to one end of the capacitor C31, one end of the capacitor C32 and the positive 3.3V power supply VCC, the other end of the capacitor C31 is grounded, and the other end of the capacitor C32 is grounded; the fourth pin of the digital-to-analog converter U10 is connected to one end of the resistor R17, and the other end of the resistor R17 is connected to the positive 5V power supply VCC; the seventh pin of the digital-to-analog converter U10 is grounded; the eighth pin of the digital-to-analog converter U10 is connected to the positive 5V power supply VCC; the first pin of the digital-to-analog converter U10 is connected to the negative phase input end of the hysteresis comparator U11 of the high-speed comparator circuit 2-6 at the receiving end (i.e., the fourth pin of the hysteresis comparator U11). The fourth, fifth and sixth pins of the digital-to-analog converter U10 are connected to the core processing module 2-8 at the receiving end (SPI data input end DAC8830 SDI, SPI clock input end DAC8830 SCLK, SPI chip select end DAC8830 CS).

[0056] like Fig.10As shown, the receiving end high-speed comparator circuit 2-6 includes a hysteresis comparator U11, a capacitor C6, a capacitor C7, a capacitor C11, a capacitor C16, a capacitor C27, a resistor R7, a resistor R10, a resistor R12, a resistor R19, a resistor R20, and a resistor R34. Among them, the capacitor C6 is a low-frequency filter capacitor, the capacitor C7 is a high-frequency filter capacitor, the capacitor C11 and the capacitor C27 are filter capacitors, the capacitor C16 is an input capacitor, the resistors R7, R12, R20, and R34 are all pull-down resistors, and the resistors R10 and R19 are all matching resistors. The first pin of the hysteresis comparator U11 is connected to one end of the capacitor C27, the other end of the capacitor C27 is connected to one end of the resistor R19, the other end of the resistor R19 is connected to one end of the resistor R20, and the other end of the resistor R20 is grounded; the third pin of the hysteresis comparator U11 is connected to one end of the resistor R10, the other end of the resistor R10 is connected to one end of the resistor R12 and one end of the capacitor C16, and the other end of the resistor R12 is grounded; the fourth pin of the hysteresis comparator U11 is connected to one end of the capacitor C11 and one end of the resistor R34, the other end of the resistor R34 is grounded, and the other end of the capacitor C11 is grounded; the fifth pin of the hysteresis comparator U11 is connected to one end of the resistor R7, and the other end of the resistor R7 is grounded; the sixth pin of the hysteresis comparator U11 is connected to one end of the capacitor C6, one end of the capacitor C7 and the positive 3.3V positive power supply VCC, the other end of the capacitor C6 is grounded, and the other end of the capacitor C7 is grounded. The 4th pin of the hysteresis comparator U11 serves as the inverting input terminal of the hysteresis comparator U11, and is connected to the output terminal of the digital-to-analog converter U10 of the DAC circuit 2-7 at the receiving end (i.e., the 1st pin of the digital-to-analog converter U10); the 1st pin of the hysteresis comparator U11 serves as the output terminal of the high-speed comparator circuit, and is connected to the core processing module 2-8 at the receiving end.

[0057] like Fig.11As shown, the transmitting end core processing module 1-1 includes an FPGA chip CTR_BUS, a resistor R26 and a resistor R27. The resistors R26 and R27 are both compensation resistors. The model of the FPGA chip CTR_BUS is EP4CE6. Pin 1 of the FPGA chip CTR_BUS is connected to the non-inverting input of the hysteresis comparator U1 of the first transmitter comparator circuit 1-3 of the dual high-speed comparator circuit; Pin 5 of the FPGA chip CTR_BUS is connected to the non-inverting input of the hysteresis comparator U3 of the second transmitter comparator circuit 1-4 of the dual high-speed comparator circuit; Pin 9 of the FPGA chip CTR_BUS is connected to the 4th pin of the digital-to-analog converter U5 of the transmitter DAC circuit 1-2; Pin 13 of the FPGA chip CTR_BUS is connected to the 5th pin of the digital-to-analog converter U5 of the transmitter DAC circuit 1-2; Pin 17 of the FPGA chip CTR_BUS is connected to the 6th pin of the digital-to-analog converter U5 of the transmitter DAC circuit 1-2; Pin 10 of the FPGA chip CTR_BUS is connected to the 7th pin of the variable resistor U4 of the digital potentiometer circuit 1-7; Pin 14 of the FPGA chip CTR_BUS is connected to the 2nd pin of the variable resistor U4 of the digital potentiometer circuit 1-7 ; Pin 18 of FPGA chip CTR_BUS is connected to pin 1 of variable resistor U4 of digital potentiometer circuit 1-7; Pin 2 of FPGA chip CTR_BUS is connected to one end of resistor R26, and the other end of resistor R26 is grounded; Pin 6 of FPGA chip CTR_BUS is connected to one end of resistor R27, and the other end of resistor R27 is grounded; Pin 3 of FPGA chip CTR_BUS is grounded; Pin 4 of FPGA chip CTR_BUS is grounded; Pin 7 of FPGA chip CTR_BUS is grounded; Pin 8 of FPGA chip CTR_BUS is grounded; Pin 11 of FPGA chip CTR_BUS is grounded; Pin 12 of FPGA chip CTR_BUS is grounded; Pin 15 of FPGA chip CTR_BUS is grounded; Pin 16 of FPGA chip CTR_BUS is grounded; Pin 19 of FPGA chip CTR_BUS is grounded; Pin 20 of FPGA chip CTR_BUS is grounded.

[0058] like Fig.12As shown, the receiving end core processing module 2-8 includes an FPGA chip BTB, a resistor R27, a resistor R28, a resistor R29, a resistor R31 and a resistor R33. The resistors R27, R28, R29, R31 and R33 are all compensation resistors. The model of the FPGA chip CTR_BUS is EP4CE6. The 1st pin of the FPGA chip BTB is connected to the 4th pin of the digital-to-analog converter U10 of the DAC circuit 2-7 at the receiving end; the 5th pin of the FPGA chip BTB is connected to the 6th pin of the digital-to-analog converter U10 of the DAC circuit 2-7 at the receiving end; the 9th pin of the FPGA chip BTB is connected to the 5th pin of the digital-to-analog converter U10 of the DAC circuit 2-7 at the receiving end; the 13th pin of the FPGA chip BTB is connected to the output end of the hysteresis comparator U11 of the high-speed comparator circuit 2-6 at the receiving end; the 17th pin of the FPGA chip BTB is connected to the 6th pin of the operational amplifier U8 of the operational amplifier circuit 2-4 of the automatic gain control circuit 3; the 2nd pin of the FPGA chip BTB is connected to one end of the resistor R27, and the other end of R27 is grounded; the 6th pin of the FPGA chip BTB is connected to one end of the resistor R28, and the other end of the resistor R28 is grounded. one end; the 10th pin of the FPGA chip BTB is connected to one end of the resistor R29, and the other end of the resistor R29 is grounded; the 14th pin of the FPGA chip BTB is connected to one end of the resistor R31, and the other end of the resistor R31 is grounded; the 18th pin of the FPGA chip BTB is connected to one end of the resistor R33, and the other end of the resistor R33 is grounded; the 3rd pin of the FPGA chip BTB is grounded; the 7th pin of the FPGA chip BTB is grounded; the 11th pin of the FPGA chip BTB is grounded; the 15th pin of the FPGA chip BTB is grounded; the 19th pin of the FPGA chip BTB is grounded; the 4th pin of the FPGA chip BTB is grounded; the 8th pin of the FPGA chip BTB is grounded; the 12th pin of the FPGA chip BTB is grounded; the 16th pin of the FPGA chip BTB is grounded; the 20th pin of the FPGA chip BTB is grounded.

[0059] The working process of the present invention is as follows:

[0060] When laser communication is required, the transmitting module performs PPM modulation on the data to be transmitted through the transmitting end core processing module. The transmitting end core processing module communicates with the DAC circuit through the SPI bus protocol and sets the comparison voltage, so that the dual-channel high-speed comparator of the transmitting module shapes the FPGA modulation waveform. The output signal controls the EN1 and EN2 switch pins of the laser switch circuit to control the 4-speed power change. The transmitting end core processing circuit controls the input of the digital potentiometer to control the output resistance, and then adjusts the output voltage of the power voltage-controlled power supply circuit. The output voltage of the power voltage-controlled power supply circuit is connected to the current control reference voltage terminal of the laser switch circuit, so that the transmission power can be controlled, so that the laser switch circuit can achieve a maximum switching frequency of 300MHZ, which is convenient for realizing multi-bit modulation transmission and driving the laser transmitting tube to emit laser pulses.

[0061] The receiving module converts the laser pulse emitted by the transmitting module into a current signal through a photoelectric receiving tube, and then converts the current signal into a voltage signal through a voltage-controlled variable gain circuit, thereby realizing voltage gain, and performs automatic gain control (AGC) on the received signal through an automatic gain control circuit 3. The automatic gain control circuit 3 includes a voltage-controlled variable gain circuit of a first-stage amplifier circuit and an operational amplifier circuit and an integrator circuit of a second-stage amplifier circuit. The first-stage amplifier circuit can achieve a maximum amplification of 100 times, and the amplification factor of the second-stage amplifier circuit is 20, thereby obtaining the final amplified waveform.

[0062] The integrator integrates the final amplified waveform and calculates the gain control waveform, which is then transmitted to the gain control pin of the voltage-controlled variable gain circuit. The integrator compares the output level with the reference level, changes the gain control pin of the voltage-controlled variable gain circuit, and adjusts the loop gain of the voltage-controlled variable gain circuit to achieve automatic gain, thereby improving the stability and anti-interference ability of the received signal and effectively avoiding waveform distortion. When the received signal is weak, the gain is increased. In addition, when the received signal is too strong, the signal pulse broadening will also affect the bit error rate, so the loop gain will also be reduced when the received signal is too strong. The stabilized pulse signal is restored to a digital pulse signal through the high-speed comparator circuit and DAC circuit at the receiving end, and then PPM demodulated by the core processing module at the receiving end. That is, the transmission power of the transmitting module is controllable, the circuit bandwidth of the automatic gain adjustment of the receiving module can reach 350MHZ, and high-gain communication is completed.

Claims

1. An underwater laser communication system with controllable transmission power and automatic gain adjustment, comprising a transmitting module (1) and a receiving module (2); the transmitting module (1) comprises a transmitting end core processing module (1-1), a transmitting end DAC circuit (1-2), a laser switch circuit (1-5), a power voltage-controlled power supply circuit (1-6), a digital potentiometer circuit (1-7) and a laser transmitting tube (1-8); the receiving module (2) comprises a photoelectric receiving tube (2-1), a transimpedance amplifier circuit (2-2), a receiving end DAC circuit (2-7), a receiving end high-speed comparator circuit (2-6) and a receiving end core processing module (2-8); characterized in that: The transmitting module (1) further comprises a dual-channel high-speed comparator circuit (4); the laser core processing module (1-1) is used for performing PPM modulation on the data to be transmitted, and transmitting the obtained analog signal to the dual-channel high-speed comparator (4); the transmitting end DAC circuit (1-2) is connected to the transmitting end core processing module (1-1) via an SPI bus, and transmits the reference voltage to the dual-channel high-speed comparator (4); the dual-channel high-speed comparator (4) outputs two control signals to the laser switch circuit (1-5); the two control signals control the laser switch circuit (1-5) One of the four power gears is selected so that the laser switch circuit (1-5) outputs a laser signal of corresponding power; the laser core processing module (1-1) outputs a control instruction to the digital potentiometer circuit (1-7); the digital potentiometer circuit (1-7) provides a variable resistance value for adjusting the laser power to the power voltage-controlled power supply circuit (1-6); the output interface of the power voltage-controlled power supply circuit (1-6) is connected to the input interface of the laser switch circuit (1-5); the laser switch circuit (1-5) drives the laser emitting tube (1-8) to emit a laser pulse signal; The receiving module (2) further comprises a voltage-controlled variable gain circuit (2-3), an operational amplifier circuit (2-4), and an integrator circuit (2-5); the voltage-controlled variable gain circuit (2-3), the operational amplifier circuit (2-4), and the integrator circuit (2-5) constitute an automatic gain control circuit (3); the receiving end DAC circuit (2-7) is connected to the receiving end core processing module (2-8) via an SPI bus; the receiving end DAC circuit (2-7) provides a reference voltage for the receiving end high-speed comparator circuit (2-6); the photoelectric receiving tube (2-1) is used to receive the laser pulse signal from the laser transmitting tube (1-8), and convert it into a voltage signal and output it to the transimpedance amplifier circuit (2-2); The transimpedance amplifier circuit (2-2) is used to amplify the input current signal and transmit it to the voltage-controlled variable gain circuit (2-3); the voltage signal output by the voltage-controlled variable gain circuit (2-3) is transmitted to the operational amplifier circuit (2-4); the operational amplifier circuit (2-4) amplifies the voltage signal output by the voltage-controlled variable gain circuit (2-3) and transmits it to the integrator circuit (2-5) and the receiving end high-speed comparator circuit (2-6); the integrator circuit (2-5) integrates the input amplified waveform and outputs the integrated signal to the gain control pin of the voltage-controlled variable gain circuit (2-3); the receiving end high-speed comparator circuit (2-6) converts the received signal into a digital signal and transmits it to the receiving end core processing module (2-8); During operation, the voltage-controlled variable gain circuit (2-3) and the operational amplifier circuit (2-4) respectively amplify the waveform of the input signal; the integrator circuit (2-5) integrates the signal output by the operational amplifier circuit (2-4) to obtain a gain control waveform, and transmits it to the gain control interface of the voltage-controlled variable gain circuit (2-3) to perform automatic gain control on the input signal.

2. According to claim 1, an underwater laser communication system with controllable transmission power and automatic gain adjustment is characterized in that: The dual-channel high-speed comparator circuit (4) comprises a first transmitter comparator circuit (1-3) and a second transmitter comparator circuit (1-4); the first transmitter comparator circuit (1-3) comprises a hysteresis comparator U1, a capacitor C15, a capacitor C16, a capacitor C20, a capacitor C24, a resistor R3, a resistor R17, a resistor R19 and a resistor R28; the model of the hysteresis comparator U1 is TLV3603; the second pin of the hysteresis comparator U1 is grounded; the third pin of the hysteresis comparator U1 is connected to one end of the resistor R3, the other end of the resistor R3 is connected to the capacitor C24 and one end of the resistor R19, and the other end of the resistor R19 is grounded; the fourth pin of the hysteresis comparator U1 is connected to one end of the capacitor C20 and one end of the resistor R28, the other end of the capacitor C20 is grounded, and the other end of the resistor R28 is grounded; The 5th pin of the comparator U1 is connected to one end of the resistor R17, and the other end of the resistor R17 is grounded; the 6th pin of the hysteresis comparator U1 is connected to one end of the capacitor C15, one end of the capacitor C16 and the positive 5V power supply VCC, the other end of the capacitor C15 is grounded, and the other end of the capacitor C16 is grounded; the 1st pin of the hysteresis comparator U1 is used as the output end of the first transmitter comparator circuit (1-3), and is connected to the channel 1 switch input end of the switch chip U2 in the laser switch circuit (1-5); the 3rd pin of the hysteresis comparator U1 is used as the positive input end of the first transmitter comparator circuit (1-3), and is connected to the transmitter core processing module (1-1); the 4th pin of the hysteresis comparator U1 is used as the negative input end of the first transmitter comparator circuit (1-3), and is connected to the output end of the transmitter DAC circuit (1-2); The second transmitting end comparator circuit (1-4) comprises a hysteresis comparator U3, a capacitor C17, a capacitor C18, a capacitor C21, a capacitor C25, a resistor R1, a resistor R18, a resistor R20 and a resistor R29; the model of the hysteresis comparator U3 is TLV3603; the second pin of the hysteresis comparator U3 is grounded; the third pin of the hysteresis comparator U3 is connected to one end of the resistor R1, the other end of the resistor R1 is connected to one end of the resistor R20 and the capacitor C25, and the other end of the resistor R20 is grounded; the fourth pin of the hysteresis comparator U3 is connected to one end of the capacitor C21 and one end of the resistor R29, the other end of the capacitor C21 is grounded, and the other end of the resistor R29 is grounded; the fifth pin of the hysteresis comparator U3 is connected to one end of the resistor R18, the other end of the resistor R18 is connected to ground; the 6th pin of the hysteresis comparator U3 is connected to one end of the capacitor C17, one end of the capacitor C18 and the positive 5V power supply VCC, the other end of the capacitor C17 is grounded, and the other end of the capacitor C18 is grounded; the 1st pin of the hysteresis comparator U3 is used as the output end of the hysteresis comparator U3 of the second transmitter comparator circuit (1-4), and is connected to the channel 2 switch input end of the switch chip U2 in the laser switch circuit (1-5); the 3rd pin of the hysteresis comparator U3 is used as the positive input end of the second transmitter comparator circuit (1-4), and is connected to the transmitter core processing module (1-1); the 4th pin of the hysteresis comparator U3 is used as the negative input end of the hysteresis comparator U3 of the second transmitter comparator circuit (1-4), and is connected to the output end of the transmitter DAC circuit (1-2).

3. According to claim 2, an underwater laser communication system with controllable transmission power and automatic gain adjustment is characterized in that: The transmitting end DAC circuit (1-2) comprises a digital-to-analog converter U5, a capacitor C14 and a resistor R16; the capacitor C14 is a filter capacitor; the model of the digital-to-analog converter U5 is DAC8830; the second pin of the digital-to-analog converter U5 is grounded; the third pin of the digital-to-analog converter U5 is connected to a positive 5V power supply VCC and one end of the capacitor C14, and the other end of the capacitor C14 is grounded; the fourth pin of the digital-to-analog converter U5 is connected to one end of the resistor R16, and the other end of the resistor R16 is connected to the positive 5V power supply VCC; the seventh pin of the digital-to-analog converter U5 is connected to the ground; The 8th pin of the digital-to-analog converter U5 is connected to a positive 5V power supply VCC; the 4th pin, the 5th pin and the 6th pin of the digital-to-analog converter U5 are connected to the SPI communication interface of the transmitter core processing module (1-1); the 1st pin of the digital-to-analog converter U5 is used as the output end of the digital-to-analog conversion of the transmitter DAC circuit (1-2), and is connected to the 4th pin of the hysteresis comparator U1 of the first transmitter comparator circuit (1-3) of the dual-channel high-speed comparator circuit (4), the second transmitter of the dual-channel high-speed comparator circuit (4), and the 4th pin of the hysteresis comparator U3 of the comparator circuit (1-4).

4. The underwater laser communication system with controllable transmission power and automatic gain adjustment according to claim 3 is characterized in that: The power voltage-controlled power supply circuit (1-6) comprises a positive voltage regulator V1, a capacitor C7, a capacitor C8, a capacitor C9, a polar capacitor E1, a polar capacitor E2, a resistor R8, a diode D4, a diode D5, and a diode D7; wherein the capacitor C7 is a filter capacitor, the capacitor C8 and the capacitor C9 are both low-pass filter capacitors, and the resistor R8 is a matching resistor; the model of the positive voltage regulator V1 is LM317; the first pin of the positive voltage regulator V1 is connected to one end of the resistor R8, one end of the capacitor C9 and the positive electrode of the diode D5, the other end of the capacitor C9 is grounded, the other end of the resistor R8 is connected to the second pin of the positive voltage regulator V1, and the negative electrode of the diode D5 is connected to the second pin of the positive voltage regulator V1; the second pin of the positive voltage regulator V1 is connected to The positive terminal of the positive voltage regulator V1 is connected to one end of the capacitor C8, the positive terminal of the polarity capacitor, the positive terminal of the diode D4 and the negative terminal of the diode D7, the positive terminal of the diode D7 is grounded, the negative terminal of the polarity capacitor is grounded, and the other end of the capacitor C8 is grounded; the third pin of the positive voltage regulator V1 is connected to the negative terminal of the polarity capacitor, the positive terminal of the diode D4, the positive 12V power supply VCC and one end of the capacitor C7, the other end of the capacitor C7 is grounded, and the negative terminal of the polarity capacitor is grounded; the first pin of the positive voltage regulator V1 is used as the output voltage adjustment pin of the power voltage-controlled power supply circuit (1-6) and is connected to the output interface of the digital potentiometer circuit (1-7); the second pin of the positive voltage regulator V1 is used as the output end of the power voltage-controlled power supply circuit (1-6) and is used to provide a reference voltage to the laser switch circuit (1-5).

5. The underwater laser communication system with controllable transmission power and automatic gain adjustment according to claim 4, characterized in that: The laser switch circuit (1-5) comprises a switch chip U2, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C19, a capacitor C26, a resistor R2, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R9, a resistor R14, a diode D1, a diode D2, and a laser emitting tube LD; the model of the switch chip U2 is IC-HKB; the model of the laser emitting tube LD is PLT5-450B; the first pin of the switch chip U2 is connected to one end of the resistor R4 and one end of the resistor U2, the other end of the resistor R4 is grounded, and the other end of the resistor R2 is connected to the capacitor C26; the second pin of the switch chip U2 is connected to one end of the resistor R5, and the other end of the resistor R5 is grounded; the third pin of the switch chip U2 is connected to one end of the laser emitting tube LD, the other end of the laser emitting tube LD is connected to one end of the capacitor C4, the cathode of the diode D2 and a positive 6.5V power supply, the other end of the capacitor C4 is connected to the anode of the diode D1 and grounded, and the anode of the diode D2 is connected to the cathode of the diode D1; the switch chip The 4th pin of the switch chip U2 is connected to one end of the resistor R6, and the other end of the resistor R6 is grounded; the 5th pin of the switch chip U2 is connected to one end of the resistor R9 and one end of the resistor R7, the other end of the resistor R9 is grounded, and the other end of the resistor R7 is connected to the capacitor C27; the 6th pin of the switch chip U2 is connected to one end of the capacitor C5, one end of the capacitor C6 and the ground; the 7th pin of the switch chip U2 is connected to the other end of the capacitor C5, the other end of C6 and the positive 5V power supply VCC; the 8th pin of the switch chip U2 is connected to one end of the capacitor C19, and the other end of the capacitor C19 is grounded; the 1st pin of the switch chip U2 is used as the channel 1 switch input and is connected to the output end of the first transmitting end comparator circuit (1-3) of the dual-way high-speed comparator circuit (4); the 5th pin of the switch chip U2 is used as the channel 2 switch input interface and is connected to the output end of the second transmitting end comparator circuit (1-4) of the dual-way high-speed comparator circuit (4); the 8th pin of the switch chip U2 is connected to the reference voltage provided by the power voltage-controlled power supply circuit (1-6).

6. The underwater laser communication system with controllable transmission power and automatic gain adjustment according to claim 4 is characterized in that: The digital potentiometer circuit (1-7) comprises a variable resistor U4, a capacitor C22, a capacitor C23, a resistor R10, a resistor R12 and a resistor R21; the model of the variable resistor is X9C102; the first pin of the variable resistor U4 is connected to one end of the resistor R12; the other end of the resistor R12 is grounded; the second pin of the variable resistor U4 is connected to one end of the resistor R10, and the other end of the resistor R10 is grounded; the third pin of the variable resistor U4 is connected to the fifth pin of the variable resistor U4; the fourth pin of the variable resistor U4 is connected to ground; the sixth pin of the variable resistor U4 is connected to ground; the seventh pin of the variable resistor U4 is connected to one end of the resistor R21, and the other end of the resistor R21 is grounded; the eighth pin of the variable resistor U4 is connected to one end of the capacitor C22, the capacitor C23 and the resistor R12 ... resistor R21, and the eighth pin of the variable resistor U4 is connected to one end of the capacitor C22, the capacitor C23 and the resistor R12; the eighth pin of the variable resistor U4 One end of the capacitor C23 is connected to the positive 5V power supply VCC, the other end of the capacitor C22 is grounded, and the other end of the capacitor C23 is grounded; the third pin of the variable resistor U4 is used as the output end of the digital potentiometer circuit (1-7), and is connected to the output voltage adjustment pin of the positive voltage regulator V1 of the power voltage-controlled power supply circuit (1-6); the first pin of the variable resistor U4 is used as the counting end of the variable resistor U4 of the digital potentiometer circuit (1-7), and is connected to the transmitter core processing module (1-1); the second pin of the variable resistor U4 is used as the tap moving end of the variable resistor U4 of the digital potentiometer circuit (1-7), and is connected to the transmitter core processing module (1-1); the 7 pin of the variable resistor U4 is used as the chip selection end of the digital potentiometer circuit (1-7), and is connected to the transmitter core processing module (1-1).

7. The underwater laser communication system with controllable transmission power and automatic gain adjustment according to claim 6, characterized in that: The transmitting end core processing module (1-1) includes an FPGA chip CTR_BUS, a resistor R26 and a resistor R27; the resistors R26 and R27 are both compensation resistors; the model of the FPGA chip CTR_BUS is EP4CE6; the first pin of the FPGA chip CTR_BUS is connected to the positive phase input of the hysteresis comparator U1 of the first transmitting end comparator circuit (1-3) of the dual-channel high-speed comparator circuit; the fifth pin of the FPGA chip CTR_BUS is connected to the hysteresis comparator U3 of the second transmitting end comparator circuit (1-4) of the dual-channel high-speed comparator circuit The 9th pin of the FPGA chip CTR_BUS is connected to the 4th pin of the digital-to-analog converter U5 of the transmitter DAC circuit (1-2); the 13th pin of the FPGA chip CTR_BUS is connected to the 5th pin of the digital-to-analog converter U5 of the transmitter DAC circuit (1-2); the 17th pin of the FPGA chip CTR_BUS is connected to the 6th pin of the digital-to-analog converter U5 of the transmitter DAC circuit (1-2); the 10th pin of the FPGA chip CTR_BUS is connected to the 7th pin of the variable resistor U4 of the digital potentiometer circuit (1-7) ; The 14th pin of FPGA chip CTR_BUS is connected to the 2nd pin of variable resistor U4 of digital potentiometer circuit (1-7); The 18th pin of FPGA chip CTR_BUS is connected to the 1st pin of variable resistor U4 of digital potentiometer circuit (1-7); The 2nd pin of FPGA chip CTR_BUS is connected to one end of resistor R26, and the other end of resistor R26 is grounded; The 6th pin of FPGA chip CTR_BUS is connected to one end of resistor R27, and the other end of resistor R27 is grounded; The 3rd pin of FPGA chip CTR_BUS is grounded; The 4th pin of FPGA chip CTR_BUS is grounded; The 7th pin of FPGA chip CTR_BUS is grounded; The 8th pin of FPGA chip CTR_BUS is grounded; The 11th pin of FPGA chip CTR_BUS is grounded; The 12th pin of FPGA chip CTR_BUS is grounded; The 15th pin of FPGA chip CTR_BUS is grounded; The 16th pin of FPGA chip CTR_BUS is grounded; The 19th pin of FPGA chip CTR_BUS is grounded; The 20th pin of FPGA chip CTR_BUS is grounded.

8. The underwater laser communication system with controllable transmission power and automatic gain adjustment according to claim 1, characterized in that: The voltage-controlled variable gain circuit (2-3) includes a voltage-controlled variable gain amplifier U7; the operational amplifier circuit (2-4) includes an operational amplifier U8; the integrator circuit (2-5) includes an integrator U9; the model of the voltage-controlled variable gain amplifier U7 is VCA821, the model of the operational amplifier U8 is OPA695, the model of the integrator U9 is OPA820, and the model of the diode D1 is 1N4150; the first pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the capacitor C2, one end of the capacitor C3 and one end of the inductor L1, the other end of the capacitor C2 is grounded, the other end of the capacitor C3 is grounded, and the other end of the inductor L1 is connected to a positive 5V power supply V CC; the second pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the capacitor C19, one end of the capacitor C20 and one end of the resistor R22, the other end of the capacitor C19 is grounded, and the other end of the capacitor C20 is grounded; the third pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the resistor R2 and one end of the resistor R18, the other end of the resistor R2 is grounded, and the other end of the resistor R18 is connected to one end of the capacitor C8; the fourth pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the resistor R4, and the other end of the resistor R4 is connected to the fifth pin of the voltage-controlled variable gain amplifier U7; the sixth pin of the voltage-controlled variable gain amplifier U7 is connected to one end of the resistor R11, The other end of resistor R11 is grounded; the 7th pin of the voltage-controlled variable gain amplifier U7 is connected to one end of capacitor C17, one end of capacitor C18 and one end of inductor L2, the other end of capacitor C17 is grounded, the other end of capacitor C18 is grounded, and the other end of the inductor is connected to the negative 5V power supply VEE; the 8th pin of the voltage-controlled variable gain amplifier U7 is connected to the 7th pin of the voltage-controlled variable gain amplifier U7; the 9th pin of the voltage-controlled variable gain amplifier U7 is connected to one end of resistor R9, and the other end of resistor R9 is grounded; the 10th pin of the voltage-controlled variable gain amplifier U7 is connected to one end of capacitor C23 and one end of resistor R3, and the other end of resistor R3 is connected to the voltage-controlled variable gain amplifier U7. The 12th pin of the gain amplifier U7 and the other end of the capacitor C23 are connected to the resistor R6; the 11th pin of the voltage-controlled variable gain amplifier U7 is grounded; the 14th pin of the voltage-controlled variable gain amplifier U7 is connected to the 1st pin of the voltage-controlled variable gain amplifier U7; the 3rd pin of the voltage-controlled variable gain amplifier U7 serves as the non-inverting input terminal of the automatic gain control circuit (3); the 10th pin of the voltage-controlled variable gain amplifier U7 serves as the output terminal of the voltage-controlled variable gain amplifier U7 and is connected to the non-inverting input terminal of the operational amplifier U8; the 2nd pin of the voltage-controlled variable gain amplifier U7 serves as the gain control terminal of the voltage-controlled variable gain amplifier U7 and is connected to the output terminal of the integrator U9; The second pin of the operational amplifier U8 is connected to one end of the resistor R5 and one end of the resistor R14, the other end of the resistor R5 is grounded, and the other end of the resistor R14 is connected to the sixth pin of the operational amplifier U8; the third pin of the operational amplifier U8 is connected to one end of the resistor R6, and the other end of the resistor R6 is connected to the capacitor C23; the fourth pin of the operational amplifier U8 is connected to one end of the capacitor C25, one end of the capacitor C26 and the negative 5V power supply VEE, the other end of the capacitor C25 is grounded, and the other end of the capacitor C26 is grounded; the sixth pin of the operational amplifier U8 is connected to the resistor R The first terminal of the operational amplifier U8 is connected to one end of the resistor R15 and the anode of the diode D1, and the other end of the resistor R15 is connected to the capacitor C24; the seventh pin of the operational amplifier U8 is connected to one end of the capacitor C21, one end of the capacitor C22 and the positive 5V power supply VCC, the other end of the capacitor C21 is grounded, and the other end of the capacitor C22 is grounded; the third pin of the operational amplifier U8 is used as the non-inverting input terminal of the operational amplifier U8 and is connected to the output terminal of the voltage-controlled variable gain amplifier U7; the sixth pin of the operational amplifier U8 is used as the output terminal of the automatic gain control circuit (3) and is connected to the inverting input terminal of the integrator U9; The second pin of the integrator U9 is connected to one end of the capacitor C28 and one end of the resistor R21, the other end of the capacitor C28 is connected to the sixth pin of the integrator U9, and the other end of the resistor R21 is connected to the cathode of the diode D1; the third pin of the integrator U9 is connected to one end of the capacitor C35 and one end of the resistor R23, the other end of the capacitor C35 is grounded, the other end of the resistor R23 is connected to one end of the resistor R16 and one end of the sliding variable resistor RP1, the other end of the resistor R16 is connected to the positive 5V power supply VCC, and the other end of the sliding variable resistor RP1 is grounded; the fourth pin of the integrator U9 is connected to one end of the capacitor C36 and the resistor R23, the other end of the capacitor C35 is grounded, the other end of the resistor R23 is connected to one end of the resistor R16 and one end of the sliding variable resistor RP1, the other end of the resistor R16 is connected to the positive 5V power supply VCC, and the other end of the sliding variable resistor RP1 is grounded; One end of capacitor C37 and the negative 5V power supply VEE, the other end of capacitor C36 is grounded, and the other end of capacitor C37 is grounded; the 6th pin of integrator U9 is connected to the other end of resistor R22; the 7th pin of integrator U9 is connected to one end of capacitor C29, one end of capacitor C30 and the positive 5V power supply VCC, the other end of capacitor C29 is grounded, and the other end of capacitor C30 is grounded; the 2nd pin of integrator U9 serves as the inverting input terminal of integrator U9, connected to the output terminal of operational amplifier U8; the 6th pin of integrator U9 serves as the output terminal of integrator U9, connected to the gain control terminal of voltage-controlled variable gain amplifier U7.

9. The underwater laser communication system with controllable transmission power and automatic gain adjustment according to claim 8, characterized in that: The transimpedance amplifier circuit (2-2) comprises an operational amplifier U6, a capacitor C1, a capacitor C4, a capacitor C5, a capacitor C9, a capacitor C10, a capacitor C12, a capacitor C13, a capacitor C14, a capacitor C15, a resistor R1, a resistor R8, and a photoelectric receiving tube (2-1); the model of the operational amplifier U6 is OPA847, and the model of the photoelectric receiving tube PIN is S5973-02; the second pin of the operational amplifier U6 is connected to the first pin of the photoelectric receiving tube PIN, the third pin of the photoelectric receiving tube is connected to one end of the capacitor C5, one end of the capacitor C4 and a negative 10V power supply VEE, the other end of the capacitor C5 is grounded, and the other end of the capacitor C4 is grounded; the third pin of the operational amplifier U6 is connected to one end of the resistor R8, one end of the capacitor C12 and one end of the negative 10V power supply VEE. The fourth pin of the operational amplifier U6 is connected to one end of the capacitor C14, one end of the capacitor C15 and the negative 5V power supply VEE, the other end of the capacitor C14 is grounded, and the other end of the capacitor C15 is grounded; the sixth pin of the operational amplifier U6 is connected to the second pin of the operational amplifier U6; the seventh pin of the operational amplifier U6 is connected to one end of the capacitor C9, one end of the capacitor C10 and the positive 5V power supply VCC, the other end of the capacitor C9 is grounded, and the other end of the capacitor C10 is grounded; the sixth pin of the operational amplifier U6 is connected to the non-inverting input terminal of the automatic gain control circuit (3) as the output terminal of the transimpedance amplifier circuit (2-2).

10. The underwater laser communication system with controllable transmission power and automatic gain adjustment according to claim 8, characterized in that: The receiving end DAC circuit (2-7) comprises a digital-to-analog converter U10, a capacitor C31, a capacitor C32, and a resistor R17; the capacitor C31 is a low-frequency filter capacitor, the capacitor C32 is a high-frequency filter capacitor, and the resistor R17 is a pull-up resistor; the model of the digital-to-analog converter U10 is DAC8830; the second pin of the digital-to-analog converter U10 is grounded; the third pin of the digital-to-analog converter U10 is connected to one end of the capacitor C31, one end of the capacitor C32 and a positive 3.3V power supply VCC, the other end of the capacitor C31 is grounded, and the other end of the capacitor C32 is grounded; The 4th pin of the digital-to-analog converter U10 is connected to one end of the resistor R17, and the other end of the resistor R17 is connected to the positive 5V power supply VCC; the 7th pin of the digital-to-analog converter U10 is grounded; the 8th pin of the digital-to-analog converter U10 is connected to the positive 5V power supply VCC; the 1st pin of the digital-to-analog converter U10 is used as the output end of the digital-to-analog converter U10, and is connected to the negative phase input end of the hysteresis comparator U11 of the high-speed comparator circuit (2-6) at the receiving end; the 4th pin, the 5th pin, and the 6th pin of the digital-to-analog converter U10 are connected to the core processing module (2-8) at the receiving end; The receiving end high-speed comparator circuit (2-6) comprises a hysteresis comparator U11, a capacitor C6, a capacitor C7, a capacitor C11, a capacitor C16, a capacitor C27, a resistor R7, a resistor R10, a resistor R12, a resistor R19, a resistor R20, and a resistor R34; the first pin of the hysteresis comparator U11 is connected to one end of the capacitor C27, the other end of the capacitor C27 is connected to one end of the resistor R19, the other end of the resistor R19 is connected to one end of the resistor R20, and the other end of the resistor R20 is grounded; the third pin of the hysteresis comparator U11 is connected to one end of the resistor R10, the other end of the resistor R10 is connected to one end of the resistor R12 and one end of the capacitor C16, and the other end of the resistor R12 is grounded; the fourth pin of the hysteresis comparator U11 is connected to one end of the resistor R10, the other end of the resistor R10 is connected to one end of the resistor R12 and one end of the capacitor C16, and the other end of the resistor R12 is grounded; connected to one end of capacitor C11 and one end of resistor R34, the other end of resistor R34 is grounded, and the other end of capacitor C11 is grounded; the 5th pin of hysteresis comparator U11 is connected to one end of resistor R7, and the other end of resistor R7 is grounded; the 6th pin of hysteresis comparator U11 is connected to one end of capacitor C6, one end of capacitor C7 and positive 3.3V positive power supply VCC, the other end of capacitor C6 is grounded, and the other end of capacitor C7 is grounded; the 4th pin of hysteresis comparator U11 is used as the inverting input end of hysteresis comparator U11, and is connected to the output end of digital-to-analog converter U10 of receiving end DAC circuit (2-7); the 1st pin of hysteresis comparator U11 is used as the output end of high-speed comparator circuit, and is connected to receiving end core processing module (2-8); The receiving end core processing module (2-8) comprises an FPGA chip BTB, a resistor R27, a resistor R28, a resistor R29, a resistor R31 and a resistor R33; the resistors R27, R28, R29, R31 and R33 are all compensation resistors; the model of the FPGA chip CTR_BUS is EP4CE6; the first pin of the FPGA chip BTB is connected to the fourth pin of the digital-to-analog converter U10 of the receiving end DAC circuit (2-7); the fifth pin of the FPGA chip BTB is connected to the sixth pin of the digital-to-analog converter U10 of the receiving end DAC circuit (2-7); the ninth pin of the FPGA chip BTB is connected to the fifth pin of the digital-to-analog converter U10 of the receiving end DAC circuit (2-7); the thirteenth pin of the FPGA chip BTB is connected to the output end of the hysteresis comparator U11 of the receiving end high-speed comparator circuit (2-6); the seventeenth pin of the FPGA chip BTB is connected to the sixth pin of the operational amplifier U8 of the operational amplifier circuit (2-4) of the automatic gain control circuit (3); The second pin of chip BTB is connected to one end of resistor R27, and the other end of R27 is grounded; the sixth pin of FPGA chip BTB is connected to one end of resistor R28, and the other end of resistor R28; the tenth pin of FPGA chip BTB is connected to one end of resistor R29, and the other end of resistor R29 is grounded; the fourteenth pin of FPGA chip BTB is connected to one end of resistor R31, and the other end of resistor R31 is grounded; the eighteenth pin of FPGA chip BTB is connected to one end of resistor R33, and the other end of resistor R33 is grounded; the third pin of FPGA chip BTB is grounded; the seventh pin of FPGA chip BTB is grounded; the eleventh pin of FPGA chip BTB is grounded; the fifteenth pin of FPGA chip BTB is grounded; the nineteenth pin of FPGA chip BTB is grounded; the fourth pin of FPGA chip BTB is grounded; the eighth pin of FPGA chip BTB is grounded; the twelfth pin of FPGA chip BTB is grounded; the sixteenth pin of FPGA chip BTB is grounded; the twentyth pin of FPGA chip BTB is grounded.

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