Self-rectifying memristor and method of manufacturing the same

Abstract

The application provides a self-rectifying memristor and a preparation method thereof, which comprises a substrate, a first electrode, a resistance state switching layer, a barrier blocking layer and a second electrode; the resistance state switching layer comprises a metal compound layer or a plurality of metal compound layers; the barrier blocking layer comprises a metal compound layer or a plurality of metal compound layers, and the resistance state switching layer and the barrier blocking layer do not simultaneously comprise only one metal compound layer; the work function of the second electrode is greater than that of the first electrode; when the resistance state switching layer or the barrier blocking layer comprises a plurality of metal compound layers, the vacancy concentration of each metal compound layer gradually changes from high to low along the direction from the first electrode to the second electrode; and the minimum value of the vacancy concentration of the metal compound layer in the resistance state switching layer is greater than the maximum value of the vacancy concentration of the metal compound layer in the barrier blocking layer. The self-rectifying memristor can have multiple intermediate states, i.e. multiple conductance values, in the low resistance value region or the high resistance value region.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of microelectronic devices, and more particularly, to a self-rectifying memristor and a preparation method thereof. BACKGROUND

[0002] As a new memory device, the memristor has the advantages of simple structure and process, easy operation, high density, low power consumption, high speed, and compatibility with CMOS process, and has become one of the favorable competitors of new memory in the post-moore era.

[0003] In a large-scale memristor array, various non-rational factors typified by leakage current seriously damage the overall performance of the array and limit the scale of the memristor array. Therefore, researchers have designed a series of schemes to suppress the leakage current in the array, such as a memristor cascaded with a transistor 1T1R, a memristor cascaded with a gating tube 1S1R, a memristor cascaded with a diode 1D1R, a complementary memristor CRS, and a self-rectifying memristor SRM. The self-rectifying memristor is favored by researchers due to its advantages of not needing to introduce additional nonlinear devices, having a simpler structure, being conducive to large-scale and three-dimensional integration, having lower power consumption, and the like.

[0004] In addition, for tasks of neuromorphic computing and complex in-memory computing, the device often needs to have good conductance modulation characteristics due to the multi-bit characteristics of the weights, and the device needs to have multiple stable conductance states to map the weight matrix using the memristor array.

[0005] Therefore, it is necessary to provide a self-rectifying memristor with potential multi-value characteristics and a preparation method thereof to simultaneously solve the leakage current problem in the array and the conductance modulation requirement and other problems. SUMMARY

[0006] In view of the defects of the prior art, the purpose of the present application is to provide a self-rectifying memristor and a preparation method thereof, which aims to solve the leakage current in a large-scale memristor array and the conductance modulation characteristic requirement for tasks of neuromorphic computing and complex in-memory computing.

[0007] To achieve the above-mentioned purpose, in a first aspect, the present application provides a self-rectifying memristor, which comprises, from bottom to top, a substrate, a first electrode, a resistance state switching layer, a barrier blocking layer, and a second electrode.

[0008] The resistance state switching layer comprises a layer of metal compound or multiple layers of metal compound;

[0009] The barrier blocking layer comprises a layer of metal compound or multiple layers of metal compound, and the resistance state switching layer and the barrier blocking layer do not simultaneously comprise only a layer of metal compound;

[0010] a work function of the second electrode is greater than a work function of the first electrode;

[0011] when the resistance state switching layer comprises a plurality of metal compound layers, a vacancy concentration of each layer of the metal compound layers changes from high to low in a direction from the first electrode to the second electrode;

[0012] when the barrier layer comprises a plurality of metal compound layers, a vacancy concentration of each layer of the metal compound layers changes from high to low in a direction from the first electrode to the second electrode;

[0013] a minimum value of the vacancy concentration of the metal compound layer in the resistance state switching layer is greater than a maximum value of the vacancy concentration of the metal compound layer in the barrier layer.

[0014] It should be noted that the present application forms a higher Schottky barrier between the second electrode layer with a high work function and the barrier layer, and the work function difference between the first electrode layer and the resistance state switching layer is small, or even forms an ohmic contact, thereby realizing the barrier difference between the first electrode and the second electrode, and achieving better self rectification characteristics.

[0015] It can be understood that the present application has a plurality of metal compound layers in the resistance state switching layer, so that the memristor can have multiple conductive states in the low resistance state, and has a plurality of metal compound layers in the barrier layer, so that the memristor can have multiple conductive states in the high resistance state.

[0016] In one possible example, if the resistance state switching layer comprises a plurality of metal compound layers and the barrier layer comprises only one metal compound layer, when the second electrode is applied with a forward bias, vacancies in the resistance state switching layer enter the barrier layer and form a first conductive filament in the barrier layer, the resistance of the barrier layer decreases exponentially, and the voltage drop is redistributed, mainly in a plurality of metal compound layers in the resistance state switching layer close to the barrier layer, inducing vacancies in the voltage drop layer to move towards the first electrode, so that a second conductive filament is formed in the plurality of metal compound layers, and the self-rectifying memristor changes from a high resistance state to a low resistance state.

[0017] If the voltage value of the forward bias continues to increase, the voltage drop is mainly distributed on the metal compound layers in the resistance state switching layer relatively close to the second conductive filament, so that the vacancies in the voltage drop layer further move towards the first electrode, and the length of the second conductive filament extends towards the first electrode, thereby reducing the resistance of the self-rectifying memristor in the low resistance state; the more the voltage value of the forward bias increases, the longer the length of the second conductive filament extends, and the lower the resistance value of the self-rectifying memristor in the low resistance state, and the self-rectifying memristor can have multiple conductive states in the low resistance state with the change of the forward bias.

[0018] In one possible example, if the barrier blocking layer includes a plurality of metal compound layers and the resistance state switching layer includes only one metal compound layer, when the second electrode is applied with a positive bias, the vacancies in the resistance state switching layer enter the barrier blocking layer, and first conductive filaments are formed in the metal compound layers of the barrier blocking layer in sequence in the direction from the first electrode to the second electrode. When the first conductive filaments pass through the barrier blocking layer, the resistance of the barrier blocking layer exponentially decreases, the voltage drop is redistributed, and second conductive filaments are gradually formed in the resistance state switching layer, so that the self-rectifying memristor changes from a high-resistance state to a low-resistance state.

[0019] When the barrier blocking layer includes a plurality of metal compound layers and the resistance state switching layer includes only one metal compound layer, the self-rectifying memristor is in a low-resistance state, and the second electrode is applied with a negative bias, the voltage drop first falls on the metal compound layers close to the second electrode in the barrier blocking layer, so that the conductive filaments in the voltage drop layer are broken, and the self-rectifying memristor changes to a high-resistance state. After the self-rectifying memristor changes to a high-resistance state, when the voltage value of the negative bias continues to increase, the voltage drop is distributed on the metal compound layers close to the layer where the conductive filaments are broken, so that the first conductive filaments are further broken in the direction from the second electrode to the first electrode, the resistance of the self-rectifying memristor in a high-resistance state increases, the more the voltage value of the negative bias increases, the longer the length of the broken first conductive filaments, and the higher the resistance value of the self-rectifying memristor in a high-resistance state. The self-rectifying memristor can be in multiple conductive states in a high-resistance state with a negative bias.

[0020] In one possible example, if the barrier blocking layer includes a plurality of metal compound layers and the resistance state switching layer includes a plurality of metal compound layers, when the second electrode is applied with a positive bias, the vacancies in the resistance state switching layer enter the barrier blocking layer, and first conductive filaments are formed in the metal compound layers of the barrier blocking layer in sequence in the direction from the first electrode to the second electrode. When the first conductive filaments pass through the barrier blocking layer, the resistance of the barrier blocking layer exponentially decreases, the voltage drop is redistributed, and second conductive filaments are gradually formed in the resistance state switching layer, so that the self-rectifying memristor changes from a high-resistance state to a low-resistance state;

[0021] If the voltage value of the forward bias continues to increase, the voltage drop is mainly distributed on the metal compound layer relatively close to the second conductive filament in the resistance state switching layer, so that the vacancies in the voltage drop layer further move towards the first electrode, the length of the second conductive filament is elongated towards the first electrode, and the resistance of the low-resistance state of the self-rectifying memristor is reduced; the more the voltage value of the forward bias increases, the longer the length of the second conductive filament is elongated, and the lower the resistance value of the low-resistance state of the self-rectifying memristor is; the self-rectifying memristor can be in multiple conductance states in the low-resistance state with the change of the forward bias.

[0022] If the barrier blocking layer includes a plurality of metal compound layers, the resistance state switching layer includes a plurality of metal compound layers, and the self-rectifying memristor is in a low-resistance state, when the second electrode is applied with a negative bias, the voltage drop is first dropped on a plurality of metal compound layers close to the second electrode in the barrier blocking layer, so that the conductive filament in the voltage drop layer is broken, and the self-rectifying memristor is converted into a high-resistance state; after the self-rectifying memristor is converted into a high-resistance state, when the voltage value of the negative bias continues to increase, the voltage drop is distributed on the metal compound layer close to the layer where the conductive filament is broken, so that the first conductive filament is further broken along the direction from the second electrode to the first electrode, the resistance of the high-resistance state of the self-rectifying memristor is increased, the more the voltage value of the negative bias increases, the longer the length of the first conductive filament is broken, and the higher the resistance value of the high-resistance state of the self-rectifying memristor is; the self-rectifying memristor can be in multiple conductance states in the high-resistance state with the change of the negative bias.

[0023] In a possible example, the vacancies are oxygen vacancies or nitrogen vacancies.

[0024] In a possible example, the memristor further includes: an isolation layer.

[0025] The isolation layer is arranged around the resistance state switching layer and the barrier blocking layer.

[0026] In a second aspect, the present application provides a preparation method of a self-rectifying memristor, including the following steps:

[0027] S1, preparing a substrate;

[0028] S2, patterning a first electrode on the substrate;

[0029] S3, depositing a first electrode film at the patterned first electrode;

[0030] S4, depositing an isolation layer film on the first electrode film;

[0031] S5, photoetching a preset region on the isolation layer film;

[0032] S6, selectively etching the isolation layer film on the first electrode film in the preset region until the first electrode pattern in the preset region is completely exposed;

[0033] S7, depositing a resistance state switching layer on the exposed first electrode; the resistance state switching layer comprises a metal compound layer or a plurality of metal compound layers;

[0034] S8, depositing a barrier layer on the resistance state switching layer; the barrier layer comprises a metal compound layer or a plurality of metal compound layers, and the resistance state switching layer and the barrier layer do not simultaneously comprise only a metal compound layer;

[0035] S9, patterning a second electrode on the barrier layer;

[0036] S10, depositing a second electrode film at the patterned second electrode;

[0037] The work function of the second electrode film is greater than that of the first electrode film; when the resistance state switching layer comprises a plurality of metal compound layers, the vacancy concentration of each metal compound layer gradually decreases from high to low along the direction from the first electrode to the second electrode; when the barrier layer comprises a plurality of metal compound layers, the vacancy concentration of each metal compound layer gradually decreases from high to low along the direction from the first electrode to the second electrode; the lowest vacancy concentration of the metal compound layer in the resistance state switching layer is greater than the highest vacancy concentration of the metal compound layer in the barrier layer.

[0038] In one possible example, the resistance state switching layer and the barrier layer are deposited by one of physical vapor deposition or chemical vapor deposition.

[0039] In one possible example, when the resistance state switching layer or the barrier layer is deposited by physical vapor deposition, the metal compound layers with different vacancy concentrations are deposited by controlling the amount of vacancy element gas, gas pressure and reaction power.

[0040] In one possible example, when the resistance state switching layer or the barrier layer is deposited by chemical vapor deposition, the metal compound layers with different vacancy concentrations are deposited by controlling the inert gas purging time, reaction pulse and reaction temperature.

[0041] Overall, compared with the prior art, the above technical solutions conceived by the present application have the following beneficial effects:

[0042] (1) The self-rectifying memristor provided by the application forms a higher Schottky barrier between the second electrode layer with a high work function and the barrier blocking layer, and the work function difference between the first electrode layer and the resistance state switching layer is small, or even forms an ohmic contact, so that the barrier difference between the first electrode and the second electrode is realized, and good self-rectifying characteristics are realized.

[0043] (2) The self-rectifying memristor provided by the application has good conductance modulation characteristics. By designing the multi-layer vacancy concentration gradient distribution of the resistance state switching layer or the barrier blocking layer, the device can have multiple intermediate states, i.e. multiple conductance values, in the low resistance value region or the high resistance value region.

[0044] (3) The self-rectifying memristor and the preparation method thereof provided by the application can be applied to large-scale, high-density two-dimensional or three-dimensional integrated arrays, and can be used for performing neuromorphic computing and in-memory computing tasks. The preparation method is simple and efficient, and is suitable for popularization and application. BRIEF DESCRIPTION OF DRAWINGS

[0045] Figure 1 The self-rectifying memristor structure schematic diagram provided by the application has N1 layers of resistance state switching layers and one layer of barrier blocking layers;

[0046] Figure 2 The self-rectifying memristor structure schematic diagram provided by the application has 4 layers of resistance state switching layers and one layer of barrier blocking layers in the initial state;

[0047] Figure 3 The self-rectifying memristor preparation process flowchart provided by the application;

[0048] Figure 4 The self-rectifying memristor structure schematic diagram provided by the application has 4 layers of resistance state switching layers and one layer of barrier blocking layers under an applied forward bias;

[0049] Figure 5 The self-rectifying memristor structure schematic diagram provided by the application has 4 layers of resistance state switching layers and one layer of barrier blocking layers under an applied forward bias;

[0050] Figure 6 The self-rectifying memristor structure schematic diagram provided by the application has 4 layers of resistance state switching layers and one layer of barrier blocking layers under an applied forward bias;

[0051] Figure 7 The self-rectifying memristor structure schematic diagram provided by the application has 4 layers of resistance state switching layers and one layer of barrier blocking layers under an applied forward bias;

[0052] Figure 8 Structure schematic diagram of self-rectifying memristor with 4 layers of resistance state switching layer and 1 layer of potential barrier blocking layer under applied positive bias voltage provided by the embodiment of the present application;

[0053] Figure 9 Structure schematic diagram of self-rectifying memristor with 4 layers of resistance state switching layer and 1 layer of potential barrier blocking layer under applied negative bias voltage provided by the embodiment of the present application;

[0054] Figure 10 Energy band principle diagram of self-rectifying memristor provided by the embodiment of the present application;

[0055] In all the drawings, the same reference signs are used to represent the same elements or structures, wherein: 101 is a substrate of the self-rectifying memristor; 102 is a first electrode of the self-rectifying memristor; 103 is an isolation layer of the self-rectifying memristor; 104 is a resistance state switching layer of the self-rectifying memristor; 105 is a potential barrier blocking layer of the self-rectifying memristor; 106 is a second electrode of the self-rectifying memristor; 114 is a first layer of resistance state switching layer of the self-rectifying memristor; 124 is a second layer of resistance state switching layer of the self-rectifying memristor; 134 is a third layer of resistance state switching layer of the self-rectifying memristor; 144 is a fourth layer of resistance state switching layer of the self-rectifying memristor. DETAILED DESCRIPTION

[0056] In order to make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. The description of the at least one exemplary embodiment is actually only illustrative, but not intended to limit the present application and its application or use in any way. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort belong to the scope of protection of the present application.

[0057] It should be noted that the terms used herein are only intended to describe specific embodiments, and are not intended to limit the exemplary embodiments according to the present application. As used herein, the singular form is intended to include the plural form, unless the context clearly indicates otherwise, and furthermore, it should be understood that when the terms "comprise" and / or "include" are used in the specification, there is a presence of the features, steps, operations, devices, components and / or combinations thereof.

[0058] The foregoing is considered as illustrative only of the principles of the application. Further, since numerous modifications and changes will readily occur to those skilled in the art, it is not desired to limit the application to the exact construction and practice described. Accordingly, all suitable modifications and equivalents can be resorted to falling within the scope of the application. Unless otherwise indicated herein, the procedures and techniques of conventional chemistry, biochemistry, molecular biology, microbiology, recombinant DNA, immunology, and pharmacology, which are within the skill of the art, can be used. Unless otherwise indicated herein, the materials used in the examples are commercially available. The practice of the present application will employ, unless otherwise indicated herein, conventional methods of chemistry, biochemistry, molecular biology, microbiology, recombinant DNA techniques, immunology, and pharmacology, within the skill of the art. Such procedures are described in the literature, e.g., in the references listed below, and in the examples herein. Standard techniques can be used, unless otherwise specified. Exemplary techniques can be found in Sambrook et al., Molecular Cloning: A Laboratory Manual, 3rd Ed., Cold Spring Harbor Laboratory Press, Cold Spring Harbor, N.Y. (2001); Ausubel et al., Short Protocols in Molecular Biology: A Compendium of Techniques, 4th Ed., John Wiley & Sons, Inc., Hoboken, N.J. (1999); and the series Methods in Enzymology, Academic Press, San Diego, Calif. (1999). The disclosures of all of the above references are hereby incorporated by reference in their entireties.

[0059] In the description of the present application, it is to be understood that the specific location or position relationships indicated by orientation words such as "front, back, upper, lower, left, right", "horizontal, vertical, perpendicular, horizontal" and "top, bottom" and the like are generally based on the orientation or position relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate and imply that the devices or elements referred to must have a particular orientation or be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the scope of protection of the present application: the orientation words "inner, outer" refer to the inner and outer relative to the outline of each component itself.

[0060] For the convenience of description, spatial relative terms such as "over", "above", "upper surface", "upper" and the like can be used herein to describe the spatial position relationship of one device or feature with other devices or features as shown in the drawings. It should be understood that the spatial relative terms are intended to include different orientations in use or operation in addition to the orientation of the devices as described in the drawings. For example, if the devices in the drawings are inverted, the device described as "above" or "over" other devices or structures will be positioned "below" or "under" the other devices or structures. Thus, the exemplary term "above" can include both "above" and "below" orientations. The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatial relative descriptions used herein are interpreted accordingly.

[0061] In addition, it should be noted that the use of the words "first", "second" and the like to describe various components is merely intended to distinguish the respective components from each other, and the words have no special meaning unless otherwise stated, and therefore cannot be understood as limiting the scope of protection of the present application.

[0062] In the description of this invention, the terms "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0063] To achieve the objectives of this invention, in a first aspect, this invention provides a self-rectified memristor, see [link to previous article]. Figure 1 As shown, the memristor includes: a substrate 101, a first electrode 102, an isolation layer 103, a resistive state switching layer 104, a barrier layer 105, and a second electrode 106.

[0064] More specifically, the substrate is a silicon-based substrate, which can be a stack of elemental Si, SiO2, Si3N4, SiC, Si and SiO2 or Si3N4 or SiC, or one of ITO or flexible substrate materials.

[0065] More specifically, the work function of the material of the first electrode is less than or equal to 4.5 eV, and the material of the first electrode is composed of one or more materials, such as one or more of the following: elemental metal, elemental Si, elemental Si-doped metal, and conductive metal compound.

[0066] More specifically, the work function of the material of the second electrode is greater than 4.5 eV, and the material of the second electrode is composed of one or more materials, such as one or more of the following: elemental metal, elemental Si, elemental Si-doped metal, and conductive metal compound.

[0067] More specifically, the insulating layer material is one or more of silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, aluminum oxide, hafnium oxide, aluminum nitride, or other materials with high dielectric constant.

[0068] More specifically, the resistive state switching layer material can be one of a monometallic oxide or a binary metal oxide, such as hafnium oxide, aluminum oxide, tantalum oxide, titanium oxide, tungsten oxide, zinc oxide, zirconium oxide, molybdenum oxide, copper oxide, iron oxide, magnesium oxide, lithium tantalum oxide, lithium iron oxide, lithium silicon oxide, etc.

[0069] More specifically, the barrier layer material can be one of a monometallic oxide or a binary metal oxide, such as hafnium oxide, aluminum oxide, tantalum oxide, titanium oxide, tungsten oxide, zinc oxide, zirconium oxide, molybdenum oxide, copper oxide, iron oxide, magnesium oxide, lithium tantalum oxide, lithium iron oxide, lithium silicon oxide, etc.

[0070] More specifically, the resistance state switching layer has only one layer or has N1 layers, where N1≥2.

[0071] Referring to Figure 2 As shown, taking N1=4 as an example, the resistance state switching layer 104 includes a first layer resistance state switching layer 114, a second layer resistance state switching layer 124, a third layer resistance state switching layer 134, and a fourth layer resistance state switching layer 144.

[0072] More specifically, for the resistance state switching layer having N1 layers, the vacancy concentration of each layer has a fixed value, and the vacancy concentration presents a gradient change from high to low or from low to high between the N1 layers.

[0073] More specifically, for the resistance state switching layer having N1 layers, the material system of each layer resistance state switching layer is completely the same.

[0074] More specifically, the barrier layer has only one layer or has N2 layers, where N2≥2.

[0075] More specifically, for the barrier layer having N2 layers, the vacancy concentration of each layer has a fixed value, and the vacancy concentration presents a gradient change from high to low or from low to high between the N2 layers.

[0076] More specifically, for the barrier layer having N2 layers, the material system of each layer barrier layer is completely the same.

[0077] More specifically, the resistance state switching layer and the barrier layer do not simultaneously have only one layer.

[0078] More specifically, for the case of the resistance state switching layer having only one layer and the barrier layer having N2 layers, the vacancy concentration content in the resistance state switching layer is higher than the vacancy concentration content in the layer with the highest vacancy concentration in the barrier layer.

[0079] More specifically, for the case of the resistance state switching layer having N1 layers and the barrier layer having only one layer, the vacancy concentration content in the layer with the lowest vacancy concentration in the resistance state switching layer is higher than the vacancy concentration content in the barrier layer.

[0080] More specifically, for the case of the resistance state switching layer having N1 layers and the barrier layer having N2 layers, the vacancy concentration content in the layer with the lowest vacancy concentration in the resistance state switching layer is higher than the vacancy concentration content in the layer with the highest vacancy concentration in the barrier layer.

[0081] More specifically, the vacancies are oxygen vacancies or nitrogen vacancies.

[0082] Further, taking oxygen vacancies as an example, the case of the resistance state switching layer with N1 layers and the case of the barrier layer with only one layer are analyzed.

[0083] Specifically, in the initial state, the self-rectifying is in a high resistance state.

[0084] Further specifically, if the resistance state switching layer includes multiple layers of metal oxide layers and the barrier layer includes only one layer of metal oxide layer, when the second electrode is applied with a forward bias, the oxygen vacancies in the resistance state switching layer enter the barrier layer and form a first conductive filament in the barrier layer, the resistance of the barrier layer is exponentially reduced, the voltage drop is redistributed, and a second conductive filament is gradually formed in the resistance state switching layer with a lower oxygen vacancy concentration, the first and second conductive filaments form a complete conductive filament connecting the first and second electrodes, so that the self-rectifying memristor changes from a high resistance state to a low resistance state.

[0085] After the self-rectifying memristor changes to a low resistance state, when the voltage value of the forward bias gradually increases, the vacancies continue to migrate to the first electrode side, so that the length of the second conductive filament increases, and the resistance of the self-rectifying memristor in the low resistance state gradually decreases; the resistance value of the self-rectifying memristor in the low resistance state is regulated by the size of the forward bias, and can change in multiple conductive states in the low resistance state.

[0086] If the resistance state switching layer includes multiple layers of metal oxide layers and the barrier layer includes only one layer of metal oxide layer, when the self-rectifying memristor is in a low resistance state and the second electrode is applied with a negative bias, the voltage drop first falls on the barrier layer, causing the first conductive filament to be broken, so that the self-rectifying memristor changes from a low resistance state to a high resistance state.

[0087] Specifically, if the barrier layer includes multiple layers of metal oxide layers and the resistance state switching layer includes only one layer of metal oxide layer, when the second electrode is applied with a forward bias, the vacancies in the resistance state switching layer enter the barrier layer and form a first conductive filament in the barrier layer, the resistance of the barrier layer is exponentially reduced, the voltage drop is redistributed, and a second conductive filament is gradually formed in the resistance state switching layer, the first and second conductive filaments form a complete conductive filament connecting the first and second electrodes, so that the self-rectifying memristor changes from a high resistance state to a low resistance state.

[0088] If the barrier layer includes a plurality of metal oxide layers, and the resistance state switching layer includes a plurality of metal oxide layers, when the second electrode is applied with a positive bias, the oxygen vacancies in the resistance state switching layer enter the barrier layer and form a first conductive filament in the barrier layer, the resistance of the barrier layer is exponentially reduced, the voltage drop is redistributed, gradually inducing the resistance state switching layer with a lower oxygen vacancy concentration to gradually form a second conductive filament, the first conductive filament and the second conductive filament form a complete conductive filament connecting the first electrode and the second electrode, so that the self-rectifying memristor changes from a high resistance state to a low resistance state;

[0089] After the self-rectifying memristor changes to a high resistance state, when the voltage value of the positive bias gradually increases, the conductive filament in the barrier layer with a lower initial vacancy concentration gradually breaks, so that the length of the first conductive filament decreases, and the resistance of the self-rectifying memristor in the high resistance state gradually increases; the resistance value of the self-rectifying memristor in the high resistance state is regulated by the size of the positive bias, and the multiple conductive states in the low resistance state can change with the positive bias.

[0090] Specifically, if the barrier layer includes a plurality of metal oxide layers, and the resistance state switching layer includes a plurality of metal oxide layers, when the second electrode is applied with a positive bias, the oxygen vacancies in the resistance state switching layer enter the barrier layer and form a first conductive filament in the barrier layer, the resistance of the barrier layer is exponentially reduced, the voltage drop is redistributed, gradually inducing the resistance state switching layer with a lower oxygen vacancy concentration to gradually form a second conductive filament, the first conductive filament and the second conductive filament form a complete conductive filament connecting the first electrode and the second electrode, so that the self-rectifying memristor changes from a high resistance state to a low resistance state;

[0091] After the self-rectifying memristor changes to a high resistance state, when the voltage value of the positive bias gradually increases, the conductive filament in the barrier layer with a lower initial vacancy concentration gradually breaks, so that the length of the first conductive filament decreases, and the resistance of the self-rectifying memristor in the high resistance state gradually increases; the resistance value of the self-rectifying memristor in the high resistance state is regulated by the size of the positive bias, and the multiple conductive states in the low resistance state can change with the positive bias.

[0092] If the barrier layer includes a plurality of metal oxide layers, and the resistance state switching layer includes a plurality of metal oxide layers, when the second electrode is applied with a positive bias, the oxygen vacancies in the resistance state switching layer enter the barrier layer and form a first conductive filament in the barrier layer, the resistance of the barrier layer is exponentially reduced, the voltage drop is redistributed, gradually inducing the resistance state switching layer with a lower oxygen vacancy concentration to gradually form a second conductive filament, the first conductive filament and the second conductive filament form a complete conductive filament connecting the first electrode and the second electrode, so that the self-rectifying memristor changes from a high resistance state to a low resistance state;

[0093] After the self-rectifying memristor changes to a high resistance state, when the voltage value of the positive bias gradually increases, the conductive filament in the barrier layer with a lower initial vacancy concentration gradually breaks, so that the length of the first conductive filament decreases, and the resistance of the self-rectifying memristor in the high resistance state gradually increases; the resistance value of the self-rectifying memristor in the high resistance state is regulated by the size of the positive bias, and the multiple conductive states in the low resistance state can change with the positive bias.

[0094] Further, from the perspective of interface barrier:

[0095] Specifically, in the initial state, the self-rectifying memristor is in a high resistance state, the Schottky barrier between the first electrode and the resistance state switching layer of the self-rectifying memristor is low, and even an ohmic contact can be formed; due to the low defect concentration (vacancy concentration) in the barrier layer of the self-rectifying memristor, the interface between the second electrode and the barrier layer will exhibit a high Schottky barrier;

[0096] Further specifically, after a forward bias is applied to the second electrode of the self-rectifying memristor, electrons migrate from the first electrode to the second electrode, and in this migration process, the Schottky barrier between the first electrode and the resistance state switching layer is low and does not significantly hinder the migration of electrons, so that the electrons can easily complete the migration, and the self-rectifying memristor switches from a high resistance state to a low resistance state;

[0097] Thereafter, after a negative bias is applied to the second electrode, the process of electron migration from the second electrode to the first electrode needs to be completed, and due to the high Schottky barrier between the second electrode and the barrier layer, the migration of electrons will be significantly hindered, so that the current flowing through the self-rectifying memristor will not be significantly increased, thereby achieving the effect of rectification; however, in this process, the electrons in the resistance state switching layer and the barrier layer of the self-rectifying memristor will be released from their respective positions under the action of the external electric field and migrate to the first electrode, and the migration of the electrons in this process will not be affected by any barrier, and the self-rectifying memristor switches from a low resistance state back to a high resistance state.

[0098] In a second aspect, the present application provides a preparation method of the self-rectifying memristor provided in the first aspect above, which comprises the following steps: Figure 3 As shown in the figure, the process flow is as follows:

[0099] S1, substrate preparation;

[0100] S2, patterning the first electrode on the substrate;

[0101] S3, depositing a first electrode thin film;

[0102] S4, depositing an isolation layer thin film on the first electrode thin film;

[0103] S5, photoetching to form a preset region on the isolation layer thin film;

[0104] S6, selectively etching the isolation layer thin film in the preset region on the first electrode thin film until the first electrode pattern is completely exposed;

[0105] S7, depositing a resistance state switching layer on the first electrode;

[0106] S8, depositing a barrier layer on the first functional layer;

[0107] S9, patterning a second electrode;

[0108] S10, depositing a second electrode film.

[0109] More specifically, the depositing of the first electrode film is accomplished by physical vapor deposition or chemical vapor deposition.

[0110] More specifically, the depositing of the second electrode film is accomplished by physical vapor deposition or chemical vapor deposition.

[0111] Specifically, the patterning of the first electrode and the patterning of the second electrode are both accomplished by photolithography.

[0112] Specifically, the isolation layer is deposited by one of chemical vapor deposition or physical vapor deposition.

[0113] Specifically, the resistance state switching layer is deposited by one of physical vapor deposition or chemical vapor deposition.

[0114] In an optional example, when the resistance state switching layer with N1 layers is deposited by physical vapor deposition, the N1 layers of the resistance state switching layer with different vacancy concentrations are deposited by controlling the amount of vacancy element gas (for oxides, the Ar:O2 ratio is controlled, increasing the ratio means more vacancies, and vice versa; for nitrides, the Ar:N2 ratio is controlled), gas pressure, and reaction power;

[0115] In an optional example, when the resistance state switching layer with N1 layers is deposited by chemical vapor deposition, the N1 layers of the resistance state switching layer with different vacancy concentrations are deposited by controlling the inert gas purge time, reaction pulse, and reaction temperature.

[0116] More specifically, the resistance state switching layer with only one layer has a thickness of no more than 50 nanometers; and the resistance state switching layer with N1 layers has a thickness of no more than 20 nanometers for each layer.

[0117] Specifically, the barrier layer is deposited by one of physical vapor deposition or chemical vapor deposition.

[0118] In an optional example, when the barrier layer with N2 layers is deposited by physical vapor deposition, the N2 layers of the barrier layer with different vacancy concentrations are deposited by controlling the amount of vacancy element gas (for oxides, the Ar:O2 ratio is controlled, increasing the ratio means more vacancies, and vice versa; for nitrides, the Ar:N2 ratio is controlled), gas pressure, and reaction power;

[0119] In an optional example, when the barrier layer with N2 layer is deposited by chemical vapor deposition, the N2 layer barrier layer with different vacancy concentration is deposited by controlling the inert gas purging time, reaction pulse and reaction temperature.

[0120] More specifically, the thickness of the barrier layer with only one layer is not more than 50 nanometers; the thickness of each layer of the barrier layer with N2 layer is not more than 20 nanometers.

[0121] More specifically, the characteristic size of the self-rectifying memristor is 10 nanometers to 1000 microns.

[0122] More specifically, the thickness of the first electrode film is 10 nanometers to 1000 nanometers.

[0123] More specifically, the thickness of the second electrode film is 10 nanometers to 1000 nanometers.

[0124] More specifically, the pattern size of the first electrode and the second electrode is not less than 10 microns.

[0125] More specifically, the thickness of the isolation layer film of the first memristor and the isolation layer film of the second memristor is the same, which is 10 nanometers to 1000 nanometers.

[0126] The embodiment of the present application provides a multifunctional memristor implementation scheme of a homogeneous double layer, and the embodiment of the present application will be described in detail in combination with the above drawings:

[0127] Embodiment:

[0128] The embodiment of the present application provides a self-rectifying memristor with potential electrical conductance modulation characteristics and a preparation method thereof, and the device structure is Ta / TaO X / HfO2 / Pt, wherein the first electrode is Ta, the resistance state switching layer is TaO X , the barrier layer is HfO2, the second electrode layer is Pt, and the isolation layer is SiO2. X The barrier layer HfO2 has four layers, and only one layer. The specific preparation process is as follows (without describing the cleaning and stripping process):

[0129] 1. Prepare the negative of the Si / SiO2 substrate in advance.

[0130] 2. The first electrode pattern is patterned on the substrate by using extreme ultraviolet lithography technology.

[0131] 3. Direct current magnetron sputtering is adopted, the power is 50-100 W, the argon flow rate is 40-80 sccm, the gas pressure is maintained at 0.4-0.8 Pa, the target material is metal Ta, and a Ta electrode with a thickness of 50-100 nm is deposited;

[0132] 4. PECVD is adopted to deposit 100 nm of SiO2 as an isolation layer;

[0133] 5. Electron beam lithography technology is adopted to pattern the bottom electrode area and device area to be etched;

[0134] 6. ICP is adopted to etch the isolation layer, expose the bottom electrode area, and form a silicon through hole structure with a size of 100-500 nm;

[0135] 7. Radio frequency magnetron sputtering is adopted, the power is 80-120 W, the target material is Ta2O5, the gas pressure is maintained at 0.5-0.8 Pa, Ar:O2=30:10 gas atmosphere is first adopted, 5-10 nm of TaO y1 is deposited, then Ar:O2=20:10 gas atmosphere is adopted, 5-10 nm of TaO y2 is deposited, then Ar:O2=10:10 gas atmosphere is adopted, 5-10 nm of TaO y3 is deposited, and finally Ar:O2=10:20 gas atmosphere is adopted, 5-10 nm of TaO y4 is deposited. Finally, a four-layer resistance state switching layer TaO X is formed.

[0136] 8. Atomic layer deposition is adopted, the purge time is 1-5 s, the reaction temperature is 250-300℃, and a potential barrier layer HfO2 with a thickness of 5-20 nm is deposited.

[0137] 9. Extreme ultraviolet lithography technology is adopted to overlay the second electrode pattern;

[0138] 10. Direct current magnetron sputtering is adopted, the power is 30-60 W, the argon flow rate is 40-80 sccm, the gas pressure is maintained at 0.4-0.8 Pa, the target material is metal Pt, and a Pt electrode with a thickness of 50-100 nm is deposited.

[0139] In this embodiment, a combination of a four-layer resistance state switching layer and a potential barrier layer with only one layer is selected.

[0140] As shown in Figure 2 , it is a structure schematic diagram of a Ta / TaO X / HfO2 / Pt structure self rectifying memristor in an initial state;

[0141] As shown in Figure 4As shown, when a positive bias is gradually applied to the Pt electrode, the voltage drop is mainly distributed on the higher-resistance barrier layer, and a conductive filament is first formed in the barrier layer. When the conductive filament completely penetrates the barrier layer, the resistance of the barrier layer is exponentially reduced, and the device enters a low-resistance state.

[0142] As shown, when a positive bias is gradually applied to the Pt electrode, the voltage drop is mainly distributed on the higher-resistance barrier layer, and a conductive filament is first formed in the barrier layer. When the conductive filament completely penetrates the barrier layer, the resistance of the barrier layer is exponentially reduced, and the device enters a low-resistance state. Figure 5 As shown, when a positive bias is gradually applied to the Pt electrode, the voltage drop is mainly distributed on the higher-resistance barrier layer, and a conductive filament is first formed in the barrier layer. When the conductive filament completely penetrates the barrier layer, the resistance of the barrier layer is exponentially reduced, and the device enters a low-resistance state.

[0143] As shown, when a positive bias is gradually applied to the Pt electrode, the voltage drop is mainly distributed on the higher-resistance barrier layer, and a conductive filament is first formed in the barrier layer. When the conductive filament completely penetrates the barrier layer, the resistance of the barrier layer is exponentially reduced, and the device enters a low-resistance state. Figure 6 As shown, when a positive bias is gradually applied to the Pt electrode, the voltage drop is mainly distributed on the higher-resistance barrier layer, and a conductive filament is first formed in the barrier layer. When the conductive filament completely penetrates the barrier layer, the resistance of the barrier layer is exponentially reduced, and the device enters a low-resistance state.

[0144] Figure 7 As shown, when a positive bias is gradually applied to the Pt electrode, the voltage drop is mainly distributed on the higher-resistance barrier layer, and a conductive filament is first formed in the barrier layer. When the conductive filament completely penetrates the barrier layer, the resistance of the barrier layer is exponentially reduced, and the device enters a low-resistance state.

[0145] As shown, when a positive bias is gradually applied to the Pt electrode, the voltage drop is mainly distributed on the higher-resistance barrier layer, and a conductive filament is first formed in the barrier layer. When the conductive filament completely penetrates the barrier layer, the resistance of the barrier layer is exponentially reduced, and the device enters a low-resistance state. Figure 8 As shown, when a positive bias is gradually applied to the Pt electrode, the voltage drop is mainly distributed on the higher-resistance barrier layer, and a conductive filament is first formed in the barrier layer. When the conductive filament completely penetrates the barrier layer, the resistance of the barrier layer is exponentially reduced, and the device enters a low-resistance state.

[0146] As shown, when a positive bias is gradually applied to the Pt electrode, the voltage drop is mainly distributed on the higher-resistance barrier layer, and a conductive filament is first formed in the barrier layer. When the conductive filament completely penetrates the barrier layer, the resistance of the barrier layer is exponentially reduced, and the device enters a low-resistance state. Figure 9 As shown, when a positive bias is gradually applied to the Pt electrode, the voltage drop is mainly distributed on the higher-resistance barrier layer, and a conductive filament is first formed in the barrier layer. When the conductive filament completely penetrates the barrier layer, the resistance of the barrier layer is exponentially reduced, and the device enters a low-resistance state.

[0147] As shown, when a positive bias is gradually applied to the Pt electrode, the voltage drop is mainly distributed on the higher-resistance barrier layer, and a conductive filament is first formed in the barrier layer. When the conductive filament completely penetrates the barrier layer, the resistance of the barrier layer is exponentially reduced, and the device enters a low-resistance state. Figure 10 As shown, when a positive bias is gradually applied to the Pt electrode, the voltage drop is mainly distributed on the higher-resistance barrier layer, and a conductive filament is first formed in the barrier layer. When the conductive filament completely penetrates the barrier layer, the resistance of the barrier layer is exponentially reduced, and the device enters a low-resistance state. X As shown, when a positive bias is gradually applied to the Pt electrode, the voltage drop is mainly distributed on the higher-resistance barrier layer, and a conductive filament is first formed in the barrier layer. When the conductive filament completely penetrates the barrier layer, the resistance of the barrier layer is exponentially reduced, and the device enters a low-resistance state. X As shown, when a positive bias is gradually applied to the Pt electrode, the voltage drop is mainly distributed on the higher-resistance barrier layer, and a conductive filament is first formed in the barrier layer. When the conductive filament completely penetrates the barrier layer, the resistance of the barrier layer is exponentially reduced, and the device enters a low-resistance state.

[0148] ​Those skilled in the art can easily understand that the above description is only the preferred embodiment of the present application, and is not intended to limit the present application. Any modification, equivalent replacement and improvement made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A self-rectified memristor, characterized in that, From bottom to top, it includes: a substrate, a first electrode, a resistive state switching layer, a barrier layer, and a second electrode; The resistive switching layer comprises one metal compound layer or multiple metal compound layers; The barrier layer includes one or more metal compound layers, and the resistive switching layer and the barrier layer do not both consist of only one metal compound layer at the same time. The work function of the second electrode is greater than that of the first electrode; When the resistive switching layer comprises multiple metal compound layers, the vacancy concentration of each metal compound layer varies from high to low along the direction from the first electrode to the second electrode. When the barrier layer comprises multiple metal compound layers, the vacancy concentration of each metal compound layer varies from high to low along the direction from the first electrode to the second electrode. The lowest vacancy concentration in the metal compound layer of the resistive state switching layer is greater than the highest vacancy concentration in the metal compound layer of the barrier layer.

2. The self-rectified memristor according to claim 1, characterized in that, If the resistive switching layer includes multiple metal compound layers and the barrier barrier layer includes only one metal compound layer, then when the second electrode is forward biased, the vacancies in the resistive switching layer enter the barrier barrier layer and form the first conductive filament in the barrier barrier layer. The resistance of the barrier barrier layer decreases exponentially, and the voltage drop is redistributed, mainly distributed in several metal compound layers near the barrier barrier layer in the resistive switching layer. This induces the vacancies in the voltage drop layer to move towards the first electrode, causing the formation of the second conductive filament in the several metal compound layers. The self-rectified memristor changes from a high resistance state to a low resistance state. If the forward bias voltage continues to increase, the voltage drop is mainly distributed on the metal compound layer relatively close to the second conductive filament within the resistive switching layer. This causes the vacancies in the voltage drop layer to move further toward the first electrode, and the length of the second conductive filament extends toward the first electrode, reducing the resistance of the self-rectified memristor in its low-resistance state. The greater the increase in the forward bias voltage, the longer the second conductive filament extends, and the lower the resistance of the self-rectified memristor in its low-resistance state. The self-rectified memristor can be in multiple conductance states with varying forward bias voltages, operating in a low-resistance state.

3. The self-rectified memristor according to claim 1, characterized in that, If the barrier layer includes multiple metal compound layers and the resistive switching layer includes only one metal compound layer, then when the second electrode is forward biased, the vacancy in the resistive switching layer enters the barrier layer and forms a first conductive filament in each metal compound layer of the barrier layer along the direction from the first electrode to the second electrode. When the first conductive filament penetrates the barrier layer, the resistance of the barrier layer decreases exponentially, the voltage drop is redistributed, and a second conductive filament is gradually formed in the resistive switching layer, so that the self-rectified memristor changes from a high resistance state to a low resistance state. When the barrier layer comprises multiple metal compound layers and the resistance switching layer comprises only one metal compound layer, when the self-rectified memristor is in a low-resistance state and the second electrode is negatively biased, the voltage drop first falls on several metal compound layers in the barrier layer near the second electrode, causing the conductive filaments in the voltage drop layer to break, and the self-rectified memristor switches to a high-resistance state. After the self-rectified memristor switches to a high-resistance state, when the negative bias voltage continues to increase, the voltage drop is distributed on the metal compound layers near the broken conductive filament layers, causing the first conductive filament to break further along the direction from the second electrode to the first electrode, increasing the resistance of the self-rectified memristor in the high-resistance state. The more the negative bias voltage increases, the longer the first conductive filament breaks, and the higher the resistance of the self-rectified memristor in the high-resistance state. The self-rectified memristor can be in multiple conduction states of high resistance with changes in negative bias voltage.

4. The self-rectified memristor according to claim 1, characterized in that, If the barrier layer includes multiple metal compound layers and the resistive switching layer includes multiple metal compound layers, then when the second electrode is forward biased, the vacancies in the resistive switching layer enter the barrier layer and form first conductive filaments in each metal compound layer of the barrier layer along the direction from the first electrode to the second electrode. When the first conductive filaments penetrate the barrier layer, the resistance of the barrier layer decreases exponentially, and the voltage drop is redistributed, mainly distributed in several metal compound layers near the barrier layer in the resistive switching layer. This induces the vacancies in the voltage drop layer to move towards the first electrode, causing the formation of second conductive filaments in the several metal compound layers. The self-rectified memristor changes from a high resistance state to a low resistance state. If the forward bias voltage continues to increase, the voltage drop is mainly distributed on the metal compound layer relatively close to the second conductive filament within the resistive switching layer. This causes the vacancies in the voltage drop layer to move further toward the first electrode, and the length of the second conductive filament extends toward the first electrode, reducing the resistance of the self-rectified memristor in its low-resistance state. The greater the increase in the forward bias voltage, the longer the second conductive filament extends, and the lower the resistance of the self-rectified memristor in its low-resistance state. The self-rectified memristor can be in multiple conductance states with varying forward bias voltages. If the barrier layer comprises multiple metal compound layers, the resistance switching layer comprises multiple metal compound layers, and the self-rectified memristor is in a low-resistance state, then when a negative bias is applied to the second electrode, the voltage drop first falls on several metal compound layers in the barrier layer near the second electrode, causing the conductive filaments in the voltage drop layer to break, and the self-rectified memristor to switch to a high-resistance state. After the self-rectified memristor switches to a high-resistance state, when the negative bias voltage continues to increase, the voltage drop is distributed on the metal compound layers near the broken conductive filament layers, causing the first conductive filament to break further along the direction from the second electrode to the first electrode, increasing the resistance of the self-rectified memristor in the high-resistance state. The more the negative bias voltage increases, the longer the first conductive filament breaks, and the higher the resistance of the self-rectified memristor in the high-resistance state. The self-rectified memristor can be in multiple conduction states with high resistance as the negative bias changes.

5. The self-rectified memristor according to any one of claims 1 to 4, characterized in that, The vacancy is an oxygen vacancy or a nitrogen vacancy.

6. The self-rectified memristor according to any one of claims 1 to 4, characterized in that, Also includes: Isolation layer; The isolation layer is placed around the resistive switching layer and the barrier blocking layer.

7. A method for fabricating a self-rectified memristor, characterized in that, Includes the following steps: S1. Prepare the substrate; S2. Pattern the first electrode on the substrate; S3. Deposit a first electrode thin film at the patterned first electrode; S4. Deposit an isolation layer film on the first electrode film; S5. Photolithography forms a preset area on the isolation layer film; S6. Selectively etch the isolation layer film in a preset area on the first electrode film until the first electrode pattern in the preset area is fully exposed. S7. Deposit a resistive state switching layer on the exposed first electrode; the resistive state switching layer comprises one metal compound layer or multiple metal compound layers; S8. Deposit a barrier layer on the resistive state switching layer; the barrier layer includes one metal compound layer or multiple metal compound layers, and the resistive state switching layer and the barrier layer do not both consist of only one metal compound layer at the same time. S9. Pattern the second electrode on the barrier layer; S10. Deposit a second electrode thin film at the patterned second electrode; The work function of the second electrode film is greater than that of the first electrode film; when the resistive switching layer includes multiple metal compound layers, the vacancy concentration of each metal compound layer changes from high to low along the direction from the first electrode to the second electrode; when the barrier layer includes multiple metal compound layers, the vacancy concentration of each metal compound layer changes from high to low along the direction from the first electrode to the second electrode; the lowest vacancy concentration of the metal compound layer in the resistive switching layer is greater than the highest vacancy concentration of the metal compound layer in the barrier layer.

8. The method according to claim 7, characterized in that, Both the resistive switching layer and the barrier layer are deposited by either physical vapor deposition or chemical vapor deposition.

9. The method according to claim 8, characterized in that, When the resistive switching layer or barrier barrier layer is deposited using physical vapor deposition, metal compound layers with different vacancy concentrations are deposited by controlling the injection rate, pressure, and reaction power of the vacancy element gas.

10. The method according to claim 8, characterized in that, When the resistive switching layer or barrier layer is deposited using chemical vapor deposition, metal compound layers with different vacancy concentrations are deposited by controlling the inert gas purging time, reaction pulse, and reaction temperature.

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