An input plug-in

Abstract

The application discloses an input plug-in, comprising: a common ground collection channel and a non-common ground collection channel; the common ground collection channel is used for collecting a level signal in a common ground input mode and outputting the collected level signal; and the non-common ground collection channel is used for collecting a level signal in a non-common ground input mode and outputting the collected level signal. The input plug-in is simultaneously provided with the common ground collection channel and the non-common ground collection channel, can be compatible with level signals in different input modes, and can be compatible with level signals in different voltage grades.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of level signal acquisition, and particularly relates to an input plug-in. BACKGROUND

[0002] There are various voltage levels and various input mode level signals outside a secure computer platform, and the main processing system of the secure computer platform needs to know the level state of the external input and perform corresponding security processing. Therefore, a plug-in needs to be set to acquire the level signal and transmit the acquired level signal to the main processing system. At present, the level signal acquisition scheme of the existing plug-in is to use the same PCB for different voltage levels, and different plug-ins are configured according to different voltage levels. In addition, there are two ways of common ground and non-common ground for external level input, and different input modes need to be configured with different plug-ins or additional channels. As a result, the number of plug-ins and the number of materials increase, ultimately causing an increase in maintenance and management costs.

[0003] Therefore, providing an input plug-in capable of being compatible with level signals of different voltage levels and different input modes has become a technical problem to be solved by those skilled in the art. SUMMARY

[0004] The purpose of the present application is to provide an input plug-in capable of being compatible with level signals of different voltage levels and different input modes.

[0005] To solve the above technical problems, the present application provides an input plug-in, comprising:

[0006] a common ground acquisition channel and a non-common ground acquisition channel;

[0007] The common ground acquisition channel is configured to acquire a level signal in a common ground input mode and output the acquired level signal.

[0008] The non-common ground acquisition channel is configured to acquire a level signal in a non-common ground input mode and output the acquired level signal.

[0009] Optionally, the common ground acquisition channel comprises:

[0010] a first anti-reverse circuit, a first anti-surge and contact cleaning circuit, a first voltage dividing circuit, and a first AD acquisition chip; the first anti-reverse circuit, the first anti-surge and contact cleaning circuit, the first voltage dividing circuit, and the first AD acquisition chip are connected in sequence, an input end of the first anti-reverse circuit is used as an input end of the common ground acquisition channel, and the first AD acquisition chip outputs the acquired level signal.

[0011] Optionally, the first anti-reverse circuit comprises:

[0012] a first diode; an anode of the first diode as an input end of the first anti-reverse circuit, and a cathode of the first diode connected to an input end of the first anti-surge and contact cleaning circuit.

[0013] Optionally, the first voltage dividing circuit comprises:

[0014] a first resistor, a second resistor and a third resistor;

[0015] one end of the first resistor connected to an output end of the first anti-surge and contact cleaning circuit, the other end of the first resistor connected to one end of the second resistor, the other end of the second resistor connected to one end of the third resistor and the first AD acquisition chip, and the other end of the third resistor grounded.

[0016] Optionally, the common-ground acquisition channel further comprises:

[0017] a first self-check signal input circuit for inputting a self-check signal to the common-ground acquisition channel.

[0018] Optionally, the first self-check signal input circuit comprises:

[0019] a second diode; an anode of the second diode as an input end of the first self-check signal input circuit, and a cathode of the second diode connected to an input end of the first anti-surge and contact cleaning circuit.

[0020] Optionally, the non-common-ground acquisition channel comprises:

[0021] a second anti-reverse circuit, a third anti-reverse circuit, a fourth anti-reverse circuit, a second anti-surge and contact cleaning circuit, a third anti-surge and contact cleaning circuit, a second voltage dividing circuit, a third voltage dividing circuit and a second AD acquisition chip;

[0022] the second anti-reverse circuit, the second anti-surge and contact cleaning circuit, the second voltage dividing circuit and the second acquisition chip connected in sequence; the third anti-reverse circuit, the third anti-surge and contact cleaning circuit, the third voltage dividing circuit and the second acquisition chip connected in sequence; an input end of the second anti-reverse circuit connected to an input end of the third anti-reverse circuit, and serving as a positive input end of the non-common-ground acquisition channel; the second AD acquisition chip outputting an acquired level signal; an input end of the fourth anti-reverse circuit connected to the third voltage dividing circuit, and an output end of the fourth anti-reverse circuit serving as a negative input end of the non-common-ground acquisition channel.

[0023] Optionally, the second anti-reverse circuit comprises:

[0024] a third diode; an anode of the third diode is connected to an input terminal of the second anti-reverse circuit, and a cathode of the third diode is connected to an input terminal of the second surge protection and contact cleaning circuit.

[0025] Optionally, the third anti-reverse circuit comprises:

[0026] a fourth diode; an anode of the fourth diode is connected to an input terminal of the third anti-reverse circuit, and a cathode of the fourth diode is connected to an input terminal of the third surge protection and contact cleaning circuit.

[0027] Optionally, the fourth anti-reverse circuit comprises:

[0028] a fifth diode; an anode of the fifth diode is connected to an input terminal of the fourth anti-reverse circuit and connected to the third voltage dividing circuit, and a cathode of the fifth diode is connected to an output terminal of the fourth anti-reverse circuit.

[0029] Optionally, the second voltage dividing circuit comprises:

[0030] a fourth resistor, a fifth resistor and a sixth resistor;

[0031] one end of the fourth resistor is connected to an output terminal of the second surge protection and contact cleaning circuit, the other end of the fourth resistor is connected to one end of the fifth resistor, the other end of the fifth resistor is connected to one end of the sixth resistor and the second AD acquisition chip, and the other end of the sixth resistor is grounded.

[0032] Optionally, the third voltage dividing circuit comprises:

[0033] a seventh resistor, an eighth resistor and a ninth resistor;

[0034] one end of the seventh resistor is connected to an output terminal of the third surge protection and contact cleaning circuit, the other end of the seventh resistor is connected to one end of the eighth resistor, the other end of the eighth resistor is connected to one end of the ninth resistor and the second AD acquisition chip, and the other end of the ninth resistor is grounded.

[0035] Optionally, the non-ground acquisition channel further comprises:

[0036] a second self-check signal input channel, a third self-check signal input channel and a fourth self-check signal input channel; an output terminal of the second self-check signal input channel is connected to an input terminal of the second surge protection and contact cleaning circuit for inputting a self-check signal; an output terminal of the third self-check signal input channel is connected to an input terminal of the third surge protection and contact cleaning circuit for inputting a self-check signal; and an output terminal of the fourth self-check signal input channel is connected to the third voltage dividing circuit for inputting a self-check signal.

[0037] Optionally, the second self-check signal input channel comprises:

[0038] a sixth diode, an anode of the sixth diode as an input end of the second self-check signal input channel, and a cathode of the sixth diode connected to an input end of the second anti-surge and contact cleaning circuit.

[0039] Optionally, the third self-check signal input channel comprises:

[0040] a seventh diode, an anode of the seventh diode as an input end of the third self-check signal input channel, and a cathode of the seventh diode connected to an input end of the third anti-surge and contact cleaning circuit.

[0041] Optionally, the fourth self-check signal input channel comprises:

[0042] an eighth diode, a cathode of the eighth diode as an input end of the fourth self-check signal input channel, and an anode of the eighth diode connected to the third voltage dividing circuit.

[0043] Optionally, the common-ground collection channel and the non-common-ground collection channel share one AD collection chip.

[0044] The input plug-in provided in the present application comprises a common-ground collection channel and a non-common-ground collection channel, the common-ground collection channel is used to collect a level signal in a common-ground input mode and output the collected level signal, and the non-common-ground collection channel is used to collect a level signal in a non-common-ground input mode and output the collected level signal.

[0045] It can be seen that the input plug-in provided in the present application is provided with the common-ground collection channel and the non-common-ground collection channel, the level signal in the common-ground input mode can be collected through the common-ground collection channel, the level signal in the non-common-ground input mode can be collected through the non-common-ground collection channel, and thus one input plug-in can be compatible with level signals in different input modes. In addition, after the maximum input voltage value of the collection channel is determined by the BOM, any input voltage smaller than the maximum input voltage value can be collected by the collection channel, so as to achieve the purpose of compatibility of plug-ins with different voltage levels. BRIEF DESCRIPTION OF DRAWINGS

[0046] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the prior art and the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0047] Figure 1A schematic diagram of an input plug provided by an embodiment of the present application is shown in FIG. 1.

[0048] Figure 2 A schematic diagram of a common ground collection channel provided by an embodiment of the present application is shown in FIG. 2.

[0049] Figure 3 A schematic diagram of another common ground collection channel provided by an embodiment of the present application is shown in FIG. 3.

[0050] Figure 4 A schematic diagram of a non-common ground collection channel provided by an embodiment of the present application is shown in FIG. 4.

[0051] Figure 5 A schematic diagram of another non-common ground collection channel provided by an embodiment of the present application is shown in FIG. 5. DETAILED DESCRIPTION

[0052] The core of the present application is to provide an input plug that can be compatible with different voltage levels and different input methods of level signals.

[0053] To make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions of the embodiments of the present application will be described in detail below with reference to the drawings of the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0054] Reference is made to Figure 1 , Figure 1 A schematic diagram of an input plug provided by an embodiment of the present application is shown in FIG. 1. As shown in FIG. 1, the input plug mainly includes: Figure 1

[0055] a common ground collection channel 10 and a non-common ground collection channel 20;

[0056] The common ground collection channel 10 is configured to collect a level signal using a common ground input method and output the collected level signal.

[0057] The non-common ground collection channel 20 is configured to collect a level signal using a non-common ground input method and output the collected level signal.

[0058] Specifically, the input plug provided by the present application is provided with two level signal collection channels, i.e., the common ground collection channel 10 and the non-common ground collection channel 20. The common ground collection channel 10 can collect an externally input level signal using a common ground input method, and the non-common ground collection channel 20 can collect an externally input level signal using a non-common ground input method, thereby achieving the purpose of being compatible with multiple input methods. ​

[0059] Reference Figure 2 As shown in the figure, in a specific embodiment, the common ground acquisition channel 10 comprises: a first anti-reverse circuit 101, a first anti-surge and contact cleaning circuit 102, a first voltage division circuit 103, and a first AD acquisition chip 104; the first anti-reverse circuit 101, the first anti-surge and contact cleaning circuit 102, the first voltage division circuit 103, and the first AD acquisition chip 104 are connected in sequence, the input end of the first anti-reverse circuit 101 serves as the input end of the common ground acquisition channel 10, and the first AD acquisition chip 104 outputs the acquired level signal.

[0060] Specifically, in the embodiment, the common ground acquisition channel 10 is provided with the first anti-reverse circuit 101, the first anti-surge and contact cleaning circuit 102, the first voltage division circuit 103, and the first AD acquisition chip 104. The first anti-reverse circuit 101 plays a role in preventing reverse flow of current. The first anti-surge and contact cleaning circuit 102 plays a role in preventing surge and contact cleaning. The first voltage division circuit 103 plays a role in voltage division. The first AD acquisition chip 104 is responsible for acquiring the level signal processed by the first anti-reverse circuit 101, the first anti-surge and contact cleaning circuit 102, and the first voltage division circuit 103, and outputting the acquired level signal. Specifically, the first AD acquisition chip 104 can transmit the voltage information of the acquired level signal to the processor of the main processing system through a communication interface. So that the processor of the main processing system determines the level state of the external input. In the embodiment, the level signal of the external input digital quantity is acquired by the AD acquisition chip in the form of analog quantity, and the precision requirement of the AD acquisition chip is relatively low.

[0061] Reference Figure 3 As shown in the figure, the first anti-reverse circuit 101 can comprise:

[0062] a first diode D1; the anode of the first diode D1 serves as the input end of the first anti-reverse circuit 101, and the cathode of the first diode D1 is connected to the input end of the first anti-surge and contact cleaning circuit 102.

[0063] The first voltage division circuit 103 can comprise:

[0064] a first resistor R1, a second resistor R2, and a third resistor R3;

[0065] One end of the first resistor R1 is connected to the output end of the first anti-surge and contact cleaning circuit 102, the other end of the first resistor R1 is connected to one end of the second resistor R2, the other end of the second resistor R2 is connected to one end of the third resistor R3 and the first AD acquisition chip 104, and the other end of the third resistor R3 is grounded.

[0066] Specifically, in this embodiment, the first anti-reverse circuit 101 specifically includes a diode, and the function of preventing reverse current flow is realized by virtue of the unidirectional conduction characteristic of the diode. The first voltage dividing circuit 103 specifically includes three resistors, and the function of voltage division is realized by the three resistors.

[0067] For the specific circuit structure of the first anti-surge and contact cleaning circuit 102, the present application does not make redundant description here, and reference can be made to the existing circuit capable of realizing the functions of anti-surge and contact cleaning.

[0068] For the common ground acquisition channel 10, after the single board is powered on, the processor of the main processing system reads the board position information, determines the voltage level and input mode of the externally input level signal, reads the data collected by the first AD acquisition chip 104, and calculates the externally input voltage according to the corresponding formula, and then determines the input state of the common ground acquisition channel 10 according to the pre-set threshold value.

[0069] Further, on the basis of the above embodiment, as a specific implementation manner, the common ground acquisition channel 10 further includes: a first self-check signal input circuit, configured to input a self-check signal to the common ground acquisition channel 10.

[0070] Specifically, in this embodiment, the first self-check signal input circuit is arranged in the common ground acquisition channel 10, so that the common ground acquisition channel 10 has a self-check function. The processor of the main processing system can control a self-check relay to input a self-check signal to the common ground acquisition channel 10 to perform channel self-check. One end of the self-check relay is connected to a self-check power supply (the voltage of the self-check power supply is higher than the channel input voltage), and the other end of the self-check relay is connected to the input end of the first self-check signal input circuit. The processor controls the on-off of the triode periodically to supply power to the relay coil, and when the relay coil is powered, the contact is closed, the self-check power supply is connected to the first self-check signal input circuit, and the self-check signal is input to the common ground acquisition channel 10 through the first self-check signal input circuit. The voltage of the self-check signal is higher than the channel input voltage, and the software of the processor can identify that the self-check is being performed.

[0071] As shown in Figure 3 the first self-check signal input circuit can include:

[0072] a second diode D2; the anode of the second diode D2 serves as the input end of the first self-check signal input circuit, and the cathode of the second diode D2 is connected to the input end of the first anti-surge and contact cleaning circuit 102. When the self-check power supply is connected to the first self-check signal input circuit, the self-check signal is input to the common ground acquisition channel 10 from the anode of the second diode D2.

[0073] Reference is made to Figure 4As shown, in a specific embodiment, the non-common-ground acquisition channel 20 comprises:

[0074] The second anti-reverse circuit 201, the third anti-reverse circuit 202, the fourth anti-reverse circuit 203, the second anti-surge and contact cleaning circuit 204, the third anti-surge and contact cleaning circuit 205, the second voltage dividing circuit 206, the third voltage dividing circuit 207, and the second AD acquisition chip 208;

[0075] The second anti-reverse circuit 201, the second anti-surge and contact cleaning circuit 204, the second voltage dividing circuit 206, and the second acquisition chip are sequentially connected; the third anti-reverse circuit 202, the third anti-surge and contact cleaning circuit, the third voltage dividing circuit 207, and the second acquisition chip are sequentially connected; the input end of the second anti-reverse circuit 201 is connected with the input end of the third anti-reverse circuit 202, and serves as the positive input end of the non-common-ground acquisition channel 20; the second AD acquisition chip 208 outputs the acquired level signal; the input end of the fourth anti-reverse circuit 203 is connected with the third voltage dividing circuit 207, and the output end of the fourth anti-reverse circuit 203 serves as the negative input end of the non-common-ground acquisition channel 20.

[0076] Specifically, for the case that the common-ground acquisition channel 10 comprises the first anti-reverse circuit 101, the first anti-surge and contact cleaning circuit 102, the first voltage dividing circuit 103, and the first AD acquisition chip 104, the non-common-ground acquisition channel 20 provided by the embodiment is connected with the input ends of the two common-ground acquisition channels 10 as the positive input end of the non-common-ground acquisition channel 20 on the basis of the common-ground acquisition channel 10. In addition, the negative input end of the non-common-ground acquisition channel 20 is led out from one of the common-ground acquisition channels 10. Meanwhile, the negative input end of the non-common-ground acquisition channel 20 is connected with the ground of the non-common-ground acquisition channel 20.

[0077] The second anti-reverse circuit 201, the third anti-reverse circuit 202, and the fourth anti-reverse circuit 203 all play a role in preventing the reverse flow of current. The second anti-surge and contact cleaning circuit 204 and the third anti-surge and contact cleaning circuit 205 both play a role in preventing the occurrence of surge and contact cleaning. The second voltage dividing circuit 206 and the third voltage dividing circuit 207 both play a role in voltage division. The second AD acquisition chip 208 is responsible for acquiring the level signal processed by the foregoing circuits and outputting the acquired level signal. Specifically, the second AD acquisition chip 208 can transmit the voltage information of the acquired level signal to the processor of the main processing system through a communication interface.

[0078] Among them, the reference Figure 5As shown, the second anti-reverse circuit 201 can include a third diode D3, the anode of the third diode D3 serving as the input terminal of the second anti-reverse circuit 201, and the cathode of the third diode D3 being connected to the input terminal of the second surge protection and contact cleaning circuit 204.

[0079] The third anti-reverse circuit 202 can include a fourth diode D4, the anode of the fourth diode D4 serving as the input terminal of the third anti-reverse circuit 202, and the cathode of the fourth diode D4 being connected to the input terminal of the third surge protection and contact cleaning circuit 205.

[0080] The fourth anti-reverse circuit 203 can include a fifth diode D5, the anode of the fifth diode D5 being connected to the third voltage dividing circuit 207 and serving as the input terminal of the fourth anti-reverse circuit 203, and the cathode of the fifth diode D5 serving as the output terminal of the fourth anti-reverse circuit 203.

[0081] The second voltage dividing circuit 206 can include a fourth resistor R4, a fifth resistor R5, and a sixth resistor R6, one end of the fourth resistor R4 being connected to the output terminal of the second surge protection and contact cleaning circuit 204, the other end of the fourth resistor R4 being connected to one end of the fifth resistor R5, the other end of the fifth resistor R5 being connected to one end of the sixth resistor R6 and the second AD acquisition chip 208, and the other end of the sixth resistor R6 being grounded.

[0082] The third voltage dividing circuit 207 can include a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9, one end of the seventh resistor R7 being connected to the output terminal of the third surge protection and contact cleaning circuit 205, the other end of the seventh resistor R7 being connected to one end of the eighth resistor R8, the other end of the eighth resistor R8 being connected to one end of the ninth resistor R9 and the second AD acquisition chip 208, and the other end of the ninth resistor R9 being grounded.

[0083] In this embodiment, each anti-reverse circuit specifically includes one diode, and the function of preventing reverse current flow is realized by virtue of the unidirectional conduction characteristic of the diode. Each voltage dividing circuit specifically includes three resistors, and the function of voltage division is realized by the three resistors.

[0084] For the specific circuit structure of the second surge protection and contact cleaning circuit 204 and the third surge protection and contact cleaning circuit 205, the present application does not make any further description here, and reference can be made to the existing circuit capable of realizing the functions of surge protection and contact cleaning.

[0085] When a high level is input to the positive input terminal of the non-common ground acquisition channel 20, the channel composed of the second anti-reverse circuit 201, the second surge protection and contact cleaning circuit 204, and the second voltage divider circuit 206 acquires a high level, while the channel composed of the third anti-reverse circuit 202, the third surge protection and contact cleaning circuit, and the third voltage divider circuit 207 acquires a low level (because the seventh resistor R7 and the eighth resistor R8 in the third voltage divider circuit 207 are pulled to ground, the channel composed of the third anti-reverse circuit 202, the third surge protection and contact cleaning circuit, and the third voltage divider circuit 207 acquires a low level at this time).

[0086] When a low level is input to the positive input terminal of the non-common ground acquisition channel 20, the channel composed of the second anti-reverse circuit 201, the second surge protection and contact cleaning circuit 204, and the second voltage divider circuit 206 acquires a low level, and the channel composed of the third anti-reverse circuit 202, the third surge protection and contact cleaning circuit, and the third voltage divider circuit 207 acquires a low level.

[0087] Therefore, the condition for determining that the input of the non-common ground acquisition channel 20 is high is that the channel composed of the second anti-reverse circuit 201, the second surge protection and contact cleaning circuit 204, and the second voltage divider circuit 206 acquires a high level, while the channel composed of the third anti-reverse circuit 202, the third surge protection and contact cleaning circuit, and the third voltage divider circuit 207 acquires a low level. The condition for determining that the input of the non-common ground acquisition channel 20 is low is that the channel composed of the second anti-reverse circuit 201, the second surge protection and contact cleaning circuit 204, and the second voltage divider circuit 206 acquires a low level, while the channel composed of the third anti-reverse circuit 202, the third surge protection and contact cleaning circuit, and the third voltage divider circuit 207 acquires a low level. Other level combinations are invalid.

[0088] The above embodiment adds a small number of protective devices and allows two common-ground acquisition channels 10 to be used as a non-common-ground acquisition channel 20 through wiring, which is low in cost and practical.

[0089] For example, such as Figure 5 As shown, when the third diode D3 and the fourth diode D4 are connected to a common-ground input signal, while the fifth diode D5 is left floating, the non-common-ground channel can be used as two common-ground channels, thus making the plug-in more adaptable. For example, if the plug-in originally has 12 common-ground channels and 2 non-common-ground channels, when there are 16 common-ground input signals from the external input, the 2 non-common-ground channels can be used as 4 common-ground channels; only the corresponding wiring plugs need to be changed.

[0090] The anodes of the third diode D3 and the fourth diode D4 can be connected in series with the switch, the fifth diode D5 can be connected in series with the switch, and the corresponding diode is connected to the level signal or suspended by controlling the conduction and non-conduction of the switch.

[0091] For the non-common ground acquisition channel 20, after the single board is powered on, the processor of the main processing system reads the board position information, determines the voltage level and input mode of the externally input level signal, reads the data collected by the second AD acquisition chip 208, and calculates the externally input voltage according to the corresponding formula, and then determines the state of each channel of the non-common ground acquisition channel 20 according to the pre-set threshold value, and finally comprehensively considers the state of each channel to obtain the input state of the non-common ground acquisition channel 20.

[0092] Further, based on the above embodiment, as a specific implementation manner, the non-common ground acquisition channel 20 further comprises:

[0093] The second self-check signal input channel, the third self-check signal input channel, and the fourth self-check signal input channel; the output end of the second self-check signal input channel is connected to the input end of the second anti-surge and contact cleaning circuit 204, and is used for inputting a self-check signal; the output end of the third self-check signal input channel is connected to the input end of the third anti-surge and contact cleaning circuit 205, and is used for inputting a self-check signal; and the output end of the fourth self-check signal input channel is connected to the third voltage dividing circuit 207, and is used for inputting a self-check signal.

[0094] In the embodiment, the first self-check signal input circuit is arranged in the non-common ground acquisition channel 20, so that the non-common ground acquisition channel 20 has a self-check function.

[0095] As shown in the reference Figure 5 As shown in the reference, the second self-check signal input channel can comprise a sixth diode D6; the anode of the sixth diode D6 is used as the input end of the second self-check signal input channel, and the cathode of the sixth diode D6 is connected to the input end of the second anti-surge and contact cleaning circuit 204. The third self-check signal input channel can comprise a seventh diode D7; the anode of the seventh diode D7 is used as the input end of the third self-check signal input channel, and the cathode of the seventh diode D7 is connected to the input end of the third anti-surge and contact cleaning circuit 205. The fourth self-check signal input channel can comprise an eighth diode D8; the cathode of the eighth diode D8 is used as the input end of the fourth self-check signal input channel, and the anode of the eighth diode D8 is connected to the third voltage dividing circuit 207.

[0096] Further, in order to reduce the space occupation of the input plug-in, in a specific embodiment, the common ground collection channel 10 and the non-common ground collection channel 20 share the same AD collection chip, i.e., the first AD collection chip 104 and the second AD collection chip 208 are the same AD collection chip.

[0097] To sum up, the input plug-in provided in the application comprises a common ground collection channel and a non-common ground collection channel. The common ground collection channel is used to collect the level signal in the common ground input mode and output the collected level signal. The non-common ground collection channel is used to collect the level signal in the non-common ground input mode and output the collected level signal. It can be seen that the input plug-in provided in the application is provided with the common ground collection channel and the non-common ground collection channel. The level signal in the common ground input mode can be collected through the common ground collection channel, and the level signal in the non-common ground input mode can be collected through the non-common ground collection channel. Thus, one input plug-in can be compatible with the level signals in different input modes. In addition, after the maximum input voltage value of the collection channel is determined by configuring the BOM, the collection channel can be used to collect any input voltage less than the maximum input voltage value, so as to achieve the purpose of compatibility of the plug-in with different voltage grades. For example, when the maximum input voltage value is determined to be DC 200V by configuring the BOM, the input voltages in three voltage grades of DC 24V, DC 74V and DC 110V can be collected through the same plug-in. When higher voltage grades need to be compatible, the BOM can be reconfigured.

[0098] Because the situation is complex, it is impossible to enumerate and describe one by one. Those skilled in the art should be aware that, under the basic principles of the embodiments provided in the application, there can be many examples in combination with the actual situation, and without paying enough creative labor, they should all be within the scope of the application.

[0099] The embodiments in the specification are described in a progressive manner, and each embodiment focuses on the difference from other embodiments. The same and similar parts between the embodiments can be referred to each other.

[0100] The input plug-in provided in the application is described in detail above. The principles and implementation manners of the application are described by applying specific examples. The description of the above embodiments is only used to help understand the method of the application and its core idea. It should be pointed out that, for those skilled in the art, without departing from the principles of the application, some improvements and modifications can be made to the application, and these improvements and modifications also fall within the protection scope of the claims of the application.

[0101] It also needs to be explained that in the present specification, the relational terms such as first and second and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises... a" does not, without more constraints, exclude the existence of additional identical elements in the process, method, article, or apparatus that comprises the element.

Claims

1. An input plug-in, characterized by, The application relates to a level signal acquisition circuit. The level signal acquisition circuit comprises: a common ground acquisition channel and a non-common ground acquisition channel; the common ground acquisition channel is used for acquiring a level signal in a common ground input mode and outputting the acquired level signal; the non-common ground acquisition channel is used for acquiring a level signal in a non-common ground input mode and outputting the acquired level signal; the common ground acquisition channel comprises: a first anti-reverse circuit, a first anti-surge and contact cleaning circuit, a first voltage dividing circuit and a first AD acquisition chip; the first anti-reverse circuit, the first anti-surge and contact cleaning circuit, the first voltage dividing circuit and the first AD acquisition chip are sequentially connected; the input end of the first anti-reverse circuit is used as the input end of the common ground acquisition channel; and the first AD acquisition chip outputs the acquired level signal; the non-common ground acquisition channel comprises: a second anti-reverse circuit, a third anti-reverse circuit, a fourth anti-reverse circuit, a second anti-surge and contact cleaning circuit, a third anti-surge and contact cleaning circuit, a second voltage dividing circuit, a third voltage dividing circuit and a second AD acquisition chip; 2. The input plug-in of claim 1, wherein, the second anti-reverse circuit, the second anti-surge and contact cleaning circuit, the second voltage dividing circuit and the second AD acquisition chip are sequentially connected; the third anti-reverse circuit, the third anti-surge and contact cleaning circuit, the third voltage dividing circuit and the second AD acquisition chip are sequentially connected; the input end of the second anti-reverse circuit is connected with the input end of the third anti-reverse circuit and is used as the positive input end of the non-common ground acquisition channel; the second AD acquisition chip outputs the acquired level signal; and the input end of the fourth anti-reverse circuit is connected with the third voltage dividing circuit and the output end of the fourth anti-reverse circuit is used as the negative input end of the non-common ground acquisition channel. the first anti-reverse circuit comprises:

3. The input plug-in of claim 1, wherein, a first diode; the anode of the first diode is used as the input end of the first anti-reverse circuit; and the cathode of the first diode is connected with the input end of the first anti-surge and contact cleaning circuit. the first voltage dividing circuit comprises: a first resistor, a second resistor and a third resistor; 4. The input plug-in of claim 1, wherein, one end of the first resistor is connected with the output end of the first anti-surge and contact cleaning circuit; the other end of the first resistor is connected with one end of the second resistor; the other end of the second resistor is connected with one end of the third resistor and the first AD acquisition chip; and the other end of the third resistor is grounded. the common ground acquisition channel further comprises:

5. The input plug-in of claim 4, wherein, a first self-check signal input circuit used for inputting a self-check signal to the common ground acquisition channel. the first self-check signal input circuit comprises:

6. The input plug-in of claim 1, wherein, a second diode; the anode of the second diode is used as the input end of the first self-check signal input circuit; and the cathode of the second diode is connected with the input end of the first anti-surge and contact cleaning circuit. the second anti-reverse circuit comprises:

7. The input plug-in of claim 1, wherein, a third diode; the anode of the third diode is used as the input end of the second anti-reverse circuit; and the cathode of the third diode is connected with the input end of the second anti-surge and contact cleaning circuit. the third anti-reverse circuit comprises: A fourth diode, an anode of the fourth diode as an input terminal of the third anti-reverse circuit, and a cathode of the fourth diode connected to an input terminal of the third surge protection and contact cleaning circuit.

8. The input plug-in of claim 1, wherein, The fourth anti-reverse circuit comprises: A fifth diode, an anode of the fifth diode connected to the third voltage dividing circuit as an input terminal of the fourth anti-reverse circuit, and a cathode of the fifth diode as an output terminal of the fourth anti-reverse circuit.

9. The input plug-in of claim 1, wherein, The second voltage dividing circuit comprises: A fourth resistor, a fifth resistor, and a sixth resistor; One end of the fourth resistor connected to an output terminal of the second surge protection and contact cleaning circuit, the other end of the fourth resistor connected to one end of the fifth resistor, the other end of the fifth resistor connected to one end of the sixth resistor and the second AD acquisition chip, and the other end of the sixth resistor grounded.

10. The input plug-in of claim 1, wherein, The third voltage dividing circuit comprises: A seventh resistor, an eighth resistor, and a ninth resistor; One end of the seventh resistor connected to an output terminal of the third surge protection and contact cleaning circuit, the other end of the seventh resistor connected to one end of the eighth resistor, the other end of the eighth resistor connected to one end of the ninth resistor and the second AD acquisition chip, and the other end of the ninth resistor grounded.

11. The input plug-in of claim 1, wherein, The non-common-ground acquisition channel further comprises: A second self-check signal input channel, a third self-check signal input channel, and a fourth self-check signal input channel, an output terminal of the second self-check signal input channel connected to an input terminal of the second surge protection and contact cleaning circuit for inputting a self-check signal, an output terminal of the third self-check signal input channel connected to an input terminal of the third surge protection and contact cleaning circuit for inputting a self-check signal, and an output terminal of the fourth self-check signal input channel connected to the third voltage dividing circuit for inputting a self-check signal.

12. The input plug-in of claim 11, wherein, The second self-check signal input channel comprises: A sixth diode, an anode of the sixth diode as an input terminal of the second self-check signal input channel, and a cathode of the sixth diode connected to an input terminal of the second surge protection and contact cleaning circuit.

13. The input plug-in of claim 12, wherein, The third self-check signal input channel comprises: A seventh diode, an anode of the seventh diode as an input terminal of the third self-check signal input channel, and a cathode of the seventh diode connected to an input terminal of the third surge protection and contact cleaning circuit.

14. The input plug-in of claim 12, wherein, The fourth self-check signal input channel comprises: An eighth diode, a cathode of the eighth diode as an input terminal of the fourth self-check signal input channel, and an anode of the eighth diode connected to the third voltage dividing circuit.

15. The input plug-in of claim 1, wherein, The common-ground acquisition channel and the non-common-ground acquisition channel share the same AD acquisition chip.

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